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Diff: TARGET_EFM32WG_STK3800/efm32wg_dma.h
- Revision:
- 113:f141b2784e32
- Parent:
- 98:8ab26030e058
diff -r 6f327212ef96 -r f141b2784e32 TARGET_EFM32WG_STK3800/efm32wg_dma.h
--- a/TARGET_EFM32WG_STK3800/efm32wg_dma.h Wed Jan 13 09:48:29 2016 +0000
+++ b/TARGET_EFM32WG_STK3800/efm32wg_dma.h Tue Feb 02 14:43:35 2016 +0000
@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32wg_dma.h
* @brief EFM32WG_DMA register and bit field definitions
- * @version 3.20.6
+ * @version 4.2.0
******************************************************************************
* @section License
- * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
+ * <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -30,6 +30,10 @@
*
*****************************************************************************/
/**************************************************************************//**
+* @addtogroup Parts
+* @{
+******************************************************************************/
+/**************************************************************************//**
* @defgroup EFM32WG_DMA
* @{
* @brief EFM32WG_DMA Register Declaration
@@ -75,7 +79,6 @@
__IO uint32_t RECT0; /**< Channel 0 Rectangle Register */
uint32_t RESERVED6[39]; /**< Reserved registers */
-
DMA_CH_TypeDef CH[12]; /**< Channel registers */
} DMA_TypeDef; /** @} */
@@ -1625,5 +1628,5 @@
#define DMA_CH_CTRL_SOURCESEL_EBI (_DMA_CH_CTRL_SOURCESEL_EBI << 16) /**< Shifted mode EBI for DMA_CH_CTRL */
/** @} End of group EFM32WG_DMA */
+/** @} End of group Parts */
-