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TARGET_K22F/system_MK22F51212.h@90:cb3d968589d8, 2014-10-28 (annotated)
- Committer:
- Kojto
- Date:
- Tue Oct 28 16:40:41 2014 +0000
- Revision:
- 90:cb3d968589d8
Release 90 of the mbed library
Changes:
- Freescale KSDK update (v1.0)
- K22 - new target addition
- KL43Z - new target addition
- Nucleo F091RC - new target addition
- Nucleo L152RE - STM32Cube driver
- Nordic - Softdevice v7.1.0
- Nvic files - BSD License
- LPC824 - various HAL fixes
- Nucleo F411RE - CMSIS - IAR files
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 90:cb3d968589d8 | 1 | /* |
Kojto | 90:cb3d968589d8 | 2 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 3 | ** Compilers: Keil ARM C/C++ Compiler |
Kojto | 90:cb3d968589d8 | 4 | ** Freescale C/C++ for Embedded ARM |
Kojto | 90:cb3d968589d8 | 5 | ** GNU C Compiler |
Kojto | 90:cb3d968589d8 | 6 | ** GNU C Compiler - CodeSourcery Sourcery G++ |
Kojto | 90:cb3d968589d8 | 7 | ** IAR ANSI C/C++ Compiler for ARM |
Kojto | 90:cb3d968589d8 | 8 | ** |
Kojto | 90:cb3d968589d8 | 9 | ** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014 |
Kojto | 90:cb3d968589d8 | 10 | ** Version: rev. 2.5, 2014-05-06 |
Kojto | 90:cb3d968589d8 | 11 | ** Build: b140611 |
Kojto | 90:cb3d968589d8 | 12 | ** |
Kojto | 90:cb3d968589d8 | 13 | ** Abstract: |
Kojto | 90:cb3d968589d8 | 14 | ** Provides a system configuration function and a global variable that |
Kojto | 90:cb3d968589d8 | 15 | ** contains the system frequency. It configures the device and initializes |
Kojto | 90:cb3d968589d8 | 16 | ** the oscillator (PLL) that is part of the microcontroller device. |
Kojto | 90:cb3d968589d8 | 17 | ** |
Kojto | 90:cb3d968589d8 | 18 | ** Copyright (c) 2014 Freescale Semiconductor, Inc. |
Kojto | 90:cb3d968589d8 | 19 | ** All rights reserved. |
Kojto | 90:cb3d968589d8 | 20 | ** |
Kojto | 90:cb3d968589d8 | 21 | ** Redistribution and use in source and binary forms, with or without modification, |
Kojto | 90:cb3d968589d8 | 22 | ** are permitted provided that the following conditions are met: |
Kojto | 90:cb3d968589d8 | 23 | ** |
Kojto | 90:cb3d968589d8 | 24 | ** o Redistributions of source code must retain the above copyright notice, this list |
Kojto | 90:cb3d968589d8 | 25 | ** of conditions and the following disclaimer. |
Kojto | 90:cb3d968589d8 | 26 | ** |
Kojto | 90:cb3d968589d8 | 27 | ** o Redistributions in binary form must reproduce the above copyright notice, this |
Kojto | 90:cb3d968589d8 | 28 | ** list of conditions and the following disclaimer in the documentation and/or |
Kojto | 90:cb3d968589d8 | 29 | ** other materials provided with the distribution. |
Kojto | 90:cb3d968589d8 | 30 | ** |
Kojto | 90:cb3d968589d8 | 31 | ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
Kojto | 90:cb3d968589d8 | 32 | ** contributors may be used to endorse or promote products derived from this |
Kojto | 90:cb3d968589d8 | 33 | ** software without specific prior written permission. |
Kojto | 90:cb3d968589d8 | 34 | ** |
Kojto | 90:cb3d968589d8 | 35 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
Kojto | 90:cb3d968589d8 | 36 | ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
Kojto | 90:cb3d968589d8 | 37 | ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 90:cb3d968589d8 | 38 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
Kojto | 90:cb3d968589d8 | 39 | ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
Kojto | 90:cb3d968589d8 | 40 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
Kojto | 90:cb3d968589d8 | 41 | ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
Kojto | 90:cb3d968589d8 | 42 | ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
Kojto | 90:cb3d968589d8 | 43 | ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
Kojto | 90:cb3d968589d8 | 44 | ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 90:cb3d968589d8 | 45 | ** |
Kojto | 90:cb3d968589d8 | 46 | ** http: www.freescale.com |
Kojto | 90:cb3d968589d8 | 47 | ** mail: support@freescale.com |
Kojto | 90:cb3d968589d8 | 48 | ** |
Kojto | 90:cb3d968589d8 | 49 | ** Revisions: |
Kojto | 90:cb3d968589d8 | 50 | ** - rev. 1.0 (2013-07-23) |
Kojto | 90:cb3d968589d8 | 51 | ** Initial version. |
Kojto | 90:cb3d968589d8 | 52 | ** - rev. 1.1 (2013-09-17) |
Kojto | 90:cb3d968589d8 | 53 | ** RM rev. 0.4 update. |
Kojto | 90:cb3d968589d8 | 54 | ** - rev. 2.0 (2013-10-29) |
Kojto | 90:cb3d968589d8 | 55 | ** Register accessor macros added to the memory map. |
Kojto | 90:cb3d968589d8 | 56 | ** Symbols for Processor Expert memory map compatibility added to the memory map. |
Kojto | 90:cb3d968589d8 | 57 | ** Startup file for gcc has been updated according to CMSIS 3.2. |
Kojto | 90:cb3d968589d8 | 58 | ** System initialization updated. |
Kojto | 90:cb3d968589d8 | 59 | ** - rev. 2.1 (2013-10-30) |
Kojto | 90:cb3d968589d8 | 60 | ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. |
Kojto | 90:cb3d968589d8 | 61 | ** - rev. 2.2 (2013-12-20) |
Kojto | 90:cb3d968589d8 | 62 | ** Update according to reference manual rev. 0.6, |
Kojto | 90:cb3d968589d8 | 63 | ** - rev. 2.3 (2014-01-13) |
Kojto | 90:cb3d968589d8 | 64 | ** Update according to reference manual rev. 0.61, |
Kojto | 90:cb3d968589d8 | 65 | ** - rev. 2.4 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 66 | ** The declaration of clock configurations has been moved to separate header file system_MK22F51212.h |
Kojto | 90:cb3d968589d8 | 67 | ** - rev. 2.5 (2014-05-06) |
Kojto | 90:cb3d968589d8 | 68 | ** Update according to reference manual rev. 1.0, |
Kojto | 90:cb3d968589d8 | 69 | ** Update of system and startup files. |
Kojto | 90:cb3d968589d8 | 70 | ** Module access macro module_BASES replaced by module_BASE_PTRS. |
Kojto | 90:cb3d968589d8 | 71 | ** |
Kojto | 90:cb3d968589d8 | 72 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 73 | */ |
Kojto | 90:cb3d968589d8 | 74 | |
Kojto | 90:cb3d968589d8 | 75 | /*! |
Kojto | 90:cb3d968589d8 | 76 | * @file MK22F51212 |
Kojto | 90:cb3d968589d8 | 77 | * @version 2.5 |
Kojto | 90:cb3d968589d8 | 78 | * @date 2014-05-06 |
Kojto | 90:cb3d968589d8 | 79 | * @brief Device specific configuration file for MK22F51212 (header file) |
Kojto | 90:cb3d968589d8 | 80 | * |
Kojto | 90:cb3d968589d8 | 81 | * Provides a system configuration function and a global variable that contains |
Kojto | 90:cb3d968589d8 | 82 | * the system frequency. It configures the device and initializes the oscillator |
Kojto | 90:cb3d968589d8 | 83 | * (PLL) that is part of the microcontroller device. |
Kojto | 90:cb3d968589d8 | 84 | */ |
Kojto | 90:cb3d968589d8 | 85 | |
Kojto | 90:cb3d968589d8 | 86 | #ifndef SYSTEM_MK22F51212_H_ |
Kojto | 90:cb3d968589d8 | 87 | #define SYSTEM_MK22F51212_H_ /**< Symbol preventing repeated inclusion */ |
Kojto | 90:cb3d968589d8 | 88 | |
Kojto | 90:cb3d968589d8 | 89 | #ifdef __cplusplus |
Kojto | 90:cb3d968589d8 | 90 | extern "C" { |
Kojto | 90:cb3d968589d8 | 91 | #endif |
Kojto | 90:cb3d968589d8 | 92 | |
Kojto | 90:cb3d968589d8 | 93 | #include <stdint.h> |
Kojto | 90:cb3d968589d8 | 94 | |
Kojto | 90:cb3d968589d8 | 95 | |
Kojto | 90:cb3d968589d8 | 96 | #define DISABLE_WDOG 1 |
Kojto | 90:cb3d968589d8 | 97 | |
Kojto | 90:cb3d968589d8 | 98 | #ifndef CLOCK_SETUP |
Kojto | 90:cb3d968589d8 | 99 | #define CLOCK_SETUP 4 |
Kojto | 90:cb3d968589d8 | 100 | #endif |
Kojto | 90:cb3d968589d8 | 101 | |
Kojto | 90:cb3d968589d8 | 102 | /* MCG mode constants */ |
Kojto | 90:cb3d968589d8 | 103 | |
Kojto | 90:cb3d968589d8 | 104 | #define MCG_MODE_FEI 0U |
Kojto | 90:cb3d968589d8 | 105 | #define MCG_MODE_FBI 1U |
Kojto | 90:cb3d968589d8 | 106 | #define MCG_MODE_BLPI 2U |
Kojto | 90:cb3d968589d8 | 107 | #define MCG_MODE_FEE 3U |
Kojto | 90:cb3d968589d8 | 108 | #define MCG_MODE_FBE 4U |
Kojto | 90:cb3d968589d8 | 109 | #define MCG_MODE_BLPE 5U |
Kojto | 90:cb3d968589d8 | 110 | #define MCG_MODE_PBE 6U |
Kojto | 90:cb3d968589d8 | 111 | #define MCG_MODE_PEE 7U |
Kojto | 90:cb3d968589d8 | 112 | |
Kojto | 90:cb3d968589d8 | 113 | /* Predefined clock setups |
Kojto | 90:cb3d968589d8 | 114 | 0 ... Default part configuration |
Kojto | 90:cb3d968589d8 | 115 | Multipurpose Clock Generator (MCG) in FEI mode. |
Kojto | 90:cb3d968589d8 | 116 | Reference clock source for MCG module: Slow internal reference clock |
Kojto | 90:cb3d968589d8 | 117 | Core clock = 20.97152MHz |
Kojto | 90:cb3d968589d8 | 118 | Bus clock = 20.97152MHz |
Kojto | 90:cb3d968589d8 | 119 | 1 ... Maximum achievable clock frequency configuration |
Kojto | 90:cb3d968589d8 | 120 | Multipurpose Clock Generator (MCG) in PEE mode. |
Kojto | 90:cb3d968589d8 | 121 | Reference clock source for MCG module: System oscillator 0 reference clock |
Kojto | 90:cb3d968589d8 | 122 | Core clock = 120MHz |
Kojto | 90:cb3d968589d8 | 123 | Bus clock = 60MHz |
Kojto | 90:cb3d968589d8 | 124 | 2 ... Chip internaly clocked, ready for Very Low Power Run mode. |
Kojto | 90:cb3d968589d8 | 125 | Multipurpose Clock Generator (MCG) in BLPI mode. |
Kojto | 90:cb3d968589d8 | 126 | Reference clock source for MCG module: Fast internal reference clock |
Kojto | 90:cb3d968589d8 | 127 | Core clock = 4MHz |
Kojto | 90:cb3d968589d8 | 128 | Bus clock = 4MHz |
Kojto | 90:cb3d968589d8 | 129 | 3 ... Chip externally clocked, ready for Very Low Power Run mode. |
Kojto | 90:cb3d968589d8 | 130 | Multipurpose Clock Generator (MCG) in BLPE mode. |
Kojto | 90:cb3d968589d8 | 131 | Reference clock source for MCG module: System oscillator 0 reference clock |
Kojto | 90:cb3d968589d8 | 132 | Core clock = 4MHz |
Kojto | 90:cb3d968589d8 | 133 | Bus clock = 4MHz |
Kojto | 90:cb3d968589d8 | 134 | 4 ... USB clock setup |
Kojto | 90:cb3d968589d8 | 135 | Multipurpose Clock Generator (MCG) in PEE mode. |
Kojto | 90:cb3d968589d8 | 136 | Reference clock source for MCG module: System oscillator 0 reference clock |
Kojto | 90:cb3d968589d8 | 137 | Core clock = 120MHz |
Kojto | 90:cb3d968589d8 | 138 | Bus clock = 60MHz |
Kojto | 90:cb3d968589d8 | 139 | 5 ... Maximum achievable clock frequency configuration in RUN mode |
Kojto | 90:cb3d968589d8 | 140 | Multipurpose Clock Generator (MCG) in PEE mode. |
Kojto | 90:cb3d968589d8 | 141 | Reference clock source for MCG module: System oscillator 0 reference clock |
Kojto | 90:cb3d968589d8 | 142 | Core clock = 80MHz |
Kojto | 90:cb3d968589d8 | 143 | Bus clock = 40MHz |
Kojto | 90:cb3d968589d8 | 144 | */ |
Kojto | 90:cb3d968589d8 | 145 | |
Kojto | 90:cb3d968589d8 | 146 | /* Define clock source values */ |
Kojto | 90:cb3d968589d8 | 147 | |
Kojto | 90:cb3d968589d8 | 148 | #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */ |
Kojto | 90:cb3d968589d8 | 149 | #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ |
Kojto | 90:cb3d968589d8 | 150 | #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ |
Kojto | 90:cb3d968589d8 | 151 | #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ |
Kojto | 90:cb3d968589d8 | 152 | #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */ |
Kojto | 90:cb3d968589d8 | 153 | |
Kojto | 90:cb3d968589d8 | 154 | /* RTC oscillator setting */ |
Kojto | 90:cb3d968589d8 | 155 | /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */ |
Kojto | 90:cb3d968589d8 | 156 | #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */ |
Kojto | 90:cb3d968589d8 | 157 | |
Kojto | 90:cb3d968589d8 | 158 | /* Low power mode enable */ |
Kojto | 90:cb3d968589d8 | 159 | /* SMC_PMPROT: AHSRUN=1,AVLP=1,ALLS=1,AVLLS=1 */ |
Kojto | 90:cb3d968589d8 | 160 | #define SYSTEM_SMC_PMPROT_VALUE 0xAAU /* SMC_PMPROT */ |
Kojto | 90:cb3d968589d8 | 161 | |
Kojto | 90:cb3d968589d8 | 162 | /* Internal reference clock trim */ |
Kojto | 90:cb3d968589d8 | 163 | /* #undef SLOW_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */ |
Kojto | 90:cb3d968589d8 | 164 | /* #undef SLOW_FINE_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */ |
Kojto | 90:cb3d968589d8 | 165 | /* #undef FAST_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */ |
Kojto | 90:cb3d968589d8 | 166 | /* #undef FAST_FINE_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */ |
Kojto | 90:cb3d968589d8 | 167 | |
Kojto | 90:cb3d968589d8 | 168 | #if (CLOCK_SETUP == 0) |
Kojto | 90:cb3d968589d8 | 169 | #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */ |
Kojto | 90:cb3d968589d8 | 170 | #define MCG_MODE MCG_MODE_FEI /* Clock generator mode */ |
Kojto | 90:cb3d968589d8 | 171 | /* MCG_C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */ |
Kojto | 90:cb3d968589d8 | 172 | #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */ |
Kojto | 90:cb3d968589d8 | 173 | /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ |
Kojto | 90:cb3d968589d8 | 174 | #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */ |
Kojto | 90:cb3d968589d8 | 175 | /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */ |
Kojto | 90:cb3d968589d8 | 176 | #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */ |
Kojto | 90:cb3d968589d8 | 177 | /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */ |
Kojto | 90:cb3d968589d8 | 178 | #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */ |
Kojto | 90:cb3d968589d8 | 179 | /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */ |
Kojto | 90:cb3d968589d8 | 180 | #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */ |
Kojto | 90:cb3d968589d8 | 181 | /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */ |
Kojto | 90:cb3d968589d8 | 182 | #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */ |
Kojto | 90:cb3d968589d8 | 183 | /* MCG_C7: OSCSEL=0 */ |
Kojto | 90:cb3d968589d8 | 184 | #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */ |
Kojto | 90:cb3d968589d8 | 185 | /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ |
Kojto | 90:cb3d968589d8 | 186 | #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */ |
Kojto | 90:cb3d968589d8 | 187 | /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */ |
Kojto | 90:cb3d968589d8 | 188 | #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */ |
Kojto | 90:cb3d968589d8 | 189 | /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1 */ |
Kojto | 90:cb3d968589d8 | 190 | #define SYSTEM_SIM_CLKDIV1_VALUE 0x00110000U /* SIM_CLKDIV1 */ |
Kojto | 90:cb3d968589d8 | 191 | /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */ |
Kojto | 90:cb3d968589d8 | 192 | #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */ |
Kojto | 90:cb3d968589d8 | 193 | /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=0,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */ |
Kojto | 90:cb3d968589d8 | 194 | #define SYSTEM_SIM_SOPT2_VALUE 0x00U /* SIM_SOPT2 */ |
Kojto | 90:cb3d968589d8 | 195 | #elif (CLOCK_SETUP == 1) |
Kojto | 90:cb3d968589d8 | 196 | #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */ |
Kojto | 90:cb3d968589d8 | 197 | #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */ |
Kojto | 90:cb3d968589d8 | 198 | /* MCG_C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ |
Kojto | 90:cb3d968589d8 | 199 | #define SYSTEM_MCG_C1_VALUE 0x1AU /* MCG_C1 */ |
Kojto | 90:cb3d968589d8 | 200 | /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ |
Kojto | 90:cb3d968589d8 | 201 | #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */ |
Kojto | 90:cb3d968589d8 | 202 | /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */ |
Kojto | 90:cb3d968589d8 | 203 | #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */ |
Kojto | 90:cb3d968589d8 | 204 | /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */ |
Kojto | 90:cb3d968589d8 | 205 | #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */ |
Kojto | 90:cb3d968589d8 | 206 | /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=1 */ |
Kojto | 90:cb3d968589d8 | 207 | #define SYSTEM_MCG_C5_VALUE 0x01U /* MCG_C5 */ |
Kojto | 90:cb3d968589d8 | 208 | /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=6 */ |
Kojto | 90:cb3d968589d8 | 209 | #define SYSTEM_MCG_C6_VALUE 0x46U /* MCG_C6 */ |
Kojto | 90:cb3d968589d8 | 210 | /* MCG_C7: OSCSEL=0 */ |
Kojto | 90:cb3d968589d8 | 211 | #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */ |
Kojto | 90:cb3d968589d8 | 212 | /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ |
Kojto | 90:cb3d968589d8 | 213 | #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */ |
Kojto | 90:cb3d968589d8 | 214 | /* SMC_PMCTRL: RUNM=3,STOPA=0,STOPM=0 */ |
Kojto | 90:cb3d968589d8 | 215 | #define SYSTEM_SMC_PMCTRL_VALUE 0x60U /* SMC_PMCTRL */ |
Kojto | 90:cb3d968589d8 | 216 | /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */ |
Kojto | 90:cb3d968589d8 | 217 | #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */ |
Kojto | 90:cb3d968589d8 | 218 | /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */ |
Kojto | 90:cb3d968589d8 | 219 | #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */ |
Kojto | 90:cb3d968589d8 | 220 | /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */ |
Kojto | 90:cb3d968589d8 | 221 | #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */ |
Kojto | 90:cb3d968589d8 | 222 | #elif (CLOCK_SETUP == 2) |
Kojto | 90:cb3d968589d8 | 223 | #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */ |
Kojto | 90:cb3d968589d8 | 224 | #define MCG_MODE MCG_MODE_BLPI /* Clock generator mode */ |
Kojto | 90:cb3d968589d8 | 225 | /* MCG_C1: CLKS=1,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */ |
Kojto | 90:cb3d968589d8 | 226 | #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */ |
Kojto | 90:cb3d968589d8 | 227 | /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=1,IRCS=1 */ |
Kojto | 90:cb3d968589d8 | 228 | #define SYSTEM_MCG_C2_VALUE 0x27U /* MCG_C2 */ |
Kojto | 90:cb3d968589d8 | 229 | /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */ |
Kojto | 90:cb3d968589d8 | 230 | #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */ |
Kojto | 90:cb3d968589d8 | 231 | /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */ |
Kojto | 90:cb3d968589d8 | 232 | #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */ |
Kojto | 90:cb3d968589d8 | 233 | /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */ |
Kojto | 90:cb3d968589d8 | 234 | #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */ |
Kojto | 90:cb3d968589d8 | 235 | /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */ |
Kojto | 90:cb3d968589d8 | 236 | #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */ |
Kojto | 90:cb3d968589d8 | 237 | /* MCG_C7: OSCSEL=0 */ |
Kojto | 90:cb3d968589d8 | 238 | #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */ |
Kojto | 90:cb3d968589d8 | 239 | /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ |
Kojto | 90:cb3d968589d8 | 240 | #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */ |
Kojto | 90:cb3d968589d8 | 241 | /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */ |
Kojto | 90:cb3d968589d8 | 242 | #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */ |
Kojto | 90:cb3d968589d8 | 243 | /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=4 */ |
Kojto | 90:cb3d968589d8 | 244 | #define SYSTEM_SIM_CLKDIV1_VALUE 0x00040000U /* SIM_CLKDIV1 */ |
Kojto | 90:cb3d968589d8 | 245 | /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */ |
Kojto | 90:cb3d968589d8 | 246 | #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */ |
Kojto | 90:cb3d968589d8 | 247 | /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */ |
Kojto | 90:cb3d968589d8 | 248 | #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */ |
Kojto | 90:cb3d968589d8 | 249 | #elif (CLOCK_SETUP == 3) |
Kojto | 90:cb3d968589d8 | 250 | #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */ |
Kojto | 90:cb3d968589d8 | 251 | #define MCG_MODE MCG_MODE_BLPE /* Clock generator mode */ |
Kojto | 90:cb3d968589d8 | 252 | /* MCG_C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ |
Kojto | 90:cb3d968589d8 | 253 | #define SYSTEM_MCG_C1_VALUE 0x9AU /* MCG_C1 */ |
Kojto | 90:cb3d968589d8 | 254 | /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=1,IRCS=1 */ |
Kojto | 90:cb3d968589d8 | 255 | #define SYSTEM_MCG_C2_VALUE 0x27U /* MCG_C2 */ |
Kojto | 90:cb3d968589d8 | 256 | /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */ |
Kojto | 90:cb3d968589d8 | 257 | #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */ |
Kojto | 90:cb3d968589d8 | 258 | /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=1,LOCS0=0 */ |
Kojto | 90:cb3d968589d8 | 259 | #define SYSTEM_MCG_SC_VALUE 0x02U /* MCG_SC */ |
Kojto | 90:cb3d968589d8 | 260 | /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */ |
Kojto | 90:cb3d968589d8 | 261 | #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */ |
Kojto | 90:cb3d968589d8 | 262 | /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */ |
Kojto | 90:cb3d968589d8 | 263 | #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */ |
Kojto | 90:cb3d968589d8 | 264 | /* MCG_C7: OSCSEL=0 */ |
Kojto | 90:cb3d968589d8 | 265 | #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */ |
Kojto | 90:cb3d968589d8 | 266 | /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ |
Kojto | 90:cb3d968589d8 | 267 | #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */ |
Kojto | 90:cb3d968589d8 | 268 | /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */ |
Kojto | 90:cb3d968589d8 | 269 | #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */ |
Kojto | 90:cb3d968589d8 | 270 | /* SIM_CLKDIV1: OUTDIV1=1,OUTDIV2=1,OUTDIV3=1,OUTDIV4=7 */ |
Kojto | 90:cb3d968589d8 | 271 | #define SYSTEM_SIM_CLKDIV1_VALUE 0x11170000U /* SIM_CLKDIV1 */ |
Kojto | 90:cb3d968589d8 | 272 | /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */ |
Kojto | 90:cb3d968589d8 | 273 | #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */ |
Kojto | 90:cb3d968589d8 | 274 | /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */ |
Kojto | 90:cb3d968589d8 | 275 | #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */ |
Kojto | 90:cb3d968589d8 | 276 | #elif (CLOCK_SETUP == 4) |
Kojto | 90:cb3d968589d8 | 277 | #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */ |
Kojto | 90:cb3d968589d8 | 278 | #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */ |
Kojto | 90:cb3d968589d8 | 279 | /* MCG_C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ |
Kojto | 90:cb3d968589d8 | 280 | #define SYSTEM_MCG_C1_VALUE 0x1AU /* MCG_C1 */ |
Kojto | 90:cb3d968589d8 | 281 | /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ |
Kojto | 90:cb3d968589d8 | 282 | #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */ |
Kojto | 90:cb3d968589d8 | 283 | /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */ |
Kojto | 90:cb3d968589d8 | 284 | #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */ |
Kojto | 90:cb3d968589d8 | 285 | /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */ |
Kojto | 90:cb3d968589d8 | 286 | #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */ |
Kojto | 90:cb3d968589d8 | 287 | /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=1 */ |
Kojto | 90:cb3d968589d8 | 288 | #define SYSTEM_MCG_C5_VALUE 0x01U /* MCG_C5 */ |
Kojto | 90:cb3d968589d8 | 289 | /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=6 */ |
Kojto | 90:cb3d968589d8 | 290 | #define SYSTEM_MCG_C6_VALUE 0x46U /* MCG_C6 */ |
Kojto | 90:cb3d968589d8 | 291 | /* MCG_C7: OSCSEL=0 */ |
Kojto | 90:cb3d968589d8 | 292 | #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */ |
Kojto | 90:cb3d968589d8 | 293 | /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ |
Kojto | 90:cb3d968589d8 | 294 | #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */ |
Kojto | 90:cb3d968589d8 | 295 | /* SMC_PMCTRL: RUNM=3,STOPA=0,STOPM=0 */ |
Kojto | 90:cb3d968589d8 | 296 | #define SYSTEM_SMC_PMCTRL_VALUE 0x60U /* SMC_PMCTRL */ |
Kojto | 90:cb3d968589d8 | 297 | /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */ |
Kojto | 90:cb3d968589d8 | 298 | #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */ |
Kojto | 90:cb3d968589d8 | 299 | /* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */ |
Kojto | 90:cb3d968589d8 | 300 | #define SYSTEM_SIM_CLKDIV2_VALUE 0x09U /* SIM_CLKDIV2 */ |
Kojto | 90:cb3d968589d8 | 301 | /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */ |
Kojto | 90:cb3d968589d8 | 302 | #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */ |
Kojto | 90:cb3d968589d8 | 303 | /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */ |
Kojto | 90:cb3d968589d8 | 304 | #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */ |
Kojto | 90:cb3d968589d8 | 305 | #elif (CLOCK_SETUP == 5) |
Kojto | 90:cb3d968589d8 | 306 | #define DEFAULT_SYSTEM_CLOCK 80000000u /* Default System clock value */ |
Kojto | 90:cb3d968589d8 | 307 | #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */ |
Kojto | 90:cb3d968589d8 | 308 | /* MCG_C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ |
Kojto | 90:cb3d968589d8 | 309 | #define SYSTEM_MCG_C1_VALUE 0x1AU /* MCG_C1 */ |
Kojto | 90:cb3d968589d8 | 310 | /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ |
Kojto | 90:cb3d968589d8 | 311 | #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */ |
Kojto | 90:cb3d968589d8 | 312 | /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */ |
Kojto | 90:cb3d968589d8 | 313 | #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */ |
Kojto | 90:cb3d968589d8 | 314 | /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */ |
Kojto | 90:cb3d968589d8 | 315 | #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */ |
Kojto | 90:cb3d968589d8 | 316 | /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=3 */ |
Kojto | 90:cb3d968589d8 | 317 | #define SYSTEM_MCG_C5_VALUE 0x03U /* MCG_C5 */ |
Kojto | 90:cb3d968589d8 | 318 | /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x10 */ |
Kojto | 90:cb3d968589d8 | 319 | #define SYSTEM_MCG_C6_VALUE 0x50U /* MCG_C6 */ |
Kojto | 90:cb3d968589d8 | 320 | /* MCG_C7: OSCSEL=0 */ |
Kojto | 90:cb3d968589d8 | 321 | #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */ |
Kojto | 90:cb3d968589d8 | 322 | /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ |
Kojto | 90:cb3d968589d8 | 323 | #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */ |
Kojto | 90:cb3d968589d8 | 324 | /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */ |
Kojto | 90:cb3d968589d8 | 325 | #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */ |
Kojto | 90:cb3d968589d8 | 326 | /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=3 */ |
Kojto | 90:cb3d968589d8 | 327 | #define SYSTEM_SIM_CLKDIV1_VALUE 0x01130000U /* SIM_CLKDIV1 */ |
Kojto | 90:cb3d968589d8 | 328 | /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */ |
Kojto | 90:cb3d968589d8 | 329 | #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */ |
Kojto | 90:cb3d968589d8 | 330 | /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */ |
Kojto | 90:cb3d968589d8 | 331 | #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */ |
Kojto | 90:cb3d968589d8 | 332 | #endif |
Kojto | 90:cb3d968589d8 | 333 | |
Kojto | 90:cb3d968589d8 | 334 | /** |
Kojto | 90:cb3d968589d8 | 335 | * @brief System clock frequency (core clock) |
Kojto | 90:cb3d968589d8 | 336 | * |
Kojto | 90:cb3d968589d8 | 337 | * The system clock frequency supplied to the SysTick timer and the processor |
Kojto | 90:cb3d968589d8 | 338 | * core clock. This variable can be used by the user application to setup the |
Kojto | 90:cb3d968589d8 | 339 | * SysTick timer or configure other parameters. It may also be used by debugger to |
Kojto | 90:cb3d968589d8 | 340 | * query the frequency of the debug timer or configure the trace clock speed |
Kojto | 90:cb3d968589d8 | 341 | * SystemCoreClock is initialized with a correct predefined value. |
Kojto | 90:cb3d968589d8 | 342 | */ |
Kojto | 90:cb3d968589d8 | 343 | extern uint32_t SystemCoreClock; |
Kojto | 90:cb3d968589d8 | 344 | |
Kojto | 90:cb3d968589d8 | 345 | /** |
Kojto | 90:cb3d968589d8 | 346 | * @brief Setup the microcontroller system. |
Kojto | 90:cb3d968589d8 | 347 | * |
Kojto | 90:cb3d968589d8 | 348 | * Typically this function configures the oscillator (PLL) that is part of the |
Kojto | 90:cb3d968589d8 | 349 | * microcontroller device. For systems with variable clock speed it also updates |
Kojto | 90:cb3d968589d8 | 350 | * the variable SystemCoreClock. SystemInit is called from startup_device file. |
Kojto | 90:cb3d968589d8 | 351 | */ |
Kojto | 90:cb3d968589d8 | 352 | void SystemInit (void); |
Kojto | 90:cb3d968589d8 | 353 | |
Kojto | 90:cb3d968589d8 | 354 | /** |
Kojto | 90:cb3d968589d8 | 355 | * @brief Updates the SystemCoreClock variable. |
Kojto | 90:cb3d968589d8 | 356 | * |
Kojto | 90:cb3d968589d8 | 357 | * It must be called whenever the core clock is changed during program |
Kojto | 90:cb3d968589d8 | 358 | * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates |
Kojto | 90:cb3d968589d8 | 359 | * the current core clock. |
Kojto | 90:cb3d968589d8 | 360 | */ |
Kojto | 90:cb3d968589d8 | 361 | void SystemCoreClockUpdate (void); |
Kojto | 90:cb3d968589d8 | 362 | |
Kojto | 90:cb3d968589d8 | 363 | #ifdef __cplusplus |
Kojto | 90:cb3d968589d8 | 364 | } |
Kojto | 90:cb3d968589d8 | 365 | #endif |
Kojto | 90:cb3d968589d8 | 366 | |
Kojto | 90:cb3d968589d8 | 367 | #endif /* #if !defined(SYSTEM_MK22F51212_H_) */ |