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TARGET_NUCLEO_F746ZG/stm32f7xx_hal_pwr.h@116:c0f6e94411f5, 2016-03-15 (annotated)
- Committer:
- Kojto
- Date:
- Tue Mar 15 14:34:00 2016 +0000
- Revision:
- 116:c0f6e94411f5
- Parent:
- 115:87f2f5183dfb
Release 116 of the mbed library
Changes:
- new targets - NUCLEO_L073RZ
- fixes to IOTSS BEID platform
- LPC824, LPC1549 and LPC11U68 - fix PWMOut SCT bugs
- STM32F7 - Cube driver
- STM32F4 - add RTC LSI macro, defined as 0
- STM32F3 - fix multiple ADC clock initialization
- retarget - binary mode fix for GCC
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 115:87f2f5183dfb | 1 | /** |
Kojto | 115:87f2f5183dfb | 2 | ****************************************************************************** |
Kojto | 115:87f2f5183dfb | 3 | * @file stm32f7xx_hal_pwr.h |
Kojto | 115:87f2f5183dfb | 4 | * @author MCD Application Team |
Kojto | 116:c0f6e94411f5 | 5 | * @version V1.0.4 |
Kojto | 116:c0f6e94411f5 | 6 | * @date 09-December-2015 |
Kojto | 115:87f2f5183dfb | 7 | * @brief Header file of PWR HAL module. |
Kojto | 115:87f2f5183dfb | 8 | ****************************************************************************** |
Kojto | 115:87f2f5183dfb | 9 | * @attention |
Kojto | 115:87f2f5183dfb | 10 | * |
Kojto | 115:87f2f5183dfb | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
Kojto | 115:87f2f5183dfb | 12 | * |
Kojto | 115:87f2f5183dfb | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 115:87f2f5183dfb | 14 | * are permitted provided that the following conditions are met: |
Kojto | 115:87f2f5183dfb | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 115:87f2f5183dfb | 16 | * this list of conditions and the following disclaimer. |
Kojto | 115:87f2f5183dfb | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 115:87f2f5183dfb | 18 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 115:87f2f5183dfb | 19 | * and/or other materials provided with the distribution. |
Kojto | 115:87f2f5183dfb | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 115:87f2f5183dfb | 21 | * may be used to endorse or promote products derived from this software |
Kojto | 115:87f2f5183dfb | 22 | * without specific prior written permission. |
Kojto | 115:87f2f5183dfb | 23 | * |
Kojto | 115:87f2f5183dfb | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 115:87f2f5183dfb | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 115:87f2f5183dfb | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 115:87f2f5183dfb | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 115:87f2f5183dfb | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 115:87f2f5183dfb | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 115:87f2f5183dfb | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 115:87f2f5183dfb | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 115:87f2f5183dfb | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 115:87f2f5183dfb | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 115:87f2f5183dfb | 34 | * |
Kojto | 115:87f2f5183dfb | 35 | ****************************************************************************** |
Kojto | 115:87f2f5183dfb | 36 | */ |
Kojto | 115:87f2f5183dfb | 37 | |
Kojto | 115:87f2f5183dfb | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 39 | #ifndef __STM32F7xx_HAL_PWR_H |
Kojto | 115:87f2f5183dfb | 40 | #define __STM32F7xx_HAL_PWR_H |
Kojto | 115:87f2f5183dfb | 41 | |
Kojto | 115:87f2f5183dfb | 42 | #ifdef __cplusplus |
Kojto | 115:87f2f5183dfb | 43 | extern "C" { |
Kojto | 115:87f2f5183dfb | 44 | #endif |
Kojto | 115:87f2f5183dfb | 45 | |
Kojto | 115:87f2f5183dfb | 46 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 47 | #include "stm32f7xx_hal_def.h" |
Kojto | 115:87f2f5183dfb | 48 | |
Kojto | 115:87f2f5183dfb | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
Kojto | 115:87f2f5183dfb | 50 | * @{ |
Kojto | 115:87f2f5183dfb | 51 | */ |
Kojto | 115:87f2f5183dfb | 52 | |
Kojto | 115:87f2f5183dfb | 53 | /** @addtogroup PWR |
Kojto | 115:87f2f5183dfb | 54 | * @{ |
Kojto | 115:87f2f5183dfb | 55 | */ |
Kojto | 115:87f2f5183dfb | 56 | |
Kojto | 115:87f2f5183dfb | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 58 | |
Kojto | 115:87f2f5183dfb | 59 | /** @defgroup PWR_Exported_Types PWR Exported Types |
Kojto | 115:87f2f5183dfb | 60 | * @{ |
Kojto | 115:87f2f5183dfb | 61 | */ |
Kojto | 115:87f2f5183dfb | 62 | |
Kojto | 115:87f2f5183dfb | 63 | /** |
Kojto | 115:87f2f5183dfb | 64 | * @brief PWR PVD configuration structure definition |
Kojto | 115:87f2f5183dfb | 65 | */ |
Kojto | 115:87f2f5183dfb | 66 | typedef struct |
Kojto | 115:87f2f5183dfb | 67 | { |
Kojto | 115:87f2f5183dfb | 68 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
Kojto | 115:87f2f5183dfb | 69 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
Kojto | 115:87f2f5183dfb | 70 | |
Kojto | 115:87f2f5183dfb | 71 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
Kojto | 115:87f2f5183dfb | 72 | This parameter can be a value of @ref PWR_PVD_Mode */ |
Kojto | 115:87f2f5183dfb | 73 | }PWR_PVDTypeDef; |
Kojto | 115:87f2f5183dfb | 74 | |
Kojto | 115:87f2f5183dfb | 75 | /** |
Kojto | 115:87f2f5183dfb | 76 | * @} |
Kojto | 115:87f2f5183dfb | 77 | */ |
Kojto | 115:87f2f5183dfb | 78 | |
Kojto | 115:87f2f5183dfb | 79 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 80 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
Kojto | 115:87f2f5183dfb | 81 | * @{ |
Kojto | 115:87f2f5183dfb | 82 | */ |
Kojto | 115:87f2f5183dfb | 83 | |
Kojto | 115:87f2f5183dfb | 84 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
Kojto | 115:87f2f5183dfb | 85 | * @{ |
Kojto | 115:87f2f5183dfb | 86 | */ |
Kojto | 115:87f2f5183dfb | 87 | #define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0 |
Kojto | 115:87f2f5183dfb | 88 | #define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1 |
Kojto | 115:87f2f5183dfb | 89 | #define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2 |
Kojto | 115:87f2f5183dfb | 90 | #define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3 |
Kojto | 115:87f2f5183dfb | 91 | #define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4 |
Kojto | 115:87f2f5183dfb | 92 | #define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5 |
Kojto | 115:87f2f5183dfb | 93 | #define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6 |
Kojto | 115:87f2f5183dfb | 94 | #define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage |
Kojto | 115:87f2f5183dfb | 95 | (Compare internally to VREFINT) */ |
Kojto | 115:87f2f5183dfb | 96 | |
Kojto | 115:87f2f5183dfb | 97 | /** |
Kojto | 115:87f2f5183dfb | 98 | * @} |
Kojto | 115:87f2f5183dfb | 99 | */ |
Kojto | 115:87f2f5183dfb | 100 | |
Kojto | 115:87f2f5183dfb | 101 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
Kojto | 115:87f2f5183dfb | 102 | * @{ |
Kojto | 115:87f2f5183dfb | 103 | */ |
Kojto | 115:87f2f5183dfb | 104 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ |
Kojto | 115:87f2f5183dfb | 105 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
Kojto | 115:87f2f5183dfb | 106 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
Kojto | 115:87f2f5183dfb | 107 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
Kojto | 115:87f2f5183dfb | 108 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ |
Kojto | 115:87f2f5183dfb | 109 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ |
Kojto | 115:87f2f5183dfb | 110 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ |
Kojto | 115:87f2f5183dfb | 111 | /** |
Kojto | 115:87f2f5183dfb | 112 | * @} |
Kojto | 115:87f2f5183dfb | 113 | */ |
Kojto | 115:87f2f5183dfb | 114 | |
Kojto | 115:87f2f5183dfb | 115 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode |
Kojto | 115:87f2f5183dfb | 116 | * @{ |
Kojto | 115:87f2f5183dfb | 117 | */ |
Kojto | 115:87f2f5183dfb | 118 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) |
Kojto | 115:87f2f5183dfb | 119 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS |
Kojto | 115:87f2f5183dfb | 120 | /** |
Kojto | 115:87f2f5183dfb | 121 | * @} |
Kojto | 115:87f2f5183dfb | 122 | */ |
Kojto | 115:87f2f5183dfb | 123 | |
Kojto | 115:87f2f5183dfb | 124 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
Kojto | 115:87f2f5183dfb | 125 | * @{ |
Kojto | 115:87f2f5183dfb | 126 | */ |
Kojto | 115:87f2f5183dfb | 127 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
Kojto | 115:87f2f5183dfb | 128 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
Kojto | 115:87f2f5183dfb | 129 | /** |
Kojto | 115:87f2f5183dfb | 130 | * @} |
Kojto | 115:87f2f5183dfb | 131 | */ |
Kojto | 115:87f2f5183dfb | 132 | |
Kojto | 115:87f2f5183dfb | 133 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
Kojto | 115:87f2f5183dfb | 134 | * @{ |
Kojto | 115:87f2f5183dfb | 135 | */ |
Kojto | 115:87f2f5183dfb | 136 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
Kojto | 115:87f2f5183dfb | 137 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
Kojto | 115:87f2f5183dfb | 138 | /** |
Kojto | 115:87f2f5183dfb | 139 | * @} |
Kojto | 115:87f2f5183dfb | 140 | */ |
Kojto | 115:87f2f5183dfb | 141 | |
Kojto | 115:87f2f5183dfb | 142 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale |
Kojto | 115:87f2f5183dfb | 143 | * @{ |
Kojto | 115:87f2f5183dfb | 144 | */ |
Kojto | 115:87f2f5183dfb | 145 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS |
Kojto | 115:87f2f5183dfb | 146 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 |
Kojto | 115:87f2f5183dfb | 147 | #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR1_VOS_0 |
Kojto | 115:87f2f5183dfb | 148 | /** |
Kojto | 115:87f2f5183dfb | 149 | * @} |
Kojto | 115:87f2f5183dfb | 150 | */ |
Kojto | 115:87f2f5183dfb | 151 | |
Kojto | 115:87f2f5183dfb | 152 | /** @defgroup PWR_Flag PWR Flag |
Kojto | 115:87f2f5183dfb | 153 | * @{ |
Kojto | 115:87f2f5183dfb | 154 | */ |
Kojto | 115:87f2f5183dfb | 155 | #define PWR_FLAG_WU PWR_CSR1_WUIF |
Kojto | 115:87f2f5183dfb | 156 | #define PWR_FLAG_SB PWR_CSR1_SBF |
Kojto | 115:87f2f5183dfb | 157 | #define PWR_FLAG_PVDO PWR_CSR1_PVDO |
Kojto | 115:87f2f5183dfb | 158 | #define PWR_FLAG_BRR PWR_CSR1_BRR |
Kojto | 115:87f2f5183dfb | 159 | #define PWR_FLAG_VOSRDY PWR_CSR1_VOSRDY |
Kojto | 115:87f2f5183dfb | 160 | /** |
Kojto | 115:87f2f5183dfb | 161 | * @} |
Kojto | 115:87f2f5183dfb | 162 | */ |
Kojto | 115:87f2f5183dfb | 163 | |
Kojto | 115:87f2f5183dfb | 164 | /** |
Kojto | 115:87f2f5183dfb | 165 | * @} |
Kojto | 115:87f2f5183dfb | 166 | */ |
Kojto | 115:87f2f5183dfb | 167 | |
Kojto | 115:87f2f5183dfb | 168 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 169 | /** @defgroup PWR_Exported_Macro PWR Exported Macro |
Kojto | 115:87f2f5183dfb | 170 | * @{ |
Kojto | 115:87f2f5183dfb | 171 | */ |
Kojto | 115:87f2f5183dfb | 172 | |
Kojto | 115:87f2f5183dfb | 173 | /** @brief macros configure the main internal regulator output voltage. |
Kojto | 115:87f2f5183dfb | 174 | * @param __REGULATOR__: specifies the regulator output voltage to achieve |
Kojto | 115:87f2f5183dfb | 175 | * a tradeoff between performance and power consumption when the device does |
Kojto | 115:87f2f5183dfb | 176 | * not operate at the maximum frequency (refer to the datasheets for more details). |
Kojto | 115:87f2f5183dfb | 177 | * This parameter can be one of the following values: |
Kojto | 115:87f2f5183dfb | 178 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode |
Kojto | 115:87f2f5183dfb | 179 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode |
Kojto | 115:87f2f5183dfb | 180 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode |
Kojto | 115:87f2f5183dfb | 181 | * @retval None |
Kojto | 115:87f2f5183dfb | 182 | */ |
Kojto | 115:87f2f5183dfb | 183 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ |
Kojto | 116:c0f6e94411f5 | 184 | __IO uint32_t tmpreg = 0x00; \ |
Kojto | 115:87f2f5183dfb | 185 | MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ |
Kojto | 115:87f2f5183dfb | 186 | /* Delay after an RCC peripheral clock enabling */ \ |
Kojto | 115:87f2f5183dfb | 187 | tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ |
Kojto | 115:87f2f5183dfb | 188 | UNUSED(tmpreg); \ |
Kojto | 115:87f2f5183dfb | 189 | } while(0) |
Kojto | 115:87f2f5183dfb | 190 | |
Kojto | 115:87f2f5183dfb | 191 | /** @brief Check PWR flag is set or not. |
Kojto | 115:87f2f5183dfb | 192 | * @param __FLAG__: specifies the flag to check. |
Kojto | 115:87f2f5183dfb | 193 | * This parameter can be one of the following values: |
Kojto | 115:87f2f5183dfb | 194 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
Kojto | 115:87f2f5183dfb | 195 | * was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B), |
Kojto | 115:87f2f5183dfb | 196 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup)). |
Kojto | 115:87f2f5183dfb | 197 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
Kojto | 115:87f2f5183dfb | 198 | * resumed from StandBy mode. |
Kojto | 115:87f2f5183dfb | 199 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
Kojto | 115:87f2f5183dfb | 200 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
Kojto | 115:87f2f5183dfb | 201 | * For this reason, this bit is equal to 0 after Standby or reset |
Kojto | 115:87f2f5183dfb | 202 | * until the PVDE bit is set. |
Kojto | 115:87f2f5183dfb | 203 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset |
Kojto | 115:87f2f5183dfb | 204 | * when the device wakes up from Standby mode or by a system reset |
Kojto | 115:87f2f5183dfb | 205 | * or power reset. |
Kojto | 115:87f2f5183dfb | 206 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage |
Kojto | 115:87f2f5183dfb | 207 | * scaling output selection is ready. |
Kojto | 115:87f2f5183dfb | 208 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
Kojto | 115:87f2f5183dfb | 209 | */ |
Kojto | 115:87f2f5183dfb | 210 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__)) |
Kojto | 115:87f2f5183dfb | 211 | |
Kojto | 115:87f2f5183dfb | 212 | /** @brief Clear the PWR's pending flags. |
Kojto | 115:87f2f5183dfb | 213 | * @param __FLAG__: specifies the flag to clear. |
Kojto | 115:87f2f5183dfb | 214 | * This parameter can be one of the following values: |
Kojto | 115:87f2f5183dfb | 215 | * @arg PWR_FLAG_SB: StandBy flag |
Kojto | 115:87f2f5183dfb | 216 | */ |
Kojto | 115:87f2f5183dfb | 217 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 |= (__FLAG__) << 2) |
Kojto | 115:87f2f5183dfb | 218 | |
Kojto | 115:87f2f5183dfb | 219 | /** |
Kojto | 115:87f2f5183dfb | 220 | * @brief Enable the PVD Exti Line 16. |
Kojto | 115:87f2f5183dfb | 221 | * @retval None. |
Kojto | 115:87f2f5183dfb | 222 | */ |
Kojto | 115:87f2f5183dfb | 223 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 224 | |
Kojto | 115:87f2f5183dfb | 225 | /** |
Kojto | 115:87f2f5183dfb | 226 | * @brief Disable the PVD EXTI Line 16. |
Kojto | 115:87f2f5183dfb | 227 | * @retval None. |
Kojto | 115:87f2f5183dfb | 228 | */ |
Kojto | 115:87f2f5183dfb | 229 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 230 | |
Kojto | 115:87f2f5183dfb | 231 | /** |
Kojto | 115:87f2f5183dfb | 232 | * @brief Enable event on PVD Exti Line 16. |
Kojto | 115:87f2f5183dfb | 233 | * @retval None. |
Kojto | 115:87f2f5183dfb | 234 | */ |
Kojto | 115:87f2f5183dfb | 235 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 236 | |
Kojto | 115:87f2f5183dfb | 237 | /** |
Kojto | 115:87f2f5183dfb | 238 | * @brief Disable event on PVD Exti Line 16. |
Kojto | 115:87f2f5183dfb | 239 | * @retval None. |
Kojto | 115:87f2f5183dfb | 240 | */ |
Kojto | 115:87f2f5183dfb | 241 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 242 | |
Kojto | 115:87f2f5183dfb | 243 | /** |
Kojto | 115:87f2f5183dfb | 244 | * @brief Enable the PVD Extended Interrupt Rising Trigger. |
Kojto | 115:87f2f5183dfb | 245 | * @retval None. |
Kojto | 115:87f2f5183dfb | 246 | */ |
Kojto | 115:87f2f5183dfb | 247 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
Kojto | 115:87f2f5183dfb | 248 | |
Kojto | 115:87f2f5183dfb | 249 | /** |
Kojto | 115:87f2f5183dfb | 250 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
Kojto | 115:87f2f5183dfb | 251 | * @retval None. |
Kojto | 115:87f2f5183dfb | 252 | */ |
Kojto | 115:87f2f5183dfb | 253 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
Kojto | 115:87f2f5183dfb | 254 | |
Kojto | 115:87f2f5183dfb | 255 | /** |
Kojto | 115:87f2f5183dfb | 256 | * @brief Enable the PVD Extended Interrupt Falling Trigger. |
Kojto | 115:87f2f5183dfb | 257 | * @retval None. |
Kojto | 115:87f2f5183dfb | 258 | */ |
Kojto | 115:87f2f5183dfb | 259 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
Kojto | 115:87f2f5183dfb | 260 | |
Kojto | 115:87f2f5183dfb | 261 | |
Kojto | 115:87f2f5183dfb | 262 | /** |
Kojto | 115:87f2f5183dfb | 263 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
Kojto | 115:87f2f5183dfb | 264 | * @retval None. |
Kojto | 115:87f2f5183dfb | 265 | */ |
Kojto | 115:87f2f5183dfb | 266 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
Kojto | 115:87f2f5183dfb | 267 | |
Kojto | 115:87f2f5183dfb | 268 | |
Kojto | 115:87f2f5183dfb | 269 | /** |
Kojto | 115:87f2f5183dfb | 270 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. |
Kojto | 115:87f2f5183dfb | 271 | * @retval None. |
Kojto | 115:87f2f5183dfb | 272 | */ |
Kojto | 115:87f2f5183dfb | 273 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
Kojto | 115:87f2f5183dfb | 274 | |
Kojto | 115:87f2f5183dfb | 275 | /** |
Kojto | 115:87f2f5183dfb | 276 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
Kojto | 115:87f2f5183dfb | 277 | * @retval None. |
Kojto | 115:87f2f5183dfb | 278 | */ |
Kojto | 115:87f2f5183dfb | 279 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
Kojto | 115:87f2f5183dfb | 280 | |
Kojto | 115:87f2f5183dfb | 281 | /** |
Kojto | 115:87f2f5183dfb | 282 | * @brief checks whether the specified PVD Exti interrupt flag is set or not. |
Kojto | 115:87f2f5183dfb | 283 | * @retval EXTI PVD Line Status. |
Kojto | 115:87f2f5183dfb | 284 | */ |
Kojto | 115:87f2f5183dfb | 285 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 286 | |
Kojto | 115:87f2f5183dfb | 287 | /** |
Kojto | 115:87f2f5183dfb | 288 | * @brief Clear the PVD Exti flag. |
Kojto | 115:87f2f5183dfb | 289 | * @retval None. |
Kojto | 115:87f2f5183dfb | 290 | */ |
Kojto | 115:87f2f5183dfb | 291 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 292 | |
Kojto | 115:87f2f5183dfb | 293 | /** |
Kojto | 115:87f2f5183dfb | 294 | * @brief Generates a Software interrupt on PVD EXTI line. |
Kojto | 115:87f2f5183dfb | 295 | * @retval None |
Kojto | 115:87f2f5183dfb | 296 | */ |
Kojto | 115:87f2f5183dfb | 297 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
Kojto | 115:87f2f5183dfb | 298 | |
Kojto | 115:87f2f5183dfb | 299 | /** |
Kojto | 115:87f2f5183dfb | 300 | * @} |
Kojto | 115:87f2f5183dfb | 301 | */ |
Kojto | 115:87f2f5183dfb | 302 | |
Kojto | 115:87f2f5183dfb | 303 | /* Include PWR HAL Extension module */ |
Kojto | 115:87f2f5183dfb | 304 | #include "stm32f7xx_hal_pwr_ex.h" |
Kojto | 115:87f2f5183dfb | 305 | |
Kojto | 115:87f2f5183dfb | 306 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 307 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
Kojto | 115:87f2f5183dfb | 308 | * @{ |
Kojto | 115:87f2f5183dfb | 309 | */ |
Kojto | 115:87f2f5183dfb | 310 | |
Kojto | 115:87f2f5183dfb | 311 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
Kojto | 115:87f2f5183dfb | 312 | * @{ |
Kojto | 115:87f2f5183dfb | 313 | */ |
Kojto | 115:87f2f5183dfb | 314 | /* Initialization and de-initialization functions *****************************/ |
Kojto | 115:87f2f5183dfb | 315 | void HAL_PWR_DeInit(void); |
Kojto | 115:87f2f5183dfb | 316 | void HAL_PWR_EnableBkUpAccess(void); |
Kojto | 115:87f2f5183dfb | 317 | void HAL_PWR_DisableBkUpAccess(void); |
Kojto | 115:87f2f5183dfb | 318 | /** |
Kojto | 115:87f2f5183dfb | 319 | * @} |
Kojto | 115:87f2f5183dfb | 320 | */ |
Kojto | 115:87f2f5183dfb | 321 | |
Kojto | 115:87f2f5183dfb | 322 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
Kojto | 115:87f2f5183dfb | 323 | * @{ |
Kojto | 115:87f2f5183dfb | 324 | */ |
Kojto | 115:87f2f5183dfb | 325 | /* Peripheral Control functions **********************************************/ |
Kojto | 115:87f2f5183dfb | 326 | /* PVD configuration */ |
Kojto | 115:87f2f5183dfb | 327 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
Kojto | 115:87f2f5183dfb | 328 | void HAL_PWR_EnablePVD(void); |
Kojto | 115:87f2f5183dfb | 329 | void HAL_PWR_DisablePVD(void); |
Kojto | 115:87f2f5183dfb | 330 | |
Kojto | 115:87f2f5183dfb | 331 | /* WakeUp pins configuration */ |
Kojto | 115:87f2f5183dfb | 332 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); |
Kojto | 115:87f2f5183dfb | 333 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
Kojto | 115:87f2f5183dfb | 334 | |
Kojto | 115:87f2f5183dfb | 335 | /* Low Power modes entry */ |
Kojto | 115:87f2f5183dfb | 336 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
Kojto | 115:87f2f5183dfb | 337 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
Kojto | 115:87f2f5183dfb | 338 | void HAL_PWR_EnterSTANDBYMode(void); |
Kojto | 115:87f2f5183dfb | 339 | |
Kojto | 115:87f2f5183dfb | 340 | /* Power PVD IRQ Handler */ |
Kojto | 115:87f2f5183dfb | 341 | void HAL_PWR_PVD_IRQHandler(void); |
Kojto | 115:87f2f5183dfb | 342 | void HAL_PWR_PVDCallback(void); |
Kojto | 115:87f2f5183dfb | 343 | |
Kojto | 115:87f2f5183dfb | 344 | /* Cortex System Control functions *******************************************/ |
Kojto | 115:87f2f5183dfb | 345 | void HAL_PWR_EnableSleepOnExit(void); |
Kojto | 115:87f2f5183dfb | 346 | void HAL_PWR_DisableSleepOnExit(void); |
Kojto | 115:87f2f5183dfb | 347 | void HAL_PWR_EnableSEVOnPend(void); |
Kojto | 115:87f2f5183dfb | 348 | void HAL_PWR_DisableSEVOnPend(void); |
Kojto | 115:87f2f5183dfb | 349 | /** |
Kojto | 115:87f2f5183dfb | 350 | * @} |
Kojto | 115:87f2f5183dfb | 351 | */ |
Kojto | 115:87f2f5183dfb | 352 | |
Kojto | 115:87f2f5183dfb | 353 | /** |
Kojto | 115:87f2f5183dfb | 354 | * @} |
Kojto | 115:87f2f5183dfb | 355 | */ |
Kojto | 115:87f2f5183dfb | 356 | |
Kojto | 115:87f2f5183dfb | 357 | /* Private types -------------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 358 | /* Private variables ---------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 359 | /* Private constants ---------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 360 | /** @defgroup PWR_Private_Constants PWR Private Constants |
Kojto | 115:87f2f5183dfb | 361 | * @{ |
Kojto | 115:87f2f5183dfb | 362 | */ |
Kojto | 115:87f2f5183dfb | 363 | |
Kojto | 115:87f2f5183dfb | 364 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line |
Kojto | 115:87f2f5183dfb | 365 | * @{ |
Kojto | 115:87f2f5183dfb | 366 | */ |
Kojto | 115:87f2f5183dfb | 367 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
Kojto | 115:87f2f5183dfb | 368 | /** |
Kojto | 115:87f2f5183dfb | 369 | * @} |
Kojto | 115:87f2f5183dfb | 370 | */ |
Kojto | 115:87f2f5183dfb | 371 | |
Kojto | 115:87f2f5183dfb | 372 | /** |
Kojto | 115:87f2f5183dfb | 373 | * @} |
Kojto | 115:87f2f5183dfb | 374 | */ |
Kojto | 115:87f2f5183dfb | 375 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 115:87f2f5183dfb | 376 | /** @defgroup PWR_Private_Macros PWR Private Macros |
Kojto | 115:87f2f5183dfb | 377 | * @{ |
Kojto | 115:87f2f5183dfb | 378 | */ |
Kojto | 115:87f2f5183dfb | 379 | |
Kojto | 115:87f2f5183dfb | 380 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters |
Kojto | 115:87f2f5183dfb | 381 | * @{ |
Kojto | 115:87f2f5183dfb | 382 | */ |
Kojto | 115:87f2f5183dfb | 383 | #define IS_PWR_WAKEUP_POLARITY(POLARITY) (((POLARITY) == PWR_POLARITY_RISINGEDGE) || \ |
Kojto | 115:87f2f5183dfb | 384 | ((POLARITY) == PWR_POLARITY_FALLINGEDGE)) |
Kojto | 115:87f2f5183dfb | 385 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
Kojto | 115:87f2f5183dfb | 386 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
Kojto | 115:87f2f5183dfb | 387 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
Kojto | 115:87f2f5183dfb | 388 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
Kojto | 115:87f2f5183dfb | 389 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
Kojto | 115:87f2f5183dfb | 390 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
Kojto | 115:87f2f5183dfb | 391 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
Kojto | 115:87f2f5183dfb | 392 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
Kojto | 115:87f2f5183dfb | 393 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
Kojto | 115:87f2f5183dfb | 394 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
Kojto | 115:87f2f5183dfb | 395 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
Kojto | 115:87f2f5183dfb | 396 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) |
Kojto | 115:87f2f5183dfb | 397 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
Kojto | 115:87f2f5183dfb | 398 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
Kojto | 115:87f2f5183dfb | 399 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
Kojto | 115:87f2f5183dfb | 400 | |
Kojto | 115:87f2f5183dfb | 401 | /** |
Kojto | 115:87f2f5183dfb | 402 | * @} |
Kojto | 115:87f2f5183dfb | 403 | */ |
Kojto | 115:87f2f5183dfb | 404 | |
Kojto | 115:87f2f5183dfb | 405 | /** |
Kojto | 115:87f2f5183dfb | 406 | * @} |
Kojto | 115:87f2f5183dfb | 407 | */ |
Kojto | 115:87f2f5183dfb | 408 | |
Kojto | 115:87f2f5183dfb | 409 | /** |
Kojto | 115:87f2f5183dfb | 410 | * @} |
Kojto | 115:87f2f5183dfb | 411 | */ |
Kojto | 115:87f2f5183dfb | 412 | |
Kojto | 115:87f2f5183dfb | 413 | /** |
Kojto | 115:87f2f5183dfb | 414 | * @} |
Kojto | 115:87f2f5183dfb | 415 | */ |
Kojto | 115:87f2f5183dfb | 416 | |
Kojto | 115:87f2f5183dfb | 417 | #ifdef __cplusplus |
Kojto | 115:87f2f5183dfb | 418 | } |
Kojto | 115:87f2f5183dfb | 419 | #endif |
Kojto | 115:87f2f5183dfb | 420 | |
Kojto | 115:87f2f5183dfb | 421 | |
Kojto | 115:87f2f5183dfb | 422 | #endif /* __STM32F7xx_HAL_PWR_H */ |
Kojto | 115:87f2f5183dfb | 423 | |
Kojto | 115:87f2f5183dfb | 424 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |