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Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
111:4336505e4b1c
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Kojto 111:4336505e4b1c 1 /**
Kojto 111:4336505e4b1c 2 * \file
Kojto 111:4336505e4b1c 3 *
Kojto 111:4336505e4b1c 4 * \brief Instance description for SYSCTRL
Kojto 111:4336505e4b1c 5 *
Kojto 111:4336505e4b1c 6 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
Kojto 111:4336505e4b1c 7 *
Kojto 111:4336505e4b1c 8 * \asf_license_start
Kojto 111:4336505e4b1c 9 *
Kojto 111:4336505e4b1c 10 * \page License
Kojto 111:4336505e4b1c 11 *
Kojto 111:4336505e4b1c 12 * Redistribution and use in source and binary forms, with or without
Kojto 111:4336505e4b1c 13 * modification, are permitted provided that the following conditions are met:
Kojto 111:4336505e4b1c 14 *
Kojto 111:4336505e4b1c 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 111:4336505e4b1c 16 * this list of conditions and the following disclaimer.
Kojto 111:4336505e4b1c 17 *
Kojto 111:4336505e4b1c 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 111:4336505e4b1c 19 * this list of conditions and the following disclaimer in the documentation
Kojto 111:4336505e4b1c 20 * and/or other materials provided with the distribution.
Kojto 111:4336505e4b1c 21 *
Kojto 111:4336505e4b1c 22 * 3. The name of Atmel may not be used to endorse or promote products derived
Kojto 111:4336505e4b1c 23 * from this software without specific prior written permission.
Kojto 111:4336505e4b1c 24 *
Kojto 111:4336505e4b1c 25 * 4. This software may only be redistributed and used in connection with an
Kojto 111:4336505e4b1c 26 * Atmel microcontroller product.
Kojto 111:4336505e4b1c 27 *
Kojto 111:4336505e4b1c 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
Kojto 111:4336505e4b1c 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
Kojto 111:4336505e4b1c 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
Kojto 111:4336505e4b1c 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
Kojto 111:4336505e4b1c 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 111:4336505e4b1c 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
Kojto 111:4336505e4b1c 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
Kojto 111:4336505e4b1c 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
Kojto 111:4336505e4b1c 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Kojto 111:4336505e4b1c 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 111:4336505e4b1c 38 * POSSIBILITY OF SUCH DAMAGE.
Kojto 111:4336505e4b1c 39 *
Kojto 111:4336505e4b1c 40 * \asf_license_stop
Kojto 111:4336505e4b1c 41 *
Kojto 111:4336505e4b1c 42 */
Kojto 111:4336505e4b1c 43 /*
Kojto 111:4336505e4b1c 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
Kojto 111:4336505e4b1c 45 */
Kojto 111:4336505e4b1c 46
Kojto 111:4336505e4b1c 47 #ifndef _SAMD21_SYSCTRL_INSTANCE_
Kojto 111:4336505e4b1c 48 #define _SAMD21_SYSCTRL_INSTANCE_
Kojto 111:4336505e4b1c 49
Kojto 111:4336505e4b1c 50 /* ========== Register definition for SYSCTRL peripheral ========== */
Kojto 111:4336505e4b1c 51 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 52 #define REG_SYSCTRL_INTENCLR (0x40000800U) /**< \brief (SYSCTRL) Interrupt Enable Clear */
Kojto 111:4336505e4b1c 53 #define REG_SYSCTRL_INTENSET (0x40000804U) /**< \brief (SYSCTRL) Interrupt Enable Set */
Kojto 111:4336505e4b1c 54 #define REG_SYSCTRL_INTFLAG (0x40000808U) /**< \brief (SYSCTRL) Interrupt Flag Status and Clear */
Kojto 111:4336505e4b1c 55 #define REG_SYSCTRL_PCLKSR (0x4000080CU) /**< \brief (SYSCTRL) Power and Clocks Status */
Kojto 111:4336505e4b1c 56 #define REG_SYSCTRL_XOSC (0x40000810U) /**< \brief (SYSCTRL) External Multipurpose Crystal Oscillator (XOSC) Control */
Kojto 111:4336505e4b1c 57 #define REG_SYSCTRL_XOSC32K (0x40000814U) /**< \brief (SYSCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */
Kojto 111:4336505e4b1c 58 #define REG_SYSCTRL_OSC32K (0x40000818U) /**< \brief (SYSCTRL) 32kHz Internal Oscillator (OSC32K) Control */
Kojto 111:4336505e4b1c 59 #define REG_SYSCTRL_OSCULP32K (0x4000081CU) /**< \brief (SYSCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
Kojto 111:4336505e4b1c 60 #define REG_SYSCTRL_OSC8M (0x40000820U) /**< \brief (SYSCTRL) 8MHz Internal Oscillator (OSC8M) Control */
Kojto 111:4336505e4b1c 61 #define REG_SYSCTRL_DFLLCTRL (0x40000824U) /**< \brief (SYSCTRL) DFLL48M Control */
Kojto 111:4336505e4b1c 62 #define REG_SYSCTRL_DFLLVAL (0x40000828U) /**< \brief (SYSCTRL) DFLL48M Value */
Kojto 111:4336505e4b1c 63 #define REG_SYSCTRL_DFLLMUL (0x4000082CU) /**< \brief (SYSCTRL) DFLL48M Multiplier */
Kojto 111:4336505e4b1c 64 #define REG_SYSCTRL_DFLLSYNC (0x40000830U) /**< \brief (SYSCTRL) DFLL48M Synchronization */
Kojto 111:4336505e4b1c 65 #define REG_SYSCTRL_BOD33 (0x40000834U) /**< \brief (SYSCTRL) 3.3V Brown-Out Detector (BOD33) Control */
Kojto 111:4336505e4b1c 66 #define REG_SYSCTRL_VREG (0x4000083CU) /**< \brief (SYSCTRL) Voltage Regulator System (VREG) Control */
Kojto 111:4336505e4b1c 67 #define REG_SYSCTRL_VREF (0x40000840U) /**< \brief (SYSCTRL) Voltage References System (VREF) Control */
Kojto 111:4336505e4b1c 68 #define REG_SYSCTRL_DPLLCTRLA (0x40000844U) /**< \brief (SYSCTRL) DPLL Control A */
Kojto 111:4336505e4b1c 69 #define REG_SYSCTRL_DPLLRATIO (0x40000848U) /**< \brief (SYSCTRL) DPLL Ratio Control */
Kojto 111:4336505e4b1c 70 #define REG_SYSCTRL_DPLLCTRLB (0x4000084CU) /**< \brief (SYSCTRL) DPLL Control B */
Kojto 111:4336505e4b1c 71 #define REG_SYSCTRL_DPLLSTATUS (0x40000850U) /**< \brief (SYSCTRL) DPLL Status */
Kojto 111:4336505e4b1c 72 #else
Kojto 111:4336505e4b1c 73 #define REG_SYSCTRL_INTENCLR (*(RwReg *)0x40000800U) /**< \brief (SYSCTRL) Interrupt Enable Clear */
Kojto 111:4336505e4b1c 74 #define REG_SYSCTRL_INTENSET (*(RwReg *)0x40000804U) /**< \brief (SYSCTRL) Interrupt Enable Set */
Kojto 111:4336505e4b1c 75 #define REG_SYSCTRL_INTFLAG (*(RwReg *)0x40000808U) /**< \brief (SYSCTRL) Interrupt Flag Status and Clear */
Kojto 111:4336505e4b1c 76 #define REG_SYSCTRL_PCLKSR (*(RoReg *)0x4000080CU) /**< \brief (SYSCTRL) Power and Clocks Status */
Kojto 111:4336505e4b1c 77 #define REG_SYSCTRL_XOSC (*(RwReg16*)0x40000810U) /**< \brief (SYSCTRL) External Multipurpose Crystal Oscillator (XOSC) Control */
Kojto 111:4336505e4b1c 78 #define REG_SYSCTRL_XOSC32K (*(RwReg16*)0x40000814U) /**< \brief (SYSCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */
Kojto 111:4336505e4b1c 79 #define REG_SYSCTRL_OSC32K (*(RwReg *)0x40000818U) /**< \brief (SYSCTRL) 32kHz Internal Oscillator (OSC32K) Control */
Kojto 111:4336505e4b1c 80 #define REG_SYSCTRL_OSCULP32K (*(RwReg8 *)0x4000081CU) /**< \brief (SYSCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
Kojto 111:4336505e4b1c 81 #define REG_SYSCTRL_OSC8M (*(RwReg *)0x40000820U) /**< \brief (SYSCTRL) 8MHz Internal Oscillator (OSC8M) Control */
Kojto 111:4336505e4b1c 82 #define REG_SYSCTRL_DFLLCTRL (*(RwReg16*)0x40000824U) /**< \brief (SYSCTRL) DFLL48M Control */
Kojto 111:4336505e4b1c 83 #define REG_SYSCTRL_DFLLVAL (*(RwReg *)0x40000828U) /**< \brief (SYSCTRL) DFLL48M Value */
Kojto 111:4336505e4b1c 84 #define REG_SYSCTRL_DFLLMUL (*(RwReg *)0x4000082CU) /**< \brief (SYSCTRL) DFLL48M Multiplier */
Kojto 111:4336505e4b1c 85 #define REG_SYSCTRL_DFLLSYNC (*(RwReg8 *)0x40000830U) /**< \brief (SYSCTRL) DFLL48M Synchronization */
Kojto 111:4336505e4b1c 86 #define REG_SYSCTRL_BOD33 (*(RwReg *)0x40000834U) /**< \brief (SYSCTRL) 3.3V Brown-Out Detector (BOD33) Control */
Kojto 111:4336505e4b1c 87 #define REG_SYSCTRL_VREG (*(RwReg16*)0x4000083CU) /**< \brief (SYSCTRL) Voltage Regulator System (VREG) Control */
Kojto 111:4336505e4b1c 88 #define REG_SYSCTRL_VREF (*(RwReg *)0x40000840U) /**< \brief (SYSCTRL) Voltage References System (VREF) Control */
Kojto 111:4336505e4b1c 89 #define REG_SYSCTRL_DPLLCTRLA (*(RwReg8 *)0x40000844U) /**< \brief (SYSCTRL) DPLL Control A */
Kojto 111:4336505e4b1c 90 #define REG_SYSCTRL_DPLLRATIO (*(RwReg *)0x40000848U) /**< \brief (SYSCTRL) DPLL Ratio Control */
Kojto 111:4336505e4b1c 91 #define REG_SYSCTRL_DPLLCTRLB (*(RwReg *)0x4000084CU) /**< \brief (SYSCTRL) DPLL Control B */
Kojto 111:4336505e4b1c 92 #define REG_SYSCTRL_DPLLSTATUS (*(RoReg8 *)0x40000850U) /**< \brief (SYSCTRL) DPLL Status */
Kojto 111:4336505e4b1c 93 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 94
Kojto 111:4336505e4b1c 95 /* ========== Instance parameters for SYSCTRL peripheral ========== */
Kojto 111:4336505e4b1c 96 #define SYSCTRL_BGAP_CALIB_MSB 11
Kojto 111:4336505e4b1c 97 #define SYSCTRL_BOD33_CALIB_MSB 5
Kojto 111:4336505e4b1c 98 #define SYSCTRL_DFLL48M_COARSE_MSB 5
Kojto 111:4336505e4b1c 99 #define SYSCTRL_DFLL48M_FINE_MSB 9
Kojto 111:4336505e4b1c 100 #define SYSCTRL_GCLK_ID_DFLL48 0 // Index of Generic Clock for DFLL48
Kojto 111:4336505e4b1c 101 #define SYSCTRL_GCLK_ID_FDPLL 1 // Index of Generic Clock for DPLL
Kojto 111:4336505e4b1c 102 #define SYSCTRL_GCLK_ID_FDPLL32K 2 // Index of Generic Clock for DPLL 32K
Kojto 111:4336505e4b1c 103 #define SYSCTRL_OSC32K_COARSE_CALIB_MSB 6
Kojto 111:4336505e4b1c 104 #define SYSCTRL_POR33_ENTEST_MSB 1
Kojto 111:4336505e4b1c 105 #define SYSCTRL_ULPVREF_DIVLEV_MSB 3
Kojto 111:4336505e4b1c 106 #define SYSCTRL_ULPVREG_FORCEGAIN_MSB 1
Kojto 111:4336505e4b1c 107 #define SYSCTRL_ULPVREG_RAMREFSEL_MSB 2
Kojto 111:4336505e4b1c 108 #define SYSCTRL_VREF_CONTROL_MSB 48
Kojto 111:4336505e4b1c 109 #define SYSCTRL_VREF_STATUS_MSB 7
Kojto 111:4336505e4b1c 110 #define SYSCTRL_VREG_LEVEL_MSB 2
Kojto 111:4336505e4b1c 111 #define SYSCTRL_BOD12_VERSION 0x111
Kojto 111:4336505e4b1c 112 #define SYSCTRL_BOD33_VERSION 0x111
Kojto 111:4336505e4b1c 113 #define SYSCTRL_DFLL48M_VERSION 0x301
Kojto 111:4336505e4b1c 114 #define SYSCTRL_FDPLL_VERSION 0x111
Kojto 111:4336505e4b1c 115 #define SYSCTRL_OSCULP32K_VERSION 0x111
Kojto 111:4336505e4b1c 116 #define SYSCTRL_OSC8M_VERSION 0x120
Kojto 111:4336505e4b1c 117 #define SYSCTRL_OSC32K_VERSION 0x112
Kojto 111:4336505e4b1c 118 #define SYSCTRL_VREF_VERSION 0x201
Kojto 111:4336505e4b1c 119 #define SYSCTRL_VREG_VERSION 0x201
Kojto 111:4336505e4b1c 120 #define SYSCTRL_XOSC_VERSION 0x114
Kojto 111:4336505e4b1c 121 #define SYSCTRL_XOSC32K_VERSION 0x113
Kojto 111:4336505e4b1c 122
Kojto 111:4336505e4b1c 123 #endif /* _SAMD21_SYSCTRL_INSTANCE_ */