Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_SAMD21G18A/ins_dsu.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
111:4336505e4b1c 
.

Who changed what in which revision?

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Kojto 111:4336505e4b1c 1 /**
Kojto 111:4336505e4b1c 2 * \file
Kojto 111:4336505e4b1c 3 *
Kojto 111:4336505e4b1c 4 * \brief Instance description for DSU
Kojto 111:4336505e4b1c 5 *
Kojto 111:4336505e4b1c 6 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
Kojto 111:4336505e4b1c 7 *
Kojto 111:4336505e4b1c 8 * \asf_license_start
Kojto 111:4336505e4b1c 9 *
Kojto 111:4336505e4b1c 10 * \page License
Kojto 111:4336505e4b1c 11 *
Kojto 111:4336505e4b1c 12 * Redistribution and use in source and binary forms, with or without
Kojto 111:4336505e4b1c 13 * modification, are permitted provided that the following conditions are met:
Kojto 111:4336505e4b1c 14 *
Kojto 111:4336505e4b1c 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 111:4336505e4b1c 16 * this list of conditions and the following disclaimer.
Kojto 111:4336505e4b1c 17 *
Kojto 111:4336505e4b1c 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 111:4336505e4b1c 19 * this list of conditions and the following disclaimer in the documentation
Kojto 111:4336505e4b1c 20 * and/or other materials provided with the distribution.
Kojto 111:4336505e4b1c 21 *
Kojto 111:4336505e4b1c 22 * 3. The name of Atmel may not be used to endorse or promote products derived
Kojto 111:4336505e4b1c 23 * from this software without specific prior written permission.
Kojto 111:4336505e4b1c 24 *
Kojto 111:4336505e4b1c 25 * 4. This software may only be redistributed and used in connection with an
Kojto 111:4336505e4b1c 26 * Atmel microcontroller product.
Kojto 111:4336505e4b1c 27 *
Kojto 111:4336505e4b1c 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
Kojto 111:4336505e4b1c 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
Kojto 111:4336505e4b1c 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
Kojto 111:4336505e4b1c 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
Kojto 111:4336505e4b1c 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 111:4336505e4b1c 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
Kojto 111:4336505e4b1c 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
Kojto 111:4336505e4b1c 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
Kojto 111:4336505e4b1c 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Kojto 111:4336505e4b1c 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 111:4336505e4b1c 38 * POSSIBILITY OF SUCH DAMAGE.
Kojto 111:4336505e4b1c 39 *
Kojto 111:4336505e4b1c 40 * \asf_license_stop
Kojto 111:4336505e4b1c 41 *
Kojto 111:4336505e4b1c 42 */
Kojto 111:4336505e4b1c 43 /*
Kojto 111:4336505e4b1c 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
Kojto 111:4336505e4b1c 45 */
Kojto 111:4336505e4b1c 46
Kojto 111:4336505e4b1c 47 #ifndef _SAMD21_DSU_INSTANCE_
Kojto 111:4336505e4b1c 48 #define _SAMD21_DSU_INSTANCE_
Kojto 111:4336505e4b1c 49
Kojto 111:4336505e4b1c 50 /* ========== Register definition for DSU peripheral ========== */
Kojto 111:4336505e4b1c 51 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 52 #define REG_DSU_CTRL (0x41002000U) /**< \brief (DSU) Control */
Kojto 111:4336505e4b1c 53 #define REG_DSU_STATUSA (0x41002001U) /**< \brief (DSU) Status A */
Kojto 111:4336505e4b1c 54 #define REG_DSU_STATUSB (0x41002002U) /**< \brief (DSU) Status B */
Kojto 111:4336505e4b1c 55 #define REG_DSU_ADDR (0x41002004U) /**< \brief (DSU) Address */
Kojto 111:4336505e4b1c 56 #define REG_DSU_LENGTH (0x41002008U) /**< \brief (DSU) Length */
Kojto 111:4336505e4b1c 57 #define REG_DSU_DATA (0x4100200CU) /**< \brief (DSU) Data */
Kojto 111:4336505e4b1c 58 #define REG_DSU_DCC0 (0x41002010U) /**< \brief (DSU) Debug Communication Channel 0 */
Kojto 111:4336505e4b1c 59 #define REG_DSU_DCC1 (0x41002014U) /**< \brief (DSU) Debug Communication Channel 1 */
Kojto 111:4336505e4b1c 60 #define REG_DSU_DID (0x41002018U) /**< \brief (DSU) Device Identification */
Kojto 111:4336505e4b1c 61 #define REG_DSU_ENTRY0 (0x41003000U) /**< \brief (DSU) Coresight ROM Table Entry 0 */
Kojto 111:4336505e4b1c 62 #define REG_DSU_ENTRY1 (0x41003004U) /**< \brief (DSU) Coresight ROM Table Entry 1 */
Kojto 111:4336505e4b1c 63 #define REG_DSU_END (0x41003008U) /**< \brief (DSU) Coresight ROM Table End */
Kojto 111:4336505e4b1c 64 #define REG_DSU_MEMTYPE (0x41003FCCU) /**< \brief (DSU) Coresight ROM Table Memory Type */
Kojto 111:4336505e4b1c 65 #define REG_DSU_PID4 (0x41003FD0U) /**< \brief (DSU) Peripheral Identification 4 */
Kojto 111:4336505e4b1c 66 #define REG_DSU_PID0 (0x41003FE0U) /**< \brief (DSU) Peripheral Identification 0 */
Kojto 111:4336505e4b1c 67 #define REG_DSU_PID1 (0x41003FE4U) /**< \brief (DSU) Peripheral Identification 1 */
Kojto 111:4336505e4b1c 68 #define REG_DSU_PID2 (0x41003FE8U) /**< \brief (DSU) Peripheral Identification 2 */
Kojto 111:4336505e4b1c 69 #define REG_DSU_PID3 (0x41003FECU) /**< \brief (DSU) Peripheral Identification 3 */
Kojto 111:4336505e4b1c 70 #define REG_DSU_CID0 (0x41003FF0U) /**< \brief (DSU) Component Identification 0 */
Kojto 111:4336505e4b1c 71 #define REG_DSU_CID1 (0x41003FF4U) /**< \brief (DSU) Component Identification 1 */
Kojto 111:4336505e4b1c 72 #define REG_DSU_CID2 (0x41003FF8U) /**< \brief (DSU) Component Identification 2 */
Kojto 111:4336505e4b1c 73 #define REG_DSU_CID3 (0x41003FFCU) /**< \brief (DSU) Component Identification 3 */
Kojto 111:4336505e4b1c 74 #else
Kojto 111:4336505e4b1c 75 #define REG_DSU_CTRL (*(WoReg8 *)0x41002000U) /**< \brief (DSU) Control */
Kojto 111:4336505e4b1c 76 #define REG_DSU_STATUSA (*(RwReg8 *)0x41002001U) /**< \brief (DSU) Status A */
Kojto 111:4336505e4b1c 77 #define REG_DSU_STATUSB (*(RoReg8 *)0x41002002U) /**< \brief (DSU) Status B */
Kojto 111:4336505e4b1c 78 #define REG_DSU_ADDR (*(RwReg *)0x41002004U) /**< \brief (DSU) Address */
Kojto 111:4336505e4b1c 79 #define REG_DSU_LENGTH (*(RwReg *)0x41002008U) /**< \brief (DSU) Length */
Kojto 111:4336505e4b1c 80 #define REG_DSU_DATA (*(RwReg *)0x4100200CU) /**< \brief (DSU) Data */
Kojto 111:4336505e4b1c 81 #define REG_DSU_DCC0 (*(RwReg *)0x41002010U) /**< \brief (DSU) Debug Communication Channel 0 */
Kojto 111:4336505e4b1c 82 #define REG_DSU_DCC1 (*(RwReg *)0x41002014U) /**< \brief (DSU) Debug Communication Channel 1 */
Kojto 111:4336505e4b1c 83 #define REG_DSU_DID (*(RoReg *)0x41002018U) /**< \brief (DSU) Device Identification */
Kojto 111:4336505e4b1c 84 #define REG_DSU_ENTRY0 (*(RoReg *)0x41003000U) /**< \brief (DSU) Coresight ROM Table Entry 0 */
Kojto 111:4336505e4b1c 85 #define REG_DSU_ENTRY1 (*(RoReg *)0x41003004U) /**< \brief (DSU) Coresight ROM Table Entry 1 */
Kojto 111:4336505e4b1c 86 #define REG_DSU_END (*(RoReg *)0x41003008U) /**< \brief (DSU) Coresight ROM Table End */
Kojto 111:4336505e4b1c 87 #define REG_DSU_MEMTYPE (*(RoReg *)0x41003FCCU) /**< \brief (DSU) Coresight ROM Table Memory Type */
Kojto 111:4336505e4b1c 88 #define REG_DSU_PID4 (*(RoReg *)0x41003FD0U) /**< \brief (DSU) Peripheral Identification 4 */
Kojto 111:4336505e4b1c 89 #define REG_DSU_PID0 (*(RoReg *)0x41003FE0U) /**< \brief (DSU) Peripheral Identification 0 */
Kojto 111:4336505e4b1c 90 #define REG_DSU_PID1 (*(RoReg *)0x41003FE4U) /**< \brief (DSU) Peripheral Identification 1 */
Kojto 111:4336505e4b1c 91 #define REG_DSU_PID2 (*(RoReg *)0x41003FE8U) /**< \brief (DSU) Peripheral Identification 2 */
Kojto 111:4336505e4b1c 92 #define REG_DSU_PID3 (*(RoReg *)0x41003FECU) /**< \brief (DSU) Peripheral Identification 3 */
Kojto 111:4336505e4b1c 93 #define REG_DSU_CID0 (*(RoReg *)0x41003FF0U) /**< \brief (DSU) Component Identification 0 */
Kojto 111:4336505e4b1c 94 #define REG_DSU_CID1 (*(RoReg *)0x41003FF4U) /**< \brief (DSU) Component Identification 1 */
Kojto 111:4336505e4b1c 95 #define REG_DSU_CID2 (*(RoReg *)0x41003FF8U) /**< \brief (DSU) Component Identification 2 */
Kojto 111:4336505e4b1c 96 #define REG_DSU_CID3 (*(RoReg *)0x41003FFCU) /**< \brief (DSU) Component Identification 3 */
Kojto 111:4336505e4b1c 97 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 98
Kojto 111:4336505e4b1c 99 /* ========== Instance parameters for DSU peripheral ========== */
Kojto 111:4336505e4b1c 100 #define DSU_CLK_HSB_ID 3 // Index of AHB clock in PM.AHBMASK register
Kojto 111:4336505e4b1c 101
Kojto 111:4336505e4b1c 102 #endif /* _SAMD21_DSU_INSTANCE_ */