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TARGET_NUCLEO_F401RE/stm32f4xx_hal_i2c.h@121:672067c3ada4, 2016-04-14 (annotated)
- Committer:
- elijahorr
- Date:
- Thu Apr 14 07:28:54 2016 +0000
- Revision:
- 121:672067c3ada4
- Parent:
- 110:165afa46840b
.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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emilmont | 77:869cf507173a | 1 | /** |
emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_i2c.h |
emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
Kojto | 110:165afa46840b | 5 | * @version V1.4.1 |
Kojto | 110:165afa46840b | 6 | * @date 09-October-2015 |
emilmont | 77:869cf507173a | 7 | * @brief Header file of I2C HAL module. |
emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
emilmont | 77:869cf507173a | 9 | * @attention |
emilmont | 77:869cf507173a | 10 | * |
Kojto | 99:dbbf35b96557 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
emilmont | 77:869cf507173a | 12 | * |
emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
emilmont | 77:869cf507173a | 23 | * |
emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
emilmont | 77:869cf507173a | 34 | * |
emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
emilmont | 77:869cf507173a | 36 | */ |
emilmont | 77:869cf507173a | 37 | |
emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_I2C_H |
emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_I2C_H |
emilmont | 77:869cf507173a | 41 | |
emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 43 | extern "C" { |
emilmont | 77:869cf507173a | 44 | #endif |
emilmont | 77:869cf507173a | 45 | |
emilmont | 77:869cf507173a | 46 | /* Includes ------------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 47 | #include "stm32f4xx_hal_def.h" |
emilmont | 77:869cf507173a | 48 | |
emilmont | 77:869cf507173a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
emilmont | 77:869cf507173a | 50 | * @{ |
emilmont | 77:869cf507173a | 51 | */ |
emilmont | 77:869cf507173a | 52 | |
emilmont | 77:869cf507173a | 53 | /** @addtogroup I2C |
emilmont | 77:869cf507173a | 54 | * @{ |
emilmont | 77:869cf507173a | 55 | */ |
emilmont | 77:869cf507173a | 56 | |
emilmont | 77:869cf507173a | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 58 | /** @defgroup I2C_Exported_Types I2C Exported Types |
Kojto | 99:dbbf35b96557 | 59 | * @{ |
Kojto | 99:dbbf35b96557 | 60 | */ |
Kojto | 99:dbbf35b96557 | 61 | |
emilmont | 77:869cf507173a | 62 | /** |
emilmont | 77:869cf507173a | 63 | * @brief I2C Configuration Structure definition |
emilmont | 77:869cf507173a | 64 | */ |
emilmont | 77:869cf507173a | 65 | typedef struct |
emilmont | 77:869cf507173a | 66 | { |
emilmont | 77:869cf507173a | 67 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
emilmont | 77:869cf507173a | 68 | This parameter must be set to a value lower than 400kHz */ |
emilmont | 77:869cf507173a | 69 | |
emilmont | 77:869cf507173a | 70 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
emilmont | 77:869cf507173a | 71 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
emilmont | 77:869cf507173a | 72 | |
emilmont | 77:869cf507173a | 73 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
emilmont | 77:869cf507173a | 74 | This parameter can be a 7-bit or 10-bit address. */ |
emilmont | 77:869cf507173a | 75 | |
emilmont | 77:869cf507173a | 76 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
emilmont | 77:869cf507173a | 77 | This parameter can be a value of @ref I2C_addressing_mode */ |
emilmont | 77:869cf507173a | 78 | |
emilmont | 77:869cf507173a | 79 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
emilmont | 77:869cf507173a | 80 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
emilmont | 77:869cf507173a | 81 | |
emilmont | 77:869cf507173a | 82 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
emilmont | 77:869cf507173a | 83 | This parameter can be a 7-bit address. */ |
emilmont | 77:869cf507173a | 84 | |
emilmont | 77:869cf507173a | 85 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
bogdanm | 85:024bf7f99721 | 86 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
emilmont | 77:869cf507173a | 87 | |
emilmont | 77:869cf507173a | 88 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
emilmont | 77:869cf507173a | 89 | This parameter can be a value of @ref I2C_nostretch_mode */ |
emilmont | 77:869cf507173a | 90 | |
emilmont | 77:869cf507173a | 91 | }I2C_InitTypeDef; |
emilmont | 77:869cf507173a | 92 | |
emilmont | 77:869cf507173a | 93 | /** |
emilmont | 77:869cf507173a | 94 | * @brief HAL State structures definition |
emilmont | 77:869cf507173a | 95 | */ |
emilmont | 77:869cf507173a | 96 | typedef enum |
emilmont | 77:869cf507173a | 97 | { |
emilmont | 77:869cf507173a | 98 | HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */ |
emilmont | 77:869cf507173a | 99 | HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */ |
emilmont | 77:869cf507173a | 100 | HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */ |
emilmont | 77:869cf507173a | 101 | HAL_I2C_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
emilmont | 77:869cf507173a | 102 | HAL_I2C_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
emilmont | 77:869cf507173a | 103 | HAL_I2C_STATE_MEM_BUSY_TX = 0x32, /*!< Memory Data Transmission process is ongoing */ |
emilmont | 77:869cf507173a | 104 | HAL_I2C_STATE_MEM_BUSY_RX = 0x42, /*!< Memory Data Reception process is ongoing */ |
emilmont | 77:869cf507173a | 105 | HAL_I2C_STATE_TIMEOUT = 0x03, /*!< I2C timeout state */ |
emilmont | 77:869cf507173a | 106 | HAL_I2C_STATE_ERROR = 0x04 /*!< I2C error state */ |
emilmont | 77:869cf507173a | 107 | |
emilmont | 77:869cf507173a | 108 | }HAL_I2C_StateTypeDef; |
emilmont | 77:869cf507173a | 109 | |
emilmont | 77:869cf507173a | 110 | /** |
emilmont | 77:869cf507173a | 111 | * @brief I2C handle Structure definition |
emilmont | 77:869cf507173a | 112 | */ |
emilmont | 77:869cf507173a | 113 | typedef struct |
emilmont | 77:869cf507173a | 114 | { |
emilmont | 77:869cf507173a | 115 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
emilmont | 77:869cf507173a | 116 | |
emilmont | 77:869cf507173a | 117 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
emilmont | 77:869cf507173a | 118 | |
emilmont | 77:869cf507173a | 119 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
emilmont | 77:869cf507173a | 120 | |
emilmont | 77:869cf507173a | 121 | uint16_t XferSize; /*!< I2C transfer size */ |
emilmont | 77:869cf507173a | 122 | |
emilmont | 77:869cf507173a | 123 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
emilmont | 77:869cf507173a | 124 | |
emilmont | 77:869cf507173a | 125 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
emilmont | 77:869cf507173a | 126 | |
emilmont | 77:869cf507173a | 127 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
emilmont | 77:869cf507173a | 128 | |
emilmont | 77:869cf507173a | 129 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
emilmont | 77:869cf507173a | 130 | |
emilmont | 77:869cf507173a | 131 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
emilmont | 77:869cf507173a | 132 | |
Kojto | 99:dbbf35b96557 | 133 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
emilmont | 77:869cf507173a | 134 | |
emilmont | 77:869cf507173a | 135 | }I2C_HandleTypeDef; |
Kojto | 99:dbbf35b96557 | 136 | /** |
Kojto | 99:dbbf35b96557 | 137 | * @} |
Kojto | 99:dbbf35b96557 | 138 | */ |
emilmont | 77:869cf507173a | 139 | |
emilmont | 77:869cf507173a | 140 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 141 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
emilmont | 77:869cf507173a | 142 | * @{ |
emilmont | 77:869cf507173a | 143 | */ |
emilmont | 77:869cf507173a | 144 | |
Kojto | 99:dbbf35b96557 | 145 | /** @defgroup I2C_Error_Code I2C Error Code |
Kojto | 99:dbbf35b96557 | 146 | * @brief I2C Error Code |
Kojto | 99:dbbf35b96557 | 147 | * @{ |
Kojto | 99:dbbf35b96557 | 148 | */ |
Kojto | 99:dbbf35b96557 | 149 | #define HAL_I2C_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
Kojto | 99:dbbf35b96557 | 150 | #define HAL_I2C_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */ |
Kojto | 99:dbbf35b96557 | 151 | #define HAL_I2C_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */ |
Kojto | 99:dbbf35b96557 | 152 | #define HAL_I2C_ERROR_AF ((uint32_t)0x00000004) /*!< AF error */ |
Kojto | 99:dbbf35b96557 | 153 | #define HAL_I2C_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */ |
Kojto | 99:dbbf35b96557 | 154 | #define HAL_I2C_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ |
Kojto | 99:dbbf35b96557 | 155 | #define HAL_I2C_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout Error */ |
Kojto | 99:dbbf35b96557 | 156 | /** |
Kojto | 99:dbbf35b96557 | 157 | * @} |
Kojto | 99:dbbf35b96557 | 158 | */ |
Kojto | 99:dbbf35b96557 | 159 | |
Kojto | 99:dbbf35b96557 | 160 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode |
emilmont | 77:869cf507173a | 161 | * @{ |
emilmont | 77:869cf507173a | 162 | */ |
emilmont | 77:869cf507173a | 163 | #define I2C_DUTYCYCLE_2 ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 164 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
emilmont | 77:869cf507173a | 165 | /** |
emilmont | 77:869cf507173a | 166 | * @} |
emilmont | 77:869cf507173a | 167 | */ |
emilmont | 77:869cf507173a | 168 | |
Kojto | 99:dbbf35b96557 | 169 | /** @defgroup I2C_addressing_mode I2C addressing mode |
emilmont | 77:869cf507173a | 170 | * @{ |
emilmont | 77:869cf507173a | 171 | */ |
Kojto | 99:dbbf35b96557 | 172 | #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000) |
Kojto | 99:dbbf35b96557 | 173 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | ((uint32_t)0x00004000)) |
emilmont | 77:869cf507173a | 174 | /** |
emilmont | 77:869cf507173a | 175 | * @} |
emilmont | 77:869cf507173a | 176 | */ |
emilmont | 77:869cf507173a | 177 | |
Kojto | 99:dbbf35b96557 | 178 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
emilmont | 77:869cf507173a | 179 | * @{ |
emilmont | 77:869cf507173a | 180 | */ |
Kojto | 99:dbbf35b96557 | 181 | #define I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000) |
Kojto | 99:dbbf35b96557 | 182 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
emilmont | 77:869cf507173a | 183 | /** |
emilmont | 77:869cf507173a | 184 | * @} |
emilmont | 77:869cf507173a | 185 | */ |
emilmont | 77:869cf507173a | 186 | |
Kojto | 99:dbbf35b96557 | 187 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
emilmont | 77:869cf507173a | 188 | * @{ |
emilmont | 77:869cf507173a | 189 | */ |
Kojto | 99:dbbf35b96557 | 190 | #define I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000) |
Kojto | 99:dbbf35b96557 | 191 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
emilmont | 77:869cf507173a | 192 | /** |
emilmont | 77:869cf507173a | 193 | * @} |
emilmont | 77:869cf507173a | 194 | */ |
emilmont | 77:869cf507173a | 195 | |
Kojto | 99:dbbf35b96557 | 196 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
Kojto | 99:dbbf35b96557 | 197 | * @{ |
Kojto | 99:dbbf35b96557 | 198 | */ |
Kojto | 99:dbbf35b96557 | 199 | #define I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000) |
Kojto | 99:dbbf35b96557 | 200 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
Kojto | 99:dbbf35b96557 | 201 | /** |
Kojto | 99:dbbf35b96557 | 202 | * @} |
Kojto | 99:dbbf35b96557 | 203 | */ |
Kojto | 99:dbbf35b96557 | 204 | |
Kojto | 99:dbbf35b96557 | 205 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
emilmont | 77:869cf507173a | 206 | * @{ |
emilmont | 77:869cf507173a | 207 | */ |
emilmont | 77:869cf507173a | 208 | #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001) |
emilmont | 77:869cf507173a | 209 | #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010) |
emilmont | 77:869cf507173a | 210 | /** |
emilmont | 77:869cf507173a | 211 | * @} |
emilmont | 77:869cf507173a | 212 | */ |
emilmont | 77:869cf507173a | 213 | |
Kojto | 99:dbbf35b96557 | 214 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
emilmont | 77:869cf507173a | 215 | * @{ |
emilmont | 77:869cf507173a | 216 | */ |
emilmont | 77:869cf507173a | 217 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
emilmont | 77:869cf507173a | 218 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
emilmont | 77:869cf507173a | 219 | #define I2C_IT_ERR I2C_CR2_ITERREN |
emilmont | 77:869cf507173a | 220 | /** |
emilmont | 77:869cf507173a | 221 | * @} |
emilmont | 77:869cf507173a | 222 | */ |
emilmont | 77:869cf507173a | 223 | |
Kojto | 99:dbbf35b96557 | 224 | /** @defgroup I2C_Flag_definition I2C Flag definition |
emilmont | 77:869cf507173a | 225 | * @{ |
emilmont | 77:869cf507173a | 226 | */ |
emilmont | 77:869cf507173a | 227 | #define I2C_FLAG_SMBALERT ((uint32_t)0x00018000) |
emilmont | 77:869cf507173a | 228 | #define I2C_FLAG_TIMEOUT ((uint32_t)0x00014000) |
emilmont | 77:869cf507173a | 229 | #define I2C_FLAG_PECERR ((uint32_t)0x00011000) |
emilmont | 77:869cf507173a | 230 | #define I2C_FLAG_OVR ((uint32_t)0x00010800) |
emilmont | 77:869cf507173a | 231 | #define I2C_FLAG_AF ((uint32_t)0x00010400) |
emilmont | 77:869cf507173a | 232 | #define I2C_FLAG_ARLO ((uint32_t)0x00010200) |
emilmont | 77:869cf507173a | 233 | #define I2C_FLAG_BERR ((uint32_t)0x00010100) |
emilmont | 77:869cf507173a | 234 | #define I2C_FLAG_TXE ((uint32_t)0x00010080) |
emilmont | 77:869cf507173a | 235 | #define I2C_FLAG_RXNE ((uint32_t)0x00010040) |
emilmont | 77:869cf507173a | 236 | #define I2C_FLAG_STOPF ((uint32_t)0x00010010) |
emilmont | 77:869cf507173a | 237 | #define I2C_FLAG_ADD10 ((uint32_t)0x00010008) |
emilmont | 77:869cf507173a | 238 | #define I2C_FLAG_BTF ((uint32_t)0x00010004) |
emilmont | 77:869cf507173a | 239 | #define I2C_FLAG_ADDR ((uint32_t)0x00010002) |
emilmont | 77:869cf507173a | 240 | #define I2C_FLAG_SB ((uint32_t)0x00010001) |
emilmont | 77:869cf507173a | 241 | #define I2C_FLAG_DUALF ((uint32_t)0x00100080) |
emilmont | 77:869cf507173a | 242 | #define I2C_FLAG_SMBHOST ((uint32_t)0x00100040) |
emilmont | 77:869cf507173a | 243 | #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00100020) |
emilmont | 77:869cf507173a | 244 | #define I2C_FLAG_GENCALL ((uint32_t)0x00100010) |
emilmont | 77:869cf507173a | 245 | #define I2C_FLAG_TRA ((uint32_t)0x00100004) |
emilmont | 77:869cf507173a | 246 | #define I2C_FLAG_BUSY ((uint32_t)0x00100002) |
emilmont | 77:869cf507173a | 247 | #define I2C_FLAG_MSL ((uint32_t)0x00100001) |
emilmont | 77:869cf507173a | 248 | /** |
emilmont | 77:869cf507173a | 249 | * @} |
emilmont | 77:869cf507173a | 250 | */ |
emilmont | 77:869cf507173a | 251 | |
emilmont | 77:869cf507173a | 252 | /** |
emilmont | 77:869cf507173a | 253 | * @} |
emilmont | 77:869cf507173a | 254 | */ |
emilmont | 77:869cf507173a | 255 | |
emilmont | 77:869cf507173a | 256 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 257 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
Kojto | 99:dbbf35b96557 | 258 | * @{ |
Kojto | 99:dbbf35b96557 | 259 | */ |
emilmont | 77:869cf507173a | 260 | |
bogdanm | 85:024bf7f99721 | 261 | /** @brief Reset I2C handle state |
bogdanm | 85:024bf7f99721 | 262 | * @param __HANDLE__: specifies the I2C Handle. |
bogdanm | 85:024bf7f99721 | 263 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
bogdanm | 85:024bf7f99721 | 264 | * @retval None |
bogdanm | 85:024bf7f99721 | 265 | */ |
bogdanm | 85:024bf7f99721 | 266 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
bogdanm | 85:024bf7f99721 | 267 | |
emilmont | 77:869cf507173a | 268 | /** @brief Enable or disable the specified I2C interrupts. |
emilmont | 77:869cf507173a | 269 | * @param __HANDLE__: specifies the I2C Handle. |
emilmont | 77:869cf507173a | 270 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
emilmont | 77:869cf507173a | 271 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
emilmont | 77:869cf507173a | 272 | * This parameter can be one of the following values: |
emilmont | 77:869cf507173a | 273 | * @arg I2C_IT_BUF: Buffer interrupt enable |
emilmont | 77:869cf507173a | 274 | * @arg I2C_IT_EVT: Event interrupt enable |
emilmont | 77:869cf507173a | 275 | * @arg I2C_IT_ERR: Error interrupt enable |
emilmont | 77:869cf507173a | 276 | * @retval None |
emilmont | 77:869cf507173a | 277 | */ |
emilmont | 77:869cf507173a | 278 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
emilmont | 77:869cf507173a | 279 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
emilmont | 77:869cf507173a | 280 | |
emilmont | 77:869cf507173a | 281 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
emilmont | 77:869cf507173a | 282 | * @param __HANDLE__: specifies the I2C Handle. |
emilmont | 77:869cf507173a | 283 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
emilmont | 77:869cf507173a | 284 | * @param __INTERRUPT__: specifies the I2C interrupt source to check. |
emilmont | 77:869cf507173a | 285 | * This parameter can be one of the following values: |
emilmont | 77:869cf507173a | 286 | * @arg I2C_IT_BUF: Buffer interrupt enable |
emilmont | 77:869cf507173a | 287 | * @arg I2C_IT_EVT: Event interrupt enable |
emilmont | 77:869cf507173a | 288 | * @arg I2C_IT_ERR: Error interrupt enable |
emilmont | 77:869cf507173a | 289 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
emilmont | 77:869cf507173a | 290 | */ |
emilmont | 77:869cf507173a | 291 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
emilmont | 77:869cf507173a | 292 | |
emilmont | 77:869cf507173a | 293 | /** @brief Checks whether the specified I2C flag is set or not. |
emilmont | 77:869cf507173a | 294 | * @param __HANDLE__: specifies the I2C Handle. |
emilmont | 77:869cf507173a | 295 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
emilmont | 77:869cf507173a | 296 | * @param __FLAG__: specifies the flag to check. |
emilmont | 77:869cf507173a | 297 | * This parameter can be one of the following values: |
emilmont | 77:869cf507173a | 298 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
emilmont | 77:869cf507173a | 299 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
emilmont | 77:869cf507173a | 300 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
emilmont | 77:869cf507173a | 301 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
emilmont | 77:869cf507173a | 302 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
emilmont | 77:869cf507173a | 303 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
emilmont | 77:869cf507173a | 304 | * @arg I2C_FLAG_BERR: Bus error flag |
emilmont | 77:869cf507173a | 305 | * @arg I2C_FLAG_TXE: Data register empty flag |
emilmont | 77:869cf507173a | 306 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
emilmont | 77:869cf507173a | 307 | * @arg I2C_FLAG_STOPF: Stop detection flag |
emilmont | 77:869cf507173a | 308 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
emilmont | 77:869cf507173a | 309 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
emilmont | 77:869cf507173a | 310 | * @arg I2C_FLAG_ADDR: Address sent flag |
emilmont | 77:869cf507173a | 311 | * Address matched flag |
emilmont | 77:869cf507173a | 312 | * @arg I2C_FLAG_SB: Start bit flag |
emilmont | 77:869cf507173a | 313 | * @arg I2C_FLAG_DUALF: Dual flag |
emilmont | 77:869cf507173a | 314 | * @arg I2C_FLAG_SMBHOST: SMBus host header |
emilmont | 77:869cf507173a | 315 | * @arg I2C_FLAG_SMBDEFAULT: SMBus default header |
emilmont | 77:869cf507173a | 316 | * @arg I2C_FLAG_GENCALL: General call header flag |
emilmont | 77:869cf507173a | 317 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
emilmont | 77:869cf507173a | 318 | * @arg I2C_FLAG_BUSY: Bus busy flag |
emilmont | 77:869cf507173a | 319 | * @arg I2C_FLAG_MSL: Master/Slave flag |
emilmont | 77:869cf507173a | 320 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
emilmont | 77:869cf507173a | 321 | */ |
emilmont | 77:869cf507173a | 322 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16)) == 0x01)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \ |
emilmont | 77:869cf507173a | 323 | ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK))) |
emilmont | 77:869cf507173a | 324 | |
emilmont | 77:869cf507173a | 325 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
emilmont | 77:869cf507173a | 326 | * @param __HANDLE__: specifies the I2C Handle. |
emilmont | 77:869cf507173a | 327 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
emilmont | 77:869cf507173a | 328 | * @param __FLAG__: specifies the flag to clear. |
emilmont | 77:869cf507173a | 329 | * This parameter can be any combination of the following values: |
emilmont | 77:869cf507173a | 330 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
emilmont | 77:869cf507173a | 331 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
emilmont | 77:869cf507173a | 332 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
emilmont | 77:869cf507173a | 333 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
emilmont | 77:869cf507173a | 334 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
emilmont | 77:869cf507173a | 335 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
emilmont | 77:869cf507173a | 336 | * @arg I2C_FLAG_BERR: Bus error flag |
emilmont | 77:869cf507173a | 337 | * @retval None |
emilmont | 77:869cf507173a | 338 | */ |
Kojto | 90:cb3d968589d8 | 339 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
emilmont | 77:869cf507173a | 340 | |
emilmont | 77:869cf507173a | 341 | /** @brief Clears the I2C ADDR pending flag. |
emilmont | 77:869cf507173a | 342 | * @param __HANDLE__: specifies the I2C Handle. |
emilmont | 77:869cf507173a | 343 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
emilmont | 77:869cf507173a | 344 | * @retval None |
emilmont | 77:869cf507173a | 345 | */ |
Kojto | 99:dbbf35b96557 | 346 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
Kojto | 99:dbbf35b96557 | 347 | do{ \ |
Kojto | 99:dbbf35b96557 | 348 | __IO uint32_t tmpreg; \ |
Kojto | 99:dbbf35b96557 | 349 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
Kojto | 99:dbbf35b96557 | 350 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
Kojto | 99:dbbf35b96557 | 351 | UNUSED(tmpreg); \ |
Kojto | 99:dbbf35b96557 | 352 | } while(0) |
emilmont | 77:869cf507173a | 353 | |
emilmont | 77:869cf507173a | 354 | /** @brief Clears the I2C STOPF pending flag. |
emilmont | 77:869cf507173a | 355 | * @param __HANDLE__: specifies the I2C Handle. |
emilmont | 77:869cf507173a | 356 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
emilmont | 77:869cf507173a | 357 | * @retval None |
emilmont | 77:869cf507173a | 358 | */ |
Kojto | 99:dbbf35b96557 | 359 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
Kojto | 99:dbbf35b96557 | 360 | do{ \ |
Kojto | 99:dbbf35b96557 | 361 | __IO uint32_t tmpreg; \ |
Kojto | 99:dbbf35b96557 | 362 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
Kojto | 99:dbbf35b96557 | 363 | (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \ |
Kojto | 99:dbbf35b96557 | 364 | UNUSED(tmpreg); \ |
Kojto | 99:dbbf35b96557 | 365 | } while(0) |
Kojto | 99:dbbf35b96557 | 366 | |
emilmont | 77:869cf507173a | 367 | #define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
emilmont | 77:869cf507173a | 368 | #define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
emilmont | 77:869cf507173a | 369 | |
Kojto | 99:dbbf35b96557 | 370 | /** |
Kojto | 99:dbbf35b96557 | 371 | * @} |
Kojto | 99:dbbf35b96557 | 372 | */ |
emilmont | 77:869cf507173a | 373 | |
emilmont | 77:869cf507173a | 374 | /* Include I2C HAL Extension module */ |
emilmont | 77:869cf507173a | 375 | #include "stm32f4xx_hal_i2c_ex.h" |
emilmont | 77:869cf507173a | 376 | |
emilmont | 77:869cf507173a | 377 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 378 | /** @addtogroup I2C_Exported_Functions |
Kojto | 99:dbbf35b96557 | 379 | * @{ |
Kojto | 99:dbbf35b96557 | 380 | */ |
Kojto | 99:dbbf35b96557 | 381 | |
Kojto | 99:dbbf35b96557 | 382 | /** @addtogroup I2C_Exported_Functions_Group1 |
Kojto | 99:dbbf35b96557 | 383 | * @{ |
Kojto | 99:dbbf35b96557 | 384 | */ |
emilmont | 77:869cf507173a | 385 | /* Initialization/de-initialization functions **********************************/ |
emilmont | 77:869cf507173a | 386 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
emilmont | 77:869cf507173a | 387 | HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 388 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 389 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
Kojto | 99:dbbf35b96557 | 390 | /** |
Kojto | 99:dbbf35b96557 | 391 | * @} |
Kojto | 99:dbbf35b96557 | 392 | */ |
emilmont | 77:869cf507173a | 393 | |
Kojto | 99:dbbf35b96557 | 394 | /** @addtogroup I2C_Exported_Functions_Group2 |
Kojto | 99:dbbf35b96557 | 395 | * @{ |
Kojto | 99:dbbf35b96557 | 396 | */ |
emilmont | 77:869cf507173a | 397 | /* I/O operation functions *****************************************************/ |
emilmont | 77:869cf507173a | 398 | /******* Blocking mode: Polling */ |
emilmont | 77:869cf507173a | 399 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 400 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 401 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 402 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 403 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 404 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 405 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
emilmont | 77:869cf507173a | 406 | |
emilmont | 77:869cf507173a | 407 | /******* Non-Blocking mode: Interrupt */ |
emilmont | 77:869cf507173a | 408 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 409 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 410 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 411 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 412 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 413 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 414 | |
emilmont | 77:869cf507173a | 415 | /******* Non-Blocking mode: DMA */ |
emilmont | 77:869cf507173a | 416 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 417 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 418 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 419 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 420 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 421 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
emilmont | 77:869cf507173a | 422 | |
emilmont | 77:869cf507173a | 423 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
emilmont | 77:869cf507173a | 424 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
emilmont | 77:869cf507173a | 425 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 426 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 427 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 428 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 429 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 430 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 431 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 81:7d30d6019079 | 432 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
Kojto | 99:dbbf35b96557 | 433 | /** |
Kojto | 99:dbbf35b96557 | 434 | * @} |
Kojto | 99:dbbf35b96557 | 435 | */ |
emilmont | 77:869cf507173a | 436 | |
Kojto | 99:dbbf35b96557 | 437 | /** @addtogroup I2C_Exported_Functions_Group3 |
Kojto | 99:dbbf35b96557 | 438 | * @{ |
Kojto | 99:dbbf35b96557 | 439 | */ |
emilmont | 77:869cf507173a | 440 | /* Peripheral Control and State functions **************************************/ |
emilmont | 77:869cf507173a | 441 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
Kojto | 99:dbbf35b96557 | 442 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
Kojto | 99:dbbf35b96557 | 443 | |
Kojto | 99:dbbf35b96557 | 444 | /** |
Kojto | 99:dbbf35b96557 | 445 | * @} |
Kojto | 99:dbbf35b96557 | 446 | */ |
Kojto | 99:dbbf35b96557 | 447 | |
Kojto | 99:dbbf35b96557 | 448 | /** |
Kojto | 99:dbbf35b96557 | 449 | * @} |
Kojto | 99:dbbf35b96557 | 450 | */ |
Kojto | 99:dbbf35b96557 | 451 | /* Private types -------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 452 | /* Private variables ---------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 453 | /* Private constants ---------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 454 | /** @defgroup I2C_Private_Constants I2C Private Constants |
Kojto | 99:dbbf35b96557 | 455 | * @{ |
Kojto | 99:dbbf35b96557 | 456 | */ |
Kojto | 99:dbbf35b96557 | 457 | #define I2C_FLAG_MASK ((uint32_t)0x0000FFFF) |
Kojto | 99:dbbf35b96557 | 458 | /** |
Kojto | 99:dbbf35b96557 | 459 | * @} |
Kojto | 99:dbbf35b96557 | 460 | */ |
Kojto | 99:dbbf35b96557 | 461 | |
Kojto | 99:dbbf35b96557 | 462 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 463 | /** @defgroup I2C_Private_Macros I2C Private Macros |
Kojto | 99:dbbf35b96557 | 464 | * @{ |
Kojto | 99:dbbf35b96557 | 465 | */ |
Kojto | 99:dbbf35b96557 | 466 | |
Kojto | 99:dbbf35b96557 | 467 | #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000) |
Kojto | 99:dbbf35b96557 | 468 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000) ? ((__FREQRANGE__) + 1) : ((((__FREQRANGE__) * 300) / 1000) + 1)) |
Kojto | 99:dbbf35b96557 | 469 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1)) & I2C_CCR_CCR) < 4)? 4:((__PCLK__) / ((__SPEED__) << 1))) |
Kojto | 99:dbbf35b96557 | 470 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3)) : (((__PCLK__) / ((__SPEED__) * 25)) | I2C_DUTYCYCLE_16_9)) |
Kojto | 99:dbbf35b96557 | 471 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
Kojto | 99:dbbf35b96557 | 472 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0)? 1 : \ |
Kojto | 99:dbbf35b96557 | 473 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
Kojto | 99:dbbf35b96557 | 474 | |
Kojto | 99:dbbf35b96557 | 475 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) |
Kojto | 99:dbbf35b96557 | 476 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
Kojto | 99:dbbf35b96557 | 477 | |
Kojto | 99:dbbf35b96557 | 478 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) |
Kojto | 99:dbbf35b96557 | 479 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF0)))) |
Kojto | 99:dbbf35b96557 | 480 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF1)))) |
Kojto | 99:dbbf35b96557 | 481 | |
Kojto | 99:dbbf35b96557 | 482 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8))) |
Kojto | 99:dbbf35b96557 | 483 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) |
Kojto | 99:dbbf35b96557 | 484 | |
Kojto | 99:dbbf35b96557 | 485 | /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters |
Kojto | 99:dbbf35b96557 | 486 | * @{ |
Kojto | 99:dbbf35b96557 | 487 | */ |
Kojto | 99:dbbf35b96557 | 488 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
Kojto | 99:dbbf35b96557 | 489 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
Kojto | 99:dbbf35b96557 | 490 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
Kojto | 99:dbbf35b96557 | 491 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
Kojto | 99:dbbf35b96557 | 492 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
Kojto | 99:dbbf35b96557 | 493 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
Kojto | 99:dbbf35b96557 | 494 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
Kojto | 99:dbbf35b96557 | 495 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
Kojto | 99:dbbf35b96557 | 496 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
Kojto | 99:dbbf35b96557 | 497 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
Kojto | 99:dbbf35b96557 | 498 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
Kojto | 99:dbbf35b96557 | 499 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
Kojto | 99:dbbf35b96557 | 500 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= 400000)) |
Kojto | 99:dbbf35b96557 | 501 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00)) == 0) |
Kojto | 99:dbbf35b96557 | 502 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01)) == 0) |
Kojto | 99:dbbf35b96557 | 503 | /** |
Kojto | 99:dbbf35b96557 | 504 | * @} |
Kojto | 99:dbbf35b96557 | 505 | */ |
Kojto | 99:dbbf35b96557 | 506 | |
Kojto | 99:dbbf35b96557 | 507 | /** |
Kojto | 99:dbbf35b96557 | 508 | * @} |
Kojto | 99:dbbf35b96557 | 509 | */ |
Kojto | 99:dbbf35b96557 | 510 | |
Kojto | 99:dbbf35b96557 | 511 | /* Private functions ---------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 512 | /** @defgroup I2C_Private_Functions I2C Private Functions |
Kojto | 99:dbbf35b96557 | 513 | * @{ |
Kojto | 99:dbbf35b96557 | 514 | */ |
Kojto | 99:dbbf35b96557 | 515 | |
Kojto | 99:dbbf35b96557 | 516 | /** |
Kojto | 99:dbbf35b96557 | 517 | * @} |
Kojto | 99:dbbf35b96557 | 518 | */ |
emilmont | 77:869cf507173a | 519 | |
emilmont | 77:869cf507173a | 520 | /** |
emilmont | 77:869cf507173a | 521 | * @} |
emilmont | 77:869cf507173a | 522 | */ |
emilmont | 77:869cf507173a | 523 | |
emilmont | 77:869cf507173a | 524 | /** |
emilmont | 77:869cf507173a | 525 | * @} |
emilmont | 77:869cf507173a | 526 | */ |
emilmont | 77:869cf507173a | 527 | |
emilmont | 77:869cf507173a | 528 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 529 | } |
emilmont | 77:869cf507173a | 530 | #endif |
emilmont | 77:869cf507173a | 531 | |
emilmont | 77:869cf507173a | 532 | |
emilmont | 77:869cf507173a | 533 | #endif /* __STM32F4xx_HAL_I2C_H */ |
emilmont | 77:869cf507173a | 534 | |
emilmont | 77:869cf507173a | 535 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |