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Diff: TARGET_NUCLEO_F070RB/stm32f0xx_hal_spi.h
- Revision:
- 108:34e6b704fe68
- Parent:
- 93:e188a91d3eaa
--- a/TARGET_NUCLEO_F070RB/stm32f0xx_hal_spi.h Wed Sep 16 15:32:31 2015 +0100
+++ b/TARGET_NUCLEO_F070RB/stm32f0xx_hal_spi.h Fri Oct 02 07:35:07 2015 +0200
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f0xx_hal_spi.h
* @author MCD Application Team
- * @version V1.2.0
- * @date 11-December-2014
+ * @version V1.3.0
+ * @date 26-June-2015
* @brief Header file of SPI HAL module.
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -32,7 +32,7 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- ******************************************************************************
+ ******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
@@ -52,26 +52,26 @@
/** @addtogroup SPI
* @{
- */
+ */
-/* Exported types ------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
/** @defgroup SPI_Exported_Types SPI Exported Types
* @{
*/
-/**
- * @brief SPI Configuration Structure definition
+/**
+ * @brief SPI Configuration Structure definition
*/
typedef struct
{
uint32_t Mode; /*!< Specifies the SPI operating mode.
- This parameter can be a value of @ref SPI_mode */
+ This parameter can be a value of @ref SPI_Mode */
uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
This parameter can be a value of @ref SPI_Direction */
uint32_t DataSize; /*!< Specifies the SPI data size.
- This parameter can be a value of @ref SPI_data_size */
+ This parameter can be a value of @ref SPI_Data_Size */
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
This parameter can be a value of @ref SPI_Clock_Polarity */
@@ -91,7 +91,7 @@
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
-
+
uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
This parameter can be a value of @ref SPI_TI_mode */
@@ -101,75 +101,74 @@
uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
- uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
- CRC Length is only used with Data8 and Data16, not other data size
- This parameter must 0 or 1 or 2*/
+ uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
+ CRC Length is only used with Data8 and Data16, not other data size
+ This parameter can be a value of @ref SPI_CRC_length */
uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
This parameter can be a value of @ref SPI_NSSP_Mode
- This mode is activated by the NSSP bit in the SPIx_CR2 register and
- it takes effect only if the SPI interface is configured as Motorola SPI
- master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
+ This mode is activated by the NSSP bit in the SPIx_CR2 register and
+ it takes effect only if the SPI interface is configured as Motorola SPI
+ master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
CPOL setting is ignored).. */
} SPI_InitTypeDef;
-/**
- * @brief HAL State structures definition
- */
+/**
+ * @brief HAL State structures definition
+ */
typedef enum
{
HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
- HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
+ HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */
}HAL_SPI_StateTypeDef;
-/**
- * @brief SPI handle Structure definition
- */
+/**
+ * @brief SPI handle Structure definition
+ */
typedef struct __SPI_HandleTypeDef
{
- SPI_TypeDef *Instance; /*!< SPI registers base address */
-
- SPI_InitTypeDef Init; /*!< SPI communication parameters */
-
- uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
-
- uint16_t TxXferSize; /*!< SPI Tx Transfer size */
-
- uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
+ SPI_TypeDef *Instance; /* SPI registers base address */
+
+ SPI_InitTypeDef Init; /* SPI communication parameters */
+
+ uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
+
+ uint16_t TxXferSize; /* SPI Tx Transfer size */
+
+ uint16_t TxXferCount; /* SPI Tx Transfer Counter */
+
+ uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
+
+ uint16_t RxXferSize; /* SPI Rx Transfer size */
+
+ uint16_t RxXferCount; /* SPI Rx Transfer Counter */
- uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
-
- uint16_t RxXferSize; /*!< SPI Rx Transfer size */
-
- uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
-
- uint32_t CRCSize; /*!< SPI CRC size used for the transfer */
+ uint32_t CRCSize; /* SPI CRC size used for the transfer */
+
+ void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
+
+ void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
+
+ DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
- void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx IRQ handler */
-
- void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx IRQ handler */
+ DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
- DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */
+ HAL_LockTypeDef Lock; /* Locking object */
- DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */
-
- HAL_LockTypeDef Lock; /*!< Locking object */
+ __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
- HAL_SPI_StateTypeDef State; /*!< SPI communication state */
-
- __IO uint32_t ErrorCode; /*!< SPI Error code
- This parameter can be a value of @ref SPI_Error */
+ uint32_t ErrorCode; /* SPI Error code */
}SPI_HandleTypeDef;
/**
* @}
- */
+ */
/* Exported constants --------------------------------------------------------*/
@@ -177,24 +176,25 @@
* @{
*/
-/** @defgroup SPI_Error SPI Error
+/** @defgroup SPI_Error_Code SPI Error Code
* @{
- */
- #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
- #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001) /*!< MODF error */
- #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002) /*!< CRC error */
- #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */
- #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */
- #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
- #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
- #define HAL_SPI_ERROR_UNKNOW ((uint32_t)0x00000040) /*!< Unknow Error error */
+ */
+#define HAL_SPI_ERROR_NONE (uint32_t)0x00000000 /*!< No error */
+#define HAL_SPI_ERROR_MODF (uint32_t)0x00000001 /*!< MODF error */
+#define HAL_SPI_ERROR_CRC (uint32_t)0x00000002 /*!< CRC error */
+#define HAL_SPI_ERROR_OVR (uint32_t)0x00000004 /*!< OVR error */
+#define HAL_SPI_ERROR_FRE (uint32_t)0x00000008 /*!< FRE error */
+#define HAL_SPI_ERROR_DMA (uint32_t)0x00000010 /*!< DMA transfer error */
+#define HAL_SPI_ERROR_FLAG (uint32_t)0x00000020 /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
+#define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040 /*!< Unknown error */
/**
* @}
*/
-/** @defgroup SPI_mode SPI mode
+
+/** @defgroup SPI_Mode SPI Mode
* @{
- */
+ */
#define SPI_MODE_SLAVE ((uint32_t)0x00000000)
#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
#define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
@@ -203,12 +203,12 @@
* @}
*/
-/** @defgroup SPI_Direction SPI Direction
+/** @defgroup SPI_Direction SPI Direction Mode
* @{
*/
-#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
-#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
-#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
+#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
+#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
+#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
#define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
@@ -221,23 +221,23 @@
/**
* @}
*/
-
-/** @defgroup SPI_data_size SPI Data size
+
+/** @defgroup SPI_Data_Size SPI Data Size
* @{
*/
-#define SPI_DATASIZE_4BIT ((uint32_t)0x0300) /*!< SPI Datasize = 4bits */
-#define SPI_DATASIZE_5BIT ((uint32_t)0x0400) /*!< SPI Datasize = 5bits */
-#define SPI_DATASIZE_6BIT ((uint32_t)0x0500) /*!< SPI Datasize = 6bits */
-#define SPI_DATASIZE_7BIT ((uint32_t)0x0600) /*!< SPI Datasize = 7bits */
-#define SPI_DATASIZE_8BIT ((uint32_t)0x0700) /*!< SPI Datasize = 8bits */
-#define SPI_DATASIZE_9BIT ((uint32_t)0x0800) /*!< SPI Datasize = 9bits */
-#define SPI_DATASIZE_10BIT ((uint32_t)0x0900) /*!< SPI Datasize = 10bits */
-#define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) /*!< SPI Datasize = 11bits */
-#define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) /*!< SPI Datasize = 12bits */
-#define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) /*!< SPI Datasize = 13bits */
-#define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) /*!< SPI Datasize = 14bits */
-#define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) /*!< SPI Datasize = 15bits */
-#define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) /*!< SPI Datasize = 16bits */
+#define SPI_DATASIZE_4BIT ((uint32_t)0x0300) /*!< SPI Datasize = 4bits */
+#define SPI_DATASIZE_5BIT ((uint32_t)0x0400) /*!< SPI Datasize = 5bits */
+#define SPI_DATASIZE_6BIT ((uint32_t)0x0500) /*!< SPI Datasize = 6bits */
+#define SPI_DATASIZE_7BIT ((uint32_t)0x0600) /*!< SPI Datasize = 7bits */
+#define SPI_DATASIZE_8BIT ((uint32_t)0x0700) /*!< SPI Datasize = 8bits */
+#define SPI_DATASIZE_9BIT ((uint32_t)0x0800) /*!< SPI Datasize = 9bits */
+#define SPI_DATASIZE_10BIT ((uint32_t)0x0900) /*!< SPI Datasize = 10bits */
+#define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) /*!< SPI Datasize = 11bits */
+#define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) /*!< SPI Datasize = 12bits */
+#define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) /*!< SPI Datasize = 13bits */
+#define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) /*!< SPI Datasize = 14bits */
+#define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) /*!< SPI Datasize = 15bits */
+#define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) /*!< SPI Datasize = 16bits */
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
((DATASIZE) == SPI_DATASIZE_15BIT) || \
((DATASIZE) == SPI_DATASIZE_14BIT) || \
@@ -251,14 +251,13 @@
((DATASIZE) == SPI_DATASIZE_6BIT) || \
((DATASIZE) == SPI_DATASIZE_5BIT) || \
((DATASIZE) == SPI_DATASIZE_4BIT))
-
/**
* @}
- */
+ */
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
* @{
- */
+ */
#define SPI_POLARITY_LOW ((uint32_t)0x00000000) /*!< SPI polarity Low */
#define SPI_POLARITY_HIGH SPI_CR1_CPOL /*!< SPI polarity High */
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
@@ -280,7 +279,7 @@
/** @defgroup SPI_Slave_Select_management SPI Slave Select management
* @{
- */
+ */
#define SPI_NSS_SOFT SPI_CR1_SSM
#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
#define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
@@ -290,19 +289,19 @@
/**
* @}
*/
-
-/** @defgroup SPI_NSSP_Mode SPI NSS pulse management
+
+/** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
* @{
- */
-#define SPI_NSS_PULSE_ENABLED SPI_CR2_NSSP
-#define SPI_NSS_PULSE_DISABLED ((uint32_t)0x00000000)
+ */
+#define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
+#define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000)
-#define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLED) || \
- ((NSSP) == SPI_NSS_PULSE_DISABLED))
+#define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
+ ((NSSP) == SPI_NSS_PULSE_DISABLE))
/**
* @}
*/
-
+
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
* @{
*/
@@ -324,11 +323,11 @@
((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
/**
* @}
- */
+ */
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
* @{
- */
+ */
#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
@@ -340,53 +339,53 @@
/** @defgroup SPI_TI_mode SPI TI mode
* @{
*/
-#define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
-#define SPI_TIMODE_ENABLED SPI_CR2_FRF
-#define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
- ((MODE) == SPI_TIMODE_ENABLED))
-/**
- * @}
- */
-
-/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
- * @{
- */
-#define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
-#define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
-#define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
- ((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
+#define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
+#define SPI_TIMODE_ENABLE SPI_CR2_FRF
+#define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
+ ((MODE) == SPI_TIMODE_ENABLE))
/**
* @}
*/
-/** @defgroup SPI_CRC_length SPI CRC length
+/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
+ * @{
+ */
+#define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
+#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
+#define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
+ ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
+/**
+ * @}
+ */
+
+/** @defgroup SPI_CRC_length SPI CRC Length
* @{
* This parameter can be one of the following values:
- * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
+ * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
* SPI_CRC_LENGTH_8BIT : CRC 8bit
- * SPI_CRC_LENGTH_16BIT : CRC 16bit
+ * SPI_CRC_LENGTH_16BIT : CRC 16bit
*/
-#define SPI_CRC_LENGTH_DATASIZE 0
-#define SPI_CRC_LENGTH_8BIT 1
-#define SPI_CRC_LENGTH_16BIT 2
+#define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000)
+#define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001)
+#define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002)
#define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
((LENGTH) == SPI_CRC_LENGTH_16BIT))
/**
* @}
*/
-
-/** @defgroup SPI_FIFO_reception_threshold SPI FIFO reception threshold
+
+/** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
* @{
* This parameter can be one of the following values:
* SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
- * RXNE event is generated if the FIFO
- * level is greater or equal to 1/2(16-bits).
- * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
+ * RXNE event is generated if the FIFO
+ * level is greater or equal to 1/2(16-bits).
+ * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
* level is greater or equal to 1/4(8 bits). */
-#define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
-#define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
-#define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x0)
+#define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
+#define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
+#define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000)
/**
* @}
@@ -411,8 +410,8 @@
* Elements values convention: 0xXXXXYYYY
* - XXXX : Flag register Index
* - YYYY : Flag mask
- * @{
- */
+ * @{
+ */
#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
@@ -426,25 +425,25 @@
* @}
*/
-/** @defgroup SPI_transmission_fifo_status_level SPI transmission fifo status level
+/** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
* @{
- */
+ */
#define SPI_FTLVL_EMPTY ((uint32_t)0x0000)
-#define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800)
-#define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000)
+#define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800)
+#define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000)
#define SPI_FTLVL_FULL ((uint32_t)0x1800)
/**
* @}
- */
+ */
-/** @defgroup SPI_reception_fifo_status_level SPI reception fifo status level
+/** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
* @{
- */
+ */
#define SPI_FRLVL_EMPTY ((uint32_t)0x0000)
-#define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200)
-#define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400)
-#define SPI_FRLVL_FULL ((uint32_t)0x0600)
+#define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200)
+#define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400)
+#define SPI_FRLVL_FULL ((uint32_t)0x0600)
/**
* @}
*/
@@ -453,22 +452,21 @@
* @}
*/
-
/* Exported macros ------------------------------------------------------------*/
/** @defgroup SPI_Exported_Macros SPI Exported Macros
* @{
*/
-
-/** @brief Reset SPI handle state
+
+/** @brief Reset SPI handle state.
* @param __HANDLE__: SPI handle.
* @retval None
*/
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
-/** @brief Enables or disables the specified SPI interrupts.
- * @param __HANDLE__ : specifies the SPI Handle.
+/** @brief Enable or disable the specified SPI interrupts.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
- * @param __INTERRUPT__ : specifies the interrupt source to enable or disable.
+ * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
* This parameter can be one of the following values:
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
@@ -477,11 +475,11 @@
*/
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
-
-/** @brief Checks if the specified SPI interrupt source is enabled or disabled.
- * @param __HANDLE__ : specifies the SPI Handle.
+
+/** @brief Check whether the specified SPI interrupt source is enabled or not.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
- * @param __INTERRUPT__ : specifies the SPI interrupt source to check.
+ * @param __INTERRUPT__: specifies the SPI interrupt source to check.
* This parameter can be one of the following values:
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
@@ -490,10 +488,10 @@
*/
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-/** @brief Checks whether the specified SPI flag is set or not.
- * @param __HANDLE__ : specifies the SPI Handle.
+/** @brief Check whether the specified SPI flag is set or not.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
- * @param __FLAG__ : specifies the flag to check.
+ * @param __FLAG__: specifies the flag to check.
* This parameter can be one of the following values:
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
@@ -501,111 +499,127 @@
* @arg SPI_FLAG_MODF: Mode fault flag
* @arg SPI_FLAG_OVR: Overrun flag
* @arg SPI_FLAG_BSY: Busy flag
- * @arg SPI_FLAG_FRE: Frame format error flag
+ * @arg SPI_FLAG_FRE: Frame format error flag
* @arg SPI_FLAG_FTLVL: SPI fifo transmission level
- * @arg SPI_FLAG_FRLVL: SPI fifo reception level
+ * @arg SPI_FLAG_FRLVL: SPI fifo reception level
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
-/** @brief Clears the SPI CRCERR pending flag.
- * @param __HANDLE__ : specifies the SPI Handle.
+/** @brief Clear the SPI CRCERR pending flag.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
-
-/** @brief Clears the SPI MODF pending flag.
- * @param __HANDLE__ : specifies the SPI Handle.
+
+/** @brief Clear the SPI MODF pending flag.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
- *
+ *
* @retval None
- */
-#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{\
- __IO uint32_t tmpreg;\
- tmpreg = (__HANDLE__)->Instance->SR;\
- UNUSED(tmpreg); \
- (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);\
- }while(0)
+ */
+#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
+ do{ \
+ __IO uint32_t tmpreg; \
+ tmpreg = (__HANDLE__)->Instance->SR; \
+ (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
+ UNUSED(tmpreg); \
+ } while(0)
-/** @brief Clears the SPI OVR pending flag.
- * @param __HANDLE__ : specifies the SPI Handle.
+/** @brief Clear the SPI OVR pending flag.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
- *
+ *
* @retval None
- */
-#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{ \
- __IO uint32_t tmpreg; \
- tmpreg = (__HANDLE__)->Instance->DR; \
- tmpreg = (__HANDLE__)->Instance->SR; \
- UNUSED(tmpreg); \
- } while(0)
-
-/** @brief Clears the SPI FRE pending flag.
- * @param __HANDLE__ : specifies the SPI Handle.
+ */
+#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
+ do{ \
+ __IO uint32_t tmpreg; \
+ tmpreg = (__HANDLE__)->Instance->DR; \
+ tmpreg = (__HANDLE__)->Instance->SR; \
+ UNUSED(tmpreg); \
+ } while(0)
+
+/** @brief Clear the SPI FRE pending flag.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
- *
+ *
* @retval None
- */
-#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) do{\
- __IO uint32_t tmpreg;\
- tmpreg = ((__HANDLE__)->Instance->SR);\
- UNUSED(tmpreg); \
- }while(0)
-/** @brief Enables the SPI.
- * @param __HANDLE__ : specifies the SPI Handle.
+ */
+#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
+ do{ \
+ __IO uint32_t tmpreg; \
+ tmpreg = (__HANDLE__)->Instance->SR; \
+ UNUSED(tmpreg); \
+ } while(0)
+
+/** @brief Enable the SPI peripheral.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
#define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
-/** @brief Disables the SPI.
- * @param __HANDLE__ : specifies the SPI Handle.
+/** @brief Disable the SPI peripheral.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
#define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
-/** @brief Sets the SPI transmit-only mode.
- * @param __HANDLE__ : specifies the SPI Handle.
+/**
+ * @}
+ */
+
+/* Private macros --------------------------------------------------------*/
+/** @defgroup SPI_Private_Macros SPI Private Macros
+ * @{
+ */
+
+/** @brief Set the SPI transmit-only mode.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
-#define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
-
-/** @brief Sets the SPI receive-only mode.
- * @param __HANDLE__ : specifies the SPI Handle.
+#define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
+
+/** @brief Set the SPI receive-only mode.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
-#define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
-
-/** @brief Resets the CRC calculation of the SPI.
- * @param __HANDLE__ : specifies the SPI Handle.
+#define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
+
+/** @brief Reset the CRC calculation of the SPI.
+ * @param __HANDLE__: specifies the SPI Handle.
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
-#define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
- (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
+#define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
+ (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
+
+
/**
* @}
*/
-
+
+/* Include SPI HAL Extended module */
+#include "stm32f0xx_hal_spi_ex.h"
+
/* Exported functions --------------------------------------------------------*/
/** @addtogroup SPI_Exported_Functions
* @{
*/
-/** @addtogroup SPI_Exported_Functions_Group1
+/* Initialization and de-initialization functions ****************************/
+/** @addtogroup SPI_Exported_Functions_Group1
* @{
*/
-
-/* Initialization and de-initialization functions ****************************/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
-HAL_StatusTypeDef HAL_SPI_InitExtended(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
@@ -613,11 +627,10 @@
* @}
*/
+/* IO operation functions *****************************************************/
/** @addtogroup SPI_Exported_Functions_Group2
* @{
*/
-
-/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
@@ -630,7 +643,6 @@
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
-HAL_StatusTypeDef HAL_SPI_FlushRxFifo(SPI_HandleTypeDef *hspi);
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
@@ -644,13 +656,12 @@
* @}
*/
+/* Peripheral State and Error functions ***************************************/
/** @addtogroup SPI_Exported_Functions_Group3
* @{
*/
-
-/* Peripheral State and Error functions ***************************************/
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
+uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
/**
* @}
*/
@@ -658,14 +669,14 @@
/**
* @}
*/
-
-/**
- * @}
- */
/**
* @}
- */
+ */
+
+/**
+ * @}
+ */
#ifdef __cplusplus
}
@@ -674,4 +685,3 @@
#endif /* __STM32F0xx_HAL_SPI_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-