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Diff: TARGET_NUCLEO_F070RB/stm32f0xx_hal_iwdg.h
- Revision:
- 108:34e6b704fe68
- Parent:
- 93:e188a91d3eaa
--- a/TARGET_NUCLEO_F070RB/stm32f0xx_hal_iwdg.h Wed Sep 16 15:32:31 2015 +0100 +++ b/TARGET_NUCLEO_F070RB/stm32f0xx_hal_iwdg.h Fri Oct 02 07:35:07 2015 +0200 @@ -2,13 +2,13 @@ ****************************************************************************** * @file stm32f0xx_hal_iwdg.h * @author MCD Application Team - * @version V1.2.0 - * @date 11-December-2014 + * @version V1.3.0 + * @date 26-June-2015 * @brief Header file of IWDG HAL module. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -32,7 +32,7 @@ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - ****************************************************************************** + ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ @@ -52,55 +52,54 @@ /** @addtogroup IWDG * @{ - */ + */ -/* Exported types ------------------------------------------------------------*/ - +/* Exported types ------------------------------------------------------------*/ /** @defgroup IWDG_Exported_Types IWDG Exported Types * @{ */ /** - * @brief IWDG HAL State Structure definition - */ + * @brief IWDG HAL State Structure definition + */ typedef enum { - HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ - HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ - HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ - HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ - HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ + HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ + HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ + HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ + HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ + HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ }HAL_IWDG_StateTypeDef; /** - * @brief IWDG Init structure definition + * @brief IWDG Init structure definition */ typedef struct { - uint32_t Prescaler; /*!< Select the prescaler of the IWDG. - This parameter can be a value of @ref IWDG_Prescaler */ - - uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ - - uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ + uint32_t Prescaler; /*!< Select the prescaler of the IWDG. + This parameter can be a value of @ref IWDG_Prescaler */ + + uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. + This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ + + uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. + This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ } IWDG_InitTypeDef; /** * @brief IWDG Handle Structure definition - */ + */ typedef struct { - IWDG_TypeDef *Instance; /*!< Register base address */ - - IWDG_InitTypeDef Init; /*!< IWDG required parameters */ - - HAL_LockTypeDef Lock; /*!< IWDG Locking object */ - - __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ + IWDG_TypeDef *Instance; /*!< Register base address */ + + IWDG_InitTypeDef Init; /*!< IWDG required parameters */ + + HAL_LockTypeDef Lock; /*!< IWDG Locking object */ + + __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ }IWDG_HandleTypeDef; @@ -109,134 +108,63 @@ */ /* Exported constants --------------------------------------------------------*/ - /** @defgroup IWDG_Exported_Constants IWDG Exported Constants * @{ */ -/** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask - * @brief IWDG registers bit mask - * @{ - */ -/* --- KR Register ---*/ -/* KR register bit mask */ -#define KR_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */ -#define KR_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */ -#define KR_KEY_EWA ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */ -#define KR_KEY_DWA ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */ - -#define IS_IWDG_KR(__KR__) (((__KR__) == KR_KEY_RELOAD) || \ - ((__KR__) == KR_KEY_ENABLE))|| \ - ((__KR__) == KR_KEY_EWA)) || \ - ((__KR__) == KR_KEY_DWA)) -/** - * @} - */ - -/** @defgroup IWDG_Flag_definition IWDG Flag definition - * @{ - */ -#define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */ -#define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */ -#define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update Flag */ - -/** - * @} - */ - /** @defgroup IWDG_Prescaler IWDG Prescaler * @{ - */ -#define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ -#define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ -#define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ -#define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ -#define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ -#define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ -#define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ - -#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ - ((__PRESCALER__) == IWDG_PRESCALER_8) || \ - ((__PRESCALER__) == IWDG_PRESCALER_16) || \ - ((__PRESCALER__) == IWDG_PRESCALER_32) || \ - ((__PRESCALER__) == IWDG_PRESCALER_64) || \ - ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ - ((__PRESCALER__) == IWDG_PRESCALER_256)) - + */ +#define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ +#define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ +#define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ +#define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ +#define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ +#define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ +#define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ /** * @} */ -/** @defgroup IWDG_Reload_Value IWDG Reload Value +/** @defgroup IWDG_Window IWDG Window * @{ - */ -#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) + */ +#define IWDG_WINDOW_DISABLE ((uint32_t)0x00000FFF) /** * @} */ -/** @defgroup IWDG_CounterWindow_Value IWDG CounterWindow Value - * @{ - */ -#define IS_IWDG_WINDOW(__VALUE__) ((__VALUE__) <= 0xFFF) -/** - * @} - */ -/** @defgroup IWDG_Window_option IWDG Window option - * @{ - */ -#define IWDG_WINDOW_DISABLE 0xFFF -/** - * @} - */ - /** * @} */ /* Exported macros -----------------------------------------------------------*/ +/** @defgroup IWDG_Exported_Macros IWDG Exported Macros + * @{ + */ -/** @defgroup IWDG_Exported_Macros IWDG Exported Macros - * @{ - */ - -/** @brief Reset IWDG handle state +/** @brief Reset IWDG handle state. * @param __HANDLE__: IWDG handle. * @retval None */ -#define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) +#define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) /** - * @brief Enables the IWDG peripheral. + * @brief Enable the IWDG peripheral. * @param __HANDLE__: IWDG handle * @retval None */ -#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_ENABLE) +#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) /** - * @brief Reloads IWDG counter with value defined in the reload register - * (write access to IWDG_PR and IWDG_RLR registers disabled). + * @brief Reload IWDG counter with value defined in the reload register. * @param __HANDLE__: IWDG handle * @retval None */ -#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_RELOAD) +#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) /** - * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. - * @param __HANDLE__: IWDG handle - * @retval None - */ -#define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_EWA) - -/** - * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. - * @param __HANDLE__: IWDG handle - * @retval None - */ -#define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_DWA) - -/** - * @brief Gets the selected IWDG's flag status. + * @brief Get the selected IWDG flag status. * @param __HANDLE__: IWDG handle * @param __FLAG__: specifies the flag to check. * This parameter can be one of the following values: @@ -245,14 +173,13 @@ * @arg IWDG_FLAG_WVU: Watchdog counter window value flag * @retval The new state of __FLAG__ (TRUE or FALSE). */ -#define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) +#define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) /** * @} */ /* Exported functions --------------------------------------------------------*/ - /** @addtogroup IWDG_Exported_Functions * @{ */ @@ -262,45 +189,115 @@ */ /* Initialization/de-initialization functions ********************************/ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); -void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); - +void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); /** * @} */ - + /** @addtogroup IWDG_Exported_Functions_Group2 * @{ */ /* I/O operation functions ****************************************************/ HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); - /** * @} */ - + /** @addtogroup IWDG_Exported_Functions_Group3 * @{ */ /* Peripheral State functions ************************************************/ HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); +/** + * @} + */ /** * @} - */ + */ + +/* Private constants ---------------------------------------------------------*/ +/** @addtogroup IWDG_Private_Defines + * @{ + */ +/** + * @brief IWDG Key Register BitMask + */ +#define IWDG_KEY_RELOAD ((uint32_t)0x0000AAAA) /*!< IWDG Reload Counter Enable */ +#define IWDG_KEY_ENABLE ((uint32_t)0x0000CCCC) /*!< IWDG Peripheral Enable */ +#define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x00005555) /*!< IWDG KR Write Access Enable */ +#define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x00000000) /*!< IWDG KR Write Access Disable */ + +/** + * @brief IWDG Flag definition + */ +#define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */ +#define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */ +#define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update flag */ /** * @} - */ + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup IWDG_Private_Macro IWDG Private Macros + * @{ + */ +/** + * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. + * @param __HANDLE__: IWDG handle + * @retval None + */ +#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) + +/** + * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. + * @param __HANDLE__: IWDG handle + * @retval None + */ +#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) + +/** + * @brief Check IWDG prescaler value. + * @param __PRESCALER__: IWDG prescaler value + * @retval None + */ +#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ + ((__PRESCALER__) == IWDG_PRESCALER_8) || \ + ((__PRESCALER__) == IWDG_PRESCALER_16) || \ + ((__PRESCALER__) == IWDG_PRESCALER_32) || \ + ((__PRESCALER__) == IWDG_PRESCALER_64) || \ + ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ + ((__PRESCALER__) == IWDG_PRESCALER_256)) + +/** + * @brief Check IWDG reload value. + * @param __RELOAD__: IWDG reload value + * @retval None + */ +#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) + +/** + * @brief Check IWDG window value. + * @param __WINDOW__: IWDG window value + * @retval None + */ +#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= 0xFFF) /** * @} - */ + */ /** * @} - */ - + */ + +/** + * @} + */ + + #ifdef __cplusplus } #endif