Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_DISCO_L053C8/stm32l0xx_hal_adc.h@99:dbbf35b96557, 2015-05-13 (annotated)

Committer:
Kojto
Date:
Wed May 13 08:08:21 2015 +0200
Revision:
99:dbbf35b96557
Release 99 of the mbed library



Changes:

 - new targets - MAXWSNENV, DISCO_L053C8

 - STM32F4xx - ST Cube driver

 - KSDK mcu - SPI timing fix

 - Nordic - update to softdevice s130

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 99:dbbf35b96557 1 /**
Kojto 99:dbbf35b96557 2 ******************************************************************************
Kojto 99:dbbf35b96557 3 * @file stm32l0xx_hal_adc.h
Kojto 99:dbbf35b96557 4 * @author MCD Application Team
Kojto 99:dbbf35b96557 5 * @version V1.2.0
Kojto 99:dbbf35b96557 6 * @date 06-February-2015
Kojto 99:dbbf35b96557 7 * @brief This file contains all the functions prototypes for the ADC firmware
Kojto 99:dbbf35b96557 8 * library.
Kojto 99:dbbf35b96557 9 ******************************************************************************
Kojto 99:dbbf35b96557 10 * @attention
Kojto 99:dbbf35b96557 11 *
Kojto 99:dbbf35b96557 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 99:dbbf35b96557 13 *
Kojto 99:dbbf35b96557 14 * Redistribution and use in source and binary forms, with or without modification,
Kojto 99:dbbf35b96557 15 * are permitted provided that the following conditions are met:
Kojto 99:dbbf35b96557 16 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 99:dbbf35b96557 17 * this list of conditions and the following disclaimer.
Kojto 99:dbbf35b96557 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 99:dbbf35b96557 19 * this list of conditions and the following disclaimer in the documentation
Kojto 99:dbbf35b96557 20 * and/or other materials provided with the distribution.
Kojto 99:dbbf35b96557 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 99:dbbf35b96557 22 * may be used to endorse or promote products derived from this software
Kojto 99:dbbf35b96557 23 * without specific prior written permission.
Kojto 99:dbbf35b96557 24 *
Kojto 99:dbbf35b96557 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 99:dbbf35b96557 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 99:dbbf35b96557 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 99:dbbf35b96557 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 99:dbbf35b96557 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 99:dbbf35b96557 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 99:dbbf35b96557 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 99:dbbf35b96557 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 99:dbbf35b96557 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 99:dbbf35b96557 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 99:dbbf35b96557 35 *
Kojto 99:dbbf35b96557 36 ******************************************************************************
Kojto 99:dbbf35b96557 37 */
Kojto 99:dbbf35b96557 38
Kojto 99:dbbf35b96557 39 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 99:dbbf35b96557 40 #ifndef __STM32L0xx_ADC_H
Kojto 99:dbbf35b96557 41 #define __STM32L0xx_ADC_H
Kojto 99:dbbf35b96557 42
Kojto 99:dbbf35b96557 43 #ifdef __cplusplus
Kojto 99:dbbf35b96557 44 extern "C" {
Kojto 99:dbbf35b96557 45 #endif
Kojto 99:dbbf35b96557 46
Kojto 99:dbbf35b96557 47 /* Includes ------------------------------------------------------------------*/
Kojto 99:dbbf35b96557 48 #include "stm32l0xx_hal_def.h"
Kojto 99:dbbf35b96557 49
Kojto 99:dbbf35b96557 50 /** @addtogroup STM32L0xx_HAL_Driver
Kojto 99:dbbf35b96557 51 * @{
Kojto 99:dbbf35b96557 52 */
Kojto 99:dbbf35b96557 53
Kojto 99:dbbf35b96557 54 /** @addtogroup ADC
Kojto 99:dbbf35b96557 55 * @{
Kojto 99:dbbf35b96557 56 */
Kojto 99:dbbf35b96557 57
Kojto 99:dbbf35b96557 58 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 59 /**
Kojto 99:dbbf35b96557 60 * @brief HAL State structures definition
Kojto 99:dbbf35b96557 61 */
Kojto 99:dbbf35b96557 62 typedef enum
Kojto 99:dbbf35b96557 63 {
Kojto 99:dbbf35b96557 64 HAL_ADC_STATE_RESET = 0x00, /*!< ADC not yet initialized or disabled */
Kojto 99:dbbf35b96557 65 HAL_ADC_STATE_READY = 0x01, /*!< ADC peripheral ready for use */
Kojto 99:dbbf35b96557 66 HAL_ADC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
Kojto 99:dbbf35b96557 67 HAL_ADC_STATE_BUSY_REG = 0x12, /*!< Regular conversion is ongoing */
Kojto 99:dbbf35b96557 68 HAL_ADC_STATE_TIMEOUT = 0x03, /*!< Timeout state */
Kojto 99:dbbf35b96557 69 HAL_ADC_STATE_ERROR = 0x04, /*!< ADC state error */
Kojto 99:dbbf35b96557 70 HAL_ADC_STATE_EOC = 0x05, /*!< Conversion is completed */
Kojto 99:dbbf35b96557 71 HAL_ADC_STATE_AWD = 0x06, /*!< ADC state analog watchdog */
Kojto 99:dbbf35b96557 72 }HAL_ADC_StateTypeDef;
Kojto 99:dbbf35b96557 73
Kojto 99:dbbf35b96557 74
Kojto 99:dbbf35b96557 75 /**
Kojto 99:dbbf35b96557 76 * @brief ADC Oversampler structure definition
Kojto 99:dbbf35b96557 77 */
Kojto 99:dbbf35b96557 78 typedef struct
Kojto 99:dbbf35b96557 79 {
Kojto 99:dbbf35b96557 80 uint32_t Ratio; /*!< Configures the oversampling ratio.
Kojto 99:dbbf35b96557 81 This parameter can be a value of @ref ADC_Oversampling_Ratio */
Kojto 99:dbbf35b96557 82 uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
Kojto 99:dbbf35b96557 83 This parameter can be a value of @ref ADC_Right_Bit_Shift */
Kojto 99:dbbf35b96557 84 uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode
Kojto 99:dbbf35b96557 85 This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
Kojto 99:dbbf35b96557 86
Kojto 99:dbbf35b96557 87 }ADC_OversamplingTypeDef;
Kojto 99:dbbf35b96557 88
Kojto 99:dbbf35b96557 89 /**
Kojto 99:dbbf35b96557 90 * @brief ADC Init structure definition
Kojto 99:dbbf35b96557 91 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned by the ADC state.
Kojto 99:dbbf35b96557 92 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
Kojto 99:dbbf35b96557 93 * without error reporting (as it can be the expected behaviour in case of intended action to update antother parameter (which fullfills the ADC state condition) on the fly).
Kojto 99:dbbf35b96557 94 */
Kojto 99:dbbf35b96557 95 typedef struct
Kojto 99:dbbf35b96557 96 {
Kojto 99:dbbf35b96557 97 uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled
Kojto 99:dbbf35b96557 98 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 99 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 100 ADC_OversamplingTypeDef Oversample; /*!< Specifies the Oversampling parameters
Kojto 99:dbbf35b96557 101 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 102 uint32_t ClockPrescaler; /*!< Selects the ADC clock frequency.
Kojto 99:dbbf35b96557 103 This parameter can be a value of @ref ADC_ClockPrescaler
Kojto 99:dbbf35b96557 104 Note: This parameter can be modified only if ADC is disabled. */
Kojto 99:dbbf35b96557 105 uint32_t Resolution; /*!< Configures the ADC resolution mode.
Kojto 99:dbbf35b96557 106 This parameter can be a value of @ref ADC_Resolution
Kojto 99:dbbf35b96557 107 Note: This parameter can be modified only if ADC is disabled. */
Kojto 99:dbbf35b96557 108 uint32_t SamplingTime; /*!< The sample time value to be set for all channels.
Kojto 99:dbbf35b96557 109 This parameter can be a value of @ref ADC_sampling_times
Kojto 99:dbbf35b96557 110 Note: This parameter can be modified only if there is no conversion ongoing. */
Kojto 99:dbbf35b96557 111 uint32_t ScanConvMode; /*!< The scan sequence direction.
Kojto 99:dbbf35b96557 112 This parameter can be a value of @ref ADC_Scan_mode
Kojto 99:dbbf35b96557 113 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 114 uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
Kojto 99:dbbf35b96557 115 This parameter can be a value of @ref ADC_data_align
Kojto 99:dbbf35b96557 116 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 117 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in Continuous or Single mode.
Kojto 99:dbbf35b96557 118 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 119 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 120 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversion is performed
Kojto 99:dbbf35b96557 121 in Complete-sequence/Discontinuous-sequence.
Kojto 99:dbbf35b96557 122 Discontinuous mode can be enabled only if continuous mode is disabled.
Kojto 99:dbbf35b96557 123 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 124 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 125 uint32_t ExternalTrigConvEdge; /*!< Select the external trigger edge and enable the trigger.
Kojto 99:dbbf35b96557 126 This parameter can be a value of @ref ADC_Regular_External_Trigger_Source_Edge
Kojto 99:dbbf35b96557 127 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 128 uint32_t ExternalTrigConv; /*!< Select the external event used to trigger the start of conversion.
Kojto 99:dbbf35b96557 129 This parameter can be a value of @ref ADC_External_trigger_Source
Kojto 99:dbbf35b96557 130 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 131 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
Kojto 99:dbbf35b96557 132 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
Kojto 99:dbbf35b96557 133 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer max pointer is reached.
Kojto 99:dbbf35b96557 134 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 135 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 136 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion polling and interruption:
Kojto 99:dbbf35b96557 137 end of single channel conversion or end of channels conversions sequence.
Kojto 99:dbbf35b96557 138 This parameter can be a value of @ref ADC_EOCSelection */
Kojto 99:dbbf35b96557 139 uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
Kojto 99:dbbf35b96557 140 This parameter has an effect on regular channels only, including in DMA mode.
Kojto 99:dbbf35b96557 141 This parameter can be a value of @ref ADC_Overrun
Kojto 99:dbbf35b96557 142 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 143 uint32_t LowPowerAutoWait; /*!< Specifies the usage of dynamic low power Auto Delay: new conversion start only
Kojto 99:dbbf35b96557 144 when the previous conversion (for regular channel) is completed.
Kojto 99:dbbf35b96557 145 This avoids risk of overrun for low frequency application.
Kojto 99:dbbf35b96557 146 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 147 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 148 uint32_t LowPowerFrequencyMode; /*!< When selecting an analog ADC clock frequency lower than 2.8MHz,
Kojto 99:dbbf35b96557 149 it is mandatory to first enable the Low Frequency Mode.
Kojto 99:dbbf35b96557 150 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 151 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 152 uint32_t LowPowerAutoPowerOff; /*!< When setting the AutoOff feature, the ADC is always powered off when not converting and automatically
Kojto 99:dbbf35b96557 153 wakes-up when a conversion is started (by software or hardware trigger).
Kojto 99:dbbf35b96557 154 This parameter can be set to ENABLE or DISABLE.
Kojto 99:dbbf35b96557 155 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 99:dbbf35b96557 156 }ADC_InitTypeDef;
Kojto 99:dbbf35b96557 157
Kojto 99:dbbf35b96557 158 /**
Kojto 99:dbbf35b96557 159 * @brief ADC handle Structure definition
Kojto 99:dbbf35b96557 160 */
Kojto 99:dbbf35b96557 161 typedef struct __ADC_HandleTypeDef
Kojto 99:dbbf35b96557 162 {
Kojto 99:dbbf35b96557 163 ADC_TypeDef *Instance; /*!< Register base address */
Kojto 99:dbbf35b96557 164
Kojto 99:dbbf35b96557 165 ADC_InitTypeDef Init; /*!< ADC required parameters */
Kojto 99:dbbf35b96557 166
Kojto 99:dbbf35b96557 167 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
Kojto 99:dbbf35b96557 168
Kojto 99:dbbf35b96557 169 HAL_LockTypeDef Lock; /*!< ADC locking object */
Kojto 99:dbbf35b96557 170
Kojto 99:dbbf35b96557 171 __IO HAL_ADC_StateTypeDef State; /*!< ADC communication state */
Kojto 99:dbbf35b96557 172
Kojto 99:dbbf35b96557 173 __IO uint32_t ErrorCode; /*!< ADC Error code */
Kojto 99:dbbf35b96557 174 }ADC_HandleTypeDef;
Kojto 99:dbbf35b96557 175
Kojto 99:dbbf35b96557 176 /**
Kojto 99:dbbf35b96557 177 * @brief ADC Configuration regular Channel structure definition
Kojto 99:dbbf35b96557 178 */
Kojto 99:dbbf35b96557 179 typedef struct
Kojto 99:dbbf35b96557 180 {
Kojto 99:dbbf35b96557 181 uint32_t Channel; /*!< the ADC channel to configure
Kojto 99:dbbf35b96557 182 This parameter can be a value of @ref ADC_channels */
Kojto 99:dbbf35b96557 183 }ADC_ChannelConfTypeDef;
Kojto 99:dbbf35b96557 184
Kojto 99:dbbf35b96557 185
Kojto 99:dbbf35b96557 186 /**
Kojto 99:dbbf35b96557 187 * @brief ADC Configuration analog watchdog definition
Kojto 99:dbbf35b96557 188 */
Kojto 99:dbbf35b96557 189 typedef struct
Kojto 99:dbbf35b96557 190 {
Kojto 99:dbbf35b96557 191 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels.
Kojto 99:dbbf35b96557 192 This parameter can be a value of @ref ADC_analog_watchdog_mode */
Kojto 99:dbbf35b96557 193 uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
Kojto 99:dbbf35b96557 194 This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
Kojto 99:dbbf35b96557 195 This parameter can be a value of @ref ADC_channels */
Kojto 99:dbbf35b96557 196 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
Kojto 99:dbbf35b96557 197 This parameter can be set to ENABLE or DISABLE */
Kojto 99:dbbf35b96557 198 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Kojto 99:dbbf35b96557 199 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
Kojto 99:dbbf35b96557 200 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
Kojto 99:dbbf35b96557 201 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Kojto 99:dbbf35b96557 202 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
Kojto 99:dbbf35b96557 203 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
Kojto 99:dbbf35b96557 204 }ADC_AnalogWDGConfTypeDef;
Kojto 99:dbbf35b96557 205
Kojto 99:dbbf35b96557 206
Kojto 99:dbbf35b96557 207 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 208
Kojto 99:dbbf35b96557 209 /** @defgroup ADC_Exported_Constants
Kojto 99:dbbf35b96557 210 * @{
Kojto 99:dbbf35b96557 211 */
Kojto 99:dbbf35b96557 212
Kojto 99:dbbf35b96557 213 /** @defgroup ADC_Error_Code
Kojto 99:dbbf35b96557 214 * @{
Kojto 99:dbbf35b96557 215 */
Kojto 99:dbbf35b96557 216 #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */
Kojto 99:dbbf35b96557 217 #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
Kojto 99:dbbf35b96557 218 enable/disable, erroneous state */
Kojto 99:dbbf35b96557 219 #define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< OVR error */
Kojto 99:dbbf35b96557 220 #define HAL_ADC_ERROR_DMA ((uint32_t)0x03) /*!< DMA transfer error */
Kojto 99:dbbf35b96557 221 /**
Kojto 99:dbbf35b96557 222 * @}
Kojto 99:dbbf35b96557 223 */
Kojto 99:dbbf35b96557 224
Kojto 99:dbbf35b96557 225 /** @defgroup ADC_TimeOut_Values
Kojto 99:dbbf35b96557 226 * @{
Kojto 99:dbbf35b96557 227 */
Kojto 99:dbbf35b96557 228
Kojto 99:dbbf35b96557 229 /* Fixed timeout values for ADC calibration, enable settling time, disable */
Kojto 99:dbbf35b96557 230 /* settling time. */
Kojto 99:dbbf35b96557 231 /* Values defined to be higher than worst cases: low clocks freq, */
Kojto 99:dbbf35b96557 232 /* maximum prescalers. */
Kojto 99:dbbf35b96557 233 /* Unit: ms */
Kojto 99:dbbf35b96557 234 #define ADC_ENABLE_TIMEOUT 10
Kojto 99:dbbf35b96557 235 #define ADC_DISABLE_TIMEOUT 10
Kojto 99:dbbf35b96557 236 #define ADC_STOP_CONVERSION_TIMEOUT 10
Kojto 99:dbbf35b96557 237
Kojto 99:dbbf35b96557 238 /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
Kojto 99:dbbf35b96557 239 /* the minimum number of CPU cycles to fulfill this delay */
Kojto 99:dbbf35b96557 240 #define ADC_DELAY_10US_MIN_CPU_CYCLES 1800
Kojto 99:dbbf35b96557 241 /**
Kojto 99:dbbf35b96557 242 * @}
Kojto 99:dbbf35b96557 243 */
Kojto 99:dbbf35b96557 244
Kojto 99:dbbf35b96557 245 /** @defgroup ADC_ClockPrescaler
Kojto 99:dbbf35b96557 246 * @{
Kojto 99:dbbf35b96557 247 */
Kojto 99:dbbf35b96557 248 #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode divided by 1 */
Kojto 99:dbbf35b96557 249 #define ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 250 #define ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 251 #define ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 252 #define ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 253 #define ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 254 #define ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 255 #define ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 256 #define ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 257 #define ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 258 #define ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 259 #define ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 260
Kojto 99:dbbf35b96557 261 #define ADC_CLOCK_SYNC_PCLK_DIV1 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< Synchronous clock mode divided by 1
Kojto 99:dbbf35b96557 262 This configuration must be enabled only if PCLK has a 50%
Kojto 99:dbbf35b96557 263 duty clock cycle (APB prescaler configured inside the RCC must be bypassed and the system clock
Kojto 99:dbbf35b96557 264 must by 50% duty cycle)*/
Kojto 99:dbbf35b96557 265 #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< Synchronous clock mode divided by 2 */
Kojto 99:dbbf35b96557 266 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE) /*!< Synchronous clock mode divided by 4 */
Kojto 99:dbbf35b96557 267
Kojto 99:dbbf35b96557 268 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) ||\
Kojto 99:dbbf35b96557 269 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV1) ||\
Kojto 99:dbbf35b96557 270 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) ||\
Kojto 99:dbbf35b96557 271 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) ||\
Kojto 99:dbbf35b96557 272 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1 ) ||\
Kojto 99:dbbf35b96557 273 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2 ) ||\
Kojto 99:dbbf35b96557 274 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4 ) ||\
Kojto 99:dbbf35b96557 275 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV6 ) ||\
Kojto 99:dbbf35b96557 276 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV8 ) ||\
Kojto 99:dbbf35b96557 277 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV10 ) ||\
Kojto 99:dbbf35b96557 278 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV12 ) ||\
Kojto 99:dbbf35b96557 279 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV16 ) ||\
Kojto 99:dbbf35b96557 280 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV32 ) ||\
Kojto 99:dbbf35b96557 281 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV64 ) ||\
Kojto 99:dbbf35b96557 282 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV128 ) ||\
Kojto 99:dbbf35b96557 283 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV256))
Kojto 99:dbbf35b96557 284 /**
Kojto 99:dbbf35b96557 285 * @}
Kojto 99:dbbf35b96557 286 */
Kojto 99:dbbf35b96557 287
Kojto 99:dbbf35b96557 288 /** @defgroup ADC_Resolution
Kojto 99:dbbf35b96557 289 * @{
Kojto 99:dbbf35b96557 290 */
Kojto 99:dbbf35b96557 291 #define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
Kojto 99:dbbf35b96557 292 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
Kojto 99:dbbf35b96557 293 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
Kojto 99:dbbf35b96557 294 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
Kojto 99:dbbf35b96557 295
Kojto 99:dbbf35b96557 296 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
Kojto 99:dbbf35b96557 297 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
Kojto 99:dbbf35b96557 298 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
Kojto 99:dbbf35b96557 299 ((RESOLUTION) == ADC_RESOLUTION_6B))
Kojto 99:dbbf35b96557 300
Kojto 99:dbbf35b96557 301 #define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_8B) || \
Kojto 99:dbbf35b96557 302 ((RESOLUTION) == ADC_RESOLUTION_6B))
Kojto 99:dbbf35b96557 303 /**
Kojto 99:dbbf35b96557 304 * @}
Kojto 99:dbbf35b96557 305 */
Kojto 99:dbbf35b96557 306
Kojto 99:dbbf35b96557 307 /** @defgroup ADC_data_align
Kojto 99:dbbf35b96557 308 * @{
Kojto 99:dbbf35b96557 309 */
Kojto 99:dbbf35b96557 310 #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 311 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
Kojto 99:dbbf35b96557 312
Kojto 99:dbbf35b96557 313 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
Kojto 99:dbbf35b96557 314 ((ALIGN) == ADC_DATAALIGN_LEFT))
Kojto 99:dbbf35b96557 315 /**
Kojto 99:dbbf35b96557 316 * @}
Kojto 99:dbbf35b96557 317 */
Kojto 99:dbbf35b96557 318
Kojto 99:dbbf35b96557 319 /** @defgroup ADC_Regular_External_Trigger_Source_Edge ADC External Trigger Source Edge for Regular Group
Kojto 99:dbbf35b96557 320 * @{
Kojto 99:dbbf35b96557 321 */
Kojto 99:dbbf35b96557 322 #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 323 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
Kojto 99:dbbf35b96557 324 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
Kojto 99:dbbf35b96557 325 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
Kojto 99:dbbf35b96557 326
Kojto 99:dbbf35b96557 327 #define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
Kojto 99:dbbf35b96557 328 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
Kojto 99:dbbf35b96557 329 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
Kojto 99:dbbf35b96557 330 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
Kojto 99:dbbf35b96557 331 /**
Kojto 99:dbbf35b96557 332 * @}
Kojto 99:dbbf35b96557 333 */
Kojto 99:dbbf35b96557 334
Kojto 99:dbbf35b96557 335 /** @defgroup ADC_External_trigger_Source
Kojto 99:dbbf35b96557 336 * @{
Kojto 99:dbbf35b96557 337 */
Kojto 99:dbbf35b96557 338 #define ADC_EXTERNALTRIGCONV_T6_TRGO ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 339 #define ADC_EXTERNALTRIGCONV_T21_CC2 ADC_CFGR1_EXTSEL_0
Kojto 99:dbbf35b96557 340 #define ADC_EXTERNALTRIGCONV_T2_TRGO ADC_CFGR1_EXTSEL_1
Kojto 99:dbbf35b96557 341 #define ADC_EXTERNALTRIGCONV_T2_CC4 ((uint32_t)0x000000C0)
Kojto 99:dbbf35b96557 342 #define ADC_EXTERNALTRIGCONV_T22_TRGO ADC_CFGR1_EXTSEL_2
Kojto 99:dbbf35b96557 343 #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC_CFGR1_EXTSEL
Kojto 99:dbbf35b96557 344
Kojto 99:dbbf35b96557 345 #define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \
Kojto 99:dbbf35b96557 346 ((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
Kojto 99:dbbf35b96557 347 ((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
Kojto 99:dbbf35b96557 348 ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
Kojto 99:dbbf35b96557 349 ((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
Kojto 99:dbbf35b96557 350 ((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ))
Kojto 99:dbbf35b96557 351
Kojto 99:dbbf35b96557 352 /**
Kojto 99:dbbf35b96557 353 * @}
Kojto 99:dbbf35b96557 354 */
Kojto 99:dbbf35b96557 355
Kojto 99:dbbf35b96557 356 /** @defgroup ADC_EOCSelection
Kojto 99:dbbf35b96557 357 * @{
Kojto 99:dbbf35b96557 358 */
Kojto 99:dbbf35b96557 359 #define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
Kojto 99:dbbf35b96557 360 #define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
Kojto 99:dbbf35b96557 361 #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */
Kojto 99:dbbf35b96557 362
Kojto 99:dbbf35b96557 363 #define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \
Kojto 99:dbbf35b96557 364 ((EOC_SELECTION) == ADC_EOC_SEQ_CONV) || \
Kojto 99:dbbf35b96557 365 ((EOC_SELECTION) == ADC_EOC_SINGLE_SEQ_CONV))
Kojto 99:dbbf35b96557 366 /**
Kojto 99:dbbf35b96557 367 * @}
Kojto 99:dbbf35b96557 368 */
Kojto 99:dbbf35b96557 369
Kojto 99:dbbf35b96557 370 /** @defgroup ADC_Overrun
Kojto 99:dbbf35b96557 371 * @{
Kojto 99:dbbf35b96557 372 */
Kojto 99:dbbf35b96557 373 #define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 374 #define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR1_OVRMOD)
Kojto 99:dbbf35b96557 375
Kojto 99:dbbf35b96557 376 #define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \
Kojto 99:dbbf35b96557 377 ((OVR) == ADC_OVR_DATA_OVERWRITTEN))
Kojto 99:dbbf35b96557 378 /**
Kojto 99:dbbf35b96557 379 * @}
Kojto 99:dbbf35b96557 380 */
Kojto 99:dbbf35b96557 381
Kojto 99:dbbf35b96557 382 /** @defgroup ADC_channels
Kojto 99:dbbf35b96557 383 * @{
Kojto 99:dbbf35b96557 384 */
Kojto 99:dbbf35b96557 385 #define ADC_CHANNEL_0 ((uint32_t)(ADC_CHSELR_CHSEL0))
Kojto 99:dbbf35b96557 386 #define ADC_CHANNEL_1 ((uint32_t)(ADC_CHSELR_CHSEL1) | ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 387 #define ADC_CHANNEL_2 ((uint32_t)(ADC_CHSELR_CHSEL2) | ADC_CFGR1_AWDCH_1)
Kojto 99:dbbf35b96557 388 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CHSELR_CHSEL3)| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 389 #define ADC_CHANNEL_4 ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
Kojto 99:dbbf35b96557 390 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 391 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
Kojto 99:dbbf35b96557 392 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 393 #define ADC_CHANNEL_8 ((uint32_t)(ADC_CHSELR_CHSEL8)| ADC_CFGR1_AWDCH_3)
Kojto 99:dbbf35b96557 394 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CHSELR_CHSEL9)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 395 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CHSELR_CHSEL10)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1)
Kojto 99:dbbf35b96557 396 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CHSELR_CHSEL11)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 397 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
Kojto 99:dbbf35b96557 398 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 399 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
Kojto 99:dbbf35b96557 400 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 401 #define ADC_CHANNEL_16 ((uint32_t)(ADC_CHSELR_CHSEL16)| ADC_CFGR1_AWDCH_4)
Kojto 99:dbbf35b96557 402 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CHSELR_CHSEL17)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_0)
Kojto 99:dbbf35b96557 403 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CHSELR_CHSEL18)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_1)
Kojto 99:dbbf35b96557 404
Kojto 99:dbbf35b96557 405 /* Internal channels */
Kojto 99:dbbf35b96557 406 #define ADC_CHANNEL_VLCD ADC_CHANNEL_16
Kojto 99:dbbf35b96557 407 #define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
Kojto 99:dbbf35b96557 408 #define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_18
Kojto 99:dbbf35b96557 409
Kojto 99:dbbf35b96557 410
Kojto 99:dbbf35b96557 411 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
Kojto 99:dbbf35b96557 412 ((CHANNEL) == ADC_CHANNEL_1) || \
Kojto 99:dbbf35b96557 413 ((CHANNEL) == ADC_CHANNEL_2) || \
Kojto 99:dbbf35b96557 414 ((CHANNEL) == ADC_CHANNEL_3) || \
Kojto 99:dbbf35b96557 415 ((CHANNEL) == ADC_CHANNEL_4) || \
Kojto 99:dbbf35b96557 416 ((CHANNEL) == ADC_CHANNEL_5) || \
Kojto 99:dbbf35b96557 417 ((CHANNEL) == ADC_CHANNEL_6) || \
Kojto 99:dbbf35b96557 418 ((CHANNEL) == ADC_CHANNEL_7) || \
Kojto 99:dbbf35b96557 419 ((CHANNEL) == ADC_CHANNEL_8) || \
Kojto 99:dbbf35b96557 420 ((CHANNEL) == ADC_CHANNEL_9) || \
Kojto 99:dbbf35b96557 421 ((CHANNEL) == ADC_CHANNEL_10) || \
Kojto 99:dbbf35b96557 422 ((CHANNEL) == ADC_CHANNEL_11) || \
Kojto 99:dbbf35b96557 423 ((CHANNEL) == ADC_CHANNEL_12) || \
Kojto 99:dbbf35b96557 424 ((CHANNEL) == ADC_CHANNEL_13) || \
Kojto 99:dbbf35b96557 425 ((CHANNEL) == ADC_CHANNEL_14) || \
Kojto 99:dbbf35b96557 426 ((CHANNEL) == ADC_CHANNEL_15) || \
Kojto 99:dbbf35b96557 427 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
Kojto 99:dbbf35b96557 428 ((CHANNEL) == ADC_CHANNEL_VREFINT) || \
Kojto 99:dbbf35b96557 429 ((CHANNEL) == ADC_CHANNEL_VLCD))
Kojto 99:dbbf35b96557 430
Kojto 99:dbbf35b96557 431 /**
Kojto 99:dbbf35b96557 432 * @}
Kojto 99:dbbf35b96557 433 */
Kojto 99:dbbf35b96557 434
Kojto 99:dbbf35b96557 435 /** @defgroup ADC_Channel_AWD_Masks
Kojto 99:dbbf35b96557 436 * @{
Kojto 99:dbbf35b96557 437 */
Kojto 99:dbbf35b96557 438 #define ADC_CHANNEL_MASK ((uint32_t)0x0007FFFF)
Kojto 99:dbbf35b96557 439 #define ADC_CHANNEL_AWD_MASK ((uint32_t)0x7C000000)
Kojto 99:dbbf35b96557 440 /**
Kojto 99:dbbf35b96557 441 * @}
Kojto 99:dbbf35b96557 442 */
Kojto 99:dbbf35b96557 443
Kojto 99:dbbf35b96557 444
Kojto 99:dbbf35b96557 445 /** @defgroup ADC_sampling_times
Kojto 99:dbbf35b96557 446 * @{
Kojto 99:dbbf35b96557 447 */
Kojto 99:dbbf35b96557 448
Kojto 99:dbbf35b96557 449 #define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x00000000) /*!< ADC sampling time 1.5 cycle */
Kojto 99:dbbf35b96557 450 #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_0) /*!< ADC sampling time 7.5 CYCLES */
Kojto 99:dbbf35b96557 451 #define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_1) /*!< ADC sampling time 13.5 CYCLES */
Kojto 99:dbbf35b96557 452 #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_1 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 28.5 CYCLES */
Kojto 99:dbbf35b96557 453 #define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_2) /*!< ADC sampling time 41.5 CYCLES */
Kojto 99:dbbf35b96557 454 #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 55.5 CYCLES */
Kojto 99:dbbf35b96557 455 #define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_1)) /*!< ADC sampling time 71.5 CYCLES */
Kojto 99:dbbf35b96557 456 #define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t)ADC_SMPR_SMPR) /*!< ADC sampling time 239.5 CYCLES */
Kojto 99:dbbf35b96557 457
Kojto 99:dbbf35b96557 458 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5 ) || \
Kojto 99:dbbf35b96557 459 ((TIME) == ADC_SAMPLETIME_7CYCLES_5 ) || \
Kojto 99:dbbf35b96557 460 ((TIME) == ADC_SAMPLETIME_13CYCLES_5 ) || \
Kojto 99:dbbf35b96557 461 ((TIME) == ADC_SAMPLETIME_28CYCLES_5 ) || \
Kojto 99:dbbf35b96557 462 ((TIME) == ADC_SAMPLETIME_41CYCLES_5 ) || \
Kojto 99:dbbf35b96557 463 ((TIME) == ADC_SAMPLETIME_55CYCLES_5 ) || \
Kojto 99:dbbf35b96557 464 ((TIME) == ADC_SAMPLETIME_71CYCLES_5 ) || \
Kojto 99:dbbf35b96557 465 ((TIME) == ADC_SAMPLETIME_239CYCLES_5))
Kojto 99:dbbf35b96557 466 /**
Kojto 99:dbbf35b96557 467 * @}
Kojto 99:dbbf35b96557 468 */
Kojto 99:dbbf35b96557 469
Kojto 99:dbbf35b96557 470
Kojto 99:dbbf35b96557 471 /** @defgroup ADC_Scan_mode ADC Scan mode
Kojto 99:dbbf35b96557 472 * @{
Kojto 99:dbbf35b96557 473 */
Kojto 99:dbbf35b96557 474 /* Note: Scan mode values must be compatible with other STM32 devices having */
Kojto 99:dbbf35b96557 475 /* a configurable sequencer. */
Kojto 99:dbbf35b96557 476 /* Scan direction setting values are defined by taking in account */
Kojto 99:dbbf35b96557 477 /* already defined values for other STM32 devices: */
Kojto 99:dbbf35b96557 478 /* ADC_SCAN_DISABLE ((uint32_t)0x00000000) */
Kojto 99:dbbf35b96557 479 /* ADC_SCAN_ENABLE ((uint32_t)0x00000001) */
Kojto 99:dbbf35b96557 480 /* Scan direction forward is considered as default setting equivalent */
Kojto 99:dbbf35b96557 481 /* to scan enable. */
Kojto 99:dbbf35b96557 482 /* Scan direction backward is considered as additional setting. */
Kojto 99:dbbf35b96557 483 /* In case of migration from another STM32 device, the user will be */
Kojto 99:dbbf35b96557 484 /* warned of change of setting choices with assert check. */
Kojto 99:dbbf35b96557 485 #define ADC_SCAN_DIRECTION_FORWARD ((uint32_t)0x00000001) /*!< Scan direction forward: from channel 0 to channel 18 */
Kojto 99:dbbf35b96557 486 #define ADC_SCAN_DIRECTION_BACKWARD ((uint32_t)0x00000002) /*!< Scan direction backward: from channel 18 to channel 0 */
Kojto 99:dbbf35b96557 487
Kojto 99:dbbf35b96557 488 #define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */
Kojto 99:dbbf35b96557 489
Kojto 99:dbbf35b96557 490 #define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \
Kojto 99:dbbf35b96557 491 ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD))
Kojto 99:dbbf35b96557 492
Kojto 99:dbbf35b96557 493 /**
Kojto 99:dbbf35b96557 494 * @}
Kojto 99:dbbf35b96557 495 */
Kojto 99:dbbf35b96557 496
Kojto 99:dbbf35b96557 497 /** @defgroup ADC_Oversampling_Ratio
Kojto 99:dbbf35b96557 498 * @{
Kojto 99:dbbf35b96557 499 */
Kojto 99:dbbf35b96557 500
Kojto 99:dbbf35b96557 501 #define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /*!< ADC Oversampling ratio 2x */
Kojto 99:dbbf35b96557 502 #define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)0x00000004) /*!< ADC Oversampling ratio 4x */
Kojto 99:dbbf35b96557 503 #define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)0x00000008) /*!< ADC Oversampling ratio 8x */
Kojto 99:dbbf35b96557 504 #define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)0x0000000C) /*!< ADC Oversampling ratio 16x */
Kojto 99:dbbf35b96557 505 #define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)0x00000010) /*!< ADC Oversampling ratio 32x */
Kojto 99:dbbf35b96557 506 #define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)0x00000014) /*!< ADC Oversampling ratio 64x */
Kojto 99:dbbf35b96557 507 #define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)0x00000018) /*!< ADC Oversampling ratio 128x */
Kojto 99:dbbf35b96557 508 #define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)0x0000001C) /*!< ADC Oversampling ratio 256x */
Kojto 99:dbbf35b96557 509 #define IS_ADC_OVERSAMPLING_RATIO(RATIO) (((RATIO) == ADC_OVERSAMPLING_RATIO_2 ) || \
Kojto 99:dbbf35b96557 510 ((RATIO) == ADC_OVERSAMPLING_RATIO_4 ) || \
Kojto 99:dbbf35b96557 511 ((RATIO) == ADC_OVERSAMPLING_RATIO_8 ) || \
Kojto 99:dbbf35b96557 512 ((RATIO) == ADC_OVERSAMPLING_RATIO_16 ) || \
Kojto 99:dbbf35b96557 513 ((RATIO) == ADC_OVERSAMPLING_RATIO_32 ) || \
Kojto 99:dbbf35b96557 514 ((RATIO) == ADC_OVERSAMPLING_RATIO_64 ) || \
Kojto 99:dbbf35b96557 515 ((RATIO) == ADC_OVERSAMPLING_RATIO_128 ) || \
Kojto 99:dbbf35b96557 516 ((RATIO) == ADC_OVERSAMPLING_RATIO_256 ))
Kojto 99:dbbf35b96557 517 /**
Kojto 99:dbbf35b96557 518 * @}
Kojto 99:dbbf35b96557 519 */
Kojto 99:dbbf35b96557 520
Kojto 99:dbbf35b96557 521 /** @defgroup ADC_Right_Bit_Shift
Kojto 99:dbbf35b96557 522 * @{
Kojto 99:dbbf35b96557 523 */
Kojto 99:dbbf35b96557 524 #define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
Kojto 99:dbbf35b96557 525 #define ADC_RIGHTBITSHIFT_1 ((uint32_t)0x00000020) /*!< ADC 1 bit shift for oversampling */
Kojto 99:dbbf35b96557 526 #define ADC_RIGHTBITSHIFT_2 ((uint32_t)0x00000040) /*!< ADC 2 bits shift for oversampling */
Kojto 99:dbbf35b96557 527 #define ADC_RIGHTBITSHIFT_3 ((uint32_t)0x00000060) /*!< ADC 3 bits shift for oversampling */
Kojto 99:dbbf35b96557 528 #define ADC_RIGHTBITSHIFT_4 ((uint32_t)0x00000080) /*!< ADC 4 bits shift for oversampling */
Kojto 99:dbbf35b96557 529 #define ADC_RIGHTBITSHIFT_5 ((uint32_t)0x000000A0) /*!< ADC 5 bits shift for oversampling */
Kojto 99:dbbf35b96557 530 #define ADC_RIGHTBITSHIFT_6 ((uint32_t)0x000000C0) /*!< ADC 6 bits shift for oversampling */
Kojto 99:dbbf35b96557 531 #define ADC_RIGHTBITSHIFT_7 ((uint32_t)0x000000E0) /*!< ADC 7 bits shift for oversampling */
Kojto 99:dbbf35b96557 532 #define ADC_RIGHTBITSHIFT_8 ((uint32_t)0x00000100) /*!< ADC 8 bits shift for oversampling */
Kojto 99:dbbf35b96557 533 #define IS_ADC_RIGHT_BIT_SHIFT(SHIFT) (((SHIFT) == ADC_RIGHTBITSHIFT_NONE) || \
Kojto 99:dbbf35b96557 534 ((SHIFT) == ADC_RIGHTBITSHIFT_1 ) || \
Kojto 99:dbbf35b96557 535 ((SHIFT) == ADC_RIGHTBITSHIFT_2 ) || \
Kojto 99:dbbf35b96557 536 ((SHIFT) == ADC_RIGHTBITSHIFT_3 ) || \
Kojto 99:dbbf35b96557 537 ((SHIFT) == ADC_RIGHTBITSHIFT_4 ) || \
Kojto 99:dbbf35b96557 538 ((SHIFT) == ADC_RIGHTBITSHIFT_5 ) || \
Kojto 99:dbbf35b96557 539 ((SHIFT) == ADC_RIGHTBITSHIFT_6 ) || \
Kojto 99:dbbf35b96557 540 ((SHIFT) == ADC_RIGHTBITSHIFT_7 ) || \
Kojto 99:dbbf35b96557 541 ((SHIFT) == ADC_RIGHTBITSHIFT_8 ))
Kojto 99:dbbf35b96557 542 /**
Kojto 99:dbbf35b96557 543 * @}
Kojto 99:dbbf35b96557 544 */
Kojto 99:dbbf35b96557 545
Kojto 99:dbbf35b96557 546 /** @defgroup ADC_Triggered_Oversampling_Mode
Kojto 99:dbbf35b96557 547 * @{
Kojto 99:dbbf35b96557 548 */
Kojto 99:dbbf35b96557 549 #define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
Kojto 99:dbbf35b96557 550 #define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)0x00000200) /*!< ADC No bit shift for oversampling */
Kojto 99:dbbf35b96557 551 #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(MODE) (((MODE) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
Kojto 99:dbbf35b96557 552 ((MODE) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
Kojto 99:dbbf35b96557 553 /**
Kojto 99:dbbf35b96557 554 * @}
Kojto 99:dbbf35b96557 555 */
Kojto 99:dbbf35b96557 556
Kojto 99:dbbf35b96557 557 /** @defgroup ADC_analog_watchdog_mode
Kojto 99:dbbf35b96557 558 * @{
Kojto 99:dbbf35b96557 559 */
Kojto 99:dbbf35b96557 560 #define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000)
Kojto 99:dbbf35b96557 561 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
Kojto 99:dbbf35b96557 562 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
Kojto 99:dbbf35b96557 563
Kojto 99:dbbf35b96557 564
Kojto 99:dbbf35b96557 565 #define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE ) || \
Kojto 99:dbbf35b96557 566 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
Kojto 99:dbbf35b96557 567 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG ))
Kojto 99:dbbf35b96557 568 /**
Kojto 99:dbbf35b96557 569 * @}
Kojto 99:dbbf35b96557 570 */
Kojto 99:dbbf35b96557 571
Kojto 99:dbbf35b96557 572 /** @defgroup ADC_conversion_type
Kojto 99:dbbf35b96557 573 * @{
Kojto 99:dbbf35b96557 574 */
Kojto 99:dbbf35b96557 575 #define ADC_REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS))
Kojto 99:dbbf35b96557 576 #define IS_ADC_CONVERSION_GROUP(CONVERSION) ((CONVERSION) == ADC_REGULAR_GROUP)
Kojto 99:dbbf35b96557 577 /**
Kojto 99:dbbf35b96557 578 * @}
Kojto 99:dbbf35b96557 579 */
Kojto 99:dbbf35b96557 580
Kojto 99:dbbf35b96557 581 /** @defgroup ADC_Event_type
Kojto 99:dbbf35b96557 582 * @{
Kojto 99:dbbf35b96557 583 */
Kojto 99:dbbf35b96557 584 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
Kojto 99:dbbf35b96557 585 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
Kojto 99:dbbf35b96557 586
Kojto 99:dbbf35b96557 587 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
Kojto 99:dbbf35b96557 588 ((EVENT) == ADC_OVR_EVENT))
Kojto 99:dbbf35b96557 589 /**
Kojto 99:dbbf35b96557 590 * @}
Kojto 99:dbbf35b96557 591 */
Kojto 99:dbbf35b96557 592
Kojto 99:dbbf35b96557 593 /** @defgroup ADC_interrupts_definition
Kojto 99:dbbf35b96557 594 * @{
Kojto 99:dbbf35b96557 595 */
Kojto 99:dbbf35b96557 596 #define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready (ADRDY) interrupt source */
Kojto 99:dbbf35b96557 597 #define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
Kojto 99:dbbf35b96557 598 #define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
Kojto 99:dbbf35b96557 599 #define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
Kojto 99:dbbf35b96557 600 #define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
Kojto 99:dbbf35b96557 601 #define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog 1 interrupt source */
Kojto 99:dbbf35b96557 602 #define ADC_IT_EOCAL ADC_IER_EOCALIE /*!< ADC End of Calibration interrupt source */
Kojto 99:dbbf35b96557 603
Kojto 99:dbbf35b96557 604 /* Check of single flag */
Kojto 99:dbbf35b96557 605 #define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_RDY) || \
Kojto 99:dbbf35b96557 606 ((IT) == ADC_IT_EOSMP) || ((IT) == ADC_IT_EOC) || \
Kojto 99:dbbf35b96557 607 ((IT) == ADC_IT_EOS) || ((IT) == ADC_IT_OVR))
Kojto 99:dbbf35b96557 608 /**
Kojto 99:dbbf35b96557 609 * @}
Kojto 99:dbbf35b96557 610 */
Kojto 99:dbbf35b96557 611
Kojto 99:dbbf35b96557 612
Kojto 99:dbbf35b96557 613
Kojto 99:dbbf35b96557 614 /** @defgroup ADC_flags_definition
Kojto 99:dbbf35b96557 615 * @{
Kojto 99:dbbf35b96557 616 */
Kojto 99:dbbf35b96557 617 #define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready (ADRDY) flag */
Kojto 99:dbbf35b96557 618 #define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
Kojto 99:dbbf35b96557 619 #define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
Kojto 99:dbbf35b96557 620 #define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
Kojto 99:dbbf35b96557 621 #define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
Kojto 99:dbbf35b96557 622 #define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
Kojto 99:dbbf35b96557 623 #define ADC_FLAG_EOCAL ADC_ISR_EOCAL /*!< ADC Enf Of Calibration flag */
Kojto 99:dbbf35b96557 624
Kojto 99:dbbf35b96557 625
Kojto 99:dbbf35b96557 626 #define ADC_FLAG_ALL (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS | \
Kojto 99:dbbf35b96557 627 ADC_FLAG_OVR | ADC_FLAG_AWD | ADC_FLAG_EOCAL)
Kojto 99:dbbf35b96557 628
Kojto 99:dbbf35b96557 629 /* Check of single flag */
Kojto 99:dbbf35b96557 630 #define IS_ADC_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
Kojto 99:dbbf35b96557 631 ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
Kojto 99:dbbf35b96557 632 ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_AWD) || \
Kojto 99:dbbf35b96557 633 ((FLAG) == ADC_FLAG_EOCAL))
Kojto 99:dbbf35b96557 634 /**
Kojto 99:dbbf35b96557 635 * @}
Kojto 99:dbbf35b96557 636 */
Kojto 99:dbbf35b96557 637
Kojto 99:dbbf35b96557 638
Kojto 99:dbbf35b96557 639 /** @defgroup ADC_range_verification
Kojto 99:dbbf35b96557 640 * in function of ADC resolution selected (12, 10, 8 or 6 bits)
Kojto 99:dbbf35b96557 641 * @{
Kojto 99:dbbf35b96557 642 */
Kojto 99:dbbf35b96557 643 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
Kojto 99:dbbf35b96557 644 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \
Kojto 99:dbbf35b96557 645 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \
Kojto 99:dbbf35b96557 646 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \
Kojto 99:dbbf35b96557 647 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003F))))
Kojto 99:dbbf35b96557 648 /**
Kojto 99:dbbf35b96557 649 * @}
Kojto 99:dbbf35b96557 650 */
Kojto 99:dbbf35b96557 651
Kojto 99:dbbf35b96557 652 /** @defgroup ADC_regular_nb_conv_verification
Kojto 99:dbbf35b96557 653 * @{
Kojto 99:dbbf35b96557 654 */
Kojto 99:dbbf35b96557 655 #define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)16)))
Kojto 99:dbbf35b96557 656 /**
Kojto 99:dbbf35b96557 657 * @}
Kojto 99:dbbf35b96557 658 */
Kojto 99:dbbf35b96557 659
Kojto 99:dbbf35b96557 660 /**
Kojto 99:dbbf35b96557 661 * @}
Kojto 99:dbbf35b96557 662 */
Kojto 99:dbbf35b96557 663 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 664
Kojto 99:dbbf35b96557 665 /** @defgroup ADC_Exported_Macro
Kojto 99:dbbf35b96557 666 * @{
Kojto 99:dbbf35b96557 667 */
Kojto 99:dbbf35b96557 668 /** @brief Reset ADC handle state
Kojto 99:dbbf35b96557 669 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 670 * @retval None
Kojto 99:dbbf35b96557 671 */
Kojto 99:dbbf35b96557 672 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
Kojto 99:dbbf35b96557 673
Kojto 99:dbbf35b96557 674 /**
Kojto 99:dbbf35b96557 675 * @brief Enable the ADC peripheral
Kojto 99:dbbf35b96557 676 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 677 * @retval None
Kojto 99:dbbf35b96557 678 */
Kojto 99:dbbf35b96557 679 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
Kojto 99:dbbf35b96557 680
Kojto 99:dbbf35b96557 681 /**
Kojto 99:dbbf35b96557 682 * @brief Verification of hardware constraints before ADC can be enabled
Kojto 99:dbbf35b96557 683 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 684 * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
Kojto 99:dbbf35b96557 685 */
Kojto 99:dbbf35b96557 686 #define ADC_ENABLING_CONDITIONS(__HANDLE__) \
Kojto 99:dbbf35b96557 687 (( ( ((__HANDLE__)->Instance->CR) & \
Kojto 99:dbbf35b96557 688 (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | \
Kojto 99:dbbf35b96557 689 ADC_CR_ADDIS | ADC_CR_ADEN ) \
Kojto 99:dbbf35b96557 690 ) == RESET \
Kojto 99:dbbf35b96557 691 ) ? SET : RESET)
Kojto 99:dbbf35b96557 692
Kojto 99:dbbf35b96557 693 /**
Kojto 99:dbbf35b96557 694 * @brief Disable the ADC peripheral
Kojto 99:dbbf35b96557 695 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 696 * @retval None
Kojto 99:dbbf35b96557 697 */
Kojto 99:dbbf35b96557 698 #define __HAL_ADC_DISABLE(__HANDLE__) \
Kojto 99:dbbf35b96557 699 do{ \
Kojto 99:dbbf35b96557 700 (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
Kojto 99:dbbf35b96557 701 __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
Kojto 99:dbbf35b96557 702 } while(0)
Kojto 99:dbbf35b96557 703
Kojto 99:dbbf35b96557 704 /**
Kojto 99:dbbf35b96557 705 * @brief Verification of hardware constraints before ADC can be disabled
Kojto 99:dbbf35b96557 706 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 707 * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
Kojto 99:dbbf35b96557 708 */
Kojto 99:dbbf35b96557 709 #define ADC_DISABLING_CONDITIONS(__HANDLE__) \
Kojto 99:dbbf35b96557 710 (( ( ((__HANDLE__)->Instance->CR) & \
Kojto 99:dbbf35b96557 711 (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
Kojto 99:dbbf35b96557 712 ) ? SET : RESET)
Kojto 99:dbbf35b96557 713
Kojto 99:dbbf35b96557 714 /**
Kojto 99:dbbf35b96557 715 * @brief Verification of ADC state: enabled or disabled
Kojto 99:dbbf35b96557 716 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 717 * @retval SET (ADC enabled) or RESET (ADC disabled)
Kojto 99:dbbf35b96557 718 */
Kojto 99:dbbf35b96557 719 #define ADC_IS_ENABLE(__HANDLE__) \
Kojto 99:dbbf35b96557 720 (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
Kojto 99:dbbf35b96557 721 ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
Kojto 99:dbbf35b96557 722 ) ? SET : RESET)
Kojto 99:dbbf35b96557 723
Kojto 99:dbbf35b96557 724 /**
Kojto 99:dbbf35b96557 725 * @brief Returns resolution bits in CFGR register: RES[1:0]. Return value among parameter to @ref ADC_Resolution.
Kojto 99:dbbf35b96557 726 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 727 * @retval None
Kojto 99:dbbf35b96557 728 */
Kojto 99:dbbf35b96557 729 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
Kojto 99:dbbf35b96557 730
Kojto 99:dbbf35b96557 731 /**
Kojto 99:dbbf35b96557 732 * @brief Check if no conversion is ongoing on regular groups
Kojto 99:dbbf35b96557 733 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 734 * @retval SET (conversion is on going) or RESET (no conversion is on going)
Kojto 99:dbbf35b96557 735 */
Kojto 99:dbbf35b96557 736 #define ADC_IS_CONVERSION_ONGOING(__HANDLE__) \
Kojto 99:dbbf35b96557 737 (( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART)) == RESET ) ? RESET : SET)
Kojto 99:dbbf35b96557 738
Kojto 99:dbbf35b96557 739 /**
Kojto 99:dbbf35b96557 740 * @brief Enable ADC continuous conversion mode.
Kojto 99:dbbf35b96557 741 * @param _CONTINUOUS_MODE_: Continuous mode.
Kojto 99:dbbf35b96557 742 * @retval None
Kojto 99:dbbf35b96557 743 */
Kojto 99:dbbf35b96557 744 #define ADC_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 13)
Kojto 99:dbbf35b96557 745
Kojto 99:dbbf35b96557 746 /**
Kojto 99:dbbf35b96557 747 * @brief Enable ADC scan mode to convert multiple ranks with sequencer.
Kojto 99:dbbf35b96557 748 * @param _SCAN_MODE_: Scan conversion mode.
Kojto 99:dbbf35b96557 749 * @retval None
Kojto 99:dbbf35b96557 750 */
Kojto 99:dbbf35b96557 751 #define ADC_SCANDIR(_SCAN_MODE_) \
Kojto 99:dbbf35b96557 752 ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \
Kojto 99:dbbf35b96557 753 )? (ADC_CFGR1_SCANDIR) : (0x00000000) \
Kojto 99:dbbf35b96557 754 )
Kojto 99:dbbf35b96557 755
Kojto 99:dbbf35b96557 756 /**
Kojto 99:dbbf35b96557 757 * @brief Configures the number of discontinuous conversions for the regular group channels.
Kojto 99:dbbf35b96557 758 * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
Kojto 99:dbbf35b96557 759 * @retval None
Kojto 99:dbbf35b96557 760 */
Kojto 99:dbbf35b96557 761 #define __HAL_ADC_CFGR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1) << 17)
Kojto 99:dbbf35b96557 762
Kojto 99:dbbf35b96557 763 /**
Kojto 99:dbbf35b96557 764 * @brief Enable the ADC DMA continuous request.
Kojto 99:dbbf35b96557 765 * @param _DMAContReq_MODE_: DMA continuous request mode.
Kojto 99:dbbf35b96557 766 * @retval None
Kojto 99:dbbf35b96557 767 */
Kojto 99:dbbf35b96557 768 #define ADC_DMACONTREQ(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 1)
Kojto 99:dbbf35b96557 769
Kojto 99:dbbf35b96557 770 /**
Kojto 99:dbbf35b96557 771 * @brief Enable the ADC Auto Delay.
Kojto 99:dbbf35b96557 772 * @param _AutoDelay_: Auto delay bit enable or disable.
Kojto 99:dbbf35b96557 773 * @retval None
Kojto 99:dbbf35b96557 774 */
Kojto 99:dbbf35b96557 775 #define __HAL_ADC_CFGR1_AutoDelay(_AutoDelay_) ((_AutoDelay_) << 14)
Kojto 99:dbbf35b96557 776
Kojto 99:dbbf35b96557 777 /**
Kojto 99:dbbf35b96557 778 * @brief Enable the ADC LowPowerAutoPowerOff.
Kojto 99:dbbf35b96557 779 * @param _AUTOFF_: AutoOff bit enable or disable.
Kojto 99:dbbf35b96557 780 * @retval None
Kojto 99:dbbf35b96557 781 */
Kojto 99:dbbf35b96557 782 #define __HAL_ADC_CFGR1_AUTOFF(_AUTOFF_) ((_AUTOFF_) << 15)
Kojto 99:dbbf35b96557 783
Kojto 99:dbbf35b96557 784 /**
Kojto 99:dbbf35b96557 785 * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
Kojto 99:dbbf35b96557 786 * @param _Threshold_: Threshold value
Kojto 99:dbbf35b96557 787 * @retval None
Kojto 99:dbbf35b96557 788 */
Kojto 99:dbbf35b96557 789 #define ADC_TRX_HIGHTHRESHOLD(_Threshold_) ((_Threshold_) << 16)
Kojto 99:dbbf35b96557 790
Kojto 99:dbbf35b96557 791 /**
Kojto 99:dbbf35b96557 792 * @brief Enable the ADC Low Frequency mode.
Kojto 99:dbbf35b96557 793 * @param _LOW_FREQUENCY_MODE_: Low Frequency mode.
Kojto 99:dbbf35b96557 794 * @retval None
Kojto 99:dbbf35b96557 795 */
Kojto 99:dbbf35b96557 796 #define __HAL_ADC_CCR_LOWFREQUENCY(_LOW_FREQUENCY_MODE_) ((_LOW_FREQUENCY_MODE_) << 25)
Kojto 99:dbbf35b96557 797
Kojto 99:dbbf35b96557 798 /**
Kojto 99:dbbf35b96557 799 * @brief Shift the offset in function of the selected ADC resolution.
Kojto 99:dbbf35b96557 800 * Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0
Kojto 99:dbbf35b96557 801 * If resolution 12 bits, no shift.
Kojto 99:dbbf35b96557 802 * If resolution 10 bits, shift of 2 ranks on the right.
Kojto 99:dbbf35b96557 803 * If resolution 8 bits, shift of 4 ranks on the right.
Kojto 99:dbbf35b96557 804 * If resolution 6 bits, shift of 6 ranks on the right.
Kojto 99:dbbf35b96557 805 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
Kojto 99:dbbf35b96557 806 * @param __HANDLE__: ADC handle.
Kojto 99:dbbf35b96557 807 * @param _Offset_: Value to be shifted
Kojto 99:dbbf35b96557 808 * @retval None
Kojto 99:dbbf35b96557 809 */
Kojto 99:dbbf35b96557 810 #define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, _Offset_) \
Kojto 99:dbbf35b96557 811 ((_Offset_) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR1_RES) >> 3)*2))
Kojto 99:dbbf35b96557 812
Kojto 99:dbbf35b96557 813 /**
Kojto 99:dbbf35b96557 814 * @brief Shift the AWD1 threshold in function of the selected ADC resolution.
Kojto 99:dbbf35b96557 815 * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0
Kojto 99:dbbf35b96557 816 * If resolution 12 bits, no shift.
Kojto 99:dbbf35b96557 817 * If resolution 10 bits, shift of 2 ranks on the right.
Kojto 99:dbbf35b96557 818 * If resolution 8 bits, shift of 4 ranks on the right.
Kojto 99:dbbf35b96557 819 * If resolution 6 bits, shift of 6 ranks on the right.
Kojto 99:dbbf35b96557 820 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
Kojto 99:dbbf35b96557 821 * @param __HANDLE__: ADC handle.
Kojto 99:dbbf35b96557 822 * @param _Threshold_: Value to be shifted
Kojto 99:dbbf35b96557 823 * @retval None
Kojto 99:dbbf35b96557 824 */
Kojto 99:dbbf35b96557 825 #define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \
Kojto 99:dbbf35b96557 826 ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2))
Kojto 99:dbbf35b96557 827
Kojto 99:dbbf35b96557 828 /**
Kojto 99:dbbf35b96557 829 * @brief Shift the value on the left, less significant are set to 0.
Kojto 99:dbbf35b96557 830 * @param _Value_: Value to be shifted
Kojto 99:dbbf35b96557 831 * @param _Shift_: Number of shift to be done
Kojto 99:dbbf35b96557 832 * @retval None
Kojto 99:dbbf35b96557 833 */
Kojto 99:dbbf35b96557 834 #define __HAL_ADC_Value_Shift_left(_Value_, _Shift_) ((_Value_) << (_Shift_))
Kojto 99:dbbf35b96557 835
Kojto 99:dbbf35b96557 836
Kojto 99:dbbf35b96557 837 /**
Kojto 99:dbbf35b96557 838 * @brief Enable the ADC end of conversion interrupt.
Kojto 99:dbbf35b96557 839 * @param __HANDLE__: ADC handle.
Kojto 99:dbbf35b96557 840 * @param __INTERRUPT__: ADC Interrupt.
Kojto 99:dbbf35b96557 841 * @retval None
Kojto 99:dbbf35b96557 842 */
Kojto 99:dbbf35b96557 843 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
Kojto 99:dbbf35b96557 844
Kojto 99:dbbf35b96557 845 /**
Kojto 99:dbbf35b96557 846 * @brief Disable the ADC end of conversion interrupt.
Kojto 99:dbbf35b96557 847 * @param __HANDLE__: ADC handle.
Kojto 99:dbbf35b96557 848 * @param __INTERRUPT__: ADC interrupt.
Kojto 99:dbbf35b96557 849 * @retval None
Kojto 99:dbbf35b96557 850 */
Kojto 99:dbbf35b96557 851 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
Kojto 99:dbbf35b96557 852
Kojto 99:dbbf35b96557 853 /** @brief Checks if the specified ADC interrupt source is enabled or disabled.
Kojto 99:dbbf35b96557 854 * @param __HANDLE__: specifies the ADC Handle.
Kojto 99:dbbf35b96557 855 * @param __INTERRUPT__: specifies the ADC interrupt source to check.
Kojto 99:dbbf35b96557 856 * @retval The new state of __IT__ (TRUE or FALSE).
Kojto 99:dbbf35b96557 857 */
Kojto 99:dbbf35b96557 858 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 99:dbbf35b96557 859
Kojto 99:dbbf35b96557 860 /**
Kojto 99:dbbf35b96557 861 * @brief Clear the ADC's pending flags
Kojto 99:dbbf35b96557 862 * @param __HANDLE__: ADC handle.
Kojto 99:dbbf35b96557 863 * @param __FLAG__: ADC flag.
Kojto 99:dbbf35b96557 864 * @retval None
Kojto 99:dbbf35b96557 865 */
Kojto 99:dbbf35b96557 866 /* Note: bit cleared bit by writing 1 */
Kojto 99:dbbf35b96557 867 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) = (__FLAG__))
Kojto 99:dbbf35b96557 868
Kojto 99:dbbf35b96557 869 /**
Kojto 99:dbbf35b96557 870 * @brief Get the selected ADC's flag status.
Kojto 99:dbbf35b96557 871 * @param __HANDLE__: ADC handle.
Kojto 99:dbbf35b96557 872 * @param __FLAG__: ADC flag.
Kojto 99:dbbf35b96557 873 * @retval None
Kojto 99:dbbf35b96557 874 */
Kojto 99:dbbf35b96557 875 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
Kojto 99:dbbf35b96557 876
Kojto 99:dbbf35b96557 877
Kojto 99:dbbf35b96557 878
Kojto 99:dbbf35b96557 879 /**
Kojto 99:dbbf35b96557 880 * @brief Configuration of ADC clock & prescaler: clock source PCLK or Asynchronous with selectable prescaler
Kojto 99:dbbf35b96557 881 * @param __HANDLE__: ADC handle
Kojto 99:dbbf35b96557 882 * @retval None
Kojto 99:dbbf35b96557 883 */
Kojto 99:dbbf35b96557 884
Kojto 99:dbbf35b96557 885 #define __HAL_ADC_CLOCK_PRESCALER(__HANDLE__) \
Kojto 99:dbbf35b96557 886 do{ \
Kojto 99:dbbf35b96557 887 if ((((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV1) || \
Kojto 99:dbbf35b96557 888 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
Kojto 99:dbbf35b96557 889 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV4)) \
Kojto 99:dbbf35b96557 890 { \
Kojto 99:dbbf35b96557 891 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
Kojto 99:dbbf35b96557 892 (__HANDLE__)->Instance->CFGR2 |= (__HANDLE__)->Init.ClockPrescaler; \
Kojto 99:dbbf35b96557 893 } \
Kojto 99:dbbf35b96557 894 else \
Kojto 99:dbbf35b96557 895 { \
Kojto 99:dbbf35b96557 896 /* CKMOD bits must be reset */ \
Kojto 99:dbbf35b96557 897 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
Kojto 99:dbbf35b96557 898 ADC->CCR &= ~(ADC_CCR_PRESC); \
Kojto 99:dbbf35b96557 899 ADC->CCR |= (__HANDLE__)->Init.ClockPrescaler; \
Kojto 99:dbbf35b96557 900 } \
Kojto 99:dbbf35b96557 901 } while(0)
Kojto 99:dbbf35b96557 902
Kojto 99:dbbf35b96557 903 /**
Kojto 99:dbbf35b96557 904 * @}
Kojto 99:dbbf35b96557 905 */
Kojto 99:dbbf35b96557 906
Kojto 99:dbbf35b96557 907 /* Include ADC HAL Extension module */
Kojto 99:dbbf35b96557 908 #include "stm32l0xx_hal_adc_ex.h"
Kojto 99:dbbf35b96557 909
Kojto 99:dbbf35b96557 910 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 911 /* Initialization and de-initialization functions **********************************/
Kojto 99:dbbf35b96557 912 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 913 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
Kojto 99:dbbf35b96557 914 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 915 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 916
Kojto 99:dbbf35b96557 917 /* IO operation functions *****************************************************/
Kojto 99:dbbf35b96557 918 /* Blocking mode: Polling */
Kojto 99:dbbf35b96557 919 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 920 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 921 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
Kojto 99:dbbf35b96557 922 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
Kojto 99:dbbf35b96557 923
Kojto 99:dbbf35b96557 924 /* Non-blocking mode: Interruption */
Kojto 99:dbbf35b96557 925 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 926 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 927
Kojto 99:dbbf35b96557 928 /* Non-blocking mode: DMA */
Kojto 99:dbbf35b96557 929 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
Kojto 99:dbbf35b96557 930 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 931
Kojto 99:dbbf35b96557 932 /* ADC retrieve conversion value intended to be used with polling or interruption */
Kojto 99:dbbf35b96557 933 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 934
Kojto 99:dbbf35b96557 935 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
Kojto 99:dbbf35b96557 936 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 937 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 938 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 939 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 940 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
Kojto 99:dbbf35b96557 941
Kojto 99:dbbf35b96557 942 /* Peripheral Control functions ***********************************************/
Kojto 99:dbbf35b96557 943 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
Kojto 99:dbbf35b96557 944 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
Kojto 99:dbbf35b96557 945
Kojto 99:dbbf35b96557 946 /* Peripheral State functions *************************************************/
Kojto 99:dbbf35b96557 947 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
Kojto 99:dbbf35b96557 948 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
Kojto 99:dbbf35b96557 949
Kojto 99:dbbf35b96557 950
Kojto 99:dbbf35b96557 951 /**
Kojto 99:dbbf35b96557 952 * @}
Kojto 99:dbbf35b96557 953 */
Kojto 99:dbbf35b96557 954
Kojto 99:dbbf35b96557 955 /**
Kojto 99:dbbf35b96557 956 * @}
Kojto 99:dbbf35b96557 957 */
Kojto 99:dbbf35b96557 958
Kojto 99:dbbf35b96557 959 #ifdef __cplusplus
Kojto 99:dbbf35b96557 960 }
Kojto 99:dbbf35b96557 961 #endif
Kojto 99:dbbf35b96557 962
Kojto 99:dbbf35b96557 963 #endif /*__STM32L0xx_ADC_H */
Kojto 99:dbbf35b96557 964
Kojto 99:dbbf35b96557 965
Kojto 99:dbbf35b96557 966 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/