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TARGET_NUCLEO_F303K8/stm32f3xx_ll_fmc.h@109:9296ab0bfc11, 2015-10-29 (annotated)

Committer:
Kojto
Date:
Thu Oct 29 08:40:18 2015 +0000
Revision:
109:9296ab0bfc11
Release 109  of the mbed library



Changes:

- new platforms - NUCLEO_F042K6, WIZNWIKI_W7500ECO

- MTS targets - bootloaders update to 0.1.1

- STM F7 - RTC enable fixes

- STM F4 - i2c pending stop before start fix

- STM all targets - analogout normalization fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file stm32f3xx_ll_fmc.h
Kojto 109:9296ab0bfc11 4 * @author MCD Application Team
Kojto 109:9296ab0bfc11 5 * @version V1.1.0
Kojto 109:9296ab0bfc11 6 * @date 12-Sept-2014
Kojto 109:9296ab0bfc11 7 * @brief Header file of FMC HAL module.
Kojto 109:9296ab0bfc11 8 ******************************************************************************
Kojto 109:9296ab0bfc11 9 * @attention
Kojto 109:9296ab0bfc11 10 *
Kojto 109:9296ab0bfc11 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 109:9296ab0bfc11 12 *
Kojto 109:9296ab0bfc11 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 109:9296ab0bfc11 14 * are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 109:9296ab0bfc11 16 * this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 109:9296ab0bfc11 18 * this list of conditions and the following disclaimer in the documentation
Kojto 109:9296ab0bfc11 19 * and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 109:9296ab0bfc11 21 * may be used to endorse or promote products derived from this software
Kojto 109:9296ab0bfc11 22 * without specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 109:9296ab0bfc11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 109:9296ab0bfc11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 109:9296ab0bfc11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 109:9296ab0bfc11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 109:9296ab0bfc11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 109:9296ab0bfc11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 109:9296ab0bfc11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 34 *
Kojto 109:9296ab0bfc11 35 ******************************************************************************
Kojto 109:9296ab0bfc11 36 */
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 39 #ifndef __STM32F3xx_LL_FMC_H
Kojto 109:9296ab0bfc11 40 #define __STM32F3xx_LL_FMC_H
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
Kojto 109:9296ab0bfc11 47
Kojto 109:9296ab0bfc11 48 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 49 #include "stm32f3xx_hal_def.h"
Kojto 109:9296ab0bfc11 50
Kojto 109:9296ab0bfc11 51 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 109:9296ab0bfc11 52 * @{
Kojto 109:9296ab0bfc11 53 */
Kojto 109:9296ab0bfc11 54
Kojto 109:9296ab0bfc11 55 /** @addtogroup FMC
Kojto 109:9296ab0bfc11 56 * @{
Kojto 109:9296ab0bfc11 57 */
Kojto 109:9296ab0bfc11 58
Kojto 109:9296ab0bfc11 59 /* Exported typedef ----------------------------------------------------------*/
Kojto 109:9296ab0bfc11 60 #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef
Kojto 109:9296ab0bfc11 61 #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef
Kojto 109:9296ab0bfc11 62 #define FMC_NAND_TypeDef FMC_Bank2_3_TypeDef
Kojto 109:9296ab0bfc11 63 #define FMC_PCCARD_TypeDef FMC_Bank4_TypeDef
Kojto 109:9296ab0bfc11 64
Kojto 109:9296ab0bfc11 65 #define FMC_NORSRAM_DEVICE FMC_Bank1
Kojto 109:9296ab0bfc11 66 #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E
Kojto 109:9296ab0bfc11 67 #define FMC_NAND_DEVICE FMC_Bank2_3
Kojto 109:9296ab0bfc11 68 #define FMC_PCCARD_DEVICE FMC_Bank4
Kojto 109:9296ab0bfc11 69
Kojto 109:9296ab0bfc11 70 /**
Kojto 109:9296ab0bfc11 71 * @brief FMC_NORSRAM Configuration Structure definition
Kojto 109:9296ab0bfc11 72 */
Kojto 109:9296ab0bfc11 73 typedef struct
Kojto 109:9296ab0bfc11 74 {
Kojto 109:9296ab0bfc11 75 uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
Kojto 109:9296ab0bfc11 76 This parameter can be a value of @ref FMC_NORSRAM_Bank */
Kojto 109:9296ab0bfc11 77
Kojto 109:9296ab0bfc11 78 uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
Kojto 109:9296ab0bfc11 79 multiplexed on the data bus or not.
Kojto 109:9296ab0bfc11 80 This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */
Kojto 109:9296ab0bfc11 81
Kojto 109:9296ab0bfc11 82 uint32_t MemoryType; /*!< Specifies the type of external memory attached to
Kojto 109:9296ab0bfc11 83 the corresponding memory device.
Kojto 109:9296ab0bfc11 84 This parameter can be a value of @ref FMC_Memory_Type */
Kojto 109:9296ab0bfc11 85
Kojto 109:9296ab0bfc11 86 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 109:9296ab0bfc11 87 This parameter can be a value of @ref FMC_NORSRAM_Data_Width */
Kojto 109:9296ab0bfc11 88
Kojto 109:9296ab0bfc11 89 uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
Kojto 109:9296ab0bfc11 90 valid only with synchronous burst Flash memories.
Kojto 109:9296ab0bfc11 91 This parameter can be a value of @ref FMC_Burst_Access_Mode */
Kojto 109:9296ab0bfc11 92
Kojto 109:9296ab0bfc11 93 uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
Kojto 109:9296ab0bfc11 94 the Flash memory in burst mode.
Kojto 109:9296ab0bfc11 95 This parameter can be a value of @ref FMC_Wait_Signal_Polarity */
Kojto 109:9296ab0bfc11 96
Kojto 109:9296ab0bfc11 97 uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
Kojto 109:9296ab0bfc11 98 memory, valid only when accessing Flash memories in burst mode.
Kojto 109:9296ab0bfc11 99 This parameter can be a value of @ref FMC_Wrap_Mode */
Kojto 109:9296ab0bfc11 100
Kojto 109:9296ab0bfc11 101 uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
Kojto 109:9296ab0bfc11 102 clock cycle before the wait state or during the wait state,
Kojto 109:9296ab0bfc11 103 valid only when accessing memories in burst mode.
Kojto 109:9296ab0bfc11 104 This parameter can be a value of @ref FMC_Wait_Timing */
Kojto 109:9296ab0bfc11 105
Kojto 109:9296ab0bfc11 106 uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC.
Kojto 109:9296ab0bfc11 107 This parameter can be a value of @ref FMC_Write_Operation */
Kojto 109:9296ab0bfc11 108
Kojto 109:9296ab0bfc11 109 uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
Kojto 109:9296ab0bfc11 110 signal, valid for Flash memory access in burst mode.
Kojto 109:9296ab0bfc11 111 This parameter can be a value of @ref FMC_Wait_Signal */
Kojto 109:9296ab0bfc11 112
Kojto 109:9296ab0bfc11 113 uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
Kojto 109:9296ab0bfc11 114 This parameter can be a value of @ref FMC_Extended_Mode */
Kojto 109:9296ab0bfc11 115
Kojto 109:9296ab0bfc11 116 uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
Kojto 109:9296ab0bfc11 117 valid only with asynchronous Flash memories.
Kojto 109:9296ab0bfc11 118 This parameter can be a value of @ref FMC_AsynchronousWait */
Kojto 109:9296ab0bfc11 119
Kojto 109:9296ab0bfc11 120 uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
Kojto 109:9296ab0bfc11 121 This parameter can be a value of @ref FMC_Write_Burst */
Kojto 109:9296ab0bfc11 122
Kojto 109:9296ab0bfc11 123 uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices.
Kojto 109:9296ab0bfc11 124 This parameter is only enabled through the FMC_BCR1 register, and don't care
Kojto 109:9296ab0bfc11 125 through FMC_BCR2..4 registers.
Kojto 109:9296ab0bfc11 126 This parameter can be a value of @ref FMC_Continous_Clock */
Kojto 109:9296ab0bfc11 127
Kojto 109:9296ab0bfc11 128 }FMC_NORSRAM_InitTypeDef;
Kojto 109:9296ab0bfc11 129
Kojto 109:9296ab0bfc11 130 /**
Kojto 109:9296ab0bfc11 131 * @brief FMC_NORSRAM Timing parameters structure definition
Kojto 109:9296ab0bfc11 132 */
Kojto 109:9296ab0bfc11 133 typedef struct
Kojto 109:9296ab0bfc11 134 {
Kojto 109:9296ab0bfc11 135 uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 109:9296ab0bfc11 136 the duration of the address setup time.
Kojto 109:9296ab0bfc11 137 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 109:9296ab0bfc11 138 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 109:9296ab0bfc11 139
Kojto 109:9296ab0bfc11 140 uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
Kojto 109:9296ab0bfc11 141 the duration of the address hold time.
Kojto 109:9296ab0bfc11 142 This parameter can be a value between Min_Data = 1 and Max_Data = 15.
Kojto 109:9296ab0bfc11 143 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 109:9296ab0bfc11 144
Kojto 109:9296ab0bfc11 145 uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 109:9296ab0bfc11 146 the duration of the data setup time.
Kojto 109:9296ab0bfc11 147 This parameter can be a value between Min_Data = 1 and Max_Data = 255.
Kojto 109:9296ab0bfc11 148 @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed
Kojto 109:9296ab0bfc11 149 NOR Flash memories. */
Kojto 109:9296ab0bfc11 150
Kojto 109:9296ab0bfc11 151 uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
Kojto 109:9296ab0bfc11 152 the duration of the bus turnaround.
Kojto 109:9296ab0bfc11 153 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 109:9296ab0bfc11 154 @note This parameter is only used for multiplexed NOR Flash memories. */
Kojto 109:9296ab0bfc11 155
Kojto 109:9296ab0bfc11 156 uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of
Kojto 109:9296ab0bfc11 157 HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.
Kojto 109:9296ab0bfc11 158 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM
Kojto 109:9296ab0bfc11 159 accesses. */
Kojto 109:9296ab0bfc11 160
Kojto 109:9296ab0bfc11 161 uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue
Kojto 109:9296ab0bfc11 162 to the memory before getting the first data.
Kojto 109:9296ab0bfc11 163 The parameter value depends on the memory type as shown below:
Kojto 109:9296ab0bfc11 164 - It must be set to 0 in case of a CRAM
Kojto 109:9296ab0bfc11 165 - It is don't care in asynchronous NOR, SRAM or ROM accesses
Kojto 109:9296ab0bfc11 166 - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories
Kojto 109:9296ab0bfc11 167 with synchronous burst mode enable */
Kojto 109:9296ab0bfc11 168
Kojto 109:9296ab0bfc11 169 uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
Kojto 109:9296ab0bfc11 170 This parameter can be a value of @ref FMC_Access_Mode */
Kojto 109:9296ab0bfc11 171
Kojto 109:9296ab0bfc11 172 }FMC_NORSRAM_TimingTypeDef;
Kojto 109:9296ab0bfc11 173
Kojto 109:9296ab0bfc11 174 /**
Kojto 109:9296ab0bfc11 175 * @brief FMC_NAND Configuration Structure definition
Kojto 109:9296ab0bfc11 176 */
Kojto 109:9296ab0bfc11 177 typedef struct
Kojto 109:9296ab0bfc11 178 {
Kojto 109:9296ab0bfc11 179 uint32_t NandBank; /*!< Specifies the NAND memory device that will be used.
Kojto 109:9296ab0bfc11 180 This parameter can be a value of @ref FMC_NAND_Bank */
Kojto 109:9296ab0bfc11 181
Kojto 109:9296ab0bfc11 182 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device.
Kojto 109:9296ab0bfc11 183 This parameter can be any value of @ref FMC_Wait_feature */
Kojto 109:9296ab0bfc11 184
Kojto 109:9296ab0bfc11 185 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 109:9296ab0bfc11 186 This parameter can be any value of @ref FMC_NAND_Data_Width */
Kojto 109:9296ab0bfc11 187
Kojto 109:9296ab0bfc11 188 uint32_t EccComputation; /*!< Enables or disables the ECC computation.
Kojto 109:9296ab0bfc11 189 This parameter can be any value of @ref FMC_ECC */
Kojto 109:9296ab0bfc11 190
Kojto 109:9296ab0bfc11 191 uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC.
Kojto 109:9296ab0bfc11 192 This parameter can be any value of @ref FMC_ECC_Page_Size */
Kojto 109:9296ab0bfc11 193
Kojto 109:9296ab0bfc11 194 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 109:9296ab0bfc11 195 delay between CLE low and RE low.
Kojto 109:9296ab0bfc11 196 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 197
Kojto 109:9296ab0bfc11 198 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 109:9296ab0bfc11 199 delay between ALE low and RE low.
Kojto 109:9296ab0bfc11 200 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 201
Kojto 109:9296ab0bfc11 202 }FMC_NAND_InitTypeDef;
Kojto 109:9296ab0bfc11 203
Kojto 109:9296ab0bfc11 204 /**
Kojto 109:9296ab0bfc11 205 * @brief FMC_NAND_PCCARD Timing parameters structure definition
Kojto 109:9296ab0bfc11 206 */
Kojto 109:9296ab0bfc11 207 typedef struct
Kojto 109:9296ab0bfc11 208 {
Kojto 109:9296ab0bfc11 209 uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before
Kojto 109:9296ab0bfc11 210 the command assertion for NAND-Flash read or write access
Kojto 109:9296ab0bfc11 211 to common/Attribute or I/O memory space (depending on
Kojto 109:9296ab0bfc11 212 the memory space timing to be configured).
Kojto 109:9296ab0bfc11 213 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 214
Kojto 109:9296ab0bfc11 215 uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
Kojto 109:9296ab0bfc11 216 command for NAND-Flash read or write access to
Kojto 109:9296ab0bfc11 217 common/Attribute or I/O memory space (depending on the
Kojto 109:9296ab0bfc11 218 memory space timing to be configured).
Kojto 109:9296ab0bfc11 219 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 220
Kojto 109:9296ab0bfc11 221 uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
Kojto 109:9296ab0bfc11 222 (and data for write access) after the command de-assertion
Kojto 109:9296ab0bfc11 223 for NAND-Flash read or write access to common/Attribute
Kojto 109:9296ab0bfc11 224 or I/O memory space (depending on the memory space timing
Kojto 109:9296ab0bfc11 225 to be configured).
Kojto 109:9296ab0bfc11 226 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 227
Kojto 109:9296ab0bfc11 228 uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
Kojto 109:9296ab0bfc11 229 data bus is kept in HiZ after the start of a NAND-Flash
Kojto 109:9296ab0bfc11 230 write access to common/Attribute or I/O memory space (depending
Kojto 109:9296ab0bfc11 231 on the memory space timing to be configured).
Kojto 109:9296ab0bfc11 232 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 233
Kojto 109:9296ab0bfc11 234 }FMC_NAND_PCC_TimingTypeDef;
Kojto 109:9296ab0bfc11 235
Kojto 109:9296ab0bfc11 236 /**
Kojto 109:9296ab0bfc11 237 * @brief FMC_NAND Configuration Structure definition
Kojto 109:9296ab0bfc11 238 */
Kojto 109:9296ab0bfc11 239 typedef struct
Kojto 109:9296ab0bfc11 240 {
Kojto 109:9296ab0bfc11 241 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the PCCARD Memory device.
Kojto 109:9296ab0bfc11 242 This parameter can be any value of @ref FMC_Wait_feature */
Kojto 109:9296ab0bfc11 243
Kojto 109:9296ab0bfc11 244 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 109:9296ab0bfc11 245 delay between CLE low and RE low.
Kojto 109:9296ab0bfc11 246 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 247
Kojto 109:9296ab0bfc11 248 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 109:9296ab0bfc11 249 delay between ALE low and RE low.
Kojto 109:9296ab0bfc11 250 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 109:9296ab0bfc11 251
Kojto 109:9296ab0bfc11 252 }FMC_PCCARD_InitTypeDef;
Kojto 109:9296ab0bfc11 253
Kojto 109:9296ab0bfc11 254 /* Exported constants --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 255
Kojto 109:9296ab0bfc11 256 /** @defgroup FMC_NOR_SRAM_Controller
Kojto 109:9296ab0bfc11 257 * @{
Kojto 109:9296ab0bfc11 258 */
Kojto 109:9296ab0bfc11 259
Kojto 109:9296ab0bfc11 260 /** @defgroup FMC_NORSRAM_Bank
Kojto 109:9296ab0bfc11 261 * @{
Kojto 109:9296ab0bfc11 262 */
Kojto 109:9296ab0bfc11 263 #define FMC_NORSRAM_BANK1 ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 264 #define FMC_NORSRAM_BANK2 ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 265 #define FMC_NORSRAM_BANK3 ((uint32_t)0x00000004)
Kojto 109:9296ab0bfc11 266 #define FMC_NORSRAM_BANK4 ((uint32_t)0x00000006)
Kojto 109:9296ab0bfc11 267
Kojto 109:9296ab0bfc11 268 #define IS_FMC_NORSRAM_BANK(BANK) (((BANK) == FMC_NORSRAM_BANK1) || \
Kojto 109:9296ab0bfc11 269 ((BANK) == FMC_NORSRAM_BANK2) || \
Kojto 109:9296ab0bfc11 270 ((BANK) == FMC_NORSRAM_BANK3) || \
Kojto 109:9296ab0bfc11 271 ((BANK) == FMC_NORSRAM_BANK4))
Kojto 109:9296ab0bfc11 272 /**
Kojto 109:9296ab0bfc11 273 * @}
Kojto 109:9296ab0bfc11 274 */
Kojto 109:9296ab0bfc11 275
Kojto 109:9296ab0bfc11 276 /** @defgroup FMC_Data_Address_Bus_Multiplexing
Kojto 109:9296ab0bfc11 277 * @{
Kojto 109:9296ab0bfc11 278 */
Kojto 109:9296ab0bfc11 279 #define FMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 280 #define FMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 281
Kojto 109:9296ab0bfc11 282 #define IS_FMC_MUX(MUX) (((MUX) == FMC_DATA_ADDRESS_MUX_DISABLE) || \
Kojto 109:9296ab0bfc11 283 ((MUX) == FMC_DATA_ADDRESS_MUX_ENABLE))
Kojto 109:9296ab0bfc11 284 /**
Kojto 109:9296ab0bfc11 285 * @}
Kojto 109:9296ab0bfc11 286 */
Kojto 109:9296ab0bfc11 287
Kojto 109:9296ab0bfc11 288 /** @defgroup FMC_Memory_Type
Kojto 109:9296ab0bfc11 289 * @{
Kojto 109:9296ab0bfc11 290 */
Kojto 109:9296ab0bfc11 291 #define FMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 292 #define FMC_MEMORY_TYPE_PSRAM ((uint32_t)0x00000004)
Kojto 109:9296ab0bfc11 293 #define FMC_MEMORY_TYPE_NOR ((uint32_t)0x00000008)
Kojto 109:9296ab0bfc11 294
Kojto 109:9296ab0bfc11 295 #define IS_FMC_MEMORY(MEMORY) (((MEMORY) == FMC_MEMORY_TYPE_SRAM) || \
Kojto 109:9296ab0bfc11 296 ((MEMORY) == FMC_MEMORY_TYPE_PSRAM)|| \
Kojto 109:9296ab0bfc11 297 ((MEMORY) == FMC_MEMORY_TYPE_NOR))
Kojto 109:9296ab0bfc11 298 /**
Kojto 109:9296ab0bfc11 299 * @}
Kojto 109:9296ab0bfc11 300 */
Kojto 109:9296ab0bfc11 301
Kojto 109:9296ab0bfc11 302 /** @defgroup FMC_NORSRAM_Data_Width
Kojto 109:9296ab0bfc11 303 * @{
Kojto 109:9296ab0bfc11 304 */
Kojto 109:9296ab0bfc11 305 #define FMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 306 #define FMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 307 #define FMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020)
Kojto 109:9296ab0bfc11 308
Kojto 109:9296ab0bfc11 309 #define IS_FMC_NORSRAM_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \
Kojto 109:9296ab0bfc11 310 ((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \
Kojto 109:9296ab0bfc11 311 ((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_32))
Kojto 109:9296ab0bfc11 312 /**
Kojto 109:9296ab0bfc11 313 * @}
Kojto 109:9296ab0bfc11 314 */
Kojto 109:9296ab0bfc11 315
Kojto 109:9296ab0bfc11 316 /** @defgroup FMC_NORSRAM_Flash_Access
Kojto 109:9296ab0bfc11 317 * @{
Kojto 109:9296ab0bfc11 318 */
Kojto 109:9296ab0bfc11 319 #define FMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)0x00000040)
Kojto 109:9296ab0bfc11 320 #define FMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 321 /**
Kojto 109:9296ab0bfc11 322 * @}
Kojto 109:9296ab0bfc11 323 */
Kojto 109:9296ab0bfc11 324
Kojto 109:9296ab0bfc11 325 /** @defgroup FMC_Burst_Access_Mode
Kojto 109:9296ab0bfc11 326 * @{
Kojto 109:9296ab0bfc11 327 */
Kojto 109:9296ab0bfc11 328 #define FMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 329 #define FMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)0x00000100)
Kojto 109:9296ab0bfc11 330
Kojto 109:9296ab0bfc11 331 #define IS_FMC_BURSTMODE(STATE) (((STATE) == FMC_BURST_ACCESS_MODE_DISABLE) || \
Kojto 109:9296ab0bfc11 332 ((STATE) == FMC_BURST_ACCESS_MODE_ENABLE))
Kojto 109:9296ab0bfc11 333 /**
Kojto 109:9296ab0bfc11 334 * @}
Kojto 109:9296ab0bfc11 335 */
Kojto 109:9296ab0bfc11 336
Kojto 109:9296ab0bfc11 337
Kojto 109:9296ab0bfc11 338 /** @defgroup FMC_Wait_Signal_Polarity
Kojto 109:9296ab0bfc11 339 * @{
Kojto 109:9296ab0bfc11 340 */
Kojto 109:9296ab0bfc11 341 #define FMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 342 #define FMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)0x00000200)
Kojto 109:9296ab0bfc11 343
Kojto 109:9296ab0bfc11 344 #define IS_FMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \
Kojto 109:9296ab0bfc11 345 ((POLARITY) == FMC_WAIT_SIGNAL_POLARITY_HIGH))
Kojto 109:9296ab0bfc11 346 /**
Kojto 109:9296ab0bfc11 347 * @}
Kojto 109:9296ab0bfc11 348 */
Kojto 109:9296ab0bfc11 349
Kojto 109:9296ab0bfc11 350 /** @defgroup FMC_Wrap_Mode
Kojto 109:9296ab0bfc11 351 * @{
Kojto 109:9296ab0bfc11 352 */
Kojto 109:9296ab0bfc11 353 #define FMC_WRAP_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 354 #define FMC_WRAP_MODE_ENABLE ((uint32_t)0x00000400)
Kojto 109:9296ab0bfc11 355
Kojto 109:9296ab0bfc11 356 #define IS_FMC_WRAP_MODE(MODE) (((MODE) == FMC_WRAP_MODE_DISABLE) || \
Kojto 109:9296ab0bfc11 357 ((MODE) == FMC_WRAP_MODE_ENABLE))
Kojto 109:9296ab0bfc11 358 /**
Kojto 109:9296ab0bfc11 359 * @}
Kojto 109:9296ab0bfc11 360 */
Kojto 109:9296ab0bfc11 361
Kojto 109:9296ab0bfc11 362 /** @defgroup FMC_Wait_Timing
Kojto 109:9296ab0bfc11 363 * @{
Kojto 109:9296ab0bfc11 364 */
Kojto 109:9296ab0bfc11 365 #define FMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 366 #define FMC_WAIT_TIMING_DURING_WS ((uint32_t)0x00000800)
Kojto 109:9296ab0bfc11 367
Kojto 109:9296ab0bfc11 368 #define IS_FMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FMC_WAIT_TIMING_BEFORE_WS) || \
Kojto 109:9296ab0bfc11 369 ((ACTIVE) == FMC_WAIT_TIMING_DURING_WS))
Kojto 109:9296ab0bfc11 370 /**
Kojto 109:9296ab0bfc11 371 * @}
Kojto 109:9296ab0bfc11 372 */
Kojto 109:9296ab0bfc11 373
Kojto 109:9296ab0bfc11 374 /** @defgroup FMC_Write_Operation
Kojto 109:9296ab0bfc11 375 * @{
Kojto 109:9296ab0bfc11 376 */
Kojto 109:9296ab0bfc11 377 #define FMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 378 #define FMC_WRITE_OPERATION_ENABLE ((uint32_t)0x00001000)
Kojto 109:9296ab0bfc11 379
Kojto 109:9296ab0bfc11 380 #define IS_FMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FMC_WRITE_OPERATION_DISABLE) || \
Kojto 109:9296ab0bfc11 381 ((OPERATION) == FMC_WRITE_OPERATION_ENABLE))
Kojto 109:9296ab0bfc11 382 /**
Kojto 109:9296ab0bfc11 383 * @}
Kojto 109:9296ab0bfc11 384 */
Kojto 109:9296ab0bfc11 385
Kojto 109:9296ab0bfc11 386 /** @defgroup FMC_Wait_Signal
Kojto 109:9296ab0bfc11 387 * @{
Kojto 109:9296ab0bfc11 388 */
Kojto 109:9296ab0bfc11 389 #define FMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 390 #define FMC_WAIT_SIGNAL_ENABLE ((uint32_t)0x00002000)
Kojto 109:9296ab0bfc11 391
Kojto 109:9296ab0bfc11 392 #define IS_FMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FMC_WAIT_SIGNAL_DISABLE) || \
Kojto 109:9296ab0bfc11 393 ((SIGNAL) == FMC_WAIT_SIGNAL_ENABLE))
Kojto 109:9296ab0bfc11 394 /**
Kojto 109:9296ab0bfc11 395 * @}
Kojto 109:9296ab0bfc11 396 */
Kojto 109:9296ab0bfc11 397
Kojto 109:9296ab0bfc11 398 /** @defgroup FMC_Extended_Mode
Kojto 109:9296ab0bfc11 399 * @{
Kojto 109:9296ab0bfc11 400 */
Kojto 109:9296ab0bfc11 401 #define FMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 402 #define FMC_EXTENDED_MODE_ENABLE ((uint32_t)0x00004000)
Kojto 109:9296ab0bfc11 403
Kojto 109:9296ab0bfc11 404 #define IS_FMC_EXTENDED_MODE(MODE) (((MODE) == FMC_EXTENDED_MODE_DISABLE) || \
Kojto 109:9296ab0bfc11 405 ((MODE) == FMC_EXTENDED_MODE_ENABLE))
Kojto 109:9296ab0bfc11 406 /**
Kojto 109:9296ab0bfc11 407 * @}
Kojto 109:9296ab0bfc11 408 */
Kojto 109:9296ab0bfc11 409
Kojto 109:9296ab0bfc11 410 /** @defgroup FMC_AsynchronousWait
Kojto 109:9296ab0bfc11 411 * @{
Kojto 109:9296ab0bfc11 412 */
Kojto 109:9296ab0bfc11 413 #define FMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 414 #define FMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)0x00008000)
Kojto 109:9296ab0bfc11 415
Kojto 109:9296ab0bfc11 416 #define IS_FMC_ASYNWAIT(STATE) (((STATE) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \
Kojto 109:9296ab0bfc11 417 ((STATE) == FMC_ASYNCHRONOUS_WAIT_ENABLE))
Kojto 109:9296ab0bfc11 418 /**
Kojto 109:9296ab0bfc11 419 * @}
Kojto 109:9296ab0bfc11 420 */
Kojto 109:9296ab0bfc11 421
Kojto 109:9296ab0bfc11 422 /** @defgroup FMC_Write_Burst
Kojto 109:9296ab0bfc11 423 * @{
Kojto 109:9296ab0bfc11 424 */
Kojto 109:9296ab0bfc11 425 #define FMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 426 #define FMC_WRITE_BURST_ENABLE ((uint32_t)0x00080000)
Kojto 109:9296ab0bfc11 427
Kojto 109:9296ab0bfc11 428 #define IS_FMC_WRITE_BURST(BURST) (((BURST) == FMC_WRITE_BURST_DISABLE) || \
Kojto 109:9296ab0bfc11 429 ((BURST) == FMC_WRITE_BURST_ENABLE))
Kojto 109:9296ab0bfc11 430 /**
Kojto 109:9296ab0bfc11 431 * @}
Kojto 109:9296ab0bfc11 432 */
Kojto 109:9296ab0bfc11 433
Kojto 109:9296ab0bfc11 434 /** @defgroup FMC_Continous_Clock
Kojto 109:9296ab0bfc11 435 * @{
Kojto 109:9296ab0bfc11 436 */
Kojto 109:9296ab0bfc11 437 #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 438 #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)0x00100000)
Kojto 109:9296ab0bfc11 439
Kojto 109:9296ab0bfc11 440 #define IS_FMC_CONTINOUS_CLOCK(CCLOCK) (((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
Kojto 109:9296ab0bfc11 441 ((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
Kojto 109:9296ab0bfc11 442 /**
Kojto 109:9296ab0bfc11 443 * @}
Kojto 109:9296ab0bfc11 444 */
Kojto 109:9296ab0bfc11 445
Kojto 109:9296ab0bfc11 446 /** @defgroup FMC_Address_Setup_Time
Kojto 109:9296ab0bfc11 447 * @{
Kojto 109:9296ab0bfc11 448 */
Kojto 109:9296ab0bfc11 449 #define IS_FMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 15)
Kojto 109:9296ab0bfc11 450 /**
Kojto 109:9296ab0bfc11 451 * @}
Kojto 109:9296ab0bfc11 452 */
Kojto 109:9296ab0bfc11 453
Kojto 109:9296ab0bfc11 454 /** @defgroup FMC_Address_Hold_Time
Kojto 109:9296ab0bfc11 455 * @{
Kojto 109:9296ab0bfc11 456 */
Kojto 109:9296ab0bfc11 457 #define IS_FMC_ADDRESS_HOLD_TIME(TIME) (((TIME) > 0) && ((TIME) <= 15))
Kojto 109:9296ab0bfc11 458 /**
Kojto 109:9296ab0bfc11 459 * @}
Kojto 109:9296ab0bfc11 460 */
Kojto 109:9296ab0bfc11 461
Kojto 109:9296ab0bfc11 462 /** @defgroup FMC_Data_Setup_Time
Kojto 109:9296ab0bfc11 463 * @{
Kojto 109:9296ab0bfc11 464 */
Kojto 109:9296ab0bfc11 465 #define IS_FMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 255))
Kojto 109:9296ab0bfc11 466 /**
Kojto 109:9296ab0bfc11 467 * @}
Kojto 109:9296ab0bfc11 468 */
Kojto 109:9296ab0bfc11 469
Kojto 109:9296ab0bfc11 470 /** @defgroup FMC_Bus_Turn_around_Duration
Kojto 109:9296ab0bfc11 471 * @{
Kojto 109:9296ab0bfc11 472 */
Kojto 109:9296ab0bfc11 473 #define IS_FMC_TURNAROUND_TIME(TIME) ((TIME) <= 15)
Kojto 109:9296ab0bfc11 474 /**
Kojto 109:9296ab0bfc11 475 * @}
Kojto 109:9296ab0bfc11 476 */
Kojto 109:9296ab0bfc11 477
Kojto 109:9296ab0bfc11 478 /** @defgroup FMC_CLK_Division
Kojto 109:9296ab0bfc11 479 * @{
Kojto 109:9296ab0bfc11 480 */
Kojto 109:9296ab0bfc11 481 #define IS_FMC_CLK_DIV(DIV) (((DIV) > 1) && ((DIV) <= 16))
Kojto 109:9296ab0bfc11 482 /**
Kojto 109:9296ab0bfc11 483 * @}
Kojto 109:9296ab0bfc11 484 */
Kojto 109:9296ab0bfc11 485
Kojto 109:9296ab0bfc11 486 /** @defgroup FMC_Data_Latency
Kojto 109:9296ab0bfc11 487 * @{
Kojto 109:9296ab0bfc11 488 */
Kojto 109:9296ab0bfc11 489 #define IS_FMC_DATA_LATENCY(LATENCY) (((LATENCY) > 1) && ((LATENCY) <= 17))
Kojto 109:9296ab0bfc11 490 /**
Kojto 109:9296ab0bfc11 491 * @}
Kojto 109:9296ab0bfc11 492 */
Kojto 109:9296ab0bfc11 493
Kojto 109:9296ab0bfc11 494 /** @defgroup FMC_Access_Mode
Kojto 109:9296ab0bfc11 495 * @{
Kojto 109:9296ab0bfc11 496 */
Kojto 109:9296ab0bfc11 497 #define FMC_ACCESS_MODE_A ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 498 #define FMC_ACCESS_MODE_B ((uint32_t)0x10000000)
Kojto 109:9296ab0bfc11 499 #define FMC_ACCESS_MODE_C ((uint32_t)0x20000000)
Kojto 109:9296ab0bfc11 500 #define FMC_ACCESS_MODE_D ((uint32_t)0x30000000)
Kojto 109:9296ab0bfc11 501
Kojto 109:9296ab0bfc11 502 #define IS_FMC_ACCESS_MODE(MODE) (((MODE) == FMC_ACCESS_MODE_A) || \
Kojto 109:9296ab0bfc11 503 ((MODE) == FMC_ACCESS_MODE_B) || \
Kojto 109:9296ab0bfc11 504 ((MODE) == FMC_ACCESS_MODE_C) || \
Kojto 109:9296ab0bfc11 505 ((MODE) == FMC_ACCESS_MODE_D))
Kojto 109:9296ab0bfc11 506 /**
Kojto 109:9296ab0bfc11 507 * @}
Kojto 109:9296ab0bfc11 508 */
Kojto 109:9296ab0bfc11 509
Kojto 109:9296ab0bfc11 510 /**
Kojto 109:9296ab0bfc11 511 * @}
Kojto 109:9296ab0bfc11 512 */
Kojto 109:9296ab0bfc11 513
Kojto 109:9296ab0bfc11 514 /** @defgroup FMC_NAND_Controller
Kojto 109:9296ab0bfc11 515 * @{
Kojto 109:9296ab0bfc11 516 */
Kojto 109:9296ab0bfc11 517
Kojto 109:9296ab0bfc11 518 /** @defgroup FMC_NAND_Bank
Kojto 109:9296ab0bfc11 519 * @{
Kojto 109:9296ab0bfc11 520 */
Kojto 109:9296ab0bfc11 521 #define FMC_NAND_BANK2 ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 522 #define FMC_NAND_BANK3 ((uint32_t)0x00000100)
Kojto 109:9296ab0bfc11 523
Kojto 109:9296ab0bfc11 524 #define IS_FMC_NAND_BANK(BANK) (((BANK) == FMC_NAND_BANK2) || \
Kojto 109:9296ab0bfc11 525 ((BANK) == FMC_NAND_BANK3))
Kojto 109:9296ab0bfc11 526 /**
Kojto 109:9296ab0bfc11 527 * @}
Kojto 109:9296ab0bfc11 528 */
Kojto 109:9296ab0bfc11 529
Kojto 109:9296ab0bfc11 530 /** @defgroup FMC_Wait_feature
Kojto 109:9296ab0bfc11 531 * @{
Kojto 109:9296ab0bfc11 532 */
Kojto 109:9296ab0bfc11 533 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 534 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 535
Kojto 109:9296ab0bfc11 536 #define IS_FMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \
Kojto 109:9296ab0bfc11 537 ((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_ENABLE))
Kojto 109:9296ab0bfc11 538 /**
Kojto 109:9296ab0bfc11 539 * @}
Kojto 109:9296ab0bfc11 540 */
Kojto 109:9296ab0bfc11 541
Kojto 109:9296ab0bfc11 542 /** @defgroup FMC_PCR_Memory_Type
Kojto 109:9296ab0bfc11 543 * @{
Kojto 109:9296ab0bfc11 544 */
Kojto 109:9296ab0bfc11 545 #define FMC_PCR_MEMORY_TYPE_PCCARD ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 546 #define FMC_PCR_MEMORY_TYPE_NAND ((uint32_t)0x00000008)
Kojto 109:9296ab0bfc11 547 /**
Kojto 109:9296ab0bfc11 548 * @}
Kojto 109:9296ab0bfc11 549 */
Kojto 109:9296ab0bfc11 550
Kojto 109:9296ab0bfc11 551 /** @defgroup FMC_NAND_Data_Width
Kojto 109:9296ab0bfc11 552 * @{
Kojto 109:9296ab0bfc11 553 */
Kojto 109:9296ab0bfc11 554 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 555 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 556
Kojto 109:9296ab0bfc11 557 #define IS_FMC_NAND_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_8) || \
Kojto 109:9296ab0bfc11 558 ((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_16))
Kojto 109:9296ab0bfc11 559 /**
Kojto 109:9296ab0bfc11 560 * @}
Kojto 109:9296ab0bfc11 561 */
Kojto 109:9296ab0bfc11 562
Kojto 109:9296ab0bfc11 563 /** @defgroup FMC_ECC
Kojto 109:9296ab0bfc11 564 * @{
Kojto 109:9296ab0bfc11 565 */
Kojto 109:9296ab0bfc11 566 #define FMC_NAND_ECC_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 567 #define FMC_NAND_ECC_ENABLE ((uint32_t)0x00000040)
Kojto 109:9296ab0bfc11 568
Kojto 109:9296ab0bfc11 569 #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_NAND_ECC_DISABLE) || \
Kojto 109:9296ab0bfc11 570 ((STATE) == FMC_NAND_ECC_ENABLE))
Kojto 109:9296ab0bfc11 571 /**
Kojto 109:9296ab0bfc11 572 * @}
Kojto 109:9296ab0bfc11 573 */
Kojto 109:9296ab0bfc11 574
Kojto 109:9296ab0bfc11 575 /** @defgroup FMC_ECC_Page_Size
Kojto 109:9296ab0bfc11 576 * @{
Kojto 109:9296ab0bfc11 577 */
Kojto 109:9296ab0bfc11 578 #define FMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 579 #define FMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)0x00020000)
Kojto 109:9296ab0bfc11 580 #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)0x00040000)
Kojto 109:9296ab0bfc11 581 #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)0x00060000)
Kojto 109:9296ab0bfc11 582 #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)0x00080000)
Kojto 109:9296ab0bfc11 583 #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)0x000A0000)
Kojto 109:9296ab0bfc11 584
Kojto 109:9296ab0bfc11 585 #define IS_FMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
Kojto 109:9296ab0bfc11 586 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
Kojto 109:9296ab0bfc11 587 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
Kojto 109:9296ab0bfc11 588 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
Kojto 109:9296ab0bfc11 589 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
Kojto 109:9296ab0bfc11 590 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE))
Kojto 109:9296ab0bfc11 591 /**
Kojto 109:9296ab0bfc11 592 * @}
Kojto 109:9296ab0bfc11 593 */
Kojto 109:9296ab0bfc11 594
Kojto 109:9296ab0bfc11 595 /** @defgroup FMC_TCLR_Setup_Time
Kojto 109:9296ab0bfc11 596 * @{
Kojto 109:9296ab0bfc11 597 */
Kojto 109:9296ab0bfc11 598 #define IS_FMC_TCLR_TIME(TIME) ((TIME) <= 255)
Kojto 109:9296ab0bfc11 599 /**
Kojto 109:9296ab0bfc11 600 * @}
Kojto 109:9296ab0bfc11 601 */
Kojto 109:9296ab0bfc11 602
Kojto 109:9296ab0bfc11 603 /** @defgroup FMC_TAR_Setup_Time
Kojto 109:9296ab0bfc11 604 * @{
Kojto 109:9296ab0bfc11 605 */
Kojto 109:9296ab0bfc11 606 #define IS_FMC_TAR_TIME(TIME) ((TIME) <= 255)
Kojto 109:9296ab0bfc11 607 /**
Kojto 109:9296ab0bfc11 608 * @}
Kojto 109:9296ab0bfc11 609 */
Kojto 109:9296ab0bfc11 610
Kojto 109:9296ab0bfc11 611 /** @defgroup FMC_Setup_Time
Kojto 109:9296ab0bfc11 612 * @{
Kojto 109:9296ab0bfc11 613 */
Kojto 109:9296ab0bfc11 614 #define IS_FMC_SETUP_TIME(TIME) ((TIME) <= 255)
Kojto 109:9296ab0bfc11 615 /**
Kojto 109:9296ab0bfc11 616 * @}
Kojto 109:9296ab0bfc11 617 */
Kojto 109:9296ab0bfc11 618
Kojto 109:9296ab0bfc11 619 /** @defgroup FMC_Wait_Setup_Time
Kojto 109:9296ab0bfc11 620 * @{
Kojto 109:9296ab0bfc11 621 */
Kojto 109:9296ab0bfc11 622 #define IS_FMC_WAIT_TIME(TIME) ((TIME) <= 255)
Kojto 109:9296ab0bfc11 623 /**
Kojto 109:9296ab0bfc11 624 * @}
Kojto 109:9296ab0bfc11 625 */
Kojto 109:9296ab0bfc11 626
Kojto 109:9296ab0bfc11 627 /** @defgroup FMC_Hold_Setup_Time
Kojto 109:9296ab0bfc11 628 * @{
Kojto 109:9296ab0bfc11 629 */
Kojto 109:9296ab0bfc11 630 #define IS_FMC_HOLD_TIME(TIME) ((TIME) <= 255)
Kojto 109:9296ab0bfc11 631 /**
Kojto 109:9296ab0bfc11 632 * @}
Kojto 109:9296ab0bfc11 633 */
Kojto 109:9296ab0bfc11 634
Kojto 109:9296ab0bfc11 635 /** @defgroup FMC_HiZ_Setup_Time
Kojto 109:9296ab0bfc11 636 * @{
Kojto 109:9296ab0bfc11 637 */
Kojto 109:9296ab0bfc11 638 #define IS_FMC_HIZ_TIME(TIME) ((TIME) <= 255)
Kojto 109:9296ab0bfc11 639 /**
Kojto 109:9296ab0bfc11 640 * @}
Kojto 109:9296ab0bfc11 641 */
Kojto 109:9296ab0bfc11 642
Kojto 109:9296ab0bfc11 643 /**
Kojto 109:9296ab0bfc11 644 * @}
Kojto 109:9296ab0bfc11 645 */
Kojto 109:9296ab0bfc11 646
Kojto 109:9296ab0bfc11 647 /** @defgroup FMC_NORSRAM_Device_Instance
Kojto 109:9296ab0bfc11 648 * @{
Kojto 109:9296ab0bfc11 649 */
Kojto 109:9296ab0bfc11 650 #define IS_FMC_NORSRAM_DEVICE(INSTANCE) ((INSTANCE) == FMC_NORSRAM_DEVICE)
Kojto 109:9296ab0bfc11 651 /**
Kojto 109:9296ab0bfc11 652 * @}
Kojto 109:9296ab0bfc11 653 */
Kojto 109:9296ab0bfc11 654
Kojto 109:9296ab0bfc11 655 /** @defgroup FMC_NORSRAM_EXTENDED_Device_Instance
Kojto 109:9296ab0bfc11 656 * @{
Kojto 109:9296ab0bfc11 657 */
Kojto 109:9296ab0bfc11 658 #define IS_FMC_NORSRAM_EXTENDED_DEVICE(INSTANCE) ((INSTANCE) == FMC_NORSRAM_EXTENDED_DEVICE)
Kojto 109:9296ab0bfc11 659 /**
Kojto 109:9296ab0bfc11 660 * @}
Kojto 109:9296ab0bfc11 661 */
Kojto 109:9296ab0bfc11 662
Kojto 109:9296ab0bfc11 663 /** @defgroup FMC_NAND_Device_Instance
Kojto 109:9296ab0bfc11 664 * @{
Kojto 109:9296ab0bfc11 665 */
Kojto 109:9296ab0bfc11 666 #define IS_FMC_NAND_DEVICE(INSTANCE) ((INSTANCE) == FMC_NAND_DEVICE)
Kojto 109:9296ab0bfc11 667 /**
Kojto 109:9296ab0bfc11 668 * @}
Kojto 109:9296ab0bfc11 669 */
Kojto 109:9296ab0bfc11 670
Kojto 109:9296ab0bfc11 671 /** @defgroup FMC_PCCARD_Device_Instance
Kojto 109:9296ab0bfc11 672 * @{
Kojto 109:9296ab0bfc11 673 */
Kojto 109:9296ab0bfc11 674 #define IS_FMC_PCCARD_DEVICE(INSTANCE) ((INSTANCE) == FMC_PCCARD_DEVICE)
Kojto 109:9296ab0bfc11 675
Kojto 109:9296ab0bfc11 676 /**
Kojto 109:9296ab0bfc11 677 * @}
Kojto 109:9296ab0bfc11 678 */
Kojto 109:9296ab0bfc11 679
Kojto 109:9296ab0bfc11 680 /** @defgroup FMC_Interrupt_definition
Kojto 109:9296ab0bfc11 681 * @brief FMC Interrupt definition
Kojto 109:9296ab0bfc11 682 * @{
Kojto 109:9296ab0bfc11 683 */
Kojto 109:9296ab0bfc11 684 #define FMC_IT_RISING_EDGE ((uint32_t)0x00000008)
Kojto 109:9296ab0bfc11 685 #define FMC_IT_LEVEL ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 686 #define FMC_IT_FALLING_EDGE ((uint32_t)0x00000020)
Kojto 109:9296ab0bfc11 687 #define FMC_IT_REFRESH_ERROR ((uint32_t)0x00004000)
Kojto 109:9296ab0bfc11 688
Kojto 109:9296ab0bfc11 689 #define IS_FMC_IT(IT) ((((IT) & (uint32_t)0xFFFFBFC7) == 0x00000000) && ((IT) != 0x00000000))
Kojto 109:9296ab0bfc11 690
Kojto 109:9296ab0bfc11 691 #define IS_FMC_GET_IT(IT) (((IT) == FMC_IT_RISING_EDGE) || \
Kojto 109:9296ab0bfc11 692 ((IT) == FMC_IT_LEVEL) || \
Kojto 109:9296ab0bfc11 693 ((IT) == FMC_IT_FALLING_EDGE) || \
Kojto 109:9296ab0bfc11 694 ((IT) == FMC_IT_REFRESH_ERROR))
Kojto 109:9296ab0bfc11 695 /**
Kojto 109:9296ab0bfc11 696 * @}
Kojto 109:9296ab0bfc11 697 */
Kojto 109:9296ab0bfc11 698
Kojto 109:9296ab0bfc11 699 /** @defgroup FMC_Flag_definition
Kojto 109:9296ab0bfc11 700 * @brief FMC Flag definition
Kojto 109:9296ab0bfc11 701 * @{
Kojto 109:9296ab0bfc11 702 */
Kojto 109:9296ab0bfc11 703 #define FMC_FLAG_RISING_EDGE ((uint32_t)0x00000001)
Kojto 109:9296ab0bfc11 704 #define FMC_FLAG_LEVEL ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 705 #define FMC_FLAG_FALLING_EDGE ((uint32_t)0x00000004)
Kojto 109:9296ab0bfc11 706 #define FMC_FLAG_FEMPT ((uint32_t)0x00000040)
Kojto 109:9296ab0bfc11 707
Kojto 109:9296ab0bfc11 708 #define IS_FMC_GET_FLAG(FLAG) (((FLAG) == FMC_FLAG_RISING_EDGE) || \
Kojto 109:9296ab0bfc11 709 ((FLAG) == FMC_FLAG_LEVEL) || \
Kojto 109:9296ab0bfc11 710 ((FLAG) == FMC_FLAG_FALLING_EDGE) || \
Kojto 109:9296ab0bfc11 711 ((FLAG) == FMC_FLAG_FEMPT))
Kojto 109:9296ab0bfc11 712
Kojto 109:9296ab0bfc11 713 #define IS_FMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
Kojto 109:9296ab0bfc11 714 /**
Kojto 109:9296ab0bfc11 715 * @}
Kojto 109:9296ab0bfc11 716 */
Kojto 109:9296ab0bfc11 717
Kojto 109:9296ab0bfc11 718 /* Exported macro ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 719
Kojto 109:9296ab0bfc11 720 /** @defgroup FMC_NOR_Macros
Kojto 109:9296ab0bfc11 721 * @brief macros to handle NOR device enable/disable and read/write operations
Kojto 109:9296ab0bfc11 722 * @{
Kojto 109:9296ab0bfc11 723 */
Kojto 109:9296ab0bfc11 724
Kojto 109:9296ab0bfc11 725 /**
Kojto 109:9296ab0bfc11 726 * @brief Enable the NORSRAM device access.
Kojto 109:9296ab0bfc11 727 * @param __INSTANCE__: FMC_NORSRAM Instance
Kojto 109:9296ab0bfc11 728 * @param __BANK__: FMC_NORSRAM Bank
Kojto 109:9296ab0bfc11 729 * @retval None
Kojto 109:9296ab0bfc11 730 */
Kojto 109:9296ab0bfc11 731 #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] |= FMC_BCR1_MBKEN)
Kojto 109:9296ab0bfc11 732
Kojto 109:9296ab0bfc11 733 /**
Kojto 109:9296ab0bfc11 734 * @brief Disable the NORSRAM device access.
Kojto 109:9296ab0bfc11 735 * @param __INSTANCE__: FMC_NORSRAM Instance
Kojto 109:9296ab0bfc11 736 * @param __BANK__: FMC_NORSRAM Bank
Kojto 109:9296ab0bfc11 737 * @retval None
Kojto 109:9296ab0bfc11 738 */
Kojto 109:9296ab0bfc11 739 #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] &= ~FMC_BCR1_MBKEN)
Kojto 109:9296ab0bfc11 740
Kojto 109:9296ab0bfc11 741 /**
Kojto 109:9296ab0bfc11 742 * @}
Kojto 109:9296ab0bfc11 743 */
Kojto 109:9296ab0bfc11 744
Kojto 109:9296ab0bfc11 745 /** @defgroup FMC_NAND_Macros
Kojto 109:9296ab0bfc11 746 * @brief macros to handle NAND device enable/disable
Kojto 109:9296ab0bfc11 747 * @{
Kojto 109:9296ab0bfc11 748 */
Kojto 109:9296ab0bfc11 749
Kojto 109:9296ab0bfc11 750 /**
Kojto 109:9296ab0bfc11 751 * @brief Enable the NAND device access.
Kojto 109:9296ab0bfc11 752 * @param __INSTANCE__: FMC_NAND Instance
Kojto 109:9296ab0bfc11 753 * @param __BANK__: FMC_NAND Bank
Kojto 109:9296ab0bfc11 754 * @retval None
Kojto 109:9296ab0bfc11 755 */
Kojto 109:9296ab0bfc11 756 #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FMC_PCR2_PBKEN): \
Kojto 109:9296ab0bfc11 757 ((__INSTANCE__)->PCR3 |= FMC_PCR3_PBKEN))
Kojto 109:9296ab0bfc11 758
Kojto 109:9296ab0bfc11 759 /**
Kojto 109:9296ab0bfc11 760 * @brief Disable the NAND device access.
Kojto 109:9296ab0bfc11 761 * @param __INSTANCE__: FMC_NAND Instance
Kojto 109:9296ab0bfc11 762 * @param __BANK__: FMC_NAND Bank
Kojto 109:9296ab0bfc11 763 * @retval None
Kojto 109:9296ab0bfc11 764 */
Kojto 109:9296ab0bfc11 765 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 &= ~FMC_PCR2_PBKEN): \
Kojto 109:9296ab0bfc11 766 ((__INSTANCE__)->PCR3 &= ~FMC_PCR3_PBKEN))
Kojto 109:9296ab0bfc11 767 /**
Kojto 109:9296ab0bfc11 768 * @}
Kojto 109:9296ab0bfc11 769 */
Kojto 109:9296ab0bfc11 770
Kojto 109:9296ab0bfc11 771 /** @defgroup FMC_PCCARD_Macros
Kojto 109:9296ab0bfc11 772 * @brief macros to handle SRAM read/write operations
Kojto 109:9296ab0bfc11 773 * @{
Kojto 109:9296ab0bfc11 774 */
Kojto 109:9296ab0bfc11 775
Kojto 109:9296ab0bfc11 776 /**
Kojto 109:9296ab0bfc11 777 * @brief Enable the PCCARD device access.
Kojto 109:9296ab0bfc11 778 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 109:9296ab0bfc11 779 * @retval None
Kojto 109:9296ab0bfc11 780 */
Kojto 109:9296ab0bfc11 781 #define __FMC_PCCARD_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 |= FMC_PCR4_PBKEN)
Kojto 109:9296ab0bfc11 782
Kojto 109:9296ab0bfc11 783 /**
Kojto 109:9296ab0bfc11 784 * @brief Disable the PCCARD device access.
Kojto 109:9296ab0bfc11 785 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 109:9296ab0bfc11 786 * @retval None
Kojto 109:9296ab0bfc11 787 */
Kojto 109:9296ab0bfc11 788 #define __FMC_PCCARD_DISABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 &= ~FMC_PCR4_PBKEN)
Kojto 109:9296ab0bfc11 789 /**
Kojto 109:9296ab0bfc11 790 * @}
Kojto 109:9296ab0bfc11 791 */
Kojto 109:9296ab0bfc11 792
Kojto 109:9296ab0bfc11 793 /** @defgroup FMC_Interrupt
Kojto 109:9296ab0bfc11 794 * @brief macros to handle FMC interrupts
Kojto 109:9296ab0bfc11 795 * @{
Kojto 109:9296ab0bfc11 796 */
Kojto 109:9296ab0bfc11 797
Kojto 109:9296ab0bfc11 798 /**
Kojto 109:9296ab0bfc11 799 * @brief Enable the NAND device interrupt.
Kojto 109:9296ab0bfc11 800 * @param __INSTANCE__: FMC_NAND Instance
Kojto 109:9296ab0bfc11 801 * @param __BANK__: FMC_NAND Bank
Kojto 109:9296ab0bfc11 802 * @param __INTERRUPT__: FMC_NAND interrupt
Kojto 109:9296ab0bfc11 803 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 804 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 109:9296ab0bfc11 805 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 109:9296ab0bfc11 806 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 109:9296ab0bfc11 807 * @retval None
Kojto 109:9296ab0bfc11 808 */
Kojto 109:9296ab0bfc11 809 #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \
Kojto 109:9296ab0bfc11 810 ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
Kojto 109:9296ab0bfc11 811
Kojto 109:9296ab0bfc11 812 /**
Kojto 109:9296ab0bfc11 813 * @brief Disable the NAND device interrupt.
Kojto 109:9296ab0bfc11 814 * @param __INSTANCE__: FMC_NAND Instance
Kojto 109:9296ab0bfc11 815 * @param __BANK__: FMC_NAND Bank
Kojto 109:9296ab0bfc11 816 * @param __INTERRUPT__: FMC_NAND interrupt
Kojto 109:9296ab0bfc11 817 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 818 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 109:9296ab0bfc11 819 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 109:9296ab0bfc11 820 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 109:9296ab0bfc11 821 * @retval None
Kojto 109:9296ab0bfc11 822 */
Kojto 109:9296ab0bfc11 823 #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \
Kojto 109:9296ab0bfc11 824 ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
Kojto 109:9296ab0bfc11 825
Kojto 109:9296ab0bfc11 826 /**
Kojto 109:9296ab0bfc11 827 * @brief Get flag status of the NAND device.
Kojto 109:9296ab0bfc11 828 * @param __INSTANCE__: FMC_NAND Instance
Kojto 109:9296ab0bfc11 829 * @param __BANK__: FMC_NAND Bank
Kojto 109:9296ab0bfc11 830 * @param __FLAG__: FMC_NAND flag
Kojto 109:9296ab0bfc11 831 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 832 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 109:9296ab0bfc11 833 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 109:9296ab0bfc11 834 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 109:9296ab0bfc11 835 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 109:9296ab0bfc11 836 * @retval The state of FLAG (SET or RESET).
Kojto 109:9296ab0bfc11 837 */
Kojto 109:9296ab0bfc11 838 #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \
Kojto 109:9296ab0bfc11 839 (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
Kojto 109:9296ab0bfc11 840 /**
Kojto 109:9296ab0bfc11 841 * @brief Clear flag status of the NAND device.
Kojto 109:9296ab0bfc11 842 * @param __INSTANCE__: FMC_NAND Instance
Kojto 109:9296ab0bfc11 843 * @param __BANK__: FMC_NAND Bank
Kojto 109:9296ab0bfc11 844 * @param __FLAG__: FMC_NAND flag
Kojto 109:9296ab0bfc11 845 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 846 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 109:9296ab0bfc11 847 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 109:9296ab0bfc11 848 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 109:9296ab0bfc11 849 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 109:9296ab0bfc11 850 * @retval None
Kojto 109:9296ab0bfc11 851 */
Kojto 109:9296ab0bfc11 852 #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \
Kojto 109:9296ab0bfc11 853 ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
Kojto 109:9296ab0bfc11 854 /**
Kojto 109:9296ab0bfc11 855 * @brief Enable the PCCARD device interrupt.
Kojto 109:9296ab0bfc11 856 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 109:9296ab0bfc11 857 * @param __INTERRUPT__: FMC_PCCARD interrupt
Kojto 109:9296ab0bfc11 858 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 859 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 109:9296ab0bfc11 860 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 109:9296ab0bfc11 861 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 109:9296ab0bfc11 862 * @retval None
Kojto 109:9296ab0bfc11 863 */
Kojto 109:9296ab0bfc11 864 #define __FMC_PCCARD_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 |= (__INTERRUPT__))
Kojto 109:9296ab0bfc11 865
Kojto 109:9296ab0bfc11 866 /**
Kojto 109:9296ab0bfc11 867 * @brief Disable the PCCARD device interrupt.
Kojto 109:9296ab0bfc11 868 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 109:9296ab0bfc11 869 * @param __INTERRUPT__: FMC_PCCARD interrupt
Kojto 109:9296ab0bfc11 870 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 871 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 109:9296ab0bfc11 872 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 109:9296ab0bfc11 873 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 109:9296ab0bfc11 874 * @retval None
Kojto 109:9296ab0bfc11 875 */
Kojto 109:9296ab0bfc11 876 #define __FMC_PCCARD_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 &= ~(__INTERRUPT__))
Kojto 109:9296ab0bfc11 877
Kojto 109:9296ab0bfc11 878 /**
Kojto 109:9296ab0bfc11 879 * @brief Get flag status of the PCCARD device.
Kojto 109:9296ab0bfc11 880 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 109:9296ab0bfc11 881 * @param __FLAG__: FMC_PCCARD flag
Kojto 109:9296ab0bfc11 882 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 883 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 109:9296ab0bfc11 884 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 109:9296ab0bfc11 885 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 109:9296ab0bfc11 886 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 109:9296ab0bfc11 887 * @retval The state of FLAG (SET or RESET).
Kojto 109:9296ab0bfc11 888 */
Kojto 109:9296ab0bfc11 889 #define __FMC_PCCARD_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SR4 &(__FLAG__)) == (__FLAG__))
Kojto 109:9296ab0bfc11 890
Kojto 109:9296ab0bfc11 891 /**
Kojto 109:9296ab0bfc11 892 * @brief Clear flag status of the PCCARD device.
Kojto 109:9296ab0bfc11 893 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 109:9296ab0bfc11 894 * @param __FLAG__: FMC_PCCARD flag
Kojto 109:9296ab0bfc11 895 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 896 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 109:9296ab0bfc11 897 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 109:9296ab0bfc11 898 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 109:9296ab0bfc11 899 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 109:9296ab0bfc11 900 * @retval None
Kojto 109:9296ab0bfc11 901 */
Kojto 109:9296ab0bfc11 902 #define __FMC_PCCARD_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR4 &= ~(__FLAG__))
Kojto 109:9296ab0bfc11 903
Kojto 109:9296ab0bfc11 904 /**
Kojto 109:9296ab0bfc11 905 * @}
Kojto 109:9296ab0bfc11 906 */
Kojto 109:9296ab0bfc11 907
Kojto 109:9296ab0bfc11 908 /* Exported functions --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 909
Kojto 109:9296ab0bfc11 910 /* FMC_NORSRAM Controller functions *******************************************/
Kojto 109:9296ab0bfc11 911 /* Initialization/de-initialization functions */
Kojto 109:9296ab0bfc11 912 HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init);
Kojto 109:9296ab0bfc11 913 HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
Kojto 109:9296ab0bfc11 914 HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode);
Kojto 109:9296ab0bfc11 915 HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
Kojto 109:9296ab0bfc11 916
Kojto 109:9296ab0bfc11 917 /* FMC_NORSRAM Control functions */
Kojto 109:9296ab0bfc11 918 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 109:9296ab0bfc11 919 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 109:9296ab0bfc11 920
Kojto 109:9296ab0bfc11 921 /* FMC_NAND Controller functions **********************************************/
Kojto 109:9296ab0bfc11 922 /* Initialization/de-initialization functions */
Kojto 109:9296ab0bfc11 923 HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init);
Kojto 109:9296ab0bfc11 924 HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 109:9296ab0bfc11 925 HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 109:9296ab0bfc11 926 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 109:9296ab0bfc11 927
Kojto 109:9296ab0bfc11 928 /* FMC_NAND Control functions */
Kojto 109:9296ab0bfc11 929 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 109:9296ab0bfc11 930 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 109:9296ab0bfc11 931 HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout);
Kojto 109:9296ab0bfc11 932
Kojto 109:9296ab0bfc11 933 /* FMC_PCCARD Controller functions ********************************************/
Kojto 109:9296ab0bfc11 934 /* Initialization/de-initialization functions */
Kojto 109:9296ab0bfc11 935 HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init);
Kojto 109:9296ab0bfc11 936 HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 109:9296ab0bfc11 937 HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 109:9296ab0bfc11 938 HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 109:9296ab0bfc11 939 HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device);
Kojto 109:9296ab0bfc11 940
Kojto 109:9296ab0bfc11 941 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
Kojto 109:9296ab0bfc11 942 /**
Kojto 109:9296ab0bfc11 943 * @}
Kojto 109:9296ab0bfc11 944 */
Kojto 109:9296ab0bfc11 945
Kojto 109:9296ab0bfc11 946 /**
Kojto 109:9296ab0bfc11 947 * @}
Kojto 109:9296ab0bfc11 948 */
Kojto 109:9296ab0bfc11 949
Kojto 109:9296ab0bfc11 950 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 951 }
Kojto 109:9296ab0bfc11 952 #endif
Kojto 109:9296ab0bfc11 953
Kojto 109:9296ab0bfc11 954 #endif /* __STM32F3xx_LL_FMC_H */
Kojto 109:9296ab0bfc11 955
Kojto 109:9296ab0bfc11 956 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/