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TARGET_NUCLEO_F746ZG/stm32f7xx_hal_qspi.h@115:87f2f5183dfb, 2016-03-02 (annotated)
- Committer:
- Kojto
- Date:
- Wed Mar 02 09:58:28 2016 +0100
- Revision:
- 115:87f2f5183dfb
- Child:
- 116:c0f6e94411f5
Release 115 of the mbed library
Changes:
- new targets - NUCLEO_F746ZG
- Bugfix - STM32F7 + STM32L4 - RTC init fix
- Bugfix - STM32L4 Set NVIC_RAM_VECTOR_ADDRESS to 0x10000000
- B96B_F446VE - CAN addition
- Changed target name from NZ32SC151 to NZ32_SC151
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 115:87f2f5183dfb | 1 | /** |
| Kojto | 115:87f2f5183dfb | 2 | ****************************************************************************** |
| Kojto | 115:87f2f5183dfb | 3 | * @file stm32f7xx_hal_qspi.h |
| Kojto | 115:87f2f5183dfb | 4 | * @author MCD Application Team |
| Kojto | 115:87f2f5183dfb | 5 | * @version V1.0.1 |
| Kojto | 115:87f2f5183dfb | 6 | * @date 25-June-2015 |
| Kojto | 115:87f2f5183dfb | 7 | * @brief Header file of QSPI HAL module. |
| Kojto | 115:87f2f5183dfb | 8 | ****************************************************************************** |
| Kojto | 115:87f2f5183dfb | 9 | * @attention |
| Kojto | 115:87f2f5183dfb | 10 | * |
| Kojto | 115:87f2f5183dfb | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| Kojto | 115:87f2f5183dfb | 12 | * |
| Kojto | 115:87f2f5183dfb | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 115:87f2f5183dfb | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 115:87f2f5183dfb | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 115:87f2f5183dfb | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 115:87f2f5183dfb | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 115:87f2f5183dfb | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 115:87f2f5183dfb | 19 | * and/or other materials provided with the distribution. |
| Kojto | 115:87f2f5183dfb | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 115:87f2f5183dfb | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 115:87f2f5183dfb | 22 | * without specific prior written permission. |
| Kojto | 115:87f2f5183dfb | 23 | * |
| Kojto | 115:87f2f5183dfb | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 115:87f2f5183dfb | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 115:87f2f5183dfb | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 115:87f2f5183dfb | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 115:87f2f5183dfb | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 115:87f2f5183dfb | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 115:87f2f5183dfb | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 115:87f2f5183dfb | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 115:87f2f5183dfb | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 115:87f2f5183dfb | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 115:87f2f5183dfb | 34 | * |
| Kojto | 115:87f2f5183dfb | 35 | ****************************************************************************** |
| Kojto | 115:87f2f5183dfb | 36 | */ |
| Kojto | 115:87f2f5183dfb | 37 | |
| Kojto | 115:87f2f5183dfb | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 39 | #ifndef __STM32F7xx_HAL_QSPI_H |
| Kojto | 115:87f2f5183dfb | 40 | #define __STM32F7xx_HAL_QSPI_H |
| Kojto | 115:87f2f5183dfb | 41 | |
| Kojto | 115:87f2f5183dfb | 42 | #ifdef __cplusplus |
| Kojto | 115:87f2f5183dfb | 43 | extern "C" { |
| Kojto | 115:87f2f5183dfb | 44 | #endif |
| Kojto | 115:87f2f5183dfb | 45 | |
| Kojto | 115:87f2f5183dfb | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 47 | #include "stm32f7xx_hal_def.h" |
| Kojto | 115:87f2f5183dfb | 48 | |
| Kojto | 115:87f2f5183dfb | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| Kojto | 115:87f2f5183dfb | 50 | * @{ |
| Kojto | 115:87f2f5183dfb | 51 | */ |
| Kojto | 115:87f2f5183dfb | 52 | |
| Kojto | 115:87f2f5183dfb | 53 | /** @addtogroup QSPI |
| Kojto | 115:87f2f5183dfb | 54 | * @{ |
| Kojto | 115:87f2f5183dfb | 55 | */ |
| Kojto | 115:87f2f5183dfb | 56 | |
| Kojto | 115:87f2f5183dfb | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 58 | /** @defgroup QSPI_Exported_Types QSPI Exported Types |
| Kojto | 115:87f2f5183dfb | 59 | * @{ |
| Kojto | 115:87f2f5183dfb | 60 | */ |
| Kojto | 115:87f2f5183dfb | 61 | |
| Kojto | 115:87f2f5183dfb | 62 | /** |
| Kojto | 115:87f2f5183dfb | 63 | * @brief QSPI Init structure definition |
| Kojto | 115:87f2f5183dfb | 64 | */ |
| Kojto | 115:87f2f5183dfb | 65 | |
| Kojto | 115:87f2f5183dfb | 66 | typedef struct |
| Kojto | 115:87f2f5183dfb | 67 | { |
| Kojto | 115:87f2f5183dfb | 68 | uint32_t ClockPrescaler; /* Specifies the prescaler factor for generating clock based on the AHB clock. |
| Kojto | 115:87f2f5183dfb | 69 | This parameter can be a number between 0 and 255 */ |
| Kojto | 115:87f2f5183dfb | 70 | |
| Kojto | 115:87f2f5183dfb | 71 | uint32_t FifoThreshold; /* Specifies the threshold number of bytes in the FIFO (used only in indirect mode) |
| Kojto | 115:87f2f5183dfb | 72 | This parameter can be a value between 1 and 32 */ |
| Kojto | 115:87f2f5183dfb | 73 | |
| Kojto | 115:87f2f5183dfb | 74 | uint32_t SampleShifting; /* Specifies the Sample Shift. The data is sampled 1/2 clock cycle delay later to |
| Kojto | 115:87f2f5183dfb | 75 | take in account external signal delays. (It should be QSPI_SAMPLE_SHIFTING_NONE in DDR mode) |
| Kojto | 115:87f2f5183dfb | 76 | This parameter can be a value of @ref QSPI_SampleShifting */ |
| Kojto | 115:87f2f5183dfb | 77 | |
| Kojto | 115:87f2f5183dfb | 78 | uint32_t FlashSize; /* Specifies the Flash Size. FlashSize+1 is effectively the number of address bits |
| Kojto | 115:87f2f5183dfb | 79 | required to address the flash memory. The flash capacity can be up to 4GB |
| Kojto | 115:87f2f5183dfb | 80 | (addressed using 32 bits) in indirect mode, but the addressable space in |
| Kojto | 115:87f2f5183dfb | 81 | memory-mapped mode is limited to 256MB |
| Kojto | 115:87f2f5183dfb | 82 | This parameter can be a number between 0 and 31 */ |
| Kojto | 115:87f2f5183dfb | 83 | |
| Kojto | 115:87f2f5183dfb | 84 | uint32_t ChipSelectHighTime; /* Specifies the Chip Select High Time. ChipSelectHighTime+1 defines the minimum number |
| Kojto | 115:87f2f5183dfb | 85 | of clock cycles which the chip select must remain high between commands. |
| Kojto | 115:87f2f5183dfb | 86 | This parameter can be a value of @ref QSPI_ChipSelectHighTime */ |
| Kojto | 115:87f2f5183dfb | 87 | |
| Kojto | 115:87f2f5183dfb | 88 | uint32_t ClockMode; /* Specifies the Clock Mode. It indicates the level that clock takes between commands. |
| Kojto | 115:87f2f5183dfb | 89 | This parameter can be a value of @ref QSPI_ClockMode */ |
| Kojto | 115:87f2f5183dfb | 90 | |
| Kojto | 115:87f2f5183dfb | 91 | uint32_t FlashID; /* Specifies the Flash which will be used, |
| Kojto | 115:87f2f5183dfb | 92 | This parameter can be a value of @ref QSPI_Flash_Select */ |
| Kojto | 115:87f2f5183dfb | 93 | |
| Kojto | 115:87f2f5183dfb | 94 | uint32_t DualFlash; /* Specifies the Dual Flash Mode State |
| Kojto | 115:87f2f5183dfb | 95 | This parameter can be a value of @ref QSPI_DualFlash_Mode */ |
| Kojto | 115:87f2f5183dfb | 96 | }QSPI_InitTypeDef; |
| Kojto | 115:87f2f5183dfb | 97 | |
| Kojto | 115:87f2f5183dfb | 98 | /** |
| Kojto | 115:87f2f5183dfb | 99 | * @brief HAL QSPI State structures definition |
| Kojto | 115:87f2f5183dfb | 100 | */ |
| Kojto | 115:87f2f5183dfb | 101 | typedef enum |
| Kojto | 115:87f2f5183dfb | 102 | { |
| Kojto | 115:87f2f5183dfb | 103 | HAL_QSPI_STATE_RESET = 0x00, /*!< Peripheral not initialized */ |
| Kojto | 115:87f2f5183dfb | 104 | HAL_QSPI_STATE_READY = 0x01, /*!< Peripheral initialized and ready for use */ |
| Kojto | 115:87f2f5183dfb | 105 | HAL_QSPI_STATE_BUSY = 0x02, /*!< Peripheral in indirect mode and busy */ |
| Kojto | 115:87f2f5183dfb | 106 | HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12, /*!< Peripheral in indirect mode with transmission ongoing */ |
| Kojto | 115:87f2f5183dfb | 107 | HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22, /*!< Peripheral in indirect mode with reception ongoing */ |
| Kojto | 115:87f2f5183dfb | 108 | HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42, /*!< Peripheral in auto polling mode ongoing */ |
| Kojto | 115:87f2f5183dfb | 109 | HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82, /*!< Peripheral in memory mapped mode ongoing */ |
| Kojto | 115:87f2f5183dfb | 110 | HAL_QSPI_STATE_ERROR = 0x04 /*!< Peripheral in error */ |
| Kojto | 115:87f2f5183dfb | 111 | }HAL_QSPI_StateTypeDef; |
| Kojto | 115:87f2f5183dfb | 112 | |
| Kojto | 115:87f2f5183dfb | 113 | /** |
| Kojto | 115:87f2f5183dfb | 114 | * @brief QSPI Handle Structure definition |
| Kojto | 115:87f2f5183dfb | 115 | */ |
| Kojto | 115:87f2f5183dfb | 116 | typedef struct |
| Kojto | 115:87f2f5183dfb | 117 | { |
| Kojto | 115:87f2f5183dfb | 118 | QUADSPI_TypeDef *Instance; /* QSPI registers base address */ |
| Kojto | 115:87f2f5183dfb | 119 | QSPI_InitTypeDef Init; /* QSPI communication parameters */ |
| Kojto | 115:87f2f5183dfb | 120 | uint8_t *pTxBuffPtr; /* Pointer to QSPI Tx transfer Buffer */ |
| Kojto | 115:87f2f5183dfb | 121 | __IO uint16_t TxXferSize; /* QSPI Tx Transfer size */ |
| Kojto | 115:87f2f5183dfb | 122 | __IO uint16_t TxXferCount; /* QSPI Tx Transfer Counter */ |
| Kojto | 115:87f2f5183dfb | 123 | uint8_t *pRxBuffPtr; /* Pointer to QSPI Rx transfer Buffer */ |
| Kojto | 115:87f2f5183dfb | 124 | __IO uint16_t RxXferSize; /* QSPI Rx Transfer size */ |
| Kojto | 115:87f2f5183dfb | 125 | __IO uint16_t RxXferCount; /* QSPI Rx Transfer Counter */ |
| Kojto | 115:87f2f5183dfb | 126 | DMA_HandleTypeDef *hdma; /* QSPI Rx/Tx DMA Handle parameters */ |
| Kojto | 115:87f2f5183dfb | 127 | __IO HAL_LockTypeDef Lock; /* Locking object */ |
| Kojto | 115:87f2f5183dfb | 128 | __IO HAL_QSPI_StateTypeDef State; /* QSPI communication state */ |
| Kojto | 115:87f2f5183dfb | 129 | __IO uint32_t ErrorCode; /* QSPI Error code */ |
| Kojto | 115:87f2f5183dfb | 130 | uint32_t Timeout; /* Timeout for the QSPI memory access */ |
| Kojto | 115:87f2f5183dfb | 131 | }QSPI_HandleTypeDef; |
| Kojto | 115:87f2f5183dfb | 132 | |
| Kojto | 115:87f2f5183dfb | 133 | /** |
| Kojto | 115:87f2f5183dfb | 134 | * @brief QSPI Command structure definition |
| Kojto | 115:87f2f5183dfb | 135 | */ |
| Kojto | 115:87f2f5183dfb | 136 | typedef struct |
| Kojto | 115:87f2f5183dfb | 137 | { |
| Kojto | 115:87f2f5183dfb | 138 | uint32_t Instruction; /* Specifies the Instruction to be sent |
| Kojto | 115:87f2f5183dfb | 139 | This parameter can be a value (8-bit) between 0x00 and 0xFF */ |
| Kojto | 115:87f2f5183dfb | 140 | uint32_t Address; /* Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize) |
| Kojto | 115:87f2f5183dfb | 141 | This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */ |
| Kojto | 115:87f2f5183dfb | 142 | uint32_t AlternateBytes; /* Specifies the Alternate Bytes to be sent (Size from 1 to 4 bytes according AlternateBytesSize) |
| Kojto | 115:87f2f5183dfb | 143 | This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */ |
| Kojto | 115:87f2f5183dfb | 144 | uint32_t AddressSize; /* Specifies the Address Size |
| Kojto | 115:87f2f5183dfb | 145 | This parameter can be a value of @ref QSPI_AddressSize */ |
| Kojto | 115:87f2f5183dfb | 146 | uint32_t AlternateBytesSize; /* Specifies the Alternate Bytes Size |
| Kojto | 115:87f2f5183dfb | 147 | This parameter can be a value of @ref QSPI_AlternateBytesSize */ |
| Kojto | 115:87f2f5183dfb | 148 | uint32_t DummyCycles; /* Specifies the Number of Dummy Cycles. |
| Kojto | 115:87f2f5183dfb | 149 | This parameter can be a number between 0 and 31 */ |
| Kojto | 115:87f2f5183dfb | 150 | uint32_t InstructionMode; /* Specifies the Instruction Mode |
| Kojto | 115:87f2f5183dfb | 151 | This parameter can be a value of @ref QSPI_InstructionMode */ |
| Kojto | 115:87f2f5183dfb | 152 | uint32_t AddressMode; /* Specifies the Address Mode |
| Kojto | 115:87f2f5183dfb | 153 | This parameter can be a value of @ref QSPI_AddressMode */ |
| Kojto | 115:87f2f5183dfb | 154 | uint32_t AlternateByteMode; /* Specifies the Alternate Bytes Mode |
| Kojto | 115:87f2f5183dfb | 155 | This parameter can be a value of @ref QSPI_AlternateBytesMode */ |
| Kojto | 115:87f2f5183dfb | 156 | uint32_t DataMode; /* Specifies the Data Mode (used for dummy cycles and data phases) |
| Kojto | 115:87f2f5183dfb | 157 | This parameter can be a value of @ref QSPI_DataMode */ |
| Kojto | 115:87f2f5183dfb | 158 | uint32_t NbData; /* Specifies the number of data to transfer. |
| Kojto | 115:87f2f5183dfb | 159 | This parameter can be any value between 0 and 0xFFFFFFFF (0 means undefined length |
| Kojto | 115:87f2f5183dfb | 160 | until end of memory)*/ |
| Kojto | 115:87f2f5183dfb | 161 | uint32_t DdrMode; /* Specifies the double data rate mode for address, alternate byte and data phase |
| Kojto | 115:87f2f5183dfb | 162 | This parameter can be a value of @ref QSPI_DdrMode */ |
| Kojto | 115:87f2f5183dfb | 163 | uint32_t DdrHoldHalfCycle; /* Specifies the DDR hold half cycle. It delays the data output by one half of |
| Kojto | 115:87f2f5183dfb | 164 | system clock in DDR mode. |
| Kojto | 115:87f2f5183dfb | 165 | This parameter can be a value of @ref QSPI_DdrHoldHalfCycle */ |
| Kojto | 115:87f2f5183dfb | 166 | uint32_t SIOOMode; /* Specifies the send instruction only once mode |
| Kojto | 115:87f2f5183dfb | 167 | This parameter can be a value of @ref QSPI_SIOOMode */ |
| Kojto | 115:87f2f5183dfb | 168 | }QSPI_CommandTypeDef; |
| Kojto | 115:87f2f5183dfb | 169 | |
| Kojto | 115:87f2f5183dfb | 170 | /** |
| Kojto | 115:87f2f5183dfb | 171 | * @brief QSPI Auto Polling mode configuration structure definition |
| Kojto | 115:87f2f5183dfb | 172 | */ |
| Kojto | 115:87f2f5183dfb | 173 | typedef struct |
| Kojto | 115:87f2f5183dfb | 174 | { |
| Kojto | 115:87f2f5183dfb | 175 | uint32_t Match; /* Specifies the value to be compared with the masked status register to get a match. |
| Kojto | 115:87f2f5183dfb | 176 | This parameter can be any value between 0 and 0xFFFFFFFF */ |
| Kojto | 115:87f2f5183dfb | 177 | uint32_t Mask; /* Specifies the mask to be applied to the status bytes received. |
| Kojto | 115:87f2f5183dfb | 178 | This parameter can be any value between 0 and 0xFFFFFFFF */ |
| Kojto | 115:87f2f5183dfb | 179 | uint32_t Interval; /* Specifies the number of clock cycles between two read during automatic polling phases. |
| Kojto | 115:87f2f5183dfb | 180 | This parameter can be any value between 0 and 0xFFFF */ |
| Kojto | 115:87f2f5183dfb | 181 | uint32_t StatusBytesSize; /* Specifies the size of the status bytes received. |
| Kojto | 115:87f2f5183dfb | 182 | This parameter can be any value between 1 and 4 */ |
| Kojto | 115:87f2f5183dfb | 183 | uint32_t MatchMode; /* Specifies the method used for determining a match. |
| Kojto | 115:87f2f5183dfb | 184 | This parameter can be a value of @ref QSPI_MatchMode */ |
| Kojto | 115:87f2f5183dfb | 185 | uint32_t AutomaticStop; /* Specifies if automatic polling is stopped after a match. |
| Kojto | 115:87f2f5183dfb | 186 | This parameter can be a value of @ref QSPI_AutomaticStop */ |
| Kojto | 115:87f2f5183dfb | 187 | }QSPI_AutoPollingTypeDef; |
| Kojto | 115:87f2f5183dfb | 188 | |
| Kojto | 115:87f2f5183dfb | 189 | /** |
| Kojto | 115:87f2f5183dfb | 190 | * @brief QSPI Memory Mapped mode configuration structure definition |
| Kojto | 115:87f2f5183dfb | 191 | */ |
| Kojto | 115:87f2f5183dfb | 192 | typedef struct |
| Kojto | 115:87f2f5183dfb | 193 | { |
| Kojto | 115:87f2f5183dfb | 194 | uint32_t TimeOutPeriod; /* Specifies the number of clock to wait when the FIFO is full before to release the chip select. |
| Kojto | 115:87f2f5183dfb | 195 | This parameter can be any value between 0 and 0xFFFF */ |
| Kojto | 115:87f2f5183dfb | 196 | uint32_t TimeOutActivation; /* Specifies if the time out counter is enabled to release the chip select. |
| Kojto | 115:87f2f5183dfb | 197 | This parameter can be a value of @ref QSPI_TimeOutActivation */ |
| Kojto | 115:87f2f5183dfb | 198 | }QSPI_MemoryMappedTypeDef; |
| Kojto | 115:87f2f5183dfb | 199 | /** |
| Kojto | 115:87f2f5183dfb | 200 | * @} |
| Kojto | 115:87f2f5183dfb | 201 | */ |
| Kojto | 115:87f2f5183dfb | 202 | |
| Kojto | 115:87f2f5183dfb | 203 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 204 | /** @defgroup QSPI_Exported_Constants QSPI Exported Constants |
| Kojto | 115:87f2f5183dfb | 205 | * @{ |
| Kojto | 115:87f2f5183dfb | 206 | */ |
| Kojto | 115:87f2f5183dfb | 207 | /** @defgroup QSPI_ErrorCode QSPI Error Code |
| Kojto | 115:87f2f5183dfb | 208 | * @{ |
| Kojto | 115:87f2f5183dfb | 209 | */ |
| Kojto | 115:87f2f5183dfb | 210 | #define HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| Kojto | 115:87f2f5183dfb | 211 | #define HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */ |
| Kojto | 115:87f2f5183dfb | 212 | #define HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /*!< Transfer error */ |
| Kojto | 115:87f2f5183dfb | 213 | #define HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) /*!< DMA transfer error */ |
| Kojto | 115:87f2f5183dfb | 214 | /** |
| Kojto | 115:87f2f5183dfb | 215 | * @} |
| Kojto | 115:87f2f5183dfb | 216 | */ |
| Kojto | 115:87f2f5183dfb | 217 | |
| Kojto | 115:87f2f5183dfb | 218 | /** @defgroup QSPI_SampleShifting QSPI Sample Shifting |
| Kojto | 115:87f2f5183dfb | 219 | * @{ |
| Kojto | 115:87f2f5183dfb | 220 | */ |
| Kojto | 115:87f2f5183dfb | 221 | #define QSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000) /*!<No clock cycle shift to sample data*/ |
| Kojto | 115:87f2f5183dfb | 222 | #define QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT) /*!<1/2 clock cycle shift to sample data*/ |
| Kojto | 115:87f2f5183dfb | 223 | /** |
| Kojto | 115:87f2f5183dfb | 224 | * @} |
| Kojto | 115:87f2f5183dfb | 225 | */ |
| Kojto | 115:87f2f5183dfb | 226 | |
| Kojto | 115:87f2f5183dfb | 227 | /** @defgroup QSPI_ChipSelectHighTime QSPI Chip Select High Time |
| Kojto | 115:87f2f5183dfb | 228 | * @{ |
| Kojto | 115:87f2f5183dfb | 229 | */ |
| Kojto | 115:87f2f5183dfb | 230 | #define QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000) /*!<nCS stay high for at least 1 clock cycle between commands*/ |
| Kojto | 115:87f2f5183dfb | 231 | #define QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 2 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 232 | #define QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 3 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 233 | #define QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 4 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 234 | #define QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2) /*!<nCS stay high for at least 5 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 235 | #define QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 6 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 236 | #define QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 7 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 237 | #define QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT) /*!<nCS stay high for at least 8 clock cycles between commands*/ |
| Kojto | 115:87f2f5183dfb | 238 | /** |
| Kojto | 115:87f2f5183dfb | 239 | * @} |
| Kojto | 115:87f2f5183dfb | 240 | */ |
| Kojto | 115:87f2f5183dfb | 241 | |
| Kojto | 115:87f2f5183dfb | 242 | /** @defgroup QSPI_ClockMode QSPI Clock Mode |
| Kojto | 115:87f2f5183dfb | 243 | * @{ |
| Kojto | 115:87f2f5183dfb | 244 | */ |
| Kojto | 115:87f2f5183dfb | 245 | #define QSPI_CLOCK_MODE_0 ((uint32_t)0x00000000) /*!<Clk stays low while nCS is released*/ |
| Kojto | 115:87f2f5183dfb | 246 | #define QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) /*!<Clk goes high while nCS is released*/ |
| Kojto | 115:87f2f5183dfb | 247 | /** |
| Kojto | 115:87f2f5183dfb | 248 | * @} |
| Kojto | 115:87f2f5183dfb | 249 | */ |
| Kojto | 115:87f2f5183dfb | 250 | |
| Kojto | 115:87f2f5183dfb | 251 | /** @defgroup QSPI_Flash_Select QSPI Flash Select |
| Kojto | 115:87f2f5183dfb | 252 | * @{ |
| Kojto | 115:87f2f5183dfb | 253 | */ |
| Kojto | 115:87f2f5183dfb | 254 | #define QSPI_FLASH_ID_1 ((uint32_t)0x00000000) |
| Kojto | 115:87f2f5183dfb | 255 | #define QSPI_FLASH_ID_2 ((uint32_t)QUADSPI_CR_FSEL) |
| Kojto | 115:87f2f5183dfb | 256 | /** |
| Kojto | 115:87f2f5183dfb | 257 | * @} |
| Kojto | 115:87f2f5183dfb | 258 | */ |
| Kojto | 115:87f2f5183dfb | 259 | |
| Kojto | 115:87f2f5183dfb | 260 | /** @defgroup QSPI_DualFlash_Mode QSPI Dual Flash Mode |
| Kojto | 115:87f2f5183dfb | 261 | * @{ |
| Kojto | 115:87f2f5183dfb | 262 | */ |
| Kojto | 115:87f2f5183dfb | 263 | #define QSPI_DUALFLASH_ENABLE ((uint32_t)QUADSPI_CR_DFM) |
| Kojto | 115:87f2f5183dfb | 264 | #define QSPI_DUALFLASH_DISABLE ((uint32_t)0x00000000) |
| Kojto | 115:87f2f5183dfb | 265 | /** |
| Kojto | 115:87f2f5183dfb | 266 | * @} |
| Kojto | 115:87f2f5183dfb | 267 | */ |
| Kojto | 115:87f2f5183dfb | 268 | |
| Kojto | 115:87f2f5183dfb | 269 | /** @defgroup QSPI_AddressSize QSPI Address Size |
| Kojto | 115:87f2f5183dfb | 270 | * @{ |
| Kojto | 115:87f2f5183dfb | 271 | */ |
| Kojto | 115:87f2f5183dfb | 272 | #define QSPI_ADDRESS_8_BITS ((uint32_t)0x00000000) /*!<8-bit address*/ |
| Kojto | 115:87f2f5183dfb | 273 | #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/ |
| Kojto | 115:87f2f5183dfb | 274 | #define QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1) /*!<24-bit address*/ |
| Kojto | 115:87f2f5183dfb | 275 | #define QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE) /*!<32-bit address*/ |
| Kojto | 115:87f2f5183dfb | 276 | /** |
| Kojto | 115:87f2f5183dfb | 277 | * @} |
| Kojto | 115:87f2f5183dfb | 278 | */ |
| Kojto | 115:87f2f5183dfb | 279 | |
| Kojto | 115:87f2f5183dfb | 280 | /** @defgroup QSPI_AlternateBytesSize QSPI Alternate Bytes Size |
| Kojto | 115:87f2f5183dfb | 281 | * @{ |
| Kojto | 115:87f2f5183dfb | 282 | */ |
| Kojto | 115:87f2f5183dfb | 283 | #define QSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000) /*!<8-bit alternate bytes*/ |
| Kojto | 115:87f2f5183dfb | 284 | #define QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0) /*!<16-bit alternate bytes*/ |
| Kojto | 115:87f2f5183dfb | 285 | #define QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1) /*!<24-bit alternate bytes*/ |
| Kojto | 115:87f2f5183dfb | 286 | #define QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE) /*!<32-bit alternate bytes*/ |
| Kojto | 115:87f2f5183dfb | 287 | /** |
| Kojto | 115:87f2f5183dfb | 288 | * @} |
| Kojto | 115:87f2f5183dfb | 289 | */ |
| Kojto | 115:87f2f5183dfb | 290 | |
| Kojto | 115:87f2f5183dfb | 291 | /** @defgroup QSPI_InstructionMode QSPI Instruction Mode |
| Kojto | 115:87f2f5183dfb | 292 | * @{ |
| Kojto | 115:87f2f5183dfb | 293 | */ |
| Kojto | 115:87f2f5183dfb | 294 | #define QSPI_INSTRUCTION_NONE ((uint32_t)0x00000000) /*!<No instruction*/ |
| Kojto | 115:87f2f5183dfb | 295 | #define QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0) /*!<Instruction on a single line*/ |
| Kojto | 115:87f2f5183dfb | 296 | #define QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1) /*!<Instruction on two lines*/ |
| Kojto | 115:87f2f5183dfb | 297 | #define QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE) /*!<Instruction on four lines*/ |
| Kojto | 115:87f2f5183dfb | 298 | /** |
| Kojto | 115:87f2f5183dfb | 299 | * @} |
| Kojto | 115:87f2f5183dfb | 300 | */ |
| Kojto | 115:87f2f5183dfb | 301 | |
| Kojto | 115:87f2f5183dfb | 302 | /** @defgroup QSPI_AddressMode QSPI Address Mode |
| Kojto | 115:87f2f5183dfb | 303 | * @{ |
| Kojto | 115:87f2f5183dfb | 304 | */ |
| Kojto | 115:87f2f5183dfb | 305 | #define QSPI_ADDRESS_NONE ((uint32_t)0x00000000) /*!<No address*/ |
| Kojto | 115:87f2f5183dfb | 306 | #define QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0) /*!<Address on a single line*/ |
| Kojto | 115:87f2f5183dfb | 307 | #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/ |
| Kojto | 115:87f2f5183dfb | 308 | #define QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE) /*!<Address on four lines*/ |
| Kojto | 115:87f2f5183dfb | 309 | /** |
| Kojto | 115:87f2f5183dfb | 310 | * @} |
| Kojto | 115:87f2f5183dfb | 311 | */ |
| Kojto | 115:87f2f5183dfb | 312 | |
| Kojto | 115:87f2f5183dfb | 313 | /** @defgroup QSPI_AlternateBytesMode QSPI Alternate Bytes Mode |
| Kojto | 115:87f2f5183dfb | 314 | * @{ |
| Kojto | 115:87f2f5183dfb | 315 | */ |
| Kojto | 115:87f2f5183dfb | 316 | #define QSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000) /*!<No alternate bytes*/ |
| Kojto | 115:87f2f5183dfb | 317 | #define QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0) /*!<Alternate bytes on a single line*/ |
| Kojto | 115:87f2f5183dfb | 318 | #define QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1) /*!<Alternate bytes on two lines*/ |
| Kojto | 115:87f2f5183dfb | 319 | #define QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE) /*!<Alternate bytes on four lines*/ |
| Kojto | 115:87f2f5183dfb | 320 | /** |
| Kojto | 115:87f2f5183dfb | 321 | * @} |
| Kojto | 115:87f2f5183dfb | 322 | */ |
| Kojto | 115:87f2f5183dfb | 323 | |
| Kojto | 115:87f2f5183dfb | 324 | /** @defgroup QSPI_DataMode QSPI Data Mode |
| Kojto | 115:87f2f5183dfb | 325 | * @{ |
| Kojto | 115:87f2f5183dfb | 326 | */ |
| Kojto | 115:87f2f5183dfb | 327 | #define QSPI_DATA_NONE ((uint32_t)0X00000000) /*!<No data*/ |
| Kojto | 115:87f2f5183dfb | 328 | #define QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0) /*!<Data on a single line*/ |
| Kojto | 115:87f2f5183dfb | 329 | #define QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1) /*!<Data on two lines*/ |
| Kojto | 115:87f2f5183dfb | 330 | #define QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE) /*!<Data on four lines*/ |
| Kojto | 115:87f2f5183dfb | 331 | /** |
| Kojto | 115:87f2f5183dfb | 332 | * @} |
| Kojto | 115:87f2f5183dfb | 333 | */ |
| Kojto | 115:87f2f5183dfb | 334 | |
| Kojto | 115:87f2f5183dfb | 335 | /** @defgroup QSPI_DdrMode QSPI Ddr Mode |
| Kojto | 115:87f2f5183dfb | 336 | * @{ |
| Kojto | 115:87f2f5183dfb | 337 | */ |
| Kojto | 115:87f2f5183dfb | 338 | #define QSPI_DDR_MODE_DISABLE ((uint32_t)0x00000000) /*!<Double data rate mode disabled*/ |
| Kojto | 115:87f2f5183dfb | 339 | #define QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM) /*!<Double data rate mode enabled*/ |
| Kojto | 115:87f2f5183dfb | 340 | /** |
| Kojto | 115:87f2f5183dfb | 341 | * @} |
| Kojto | 115:87f2f5183dfb | 342 | */ |
| Kojto | 115:87f2f5183dfb | 343 | |
| Kojto | 115:87f2f5183dfb | 344 | /** @defgroup QSPI_DdrHoldHalfCycle QSPI Ddr HoldHalfCycle |
| Kojto | 115:87f2f5183dfb | 345 | * @{ |
| Kojto | 115:87f2f5183dfb | 346 | */ |
| Kojto | 115:87f2f5183dfb | 347 | #define QSPI_DDR_HHC_ANALOG_DELAY ((uint32_t)0x00000000) /*!<Delay the data output using analog delay in DDR mode*/ |
| Kojto | 115:87f2f5183dfb | 348 | #define QSPI_DDR_HHC_HALF_CLK_DELAY ((uint32_t)QUADSPI_CCR_DHHC) /*!<Delay the data output by 1/2 clock cycle in DDR mode*/ |
| Kojto | 115:87f2f5183dfb | 349 | /** |
| Kojto | 115:87f2f5183dfb | 350 | * @} |
| Kojto | 115:87f2f5183dfb | 351 | */ |
| Kojto | 115:87f2f5183dfb | 352 | |
| Kojto | 115:87f2f5183dfb | 353 | /** @defgroup QSPI_SIOOMode QSPI SIOO Mode |
| Kojto | 115:87f2f5183dfb | 354 | * @{ |
| Kojto | 115:87f2f5183dfb | 355 | */ |
| Kojto | 115:87f2f5183dfb | 356 | #define QSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000) /*!<Send instruction on every transaction*/ |
| Kojto | 115:87f2f5183dfb | 357 | #define QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO) /*!<Send instruction only for the first command*/ |
| Kojto | 115:87f2f5183dfb | 358 | /** |
| Kojto | 115:87f2f5183dfb | 359 | * @} |
| Kojto | 115:87f2f5183dfb | 360 | */ |
| Kojto | 115:87f2f5183dfb | 361 | |
| Kojto | 115:87f2f5183dfb | 362 | /** @defgroup QSPI_MatchMode QSPI Match Mode |
| Kojto | 115:87f2f5183dfb | 363 | * @{ |
| Kojto | 115:87f2f5183dfb | 364 | */ |
| Kojto | 115:87f2f5183dfb | 365 | #define QSPI_MATCH_MODE_AND ((uint32_t)0x00000000) /*!<AND match mode between unmasked bits*/ |
| Kojto | 115:87f2f5183dfb | 366 | #define QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM) /*!<OR match mode between unmasked bits*/ |
| Kojto | 115:87f2f5183dfb | 367 | /** |
| Kojto | 115:87f2f5183dfb | 368 | * @} |
| Kojto | 115:87f2f5183dfb | 369 | */ |
| Kojto | 115:87f2f5183dfb | 370 | |
| Kojto | 115:87f2f5183dfb | 371 | /** @defgroup QSPI_AutomaticStop QSPI Automatic Stop |
| Kojto | 115:87f2f5183dfb | 372 | * @{ |
| Kojto | 115:87f2f5183dfb | 373 | */ |
| Kojto | 115:87f2f5183dfb | 374 | #define QSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000) /*!<AutoPolling stops only with abort or QSPI disabling*/ |
| Kojto | 115:87f2f5183dfb | 375 | #define QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS) /*!<AutoPolling stops as soon as there is a match*/ |
| Kojto | 115:87f2f5183dfb | 376 | /** |
| Kojto | 115:87f2f5183dfb | 377 | * @} |
| Kojto | 115:87f2f5183dfb | 378 | */ |
| Kojto | 115:87f2f5183dfb | 379 | |
| Kojto | 115:87f2f5183dfb | 380 | /** @defgroup QSPI_TimeOutActivation QSPI TimeOut Activation |
| Kojto | 115:87f2f5183dfb | 381 | * @{ |
| Kojto | 115:87f2f5183dfb | 382 | */ |
| Kojto | 115:87f2f5183dfb | 383 | #define QSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000) /*!<Timeout counter disabled, nCS remains active*/ |
| Kojto | 115:87f2f5183dfb | 384 | #define QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN) /*!<Timeout counter enabled, nCS released when timeout expires*/ |
| Kojto | 115:87f2f5183dfb | 385 | /** |
| Kojto | 115:87f2f5183dfb | 386 | * @} |
| Kojto | 115:87f2f5183dfb | 387 | */ |
| Kojto | 115:87f2f5183dfb | 388 | |
| Kojto | 115:87f2f5183dfb | 389 | /** @defgroup QSPI_Flags QSPI Flags |
| Kojto | 115:87f2f5183dfb | 390 | * @{ |
| Kojto | 115:87f2f5183dfb | 391 | */ |
| Kojto | 115:87f2f5183dfb | 392 | #define QSPI_FLAG_BUSY QUADSPI_SR_BUSY /*!<Busy flag: operation is ongoing*/ |
| Kojto | 115:87f2f5183dfb | 393 | #define QSPI_FLAG_TO QUADSPI_SR_TOF /*!<Timeout flag: timeout occurs in memory-mapped mode*/ |
| Kojto | 115:87f2f5183dfb | 394 | #define QSPI_FLAG_SM QUADSPI_SR_SMF /*!<Status match flag: received data matches in autopolling mode*/ |
| Kojto | 115:87f2f5183dfb | 395 | #define QSPI_FLAG_FT QUADSPI_SR_FTF /*!<Fifo threshold flag: Fifo threshold reached or data left after read from memory is complete*/ |
| Kojto | 115:87f2f5183dfb | 396 | #define QSPI_FLAG_TC QUADSPI_SR_TCF /*!<Transfer complete flag: programmed number of data have been transferred or the transfer has been aborted*/ |
| Kojto | 115:87f2f5183dfb | 397 | #define QSPI_FLAG_TE QUADSPI_SR_TEF /*!<Transfer error flag: invalid address is being accessed*/ |
| Kojto | 115:87f2f5183dfb | 398 | /** |
| Kojto | 115:87f2f5183dfb | 399 | * @} |
| Kojto | 115:87f2f5183dfb | 400 | */ |
| Kojto | 115:87f2f5183dfb | 401 | |
| Kojto | 115:87f2f5183dfb | 402 | /** @defgroup QSPI_Interrupts QSPI Interrupts |
| Kojto | 115:87f2f5183dfb | 403 | * @{ |
| Kojto | 115:87f2f5183dfb | 404 | */ |
| Kojto | 115:87f2f5183dfb | 405 | #define QSPI_IT_TO QUADSPI_CR_TOIE /*!<Interrupt on the timeout flag*/ |
| Kojto | 115:87f2f5183dfb | 406 | #define QSPI_IT_SM QUADSPI_CR_SMIE /*!<Interrupt on the status match flag*/ |
| Kojto | 115:87f2f5183dfb | 407 | #define QSPI_IT_FT QUADSPI_CR_FTIE /*!<Interrupt on the fifo threshold flag*/ |
| Kojto | 115:87f2f5183dfb | 408 | #define QSPI_IT_TC QUADSPI_CR_TCIE /*!<Interrupt on the transfer complete flag*/ |
| Kojto | 115:87f2f5183dfb | 409 | #define QSPI_IT_TE QUADSPI_CR_TEIE /*!<Interrupt on the transfer error flag*/ |
| Kojto | 115:87f2f5183dfb | 410 | /** |
| Kojto | 115:87f2f5183dfb | 411 | * @} |
| Kojto | 115:87f2f5183dfb | 412 | */ |
| Kojto | 115:87f2f5183dfb | 413 | |
| Kojto | 115:87f2f5183dfb | 414 | /** @defgroup QSPI_Timeout_definition QSPI Timeout definition |
| Kojto | 115:87f2f5183dfb | 415 | * @{ |
| Kojto | 115:87f2f5183dfb | 416 | */ |
| Kojto | 115:87f2f5183dfb | 417 | #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)/* 5 s */ |
| Kojto | 115:87f2f5183dfb | 418 | /** |
| Kojto | 115:87f2f5183dfb | 419 | * @} |
| Kojto | 115:87f2f5183dfb | 420 | */ |
| Kojto | 115:87f2f5183dfb | 421 | |
| Kojto | 115:87f2f5183dfb | 422 | /** |
| Kojto | 115:87f2f5183dfb | 423 | * @} |
| Kojto | 115:87f2f5183dfb | 424 | */ |
| Kojto | 115:87f2f5183dfb | 425 | |
| Kojto | 115:87f2f5183dfb | 426 | /* Exported macros -----------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 427 | /** @defgroup QSPI_Exported_Macros QSPI Exported Macros |
| Kojto | 115:87f2f5183dfb | 428 | * @{ |
| Kojto | 115:87f2f5183dfb | 429 | */ |
| Kojto | 115:87f2f5183dfb | 430 | |
| Kojto | 115:87f2f5183dfb | 431 | /** @brief Reset QSPI handle state |
| Kojto | 115:87f2f5183dfb | 432 | * @param __HANDLE__: QSPI handle. |
| Kojto | 115:87f2f5183dfb | 433 | * @retval None |
| Kojto | 115:87f2f5183dfb | 434 | */ |
| Kojto | 115:87f2f5183dfb | 435 | #define __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_QSPI_STATE_RESET) |
| Kojto | 115:87f2f5183dfb | 436 | |
| Kojto | 115:87f2f5183dfb | 437 | /** @brief Enable QSPI |
| Kojto | 115:87f2f5183dfb | 438 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 439 | * @retval None |
| Kojto | 115:87f2f5183dfb | 440 | */ |
| Kojto | 115:87f2f5183dfb | 441 | #define __HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN) |
| Kojto | 115:87f2f5183dfb | 442 | |
| Kojto | 115:87f2f5183dfb | 443 | /** @brief Disable QSPI |
| Kojto | 115:87f2f5183dfb | 444 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 445 | * @retval None |
| Kojto | 115:87f2f5183dfb | 446 | */ |
| Kojto | 115:87f2f5183dfb | 447 | #define __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN) |
| Kojto | 115:87f2f5183dfb | 448 | |
| Kojto | 115:87f2f5183dfb | 449 | /** @brief Enables the specified QSPI interrupt. |
| Kojto | 115:87f2f5183dfb | 450 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 451 | * @param __INTERRUPT__: specifies the QSPI interrupt source to enable. |
| Kojto | 115:87f2f5183dfb | 452 | * This parameter can be one of the following values: |
| Kojto | 115:87f2f5183dfb | 453 | * @arg QSPI_IT_TO: QSPI Time out interrupt |
| Kojto | 115:87f2f5183dfb | 454 | * @arg QSPI_IT_SM: QSPI Status match interrupt |
| Kojto | 115:87f2f5183dfb | 455 | * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt |
| Kojto | 115:87f2f5183dfb | 456 | * @arg QSPI_IT_TC: QSPI Transfer complete interrupt |
| Kojto | 115:87f2f5183dfb | 457 | * @arg QSPI_IT_TE: QSPI Transfer error interrupt |
| Kojto | 115:87f2f5183dfb | 458 | * @retval None |
| Kojto | 115:87f2f5183dfb | 459 | */ |
| Kojto | 115:87f2f5183dfb | 460 | #define __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
| Kojto | 115:87f2f5183dfb | 461 | |
| Kojto | 115:87f2f5183dfb | 462 | |
| Kojto | 115:87f2f5183dfb | 463 | /** @brief Disables the specified QSPI interrupt. |
| Kojto | 115:87f2f5183dfb | 464 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 465 | * @param __INTERRUPT__: specifies the QSPI interrupt source to disable. |
| Kojto | 115:87f2f5183dfb | 466 | * This parameter can be one of the following values: |
| Kojto | 115:87f2f5183dfb | 467 | * @arg QSPI_IT_TO: QSPI Timeout interrupt |
| Kojto | 115:87f2f5183dfb | 468 | * @arg QSPI_IT_SM: QSPI Status match interrupt |
| Kojto | 115:87f2f5183dfb | 469 | * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt |
| Kojto | 115:87f2f5183dfb | 470 | * @arg QSPI_IT_TC: QSPI Transfer complete interrupt |
| Kojto | 115:87f2f5183dfb | 471 | * @arg QSPI_IT_TE: QSPI Transfer error interrupt |
| Kojto | 115:87f2f5183dfb | 472 | * @retval None |
| Kojto | 115:87f2f5183dfb | 473 | */ |
| Kojto | 115:87f2f5183dfb | 474 | #define __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
| Kojto | 115:87f2f5183dfb | 475 | |
| Kojto | 115:87f2f5183dfb | 476 | /** @brief Checks whether the specified QSPI interrupt source is enabled. |
| Kojto | 115:87f2f5183dfb | 477 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 478 | * @param __INTERRUPT__: specifies the QSPI interrupt source to check. |
| Kojto | 115:87f2f5183dfb | 479 | * This parameter can be one of the following values: |
| Kojto | 115:87f2f5183dfb | 480 | * @arg QSPI_IT_TO: QSPI Time out interrupt |
| Kojto | 115:87f2f5183dfb | 481 | * @arg QSPI_IT_SM: QSPI Status match interrupt |
| Kojto | 115:87f2f5183dfb | 482 | * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt |
| Kojto | 115:87f2f5183dfb | 483 | * @arg QSPI_IT_TC: QSPI Transfer complete interrupt |
| Kojto | 115:87f2f5183dfb | 484 | * @arg QSPI_IT_TE: QSPI Transfer error interrupt |
| Kojto | 115:87f2f5183dfb | 485 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
| Kojto | 115:87f2f5183dfb | 486 | */ |
| Kojto | 115:87f2f5183dfb | 487 | #define __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__)) |
| Kojto | 115:87f2f5183dfb | 488 | |
| Kojto | 115:87f2f5183dfb | 489 | /** |
| Kojto | 115:87f2f5183dfb | 490 | * @brief Get the selected QSPI's flag status. |
| Kojto | 115:87f2f5183dfb | 491 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 492 | * @param __FLAG__: specifies the QSPI flag to check. |
| Kojto | 115:87f2f5183dfb | 493 | * This parameter can be one of the following values: |
| Kojto | 115:87f2f5183dfb | 494 | * @arg QSPI_FLAG_BUSY: QSPI Busy flag |
| Kojto | 115:87f2f5183dfb | 495 | * @arg QSPI_FLAG_TO: QSPI Time out flag |
| Kojto | 115:87f2f5183dfb | 496 | * @arg QSPI_FLAG_SM: QSPI Status match flag |
| Kojto | 115:87f2f5183dfb | 497 | * @arg QSPI_FLAG_FT: QSPI FIFO threshold flag |
| Kojto | 115:87f2f5183dfb | 498 | * @arg QSPI_FLAG_TC: QSPI Transfer complete flag |
| Kojto | 115:87f2f5183dfb | 499 | * @arg QSPI_FLAG_TE: QSPI Transfer error flag |
| Kojto | 115:87f2f5183dfb | 500 | * @retval None |
| Kojto | 115:87f2f5183dfb | 501 | */ |
| Kojto | 115:87f2f5183dfb | 502 | #define __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0) |
| Kojto | 115:87f2f5183dfb | 503 | |
| Kojto | 115:87f2f5183dfb | 504 | /** @brief Clears the specified QSPI's flag status. |
| Kojto | 115:87f2f5183dfb | 505 | * @param __HANDLE__: specifies the QSPI Handle. |
| Kojto | 115:87f2f5183dfb | 506 | * @param __FLAG__: specifies the QSPI clear register flag that needs to be set |
| Kojto | 115:87f2f5183dfb | 507 | * This parameter can be one of the following values: |
| Kojto | 115:87f2f5183dfb | 508 | * @arg QSPI_FLAG_TO: QSPI Time out flag |
| Kojto | 115:87f2f5183dfb | 509 | * @arg QSPI_FLAG_SM: QSPI Status match flag |
| Kojto | 115:87f2f5183dfb | 510 | * @arg QSPI_FLAG_TC: QSPI Transfer complete flag |
| Kojto | 115:87f2f5183dfb | 511 | * @arg QSPI_FLAG_TE: QSPI Transfer error flag |
| Kojto | 115:87f2f5183dfb | 512 | * @retval None |
| Kojto | 115:87f2f5183dfb | 513 | */ |
| Kojto | 115:87f2f5183dfb | 514 | #define __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__)) |
| Kojto | 115:87f2f5183dfb | 515 | /** |
| Kojto | 115:87f2f5183dfb | 516 | * @} |
| Kojto | 115:87f2f5183dfb | 517 | */ |
| Kojto | 115:87f2f5183dfb | 518 | |
| Kojto | 115:87f2f5183dfb | 519 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 520 | /** @addtogroup QSPI_Exported_Functions |
| Kojto | 115:87f2f5183dfb | 521 | * @{ |
| Kojto | 115:87f2f5183dfb | 522 | */ |
| Kojto | 115:87f2f5183dfb | 523 | |
| Kojto | 115:87f2f5183dfb | 524 | /** @addtogroup QSPI_Exported_Functions_Group1 |
| Kojto | 115:87f2f5183dfb | 525 | * @{ |
| Kojto | 115:87f2f5183dfb | 526 | */ |
| Kojto | 115:87f2f5183dfb | 527 | /* Initialization/de-initialization functions ********************************/ |
| Kojto | 115:87f2f5183dfb | 528 | HAL_StatusTypeDef HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 529 | HAL_StatusTypeDef HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 530 | void HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 531 | void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 532 | /** |
| Kojto | 115:87f2f5183dfb | 533 | * @} |
| Kojto | 115:87f2f5183dfb | 534 | */ |
| Kojto | 115:87f2f5183dfb | 535 | |
| Kojto | 115:87f2f5183dfb | 536 | /** @addtogroup QSPI_Exported_Functions_Group2 |
| Kojto | 115:87f2f5183dfb | 537 | * @{ |
| Kojto | 115:87f2f5183dfb | 538 | */ |
| Kojto | 115:87f2f5183dfb | 539 | /* IO operation functions *****************************************************/ |
| Kojto | 115:87f2f5183dfb | 540 | /* QSPI IRQ handler method */ |
| Kojto | 115:87f2f5183dfb | 541 | void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 542 | |
| Kojto | 115:87f2f5183dfb | 543 | /* QSPI indirect mode */ |
| Kojto | 115:87f2f5183dfb | 544 | HAL_StatusTypeDef HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout); |
| Kojto | 115:87f2f5183dfb | 545 | HAL_StatusTypeDef HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout); |
| Kojto | 115:87f2f5183dfb | 546 | HAL_StatusTypeDef HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout); |
| Kojto | 115:87f2f5183dfb | 547 | HAL_StatusTypeDef HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd); |
| Kojto | 115:87f2f5183dfb | 548 | HAL_StatusTypeDef HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData); |
| Kojto | 115:87f2f5183dfb | 549 | HAL_StatusTypeDef HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData); |
| Kojto | 115:87f2f5183dfb | 550 | HAL_StatusTypeDef HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData); |
| Kojto | 115:87f2f5183dfb | 551 | HAL_StatusTypeDef HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData); |
| Kojto | 115:87f2f5183dfb | 552 | |
| Kojto | 115:87f2f5183dfb | 553 | /* QSPI status flag polling mode */ |
| Kojto | 115:87f2f5183dfb | 554 | HAL_StatusTypeDef HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout); |
| Kojto | 115:87f2f5183dfb | 555 | HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg); |
| Kojto | 115:87f2f5183dfb | 556 | |
| Kojto | 115:87f2f5183dfb | 557 | /* QSPI memory-mapped mode */ |
| Kojto | 115:87f2f5183dfb | 558 | HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg); |
| Kojto | 115:87f2f5183dfb | 559 | /** |
| Kojto | 115:87f2f5183dfb | 560 | * @} |
| Kojto | 115:87f2f5183dfb | 561 | */ |
| Kojto | 115:87f2f5183dfb | 562 | |
| Kojto | 115:87f2f5183dfb | 563 | /** @addtogroup QSPI_Exported_Functions_Group3 |
| Kojto | 115:87f2f5183dfb | 564 | * @{ |
| Kojto | 115:87f2f5183dfb | 565 | */ |
| Kojto | 115:87f2f5183dfb | 566 | /* Callback functions in non-blocking modes ***********************************/ |
| Kojto | 115:87f2f5183dfb | 567 | void HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 568 | void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 569 | |
| Kojto | 115:87f2f5183dfb | 570 | /* QSPI indirect mode */ |
| Kojto | 115:87f2f5183dfb | 571 | void HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 572 | void HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 573 | void HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 574 | void HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 575 | void HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 576 | |
| Kojto | 115:87f2f5183dfb | 577 | /* QSPI status flag polling mode */ |
| Kojto | 115:87f2f5183dfb | 578 | void HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 579 | |
| Kojto | 115:87f2f5183dfb | 580 | /* QSPI memory-mapped mode */ |
| Kojto | 115:87f2f5183dfb | 581 | void HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 582 | /** |
| Kojto | 115:87f2f5183dfb | 583 | * @} |
| Kojto | 115:87f2f5183dfb | 584 | */ |
| Kojto | 115:87f2f5183dfb | 585 | |
| Kojto | 115:87f2f5183dfb | 586 | /** @addtogroup QSPI_Exported_Functions_Group4 |
| Kojto | 115:87f2f5183dfb | 587 | * @{ |
| Kojto | 115:87f2f5183dfb | 588 | */ |
| Kojto | 115:87f2f5183dfb | 589 | /* Peripheral Control and State functions ************************************/ |
| Kojto | 115:87f2f5183dfb | 590 | HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 591 | uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 592 | HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi); |
| Kojto | 115:87f2f5183dfb | 593 | void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout); |
| Kojto | 115:87f2f5183dfb | 594 | /** |
| Kojto | 115:87f2f5183dfb | 595 | * @} |
| Kojto | 115:87f2f5183dfb | 596 | */ |
| Kojto | 115:87f2f5183dfb | 597 | |
| Kojto | 115:87f2f5183dfb | 598 | /** |
| Kojto | 115:87f2f5183dfb | 599 | * @} |
| Kojto | 115:87f2f5183dfb | 600 | */ |
| Kojto | 115:87f2f5183dfb | 601 | |
| Kojto | 115:87f2f5183dfb | 602 | /* Private types -------------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 603 | /* Private variables ---------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 604 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 605 | /** @defgroup QSPI_Private_Constants QSPI Private Constants |
| Kojto | 115:87f2f5183dfb | 606 | * @{ |
| Kojto | 115:87f2f5183dfb | 607 | */ |
| Kojto | 115:87f2f5183dfb | 608 | |
| Kojto | 115:87f2f5183dfb | 609 | /** |
| Kojto | 115:87f2f5183dfb | 610 | * @} |
| Kojto | 115:87f2f5183dfb | 611 | */ |
| Kojto | 115:87f2f5183dfb | 612 | |
| Kojto | 115:87f2f5183dfb | 613 | /* Private macros ------------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 614 | /** @defgroup QSPI_Private_Macros QSPI Private Macros |
| Kojto | 115:87f2f5183dfb | 615 | * @{ |
| Kojto | 115:87f2f5183dfb | 616 | */ |
| Kojto | 115:87f2f5183dfb | 617 | /** @defgroup QSPI_ClockPrescaler QSPI Clock Prescaler |
| Kojto | 115:87f2f5183dfb | 618 | * @{ |
| Kojto | 115:87f2f5183dfb | 619 | */ |
| Kojto | 115:87f2f5183dfb | 620 | #define IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFF) |
| Kojto | 115:87f2f5183dfb | 621 | /** |
| Kojto | 115:87f2f5183dfb | 622 | * @} |
| Kojto | 115:87f2f5183dfb | 623 | */ |
| Kojto | 115:87f2f5183dfb | 624 | |
| Kojto | 115:87f2f5183dfb | 625 | /** @defgroup QSPI_FifoThreshold QSPI Fifo Threshold |
| Kojto | 115:87f2f5183dfb | 626 | * @{ |
| Kojto | 115:87f2f5183dfb | 627 | */ |
| Kojto | 115:87f2f5183dfb | 628 | #define IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0) && ((THR) <= 32)) |
| Kojto | 115:87f2f5183dfb | 629 | /** |
| Kojto | 115:87f2f5183dfb | 630 | * @} |
| Kojto | 115:87f2f5183dfb | 631 | */ |
| Kojto | 115:87f2f5183dfb | 632 | |
| Kojto | 115:87f2f5183dfb | 633 | #define IS_QSPI_SSHIFT(SSHIFT) (((SSHIFT) == QSPI_SAMPLE_SHIFTING_NONE) || \ |
| Kojto | 115:87f2f5183dfb | 634 | ((SSHIFT) == QSPI_SAMPLE_SHIFTING_HALFCYCLE)) |
| Kojto | 115:87f2f5183dfb | 635 | |
| Kojto | 115:87f2f5183dfb | 636 | /** @defgroup QSPI_FlashSize QSPI Flash Size |
| Kojto | 115:87f2f5183dfb | 637 | * @{ |
| Kojto | 115:87f2f5183dfb | 638 | */ |
| Kojto | 115:87f2f5183dfb | 639 | #define IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31)) |
| Kojto | 115:87f2f5183dfb | 640 | /** |
| Kojto | 115:87f2f5183dfb | 641 | * @} |
| Kojto | 115:87f2f5183dfb | 642 | */ |
| Kojto | 115:87f2f5183dfb | 643 | |
| Kojto | 115:87f2f5183dfb | 644 | #define IS_QSPI_CS_HIGH_TIME(CSHTIME) (((CSHTIME) == QSPI_CS_HIGH_TIME_1_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 645 | ((CSHTIME) == QSPI_CS_HIGH_TIME_2_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 646 | ((CSHTIME) == QSPI_CS_HIGH_TIME_3_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 647 | ((CSHTIME) == QSPI_CS_HIGH_TIME_4_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 648 | ((CSHTIME) == QSPI_CS_HIGH_TIME_5_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 649 | ((CSHTIME) == QSPI_CS_HIGH_TIME_6_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 650 | ((CSHTIME) == QSPI_CS_HIGH_TIME_7_CYCLE) || \ |
| Kojto | 115:87f2f5183dfb | 651 | ((CSHTIME) == QSPI_CS_HIGH_TIME_8_CYCLE)) |
| Kojto | 115:87f2f5183dfb | 652 | |
| Kojto | 115:87f2f5183dfb | 653 | #define IS_QSPI_CLOCK_MODE(CLKMODE) (((CLKMODE) == QSPI_CLOCK_MODE_0) || \ |
| Kojto | 115:87f2f5183dfb | 654 | ((CLKMODE) == QSPI_CLOCK_MODE_3)) |
| Kojto | 115:87f2f5183dfb | 655 | |
| Kojto | 115:87f2f5183dfb | 656 | #define IS_QSPI_FLASH_ID(FLA) (((FLA) == QSPI_FLASH_ID_1) || \ |
| Kojto | 115:87f2f5183dfb | 657 | ((FLA) == QSPI_FLASH_ID_2)) |
| Kojto | 115:87f2f5183dfb | 658 | |
| Kojto | 115:87f2f5183dfb | 659 | #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ |
| Kojto | 115:87f2f5183dfb | 660 | ((MODE) == QSPI_DUALFLASH_DISABLE)) |
| Kojto | 115:87f2f5183dfb | 661 | |
| Kojto | 115:87f2f5183dfb | 662 | |
| Kojto | 115:87f2f5183dfb | 663 | /** @defgroup QSPI_Instruction QSPI Instruction |
| Kojto | 115:87f2f5183dfb | 664 | * @{ |
| Kojto | 115:87f2f5183dfb | 665 | */ |
| Kojto | 115:87f2f5183dfb | 666 | #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF) |
| Kojto | 115:87f2f5183dfb | 667 | /** |
| Kojto | 115:87f2f5183dfb | 668 | * @} |
| Kojto | 115:87f2f5183dfb | 669 | */ |
| Kojto | 115:87f2f5183dfb | 670 | |
| Kojto | 115:87f2f5183dfb | 671 | #define IS_QSPI_ADDRESS_SIZE(ADDR_SIZE) (((ADDR_SIZE) == QSPI_ADDRESS_8_BITS) || \ |
| Kojto | 115:87f2f5183dfb | 672 | ((ADDR_SIZE) == QSPI_ADDRESS_16_BITS) || \ |
| Kojto | 115:87f2f5183dfb | 673 | ((ADDR_SIZE) == QSPI_ADDRESS_24_BITS) || \ |
| Kojto | 115:87f2f5183dfb | 674 | ((ADDR_SIZE) == QSPI_ADDRESS_32_BITS)) |
| Kojto | 115:87f2f5183dfb | 675 | |
| Kojto | 115:87f2f5183dfb | 676 | #define IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE) (((SIZE) == QSPI_ALTERNATE_BYTES_8_BITS) || \ |
| Kojto | 115:87f2f5183dfb | 677 | ((SIZE) == QSPI_ALTERNATE_BYTES_16_BITS) || \ |
| Kojto | 115:87f2f5183dfb | 678 | ((SIZE) == QSPI_ALTERNATE_BYTES_24_BITS) || \ |
| Kojto | 115:87f2f5183dfb | 679 | ((SIZE) == QSPI_ALTERNATE_BYTES_32_BITS)) |
| Kojto | 115:87f2f5183dfb | 680 | |
| Kojto | 115:87f2f5183dfb | 681 | |
| Kojto | 115:87f2f5183dfb | 682 | /** @defgroup QSPI_DummyCycles QSPI Dummy Cycles |
| Kojto | 115:87f2f5183dfb | 683 | * @{ |
| Kojto | 115:87f2f5183dfb | 684 | */ |
| Kojto | 115:87f2f5183dfb | 685 | #define IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31) |
| Kojto | 115:87f2f5183dfb | 686 | /** |
| Kojto | 115:87f2f5183dfb | 687 | * @} |
| Kojto | 115:87f2f5183dfb | 688 | */ |
| Kojto | 115:87f2f5183dfb | 689 | |
| Kojto | 115:87f2f5183dfb | 690 | #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ |
| Kojto | 115:87f2f5183dfb | 691 | ((MODE) == QSPI_INSTRUCTION_1_LINE) || \ |
| Kojto | 115:87f2f5183dfb | 692 | ((MODE) == QSPI_INSTRUCTION_2_LINES) || \ |
| Kojto | 115:87f2f5183dfb | 693 | ((MODE) == QSPI_INSTRUCTION_4_LINES)) |
| Kojto | 115:87f2f5183dfb | 694 | |
| Kojto | 115:87f2f5183dfb | 695 | #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ |
| Kojto | 115:87f2f5183dfb | 696 | ((MODE) == QSPI_ADDRESS_1_LINE) || \ |
| Kojto | 115:87f2f5183dfb | 697 | ((MODE) == QSPI_ADDRESS_2_LINES) || \ |
| Kojto | 115:87f2f5183dfb | 698 | ((MODE) == QSPI_ADDRESS_4_LINES)) |
| Kojto | 115:87f2f5183dfb | 699 | |
| Kojto | 115:87f2f5183dfb | 700 | #define IS_QSPI_ALTERNATE_BYTES_MODE(MODE) (((MODE) == QSPI_ALTERNATE_BYTES_NONE) || \ |
| Kojto | 115:87f2f5183dfb | 701 | ((MODE) == QSPI_ALTERNATE_BYTES_1_LINE) || \ |
| Kojto | 115:87f2f5183dfb | 702 | ((MODE) == QSPI_ALTERNATE_BYTES_2_LINES) || \ |
| Kojto | 115:87f2f5183dfb | 703 | ((MODE) == QSPI_ALTERNATE_BYTES_4_LINES)) |
| Kojto | 115:87f2f5183dfb | 704 | |
| Kojto | 115:87f2f5183dfb | 705 | #define IS_QSPI_DATA_MODE(MODE) (((MODE) == QSPI_DATA_NONE) || \ |
| Kojto | 115:87f2f5183dfb | 706 | ((MODE) == QSPI_DATA_1_LINE) || \ |
| Kojto | 115:87f2f5183dfb | 707 | ((MODE) == QSPI_DATA_2_LINES) || \ |
| Kojto | 115:87f2f5183dfb | 708 | ((MODE) == QSPI_DATA_4_LINES)) |
| Kojto | 115:87f2f5183dfb | 709 | |
| Kojto | 115:87f2f5183dfb | 710 | #define IS_QSPI_DDR_MODE(DDR_MODE) (((DDR_MODE) == QSPI_DDR_MODE_DISABLE) || \ |
| Kojto | 115:87f2f5183dfb | 711 | ((DDR_MODE) == QSPI_DDR_MODE_ENABLE)) |
| Kojto | 115:87f2f5183dfb | 712 | |
| Kojto | 115:87f2f5183dfb | 713 | #define IS_QSPI_DDR_HHC(DDR_HHC) (((DDR_HHC) == QSPI_DDR_HHC_ANALOG_DELAY) || \ |
| Kojto | 115:87f2f5183dfb | 714 | ((DDR_HHC) == QSPI_DDR_HHC_HALF_CLK_DELAY)) |
| Kojto | 115:87f2f5183dfb | 715 | |
| Kojto | 115:87f2f5183dfb | 716 | #define IS_QSPI_SIOO_MODE(SIOO_MODE) (((SIOO_MODE) == QSPI_SIOO_INST_EVERY_CMD) || \ |
| Kojto | 115:87f2f5183dfb | 717 | ((SIOO_MODE) == QSPI_SIOO_INST_ONLY_FIRST_CMD)) |
| Kojto | 115:87f2f5183dfb | 718 | |
| Kojto | 115:87f2f5183dfb | 719 | /** @defgroup QSPI_Interval QSPI Interval |
| Kojto | 115:87f2f5183dfb | 720 | * @{ |
| Kojto | 115:87f2f5183dfb | 721 | */ |
| Kojto | 115:87f2f5183dfb | 722 | #define IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL) |
| Kojto | 115:87f2f5183dfb | 723 | /** |
| Kojto | 115:87f2f5183dfb | 724 | * @} |
| Kojto | 115:87f2f5183dfb | 725 | */ |
| Kojto | 115:87f2f5183dfb | 726 | |
| Kojto | 115:87f2f5183dfb | 727 | /** @defgroup QSPI_StatusBytesSize QSPI Status Bytes Size |
| Kojto | 115:87f2f5183dfb | 728 | * @{ |
| Kojto | 115:87f2f5183dfb | 729 | */ |
| Kojto | 115:87f2f5183dfb | 730 | #define IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4)) |
| Kojto | 115:87f2f5183dfb | 731 | /** |
| Kojto | 115:87f2f5183dfb | 732 | * @} |
| Kojto | 115:87f2f5183dfb | 733 | */ |
| Kojto | 115:87f2f5183dfb | 734 | #define IS_QSPI_MATCH_MODE(MODE) (((MODE) == QSPI_MATCH_MODE_AND) || \ |
| Kojto | 115:87f2f5183dfb | 735 | ((MODE) == QSPI_MATCH_MODE_OR)) |
| Kojto | 115:87f2f5183dfb | 736 | |
| Kojto | 115:87f2f5183dfb | 737 | #define IS_QSPI_AUTOMATIC_STOP(APMS) (((APMS) == QSPI_AUTOMATIC_STOP_DISABLE) || \ |
| Kojto | 115:87f2f5183dfb | 738 | ((APMS) == QSPI_AUTOMATIC_STOP_ENABLE)) |
| Kojto | 115:87f2f5183dfb | 739 | |
| Kojto | 115:87f2f5183dfb | 740 | #define IS_QSPI_TIMEOUT_ACTIVATION(TCEN) (((TCEN) == QSPI_TIMEOUT_COUNTER_DISABLE) || \ |
| Kojto | 115:87f2f5183dfb | 741 | ((TCEN) == QSPI_TIMEOUT_COUNTER_ENABLE)) |
| Kojto | 115:87f2f5183dfb | 742 | |
| Kojto | 115:87f2f5183dfb | 743 | /** @defgroup QSPI_TimeOutPeriod QSPI TimeOut Period |
| Kojto | 115:87f2f5183dfb | 744 | * @{ |
| Kojto | 115:87f2f5183dfb | 745 | */ |
| Kojto | 115:87f2f5183dfb | 746 | #define IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF) |
| Kojto | 115:87f2f5183dfb | 747 | /** |
| Kojto | 115:87f2f5183dfb | 748 | * @} |
| Kojto | 115:87f2f5183dfb | 749 | */ |
| Kojto | 115:87f2f5183dfb | 750 | |
| Kojto | 115:87f2f5183dfb | 751 | #define IS_QSPI_GET_FLAG(FLAG) (((FLAG) == QSPI_FLAG_BUSY) || \ |
| Kojto | 115:87f2f5183dfb | 752 | ((FLAG) == QSPI_FLAG_TO) || \ |
| Kojto | 115:87f2f5183dfb | 753 | ((FLAG) == QSPI_FLAG_SM) || \ |
| Kojto | 115:87f2f5183dfb | 754 | ((FLAG) == QSPI_FLAG_FT) || \ |
| Kojto | 115:87f2f5183dfb | 755 | ((FLAG) == QSPI_FLAG_TC) || \ |
| Kojto | 115:87f2f5183dfb | 756 | ((FLAG) == QSPI_FLAG_TE)) |
| Kojto | 115:87f2f5183dfb | 757 | |
| Kojto | 115:87f2f5183dfb | 758 | #define IS_QSPI_IT(IT) ((((IT) & (uint32_t)0xFFE0FFFF) == 0x00000000) && ((IT) != 0x00000000)) |
| Kojto | 115:87f2f5183dfb | 759 | /** |
| Kojto | 115:87f2f5183dfb | 760 | * @} |
| Kojto | 115:87f2f5183dfb | 761 | */ |
| Kojto | 115:87f2f5183dfb | 762 | |
| Kojto | 115:87f2f5183dfb | 763 | /* Private functions ---------------------------------------------------------*/ |
| Kojto | 115:87f2f5183dfb | 764 | /** @defgroup QSPI_Private_Functions QSPI Private Functions |
| Kojto | 115:87f2f5183dfb | 765 | * @{ |
| Kojto | 115:87f2f5183dfb | 766 | */ |
| Kojto | 115:87f2f5183dfb | 767 | |
| Kojto | 115:87f2f5183dfb | 768 | /** |
| Kojto | 115:87f2f5183dfb | 769 | * @} |
| Kojto | 115:87f2f5183dfb | 770 | */ |
| Kojto | 115:87f2f5183dfb | 771 | |
| Kojto | 115:87f2f5183dfb | 772 | /** |
| Kojto | 115:87f2f5183dfb | 773 | * @} |
| Kojto | 115:87f2f5183dfb | 774 | */ |
| Kojto | 115:87f2f5183dfb | 775 | |
| Kojto | 115:87f2f5183dfb | 776 | /** |
| Kojto | 115:87f2f5183dfb | 777 | * @} |
| Kojto | 115:87f2f5183dfb | 778 | */ |
| Kojto | 115:87f2f5183dfb | 779 | |
| Kojto | 115:87f2f5183dfb | 780 | #ifdef __cplusplus |
| Kojto | 115:87f2f5183dfb | 781 | } |
| Kojto | 115:87f2f5183dfb | 782 | #endif |
| Kojto | 115:87f2f5183dfb | 783 | |
| Kojto | 115:87f2f5183dfb | 784 | #endif /* __STM32F7xx_HAL_QSPI_H */ |
| Kojto | 115:87f2f5183dfb | 785 | |
| Kojto | 115:87f2f5183dfb | 786 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |