mbed-renbed - Fork of the official mbed C/C SDK provides the …

Users » elijahorr » Code » mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents: 1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

TARGET_NUCLEO_F746ZG/stm32_hal_legacy.h@115:87f2f5183dfb, 2016-03-02 (annotated)

Committer:: Kojto
Date:: Wed Mar 02 09:58:28 2016 +0100
Revision:: 115:87f2f5183dfb
Child:: 116:c0f6e94411f5

Release 115 of the mbed library



Changes:

- new targets - NUCLEO_F746ZG

- Bugfix - STM32F7 + STM32L4 - RTC init fix

- Bugfix - STM32L4 Set NVIC_RAM_VECTOR_ADDRESS to 0x10000000

- B96B_F446VE - CAN addition

- Changed target name from NZ32SC151 to NZ32_SC151

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	115:87f2f5183dfb	1	/**
Kojto	115:87f2f5183dfb	2	******************************************************************************
Kojto	115:87f2f5183dfb	3	* @file stm32_hal_legacy.h
Kojto	115:87f2f5183dfb	4	* @author MCD Application Team
Kojto	115:87f2f5183dfb	5	* @version V1.0.1
Kojto	115:87f2f5183dfb	6	* @date 25-June-2015
Kojto	115:87f2f5183dfb	7	* @brief This file contains aliases definition for the STM32Cube HAL constants
Kojto	115:87f2f5183dfb	8	* macros and functions maintained for legacy purpose.
Kojto	115:87f2f5183dfb	9	******************************************************************************
Kojto	115:87f2f5183dfb	10	* @attention
Kojto	115:87f2f5183dfb	11	*
Kojto	115:87f2f5183dfb	12	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto	115:87f2f5183dfb	13	*
Kojto	115:87f2f5183dfb	14	* Redistribution and use in source and binary forms, with or without modification,
Kojto	115:87f2f5183dfb	15	* are permitted provided that the following conditions are met:
Kojto	115:87f2f5183dfb	16	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	115:87f2f5183dfb	17	* this list of conditions and the following disclaimer.
Kojto	115:87f2f5183dfb	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	115:87f2f5183dfb	19	* this list of conditions and the following disclaimer in the documentation
Kojto	115:87f2f5183dfb	20	* and/or other materials provided with the distribution.
Kojto	115:87f2f5183dfb	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	115:87f2f5183dfb	22	* may be used to endorse or promote products derived from this software
Kojto	115:87f2f5183dfb	23	* without specific prior written permission.
Kojto	115:87f2f5183dfb	24	*
Kojto	115:87f2f5183dfb	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	115:87f2f5183dfb	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	115:87f2f5183dfb	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	115:87f2f5183dfb	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	115:87f2f5183dfb	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	115:87f2f5183dfb	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	115:87f2f5183dfb	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	115:87f2f5183dfb	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	115:87f2f5183dfb	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	115:87f2f5183dfb	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	115:87f2f5183dfb	35	*
Kojto	115:87f2f5183dfb	36	******************************************************************************
Kojto	115:87f2f5183dfb	37	*/
Kojto	115:87f2f5183dfb	38
Kojto	115:87f2f5183dfb	39	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	115:87f2f5183dfb	40	#ifndef __STM32_HAL_LEGACY
Kojto	115:87f2f5183dfb	41	#define __STM32_HAL_LEGACY
Kojto	115:87f2f5183dfb	42
Kojto	115:87f2f5183dfb	43	#ifdef __cplusplus
Kojto	115:87f2f5183dfb	44	extern "C" {
Kojto	115:87f2f5183dfb	45	#endif
Kojto	115:87f2f5183dfb	46
Kojto	115:87f2f5183dfb	47	/* Includes ------------------------------------------------------------------*/
Kojto	115:87f2f5183dfb	48	/* Exported types ------------------------------------------------------------*/
Kojto	115:87f2f5183dfb	49	/* Exported constants --------------------------------------------------------*/
Kojto	115:87f2f5183dfb	50
Kojto	115:87f2f5183dfb	51	/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	52	* @{
Kojto	115:87f2f5183dfb	53	*/
Kojto	115:87f2f5183dfb	54	#define AES_FLAG_RDERR CRYP_FLAG_RDERR
Kojto	115:87f2f5183dfb	55	#define AES_FLAG_WRERR CRYP_FLAG_WRERR
Kojto	115:87f2f5183dfb	56	#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
Kojto	115:87f2f5183dfb	57	#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
Kojto	115:87f2f5183dfb	58	#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
Kojto	115:87f2f5183dfb	59
Kojto	115:87f2f5183dfb	60	/**
Kojto	115:87f2f5183dfb	61	* @}
Kojto	115:87f2f5183dfb	62	*/
Kojto	115:87f2f5183dfb	63
Kojto	115:87f2f5183dfb	64	/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	65	* @{
Kojto	115:87f2f5183dfb	66	*/
Kojto	115:87f2f5183dfb	67	#define ADC_RESOLUTION12b ADC_RESOLUTION_12B
Kojto	115:87f2f5183dfb	68	#define ADC_RESOLUTION10b ADC_RESOLUTION_10B
Kojto	115:87f2f5183dfb	69	#define ADC_RESOLUTION8b ADC_RESOLUTION_8B
Kojto	115:87f2f5183dfb	70	#define ADC_RESOLUTION6b ADC_RESOLUTION_6B
Kojto	115:87f2f5183dfb	71	#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
Kojto	115:87f2f5183dfb	72	#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
Kojto	115:87f2f5183dfb	73	#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
Kojto	115:87f2f5183dfb	74	#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
Kojto	115:87f2f5183dfb	75	#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
Kojto	115:87f2f5183dfb	76	#define REGULAR_GROUP ADC_REGULAR_GROUP
Kojto	115:87f2f5183dfb	77	#define INJECTED_GROUP ADC_INJECTED_GROUP
Kojto	115:87f2f5183dfb	78	#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
Kojto	115:87f2f5183dfb	79	#define AWD_EVENT ADC_AWD_EVENT
Kojto	115:87f2f5183dfb	80	#define AWD1_EVENT ADC_AWD1_EVENT
Kojto	115:87f2f5183dfb	81	#define AWD2_EVENT ADC_AWD2_EVENT
Kojto	115:87f2f5183dfb	82	#define AWD3_EVENT ADC_AWD3_EVENT
Kojto	115:87f2f5183dfb	83	#define OVR_EVENT ADC_OVR_EVENT
Kojto	115:87f2f5183dfb	84	#define JQOVF_EVENT ADC_JQOVF_EVENT
Kojto	115:87f2f5183dfb	85	#define ALL_CHANNELS ADC_ALL_CHANNELS
Kojto	115:87f2f5183dfb	86	#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
Kojto	115:87f2f5183dfb	87	#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
Kojto	115:87f2f5183dfb	88	#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
Kojto	115:87f2f5183dfb	89	#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
Kojto	115:87f2f5183dfb	90	#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
Kojto	115:87f2f5183dfb	91	#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
Kojto	115:87f2f5183dfb	92	#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
Kojto	115:87f2f5183dfb	93	#define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6
Kojto	115:87f2f5183dfb	94	#define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8
Kojto	115:87f2f5183dfb	95	#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
Kojto	115:87f2f5183dfb	96	#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
Kojto	115:87f2f5183dfb	97	#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
Kojto	115:87f2f5183dfb	98	#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
Kojto	115:87f2f5183dfb	99	#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
Kojto	115:87f2f5183dfb	100	#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
Kojto	115:87f2f5183dfb	101	#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
Kojto	115:87f2f5183dfb	102	#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
Kojto	115:87f2f5183dfb	103	#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
Kojto	115:87f2f5183dfb	104	#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
Kojto	115:87f2f5183dfb	105	#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
Kojto	115:87f2f5183dfb	106	/**
Kojto	115:87f2f5183dfb	107	* @}
Kojto	115:87f2f5183dfb	108	*/
Kojto	115:87f2f5183dfb	109
Kojto	115:87f2f5183dfb	110	/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	111	* @{
Kojto	115:87f2f5183dfb	112	*/
Kojto	115:87f2f5183dfb	113
Kojto	115:87f2f5183dfb	114	#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
Kojto	115:87f2f5183dfb	115
Kojto	115:87f2f5183dfb	116	/**
Kojto	115:87f2f5183dfb	117	* @}
Kojto	115:87f2f5183dfb	118	*/
Kojto	115:87f2f5183dfb	119
Kojto	115:87f2f5183dfb	120	/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	121	* @{
Kojto	115:87f2f5183dfb	122	*/
Kojto	115:87f2f5183dfb	123
Kojto	115:87f2f5183dfb	124	#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
Kojto	115:87f2f5183dfb	125	#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
Kojto	115:87f2f5183dfb	126	#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
Kojto	115:87f2f5183dfb	127	#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
Kojto	115:87f2f5183dfb	128
Kojto	115:87f2f5183dfb	129	/**
Kojto	115:87f2f5183dfb	130	* @}
Kojto	115:87f2f5183dfb	131	*/
Kojto	115:87f2f5183dfb	132
Kojto	115:87f2f5183dfb	133	/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	134	* @{
Kojto	115:87f2f5183dfb	135	*/
Kojto	115:87f2f5183dfb	136
Kojto	115:87f2f5183dfb	137	#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
Kojto	115:87f2f5183dfb	138	#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
Kojto	115:87f2f5183dfb	139
Kojto	115:87f2f5183dfb	140	/**
Kojto	115:87f2f5183dfb	141	* @}
Kojto	115:87f2f5183dfb	142	*/
Kojto	115:87f2f5183dfb	143
Kojto	115:87f2f5183dfb	144	/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	145	* @{
Kojto	115:87f2f5183dfb	146	*/
Kojto	115:87f2f5183dfb	147
Kojto	115:87f2f5183dfb	148	#define DAC1_CHANNEL_1 DAC_CHANNEL_1
Kojto	115:87f2f5183dfb	149	#define DAC1_CHANNEL_2 DAC_CHANNEL_2
Kojto	115:87f2f5183dfb	150	#define DAC2_CHANNEL_1 DAC_CHANNEL_1
Kojto	115:87f2f5183dfb	151	#define DAC_WAVE_NONE ((uint32_t)0x00000000)
Kojto	115:87f2f5183dfb	152	#define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0)
Kojto	115:87f2f5183dfb	153	#define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1)
Kojto	115:87f2f5183dfb	154	#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
Kojto	115:87f2f5183dfb	155	#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
Kojto	115:87f2f5183dfb	156	#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
Kojto	115:87f2f5183dfb	157
Kojto	115:87f2f5183dfb	158	/**
Kojto	115:87f2f5183dfb	159	* @}
Kojto	115:87f2f5183dfb	160	*/
Kojto	115:87f2f5183dfb	161
Kojto	115:87f2f5183dfb	162	/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	163	* @{
Kojto	115:87f2f5183dfb	164	*/
Kojto	115:87f2f5183dfb	165	#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2
Kojto	115:87f2f5183dfb	166	#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4
Kojto	115:87f2f5183dfb	167	#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5
Kojto	115:87f2f5183dfb	168	#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4
Kojto	115:87f2f5183dfb	169	#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2
Kojto	115:87f2f5183dfb	170	#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
Kojto	115:87f2f5183dfb	171	#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6
Kojto	115:87f2f5183dfb	172	#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
Kojto	115:87f2f5183dfb	173	#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
Kojto	115:87f2f5183dfb	174	#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
Kojto	115:87f2f5183dfb	175	#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
Kojto	115:87f2f5183dfb	176	#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
Kojto	115:87f2f5183dfb	177	#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
Kojto	115:87f2f5183dfb	178	#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
Kojto	115:87f2f5183dfb	179	#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6
Kojto	115:87f2f5183dfb	180
Kojto	115:87f2f5183dfb	181	#define IS_HAL_REMAPDMA IS_DMA_REMAP
Kojto	115:87f2f5183dfb	182	#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE
Kojto	115:87f2f5183dfb	183	#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE
Kojto	115:87f2f5183dfb	184
Kojto	115:87f2f5183dfb	185
Kojto	115:87f2f5183dfb	186
Kojto	115:87f2f5183dfb	187	/**
Kojto	115:87f2f5183dfb	188	* @}
Kojto	115:87f2f5183dfb	189	*/
Kojto	115:87f2f5183dfb	190
Kojto	115:87f2f5183dfb	191	/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	192	* @{
Kojto	115:87f2f5183dfb	193	*/
Kojto	115:87f2f5183dfb	194
Kojto	115:87f2f5183dfb	195	#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
Kojto	115:87f2f5183dfb	196	#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
Kojto	115:87f2f5183dfb	197	#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
Kojto	115:87f2f5183dfb	198	#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
Kojto	115:87f2f5183dfb	199	#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
Kojto	115:87f2f5183dfb	200	#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
Kojto	115:87f2f5183dfb	201	#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
Kojto	115:87f2f5183dfb	202	#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
Kojto	115:87f2f5183dfb	203	#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
Kojto	115:87f2f5183dfb	204	#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
Kojto	115:87f2f5183dfb	205	#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
Kojto	115:87f2f5183dfb	206	#define OBEX_PCROP OPTIONBYTE_PCROP
Kojto	115:87f2f5183dfb	207	#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
Kojto	115:87f2f5183dfb	208	#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
Kojto	115:87f2f5183dfb	209	#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
Kojto	115:87f2f5183dfb	210	#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
Kojto	115:87f2f5183dfb	211	#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
Kojto	115:87f2f5183dfb	212	#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
Kojto	115:87f2f5183dfb	213	#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
Kojto	115:87f2f5183dfb	214	#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
Kojto	115:87f2f5183dfb	215	#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
Kojto	115:87f2f5183dfb	216	#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
Kojto	115:87f2f5183dfb	217	#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
Kojto	115:87f2f5183dfb	218	#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
Kojto	115:87f2f5183dfb	219	#define PAGESIZE FLASH_PAGE_SIZE
Kojto	115:87f2f5183dfb	220	#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
Kojto	115:87f2f5183dfb	221	#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
Kojto	115:87f2f5183dfb	222	#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
Kojto	115:87f2f5183dfb	223	#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
Kojto	115:87f2f5183dfb	224	#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
Kojto	115:87f2f5183dfb	225	#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
Kojto	115:87f2f5183dfb	226	#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
Kojto	115:87f2f5183dfb	227	#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
Kojto	115:87f2f5183dfb	228	#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
Kojto	115:87f2f5183dfb	229	#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
Kojto	115:87f2f5183dfb	230	#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
Kojto	115:87f2f5183dfb	231	#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
Kojto	115:87f2f5183dfb	232	#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
Kojto	115:87f2f5183dfb	233	#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
Kojto	115:87f2f5183dfb	234	#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
Kojto	115:87f2f5183dfb	235	#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
Kojto	115:87f2f5183dfb	236	#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
Kojto	115:87f2f5183dfb	237	#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
Kojto	115:87f2f5183dfb	238	#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
Kojto	115:87f2f5183dfb	239	#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
Kojto	115:87f2f5183dfb	240	#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
Kojto	115:87f2f5183dfb	241	#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
Kojto	115:87f2f5183dfb	242	#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
Kojto	115:87f2f5183dfb	243	#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
Kojto	115:87f2f5183dfb	244	#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
Kojto	115:87f2f5183dfb	245	#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
Kojto	115:87f2f5183dfb	246	#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
Kojto	115:87f2f5183dfb	247	#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
Kojto	115:87f2f5183dfb	248	#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
Kojto	115:87f2f5183dfb	249	#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
Kojto	115:87f2f5183dfb	250	#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
Kojto	115:87f2f5183dfb	251	#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
Kojto	115:87f2f5183dfb	252	#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
Kojto	115:87f2f5183dfb	253	#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
Kojto	115:87f2f5183dfb	254	#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
Kojto	115:87f2f5183dfb	255	#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
Kojto	115:87f2f5183dfb	256	#define OB_WDG_SW OB_IWDG_SW
Kojto	115:87f2f5183dfb	257	#define OB_WDG_HW OB_IWDG_HW
Kojto	115:87f2f5183dfb	258
Kojto	115:87f2f5183dfb	259	/**
Kojto	115:87f2f5183dfb	260	* @}
Kojto	115:87f2f5183dfb	261	*/
Kojto	115:87f2f5183dfb	262
Kojto	115:87f2f5183dfb	263	/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	264	* @{
Kojto	115:87f2f5183dfb	265	*/
Kojto	115:87f2f5183dfb	266
Kojto	115:87f2f5183dfb	267	#define SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
Kojto	115:87f2f5183dfb	268	#define SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
Kojto	115:87f2f5183dfb	269	#define SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
Kojto	115:87f2f5183dfb	270	#define SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
Kojto	115:87f2f5183dfb	271	#define SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
Kojto	115:87f2f5183dfb	272	#define SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
Kojto	115:87f2f5183dfb	273	#define SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
Kojto	115:87f2f5183dfb	274
Kojto	115:87f2f5183dfb	275	/**
Kojto	115:87f2f5183dfb	276	* @}
Kojto	115:87f2f5183dfb	277	*/
Kojto	115:87f2f5183dfb	278
Kojto	115:87f2f5183dfb	279
Kojto	115:87f2f5183dfb	280	/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
Kojto	115:87f2f5183dfb	281	* @{
Kojto	115:87f2f5183dfb	282	*/
Kojto	115:87f2f5183dfb	283	#if defined(STM32L4) \|\| defined(STM32F7)
Kojto	115:87f2f5183dfb	284	#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
Kojto	115:87f2f5183dfb	285	#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
Kojto	115:87f2f5183dfb	286	#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
Kojto	115:87f2f5183dfb	287	#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16
Kojto	115:87f2f5183dfb	288	#else
Kojto	115:87f2f5183dfb	289	#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE
Kojto	115:87f2f5183dfb	290	#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE
Kojto	115:87f2f5183dfb	291	#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8
Kojto	115:87f2f5183dfb	292	#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16
Kojto	115:87f2f5183dfb	293	#endif
Kojto	115:87f2f5183dfb	294	/**
Kojto	115:87f2f5183dfb	295	* @}
Kojto	115:87f2f5183dfb	296	*/
Kojto	115:87f2f5183dfb	297
Kojto	115:87f2f5183dfb	298	/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	299	* @{
Kojto	115:87f2f5183dfb	300	*/
Kojto	115:87f2f5183dfb	301
Kojto	115:87f2f5183dfb	302	#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
Kojto	115:87f2f5183dfb	303	#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
Kojto	115:87f2f5183dfb	304	/**
Kojto	115:87f2f5183dfb	305	* @}
Kojto	115:87f2f5183dfb	306	*/
Kojto	115:87f2f5183dfb	307
Kojto	115:87f2f5183dfb	308	/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	309	* @{
Kojto	115:87f2f5183dfb	310	*/
Kojto	115:87f2f5183dfb	311	#define GET_GPIO_SOURCE GPIO_GET_INDEX
Kojto	115:87f2f5183dfb	312	#define GET_GPIO_INDEX GPIO_GET_INDEX
Kojto	115:87f2f5183dfb	313
Kojto	115:87f2f5183dfb	314	#if defined(STM32F4)
Kojto	115:87f2f5183dfb	315	#define GPIO_AF12_SDMMC GPIO_AF12_SDIO
Kojto	115:87f2f5183dfb	316	#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO
Kojto	115:87f2f5183dfb	317	#endif
Kojto	115:87f2f5183dfb	318
Kojto	115:87f2f5183dfb	319	#if defined(STM32F7)
Kojto	115:87f2f5183dfb	320	#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
Kojto	115:87f2f5183dfb	321	#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
Kojto	115:87f2f5183dfb	322	#endif
Kojto	115:87f2f5183dfb	323
Kojto	115:87f2f5183dfb	324	#if defined(STM32L4)
Kojto	115:87f2f5183dfb	325	#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
Kojto	115:87f2f5183dfb	326	#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
Kojto	115:87f2f5183dfb	327	#endif
Kojto	115:87f2f5183dfb	328
Kojto	115:87f2f5183dfb	329	#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
Kojto	115:87f2f5183dfb	330	#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
Kojto	115:87f2f5183dfb	331	#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
Kojto	115:87f2f5183dfb	332
Kojto	115:87f2f5183dfb	333	/**
Kojto	115:87f2f5183dfb	334	* @}
Kojto	115:87f2f5183dfb	335	*/
Kojto	115:87f2f5183dfb	336
Kojto	115:87f2f5183dfb	337	/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	338	* @{
Kojto	115:87f2f5183dfb	339	*/
Kojto	115:87f2f5183dfb	340	#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
Kojto	115:87f2f5183dfb	341	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
Kojto	115:87f2f5183dfb	342	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
Kojto	115:87f2f5183dfb	343	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
Kojto	115:87f2f5183dfb	344	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
Kojto	115:87f2f5183dfb	345	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
Kojto	115:87f2f5183dfb	346	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
Kojto	115:87f2f5183dfb	347	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
Kojto	115:87f2f5183dfb	348	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
Kojto	115:87f2f5183dfb	349	/**
Kojto	115:87f2f5183dfb	350	* @}
Kojto	115:87f2f5183dfb	351	*/
Kojto	115:87f2f5183dfb	352
Kojto	115:87f2f5183dfb	353	/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	354	* @{
Kojto	115:87f2f5183dfb	355	*/
Kojto	115:87f2f5183dfb	356	#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
Kojto	115:87f2f5183dfb	357	#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
Kojto	115:87f2f5183dfb	358	#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
Kojto	115:87f2f5183dfb	359	#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
Kojto	115:87f2f5183dfb	360	#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
Kojto	115:87f2f5183dfb	361	#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
Kojto	115:87f2f5183dfb	362	#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
Kojto	115:87f2f5183dfb	363	#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
Kojto	115:87f2f5183dfb	364	/**
Kojto	115:87f2f5183dfb	365	* @}
Kojto	115:87f2f5183dfb	366	*/
Kojto	115:87f2f5183dfb	367
Kojto	115:87f2f5183dfb	368	/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	369	* @{
Kojto	115:87f2f5183dfb	370	*/
Kojto	115:87f2f5183dfb	371	#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
Kojto	115:87f2f5183dfb	372	#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
Kojto	115:87f2f5183dfb	373
Kojto	115:87f2f5183dfb	374	/**
Kojto	115:87f2f5183dfb	375	* @}
Kojto	115:87f2f5183dfb	376	*/
Kojto	115:87f2f5183dfb	377
Kojto	115:87f2f5183dfb	378	/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	379	* @{
Kojto	115:87f2f5183dfb	380	*/
Kojto	115:87f2f5183dfb	381	#define KR_KEY_RELOAD IWDG_KEY_RELOAD
Kojto	115:87f2f5183dfb	382	#define KR_KEY_ENABLE IWDG_KEY_ENABLE
Kojto	115:87f2f5183dfb	383	#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
Kojto	115:87f2f5183dfb	384	#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
Kojto	115:87f2f5183dfb	385	/**
Kojto	115:87f2f5183dfb	386	* @}
Kojto	115:87f2f5183dfb	387	*/
Kojto	115:87f2f5183dfb	388
Kojto	115:87f2f5183dfb	389	/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	390	* @{
Kojto	115:87f2f5183dfb	391	*/
Kojto	115:87f2f5183dfb	392
Kojto	115:87f2f5183dfb	393	#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
Kojto	115:87f2f5183dfb	394	#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
Kojto	115:87f2f5183dfb	395	#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
Kojto	115:87f2f5183dfb	396	#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
Kojto	115:87f2f5183dfb	397
Kojto	115:87f2f5183dfb	398	#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
Kojto	115:87f2f5183dfb	399	#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
Kojto	115:87f2f5183dfb	400	#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
Kojto	115:87f2f5183dfb	401
Kojto	115:87f2f5183dfb	402	#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
Kojto	115:87f2f5183dfb	403	#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS
Kojto	115:87f2f5183dfb	404	#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS
Kojto	115:87f2f5183dfb	405	#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS
Kojto	115:87f2f5183dfb	406
Kojto	115:87f2f5183dfb	407	/* The following 3 definition have also been present in a temporary version of lptim.h */
Kojto	115:87f2f5183dfb	408	/* They need to be renamed also to the right name, just in case */
Kojto	115:87f2f5183dfb	409	#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS
Kojto	115:87f2f5183dfb	410	#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
Kojto	115:87f2f5183dfb	411	#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
Kojto	115:87f2f5183dfb	412
Kojto	115:87f2f5183dfb	413	/**
Kojto	115:87f2f5183dfb	414	* @}
Kojto	115:87f2f5183dfb	415	*/
Kojto	115:87f2f5183dfb	416
Kojto	115:87f2f5183dfb	417	/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	418	* @{
Kojto	115:87f2f5183dfb	419	*/
Kojto	115:87f2f5183dfb	420	#define NAND_AddressTypedef NAND_AddressTypeDef
Kojto	115:87f2f5183dfb	421
Kojto	115:87f2f5183dfb	422	#define __ARRAY_ADDRESS ARRAY_ADDRESS
Kojto	115:87f2f5183dfb	423	#define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
Kojto	115:87f2f5183dfb	424	#define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
Kojto	115:87f2f5183dfb	425	#define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
Kojto	115:87f2f5183dfb	426	#define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
Kojto	115:87f2f5183dfb	427	/**
Kojto	115:87f2f5183dfb	428	* @}
Kojto	115:87f2f5183dfb	429	*/
Kojto	115:87f2f5183dfb	430
Kojto	115:87f2f5183dfb	431	/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	432	* @{
Kojto	115:87f2f5183dfb	433	*/
Kojto	115:87f2f5183dfb	434	#define NOR_StatusTypedef HAL_NOR_StatusTypeDef
Kojto	115:87f2f5183dfb	435	#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
Kojto	115:87f2f5183dfb	436	#define NOR_ONGOING HAL_NOR_STATUS_ONGOING
Kojto	115:87f2f5183dfb	437	#define NOR_ERROR HAL_NOR_STATUS_ERROR
Kojto	115:87f2f5183dfb	438	#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
Kojto	115:87f2f5183dfb	439
Kojto	115:87f2f5183dfb	440	#define __NOR_WRITE NOR_WRITE
Kojto	115:87f2f5183dfb	441	#define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
Kojto	115:87f2f5183dfb	442	/**
Kojto	115:87f2f5183dfb	443	* @}
Kojto	115:87f2f5183dfb	444	*/
Kojto	115:87f2f5183dfb	445
Kojto	115:87f2f5183dfb	446	/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	447	* @{
Kojto	115:87f2f5183dfb	448	*/
Kojto	115:87f2f5183dfb	449
Kojto	115:87f2f5183dfb	450	#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
Kojto	115:87f2f5183dfb	451	#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	452	#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
Kojto	115:87f2f5183dfb	453	#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
Kojto	115:87f2f5183dfb	454
Kojto	115:87f2f5183dfb	455	#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
Kojto	115:87f2f5183dfb	456	#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	457	#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
Kojto	115:87f2f5183dfb	458	#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
Kojto	115:87f2f5183dfb	459
Kojto	115:87f2f5183dfb	460	#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
Kojto	115:87f2f5183dfb	461	#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	462
Kojto	115:87f2f5183dfb	463	#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
Kojto	115:87f2f5183dfb	464	#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	465
Kojto	115:87f2f5183dfb	466	#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
Kojto	115:87f2f5183dfb	467	#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	468
Kojto	115:87f2f5183dfb	469	#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	470
Kojto	115:87f2f5183dfb	471	#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
Kojto	115:87f2f5183dfb	472	#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
Kojto	115:87f2f5183dfb	473	#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
Kojto	115:87f2f5183dfb	474
Kojto	115:87f2f5183dfb	475	/**
Kojto	115:87f2f5183dfb	476	* @}
Kojto	115:87f2f5183dfb	477	*/
Kojto	115:87f2f5183dfb	478
Kojto	115:87f2f5183dfb	479	/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	480	* @{
Kojto	115:87f2f5183dfb	481	*/
Kojto	115:87f2f5183dfb	482	#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
Kojto	115:87f2f5183dfb	483	/**
Kojto	115:87f2f5183dfb	484	* @}
Kojto	115:87f2f5183dfb	485	*/
Kojto	115:87f2f5183dfb	486
Kojto	115:87f2f5183dfb	487	/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	488	* @{
Kojto	115:87f2f5183dfb	489	*/
Kojto	115:87f2f5183dfb	490
Kojto	115:87f2f5183dfb	491	/* Compact Flash-ATA registers description */
Kojto	115:87f2f5183dfb	492	#define CF_DATA ATA_DATA
Kojto	115:87f2f5183dfb	493	#define CF_SECTOR_COUNT ATA_SECTOR_COUNT
Kojto	115:87f2f5183dfb	494	#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
Kojto	115:87f2f5183dfb	495	#define CF_CYLINDER_LOW ATA_CYLINDER_LOW
Kojto	115:87f2f5183dfb	496	#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
Kojto	115:87f2f5183dfb	497	#define CF_CARD_HEAD ATA_CARD_HEAD
Kojto	115:87f2f5183dfb	498	#define CF_STATUS_CMD ATA_STATUS_CMD
Kojto	115:87f2f5183dfb	499	#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
Kojto	115:87f2f5183dfb	500	#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
Kojto	115:87f2f5183dfb	501
Kojto	115:87f2f5183dfb	502	/* Compact Flash-ATA commands */
Kojto	115:87f2f5183dfb	503	#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
Kojto	115:87f2f5183dfb	504	#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
Kojto	115:87f2f5183dfb	505	#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
Kojto	115:87f2f5183dfb	506	#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
Kojto	115:87f2f5183dfb	507
Kojto	115:87f2f5183dfb	508	#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
Kojto	115:87f2f5183dfb	509	#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
Kojto	115:87f2f5183dfb	510	#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
Kojto	115:87f2f5183dfb	511	#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
Kojto	115:87f2f5183dfb	512	#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
Kojto	115:87f2f5183dfb	513	/**
Kojto	115:87f2f5183dfb	514	* @}
Kojto	115:87f2f5183dfb	515	*/
Kojto	115:87f2f5183dfb	516
Kojto	115:87f2f5183dfb	517	/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	518	* @{
Kojto	115:87f2f5183dfb	519	*/
Kojto	115:87f2f5183dfb	520
Kojto	115:87f2f5183dfb	521	#define FORMAT_BIN RTC_FORMAT_BIN
Kojto	115:87f2f5183dfb	522	#define FORMAT_BCD RTC_FORMAT_BCD
Kojto	115:87f2f5183dfb	523
Kojto	115:87f2f5183dfb	524	#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
Kojto	115:87f2f5183dfb	525	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
Kojto	115:87f2f5183dfb	526	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
Kojto	115:87f2f5183dfb	527	#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	115:87f2f5183dfb	528	#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	115:87f2f5183dfb	529
Kojto	115:87f2f5183dfb	530	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	115:87f2f5183dfb	531	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	115:87f2f5183dfb	532	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
Kojto	115:87f2f5183dfb	533	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
Kojto	115:87f2f5183dfb	534	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	115:87f2f5183dfb	535	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	115:87f2f5183dfb	536	#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
Kojto	115:87f2f5183dfb	537	#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
Kojto	115:87f2f5183dfb	538
Kojto	115:87f2f5183dfb	539	#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
Kojto	115:87f2f5183dfb	540	#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
Kojto	115:87f2f5183dfb	541	#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
Kojto	115:87f2f5183dfb	542	#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
Kojto	115:87f2f5183dfb	543
Kojto	115:87f2f5183dfb	544	#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
Kojto	115:87f2f5183dfb	545	#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1
Kojto	115:87f2f5183dfb	546	#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1
Kojto	115:87f2f5183dfb	547
Kojto	115:87f2f5183dfb	548	#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
Kojto	115:87f2f5183dfb	549	#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
Kojto	115:87f2f5183dfb	550	#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
Kojto	115:87f2f5183dfb	551
Kojto	115:87f2f5183dfb	552	/**
Kojto	115:87f2f5183dfb	553	* @}
Kojto	115:87f2f5183dfb	554	*/
Kojto	115:87f2f5183dfb	555
Kojto	115:87f2f5183dfb	556
Kojto	115:87f2f5183dfb	557	/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	558	* @{
Kojto	115:87f2f5183dfb	559	*/
Kojto	115:87f2f5183dfb	560	#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
Kojto	115:87f2f5183dfb	561	#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
Kojto	115:87f2f5183dfb	562
Kojto	115:87f2f5183dfb	563	#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
Kojto	115:87f2f5183dfb	564	#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
Kojto	115:87f2f5183dfb	565	#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
Kojto	115:87f2f5183dfb	566	#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
Kojto	115:87f2f5183dfb	567
Kojto	115:87f2f5183dfb	568	#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
Kojto	115:87f2f5183dfb	569	#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
Kojto	115:87f2f5183dfb	570
Kojto	115:87f2f5183dfb	571	#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
Kojto	115:87f2f5183dfb	572	#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
Kojto	115:87f2f5183dfb	573	/**
Kojto	115:87f2f5183dfb	574	* @}
Kojto	115:87f2f5183dfb	575	*/
Kojto	115:87f2f5183dfb	576
Kojto	115:87f2f5183dfb	577
Kojto	115:87f2f5183dfb	578	/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	579	* @{
Kojto	115:87f2f5183dfb	580	*/
Kojto	115:87f2f5183dfb	581	#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
Kojto	115:87f2f5183dfb	582	#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
Kojto	115:87f2f5183dfb	583	#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
Kojto	115:87f2f5183dfb	584	#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
Kojto	115:87f2f5183dfb	585	#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
Kojto	115:87f2f5183dfb	586	#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
Kojto	115:87f2f5183dfb	587	#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
Kojto	115:87f2f5183dfb	588	#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
Kojto	115:87f2f5183dfb	589	#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE
Kojto	115:87f2f5183dfb	590	#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE
Kojto	115:87f2f5183dfb	591	#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
Kojto	115:87f2f5183dfb	592	/**
Kojto	115:87f2f5183dfb	593	* @}
Kojto	115:87f2f5183dfb	594	*/
Kojto	115:87f2f5183dfb	595
Kojto	115:87f2f5183dfb	596	/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	597	* @{
Kojto	115:87f2f5183dfb	598	*/
Kojto	115:87f2f5183dfb	599	#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
Kojto	115:87f2f5183dfb	600	#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
Kojto	115:87f2f5183dfb	601
Kojto	115:87f2f5183dfb	602	#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
Kojto	115:87f2f5183dfb	603	#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
Kojto	115:87f2f5183dfb	604
Kojto	115:87f2f5183dfb	605	#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
Kojto	115:87f2f5183dfb	606	#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
Kojto	115:87f2f5183dfb	607
Kojto	115:87f2f5183dfb	608	/**
Kojto	115:87f2f5183dfb	609	* @}
Kojto	115:87f2f5183dfb	610	*/
Kojto	115:87f2f5183dfb	611
Kojto	115:87f2f5183dfb	612	/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	613	* @{
Kojto	115:87f2f5183dfb	614	*/
Kojto	115:87f2f5183dfb	615	#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
Kojto	115:87f2f5183dfb	616	#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
Kojto	115:87f2f5183dfb	617
Kojto	115:87f2f5183dfb	618	#define TIM_DMABase_CR1 TIM_DMABASE_CR1
Kojto	115:87f2f5183dfb	619	#define TIM_DMABase_CR2 TIM_DMABASE_CR2
Kojto	115:87f2f5183dfb	620	#define TIM_DMABase_SMCR TIM_DMABASE_SMCR
Kojto	115:87f2f5183dfb	621	#define TIM_DMABase_DIER TIM_DMABASE_DIER
Kojto	115:87f2f5183dfb	622	#define TIM_DMABase_SR TIM_DMABASE_SR
Kojto	115:87f2f5183dfb	623	#define TIM_DMABase_EGR TIM_DMABASE_EGR
Kojto	115:87f2f5183dfb	624	#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
Kojto	115:87f2f5183dfb	625	#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
Kojto	115:87f2f5183dfb	626	#define TIM_DMABase_CCER TIM_DMABASE_CCER
Kojto	115:87f2f5183dfb	627	#define TIM_DMABase_CNT TIM_DMABASE_CNT
Kojto	115:87f2f5183dfb	628	#define TIM_DMABase_PSC TIM_DMABASE_PSC
Kojto	115:87f2f5183dfb	629	#define TIM_DMABase_ARR TIM_DMABASE_ARR
Kojto	115:87f2f5183dfb	630	#define TIM_DMABase_RCR TIM_DMABASE_RCR
Kojto	115:87f2f5183dfb	631	#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
Kojto	115:87f2f5183dfb	632	#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
Kojto	115:87f2f5183dfb	633	#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
Kojto	115:87f2f5183dfb	634	#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
Kojto	115:87f2f5183dfb	635	#define TIM_DMABase_BDTR TIM_DMABASE_BDTR
Kojto	115:87f2f5183dfb	636	#define TIM_DMABase_DCR TIM_DMABASE_DCR
Kojto	115:87f2f5183dfb	637	#define TIM_DMABase_DMAR TIM_DMABASE_DMAR
Kojto	115:87f2f5183dfb	638	#define TIM_DMABase_OR1 TIM_DMABASE_OR1
Kojto	115:87f2f5183dfb	639	#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
Kojto	115:87f2f5183dfb	640	#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
Kojto	115:87f2f5183dfb	641	#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
Kojto	115:87f2f5183dfb	642	#define TIM_DMABase_OR2 TIM_DMABASE_OR2
Kojto	115:87f2f5183dfb	643	#define TIM_DMABase_OR3 TIM_DMABASE_OR3
Kojto	115:87f2f5183dfb	644	#define TIM_DMABase_OR TIM_DMABASE_OR
Kojto	115:87f2f5183dfb	645
Kojto	115:87f2f5183dfb	646	#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
Kojto	115:87f2f5183dfb	647	#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
Kojto	115:87f2f5183dfb	648	#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
Kojto	115:87f2f5183dfb	649	#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
Kojto	115:87f2f5183dfb	650	#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
Kojto	115:87f2f5183dfb	651	#define TIM_EventSource_COM TIM_EVENTSOURCE_COM
Kojto	115:87f2f5183dfb	652	#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
Kojto	115:87f2f5183dfb	653	#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
Kojto	115:87f2f5183dfb	654	#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
Kojto	115:87f2f5183dfb	655
Kojto	115:87f2f5183dfb	656	#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
Kojto	115:87f2f5183dfb	657	#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
Kojto	115:87f2f5183dfb	658	#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
Kojto	115:87f2f5183dfb	659	#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
Kojto	115:87f2f5183dfb	660	#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
Kojto	115:87f2f5183dfb	661	#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
Kojto	115:87f2f5183dfb	662	#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
Kojto	115:87f2f5183dfb	663	#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
Kojto	115:87f2f5183dfb	664	#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
Kojto	115:87f2f5183dfb	665	#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
Kojto	115:87f2f5183dfb	666	#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
Kojto	115:87f2f5183dfb	667	#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
Kojto	115:87f2f5183dfb	668	#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
Kojto	115:87f2f5183dfb	669	#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
Kojto	115:87f2f5183dfb	670	#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
Kojto	115:87f2f5183dfb	671	#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
Kojto	115:87f2f5183dfb	672	#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
Kojto	115:87f2f5183dfb	673	#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
Kojto	115:87f2f5183dfb	674
Kojto	115:87f2f5183dfb	675	/**
Kojto	115:87f2f5183dfb	676	* @}
Kojto	115:87f2f5183dfb	677	*/
Kojto	115:87f2f5183dfb	678
Kojto	115:87f2f5183dfb	679	/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	680	* @{
Kojto	115:87f2f5183dfb	681	*/
Kojto	115:87f2f5183dfb	682	#define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING
Kojto	115:87f2f5183dfb	683	#define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING
Kojto	115:87f2f5183dfb	684	/**
Kojto	115:87f2f5183dfb	685	* @}
Kojto	115:87f2f5183dfb	686	*/
Kojto	115:87f2f5183dfb	687
Kojto	115:87f2f5183dfb	688	/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	689	* @{
Kojto	115:87f2f5183dfb	690	*/
Kojto	115:87f2f5183dfb	691	#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
Kojto	115:87f2f5183dfb	692	#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
Kojto	115:87f2f5183dfb	693	#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
Kojto	115:87f2f5183dfb	694	#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
Kojto	115:87f2f5183dfb	695
Kojto	115:87f2f5183dfb	696	#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
Kojto	115:87f2f5183dfb	697	#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
Kojto	115:87f2f5183dfb	698
Kojto	115:87f2f5183dfb	699	#define __DIV_SAMPLING16 UART_DIV_SAMPLING16
Kojto	115:87f2f5183dfb	700	#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
Kojto	115:87f2f5183dfb	701	#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
Kojto	115:87f2f5183dfb	702	#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
Kojto	115:87f2f5183dfb	703
Kojto	115:87f2f5183dfb	704	#define __DIV_SAMPLING8 UART_DIV_SAMPLING8
Kojto	115:87f2f5183dfb	705	#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
Kojto	115:87f2f5183dfb	706	#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
Kojto	115:87f2f5183dfb	707	#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
Kojto	115:87f2f5183dfb	708
Kojto	115:87f2f5183dfb	709	#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
Kojto	115:87f2f5183dfb	710	#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
Kojto	115:87f2f5183dfb	711
Kojto	115:87f2f5183dfb	712	/**
Kojto	115:87f2f5183dfb	713	* @}
Kojto	115:87f2f5183dfb	714	*/
Kojto	115:87f2f5183dfb	715
Kojto	115:87f2f5183dfb	716
Kojto	115:87f2f5183dfb	717	/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	718	* @{
Kojto	115:87f2f5183dfb	719	*/
Kojto	115:87f2f5183dfb	720
Kojto	115:87f2f5183dfb	721	#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
Kojto	115:87f2f5183dfb	722	#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
Kojto	115:87f2f5183dfb	723
Kojto	115:87f2f5183dfb	724	#define USARTNACK_ENABLED USART_NACK_ENABLE
Kojto	115:87f2f5183dfb	725	#define USARTNACK_DISABLED USART_NACK_DISABLE
Kojto	115:87f2f5183dfb	726	/**
Kojto	115:87f2f5183dfb	727	* @}
Kojto	115:87f2f5183dfb	728	*/
Kojto	115:87f2f5183dfb	729
Kojto	115:87f2f5183dfb	730	/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	731	* @{
Kojto	115:87f2f5183dfb	732	*/
Kojto	115:87f2f5183dfb	733	#define CFR_BASE WWDG_CFR_BASE
Kojto	115:87f2f5183dfb	734
Kojto	115:87f2f5183dfb	735	/**
Kojto	115:87f2f5183dfb	736	* @}
Kojto	115:87f2f5183dfb	737	*/
Kojto	115:87f2f5183dfb	738
Kojto	115:87f2f5183dfb	739	/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	740	* @{
Kojto	115:87f2f5183dfb	741	*/
Kojto	115:87f2f5183dfb	742	#define CAN_FilterFIFO0 CAN_FILTER_FIFO0
Kojto	115:87f2f5183dfb	743	#define CAN_FilterFIFO1 CAN_FILTER_FIFO1
Kojto	115:87f2f5183dfb	744	#define CAN_IT_RQCP0 CAN_IT_TME
Kojto	115:87f2f5183dfb	745	#define CAN_IT_RQCP1 CAN_IT_TME
Kojto	115:87f2f5183dfb	746	#define CAN_IT_RQCP2 CAN_IT_TME
Kojto	115:87f2f5183dfb	747	#define INAK_TIMEOUT CAN_TIMEOUT_VALUE
Kojto	115:87f2f5183dfb	748	#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
Kojto	115:87f2f5183dfb	749	#define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
Kojto	115:87f2f5183dfb	750	#define CAN_TXSTATUS_OK ((uint8_t)0x01)
Kojto	115:87f2f5183dfb	751	#define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
Kojto	115:87f2f5183dfb	752
Kojto	115:87f2f5183dfb	753	/**
Kojto	115:87f2f5183dfb	754	* @}
Kojto	115:87f2f5183dfb	755	*/
Kojto	115:87f2f5183dfb	756
Kojto	115:87f2f5183dfb	757	/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	758	* @{
Kojto	115:87f2f5183dfb	759	*/
Kojto	115:87f2f5183dfb	760
Kojto	115:87f2f5183dfb	761	#define VLAN_TAG ETH_VLAN_TAG
Kojto	115:87f2f5183dfb	762	#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
Kojto	115:87f2f5183dfb	763	#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
Kojto	115:87f2f5183dfb	764	#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
Kojto	115:87f2f5183dfb	765	#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
Kojto	115:87f2f5183dfb	766	#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
Kojto	115:87f2f5183dfb	767	#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
Kojto	115:87f2f5183dfb	768	#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
Kojto	115:87f2f5183dfb	769
Kojto	115:87f2f5183dfb	770	#define ETH_MMCCR ((uint32_t)0x00000100)
Kojto	115:87f2f5183dfb	771	#define ETH_MMCRIR ((uint32_t)0x00000104)
Kojto	115:87f2f5183dfb	772	#define ETH_MMCTIR ((uint32_t)0x00000108)
Kojto	115:87f2f5183dfb	773	#define ETH_MMCRIMR ((uint32_t)0x0000010C)
Kojto	115:87f2f5183dfb	774	#define ETH_MMCTIMR ((uint32_t)0x00000110)
Kojto	115:87f2f5183dfb	775	#define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
Kojto	115:87f2f5183dfb	776	#define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
Kojto	115:87f2f5183dfb	777	#define ETH_MMCTGFCR ((uint32_t)0x00000168)
Kojto	115:87f2f5183dfb	778	#define ETH_MMCRFCECR ((uint32_t)0x00000194)
Kojto	115:87f2f5183dfb	779	#define ETH_MMCRFAECR ((uint32_t)0x00000198)
Kojto	115:87f2f5183dfb	780	#define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
Kojto	115:87f2f5183dfb	781
Kojto	115:87f2f5183dfb	782	/**
Kojto	115:87f2f5183dfb	783	* @}
Kojto	115:87f2f5183dfb	784	*/
Kojto	115:87f2f5183dfb	785
Kojto	115:87f2f5183dfb	786	/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
Kojto	115:87f2f5183dfb	787	* @{
Kojto	115:87f2f5183dfb	788	*/
Kojto	115:87f2f5183dfb	789
Kojto	115:87f2f5183dfb	790	/**
Kojto	115:87f2f5183dfb	791	* @}
Kojto	115:87f2f5183dfb	792	*/
Kojto	115:87f2f5183dfb	793
Kojto	115:87f2f5183dfb	794	/* Exported functions --------------------------------------------------------*/
Kojto	115:87f2f5183dfb	795
Kojto	115:87f2f5183dfb	796	/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	797	* @{
Kojto	115:87f2f5183dfb	798	*/
Kojto	115:87f2f5183dfb	799	#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
Kojto	115:87f2f5183dfb	800	/**
Kojto	115:87f2f5183dfb	801	* @}
Kojto	115:87f2f5183dfb	802	*/
Kojto	115:87f2f5183dfb	803
Kojto	115:87f2f5183dfb	804	/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	805	* @{
Kojto	115:87f2f5183dfb	806	*/
Kojto	115:87f2f5183dfb	807
Kojto	115:87f2f5183dfb	808	#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
Kojto	115:87f2f5183dfb	809	#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
Kojto	115:87f2f5183dfb	810	#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
Kojto	115:87f2f5183dfb	811	#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
Kojto	115:87f2f5183dfb	812
Kojto	115:87f2f5183dfb	813	/HASH Algorithm Selection/
Kojto	115:87f2f5183dfb	814
Kojto	115:87f2f5183dfb	815	#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
Kojto	115:87f2f5183dfb	816	#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
Kojto	115:87f2f5183dfb	817	#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
Kojto	115:87f2f5183dfb	818	#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
Kojto	115:87f2f5183dfb	819
Kojto	115:87f2f5183dfb	820	#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
Kojto	115:87f2f5183dfb	821	#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
Kojto	115:87f2f5183dfb	822
Kojto	115:87f2f5183dfb	823	#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
Kojto	115:87f2f5183dfb	824	#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
Kojto	115:87f2f5183dfb	825	/**
Kojto	115:87f2f5183dfb	826	* @}
Kojto	115:87f2f5183dfb	827	*/
Kojto	115:87f2f5183dfb	828
Kojto	115:87f2f5183dfb	829	/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	830	* @{
Kojto	115:87f2f5183dfb	831	*/
Kojto	115:87f2f5183dfb	832	#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
Kojto	115:87f2f5183dfb	833	#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
Kojto	115:87f2f5183dfb	834	#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
Kojto	115:87f2f5183dfb	835	#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
Kojto	115:87f2f5183dfb	836	#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
Kojto	115:87f2f5183dfb	837	#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
Kojto	115:87f2f5183dfb	838	#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
Kojto	115:87f2f5183dfb	839	#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
Kojto	115:87f2f5183dfb	840	#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
Kojto	115:87f2f5183dfb	841	#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
Kojto	115:87f2f5183dfb	842	#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
Kojto	115:87f2f5183dfb	843	#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
Kojto	115:87f2f5183dfb	844	/**
Kojto	115:87f2f5183dfb	845	* @}
Kojto	115:87f2f5183dfb	846	*/
Kojto	115:87f2f5183dfb	847
Kojto	115:87f2f5183dfb	848	/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	849	* @{
Kojto	115:87f2f5183dfb	850	*/
Kojto	115:87f2f5183dfb	851	#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
Kojto	115:87f2f5183dfb	852	#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
Kojto	115:87f2f5183dfb	853	#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
Kojto	115:87f2f5183dfb	854	#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
Kojto	115:87f2f5183dfb	855	#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
Kojto	115:87f2f5183dfb	856	#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
Kojto	115:87f2f5183dfb	857	#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
Kojto	115:87f2f5183dfb	858
Kojto	115:87f2f5183dfb	859	/**
Kojto	115:87f2f5183dfb	860	* @}
Kojto	115:87f2f5183dfb	861	*/
Kojto	115:87f2f5183dfb	862
Kojto	115:87f2f5183dfb	863	/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	864	* @{
Kojto	115:87f2f5183dfb	865	*/
Kojto	115:87f2f5183dfb	866	#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
Kojto	115:87f2f5183dfb	867	#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
Kojto	115:87f2f5183dfb	868
Kojto	115:87f2f5183dfb	869	#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
Kojto	115:87f2f5183dfb	870	/**
Kojto	115:87f2f5183dfb	871	* @}
Kojto	115:87f2f5183dfb	872	*/
Kojto	115:87f2f5183dfb	873
Kojto	115:87f2f5183dfb	874	/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
Kojto	115:87f2f5183dfb	875	* @{
Kojto	115:87f2f5183dfb	876	*/
Kojto	115:87f2f5183dfb	877	#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
Kojto	115:87f2f5183dfb	878	#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
Kojto	115:87f2f5183dfb	879	#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
Kojto	115:87f2f5183dfb	880	#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
Kojto	115:87f2f5183dfb	881	#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
Kojto	115:87f2f5183dfb	882	#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
Kojto	115:87f2f5183dfb	883	#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
Kojto	115:87f2f5183dfb	884	#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
Kojto	115:87f2f5183dfb	885	#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
Kojto	115:87f2f5183dfb	886	#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
Kojto	115:87f2f5183dfb	887	#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
Kojto	115:87f2f5183dfb	888	#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
Kojto	115:87f2f5183dfb	889	#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
Kojto	115:87f2f5183dfb	890	#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
Kojto	115:87f2f5183dfb	891	#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
Kojto	115:87f2f5183dfb	892	#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
Kojto	115:87f2f5183dfb	893
Kojto	115:87f2f5183dfb	894	#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
Kojto	115:87f2f5183dfb	895	#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
Kojto	115:87f2f5183dfb	896	#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
Kojto	115:87f2f5183dfb	897	#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
Kojto	115:87f2f5183dfb	898	#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
Kojto	115:87f2f5183dfb	899	#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
Kojto	115:87f2f5183dfb	900	#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
Kojto	115:87f2f5183dfb	901
Kojto	115:87f2f5183dfb	902	#define CR_OFFSET_BB PWR_CR_OFFSET_BB
Kojto	115:87f2f5183dfb	903	#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
Kojto	115:87f2f5183dfb	904
Kojto	115:87f2f5183dfb	905	#define DBP_BitNumber DBP_BIT_NUMBER
Kojto	115:87f2f5183dfb	906	#define PVDE_BitNumber PVDE_BIT_NUMBER
Kojto	115:87f2f5183dfb	907	#define PMODE_BitNumber PMODE_BIT_NUMBER
Kojto	115:87f2f5183dfb	908	#define EWUP_BitNumber EWUP_BIT_NUMBER
Kojto	115:87f2f5183dfb	909	#define FPDS_BitNumber FPDS_BIT_NUMBER
Kojto	115:87f2f5183dfb	910	#define ODEN_BitNumber ODEN_BIT_NUMBER
Kojto	115:87f2f5183dfb	911	#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
Kojto	115:87f2f5183dfb	912	#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
Kojto	115:87f2f5183dfb	913	#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
Kojto	115:87f2f5183dfb	914	#define BRE_BitNumber BRE_BIT_NUMBER
Kojto	115:87f2f5183dfb	915
Kojto	115:87f2f5183dfb	916	#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
Kojto	115:87f2f5183dfb	917
Kojto	115:87f2f5183dfb	918	/**
Kojto	115:87f2f5183dfb	919	* @}
Kojto	115:87f2f5183dfb	920	*/
Kojto	115:87f2f5183dfb	921
Kojto	115:87f2f5183dfb	922	/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	923	* @{
Kojto	115:87f2f5183dfb	924	*/
Kojto	115:87f2f5183dfb	925	#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
Kojto	115:87f2f5183dfb	926	#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
Kojto	115:87f2f5183dfb	927	#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
Kojto	115:87f2f5183dfb	928	/**
Kojto	115:87f2f5183dfb	929	* @}
Kojto	115:87f2f5183dfb	930	*/
Kojto	115:87f2f5183dfb	931
Kojto	115:87f2f5183dfb	932	/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	933	* @{
Kojto	115:87f2f5183dfb	934	*/
Kojto	115:87f2f5183dfb	935	#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
Kojto	115:87f2f5183dfb	936	/**
Kojto	115:87f2f5183dfb	937	* @}
Kojto	115:87f2f5183dfb	938	*/
Kojto	115:87f2f5183dfb	939
Kojto	115:87f2f5183dfb	940	/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	941	* @{
Kojto	115:87f2f5183dfb	942	*/
Kojto	115:87f2f5183dfb	943	#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
Kojto	115:87f2f5183dfb	944	#define HAL_TIM_DMAError TIM_DMAError
Kojto	115:87f2f5183dfb	945	#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
Kojto	115:87f2f5183dfb	946	#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
Kojto	115:87f2f5183dfb	947	/**
Kojto	115:87f2f5183dfb	948	* @}
Kojto	115:87f2f5183dfb	949	*/
Kojto	115:87f2f5183dfb	950
Kojto	115:87f2f5183dfb	951	/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	952	* @{
Kojto	115:87f2f5183dfb	953	*/
Kojto	115:87f2f5183dfb	954	#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
Kojto	115:87f2f5183dfb	955	/**
Kojto	115:87f2f5183dfb	956	* @}
Kojto	115:87f2f5183dfb	957	*/
Kojto	115:87f2f5183dfb	958
Kojto	115:87f2f5183dfb	959	/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	960	* @{
Kojto	115:87f2f5183dfb	961	*/
Kojto	115:87f2f5183dfb	962	#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
Kojto	115:87f2f5183dfb	963	/**
Kojto	115:87f2f5183dfb	964	* @}
Kojto	115:87f2f5183dfb	965	*/
Kojto	115:87f2f5183dfb	966
Kojto	115:87f2f5183dfb	967
Kojto	115:87f2f5183dfb	968	/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
Kojto	115:87f2f5183dfb	969	* @{
Kojto	115:87f2f5183dfb	970	*/
Kojto	115:87f2f5183dfb	971
Kojto	115:87f2f5183dfb	972	/**
Kojto	115:87f2f5183dfb	973	* @}
Kojto	115:87f2f5183dfb	974	*/
Kojto	115:87f2f5183dfb	975
Kojto	115:87f2f5183dfb	976	/* Exported macros ------------------------------------------------------------*/
Kojto	115:87f2f5183dfb	977
Kojto	115:87f2f5183dfb	978	/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	979	* @{
Kojto	115:87f2f5183dfb	980	*/
Kojto	115:87f2f5183dfb	981	#define AES_IT_CC CRYP_IT_CC
Kojto	115:87f2f5183dfb	982	#define AES_IT_ERR CRYP_IT_ERR
Kojto	115:87f2f5183dfb	983	#define AES_FLAG_CCF CRYP_FLAG_CCF
Kojto	115:87f2f5183dfb	984	/**
Kojto	115:87f2f5183dfb	985	* @}
Kojto	115:87f2f5183dfb	986	*/
Kojto	115:87f2f5183dfb	987
Kojto	115:87f2f5183dfb	988	/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	989	* @{
Kojto	115:87f2f5183dfb	990	*/
Kojto	115:87f2f5183dfb	991	#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
Kojto	115:87f2f5183dfb	992	#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
Kojto	115:87f2f5183dfb	993	#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
Kojto	115:87f2f5183dfb	994	#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
Kojto	115:87f2f5183dfb	995	#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
Kojto	115:87f2f5183dfb	996	#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
Kojto	115:87f2f5183dfb	997	#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
Kojto	115:87f2f5183dfb	998	#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
Kojto	115:87f2f5183dfb	999	#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
Kojto	115:87f2f5183dfb	1000	#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
Kojto	115:87f2f5183dfb	1001	#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
Kojto	115:87f2f5183dfb	1002	#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
Kojto	115:87f2f5183dfb	1003	#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
Kojto	115:87f2f5183dfb	1004
Kojto	115:87f2f5183dfb	1005	#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
Kojto	115:87f2f5183dfb	1006	#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
Kojto	115:87f2f5183dfb	1007	#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
Kojto	115:87f2f5183dfb	1008	#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
Kojto	115:87f2f5183dfb	1009	#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
Kojto	115:87f2f5183dfb	1010
Kojto	115:87f2f5183dfb	1011	/**
Kojto	115:87f2f5183dfb	1012	* @}
Kojto	115:87f2f5183dfb	1013	*/
Kojto	115:87f2f5183dfb	1014
Kojto	115:87f2f5183dfb	1015
Kojto	115:87f2f5183dfb	1016	/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1017	* @{
Kojto	115:87f2f5183dfb	1018	*/
Kojto	115:87f2f5183dfb	1019	#define __ADC_ENABLE __HAL_ADC_ENABLE
Kojto	115:87f2f5183dfb	1020	#define __ADC_DISABLE __HAL_ADC_DISABLE
Kojto	115:87f2f5183dfb	1021	#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
Kojto	115:87f2f5183dfb	1022	#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
Kojto	115:87f2f5183dfb	1023	#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
Kojto	115:87f2f5183dfb	1024	#define __ADC_IS_ENABLED ADC_IS_ENABLE
Kojto	115:87f2f5183dfb	1025	#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
Kojto	115:87f2f5183dfb	1026	#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
Kojto	115:87f2f5183dfb	1027	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
Kojto	115:87f2f5183dfb	1028	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
Kojto	115:87f2f5183dfb	1029	#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
Kojto	115:87f2f5183dfb	1030	#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
Kojto	115:87f2f5183dfb	1031	#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
Kojto	115:87f2f5183dfb	1032
Kojto	115:87f2f5183dfb	1033	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
Kojto	115:87f2f5183dfb	1034	#define __HAL_ADC_JSQR_RK ADC_JSQR_RK
Kojto	115:87f2f5183dfb	1035	#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
Kojto	115:87f2f5183dfb	1036	#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
Kojto	115:87f2f5183dfb	1037	#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
Kojto	115:87f2f5183dfb	1038	#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
Kojto	115:87f2f5183dfb	1039	#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
Kojto	115:87f2f5183dfb	1040	#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
Kojto	115:87f2f5183dfb	1041	#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
Kojto	115:87f2f5183dfb	1042	#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
Kojto	115:87f2f5183dfb	1043	#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
Kojto	115:87f2f5183dfb	1044	#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
Kojto	115:87f2f5183dfb	1045	#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
Kojto	115:87f2f5183dfb	1046	#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
Kojto	115:87f2f5183dfb	1047	#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
Kojto	115:87f2f5183dfb	1048	#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
Kojto	115:87f2f5183dfb	1049	#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
Kojto	115:87f2f5183dfb	1050	#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
Kojto	115:87f2f5183dfb	1051	#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
Kojto	115:87f2f5183dfb	1052	#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
Kojto	115:87f2f5183dfb	1053
Kojto	115:87f2f5183dfb	1054	#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
Kojto	115:87f2f5183dfb	1055	#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
Kojto	115:87f2f5183dfb	1056	#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
Kojto	115:87f2f5183dfb	1057	#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
Kojto	115:87f2f5183dfb	1058	#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
Kojto	115:87f2f5183dfb	1059	#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
Kojto	115:87f2f5183dfb	1060	#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
Kojto	115:87f2f5183dfb	1061	#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
Kojto	115:87f2f5183dfb	1062	#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
Kojto	115:87f2f5183dfb	1063	#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
Kojto	115:87f2f5183dfb	1064
Kojto	115:87f2f5183dfb	1065	#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
Kojto	115:87f2f5183dfb	1066	#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
Kojto	115:87f2f5183dfb	1067	#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
Kojto	115:87f2f5183dfb	1068	#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
Kojto	115:87f2f5183dfb	1069	#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
Kojto	115:87f2f5183dfb	1070	#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
Kojto	115:87f2f5183dfb	1071	#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
Kojto	115:87f2f5183dfb	1072	#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
Kojto	115:87f2f5183dfb	1073
Kojto	115:87f2f5183dfb	1074	#define __HAL_ADC_SQR1 ADC_SQR1
Kojto	115:87f2f5183dfb	1075	#define __HAL_ADC_SMPR1 ADC_SMPR1
Kojto	115:87f2f5183dfb	1076	#define __HAL_ADC_SMPR2 ADC_SMPR2
Kojto	115:87f2f5183dfb	1077	#define __HAL_ADC_SQR3_RK ADC_SQR3_RK
Kojto	115:87f2f5183dfb	1078	#define __HAL_ADC_SQR2_RK ADC_SQR2_RK
Kojto	115:87f2f5183dfb	1079	#define __HAL_ADC_SQR1_RK ADC_SQR1_RK
Kojto	115:87f2f5183dfb	1080	#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
Kojto	115:87f2f5183dfb	1081	#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
Kojto	115:87f2f5183dfb	1082	#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
Kojto	115:87f2f5183dfb	1083	#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
Kojto	115:87f2f5183dfb	1084	#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
Kojto	115:87f2f5183dfb	1085	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
Kojto	115:87f2f5183dfb	1086	#define __HAL_ADC_JSQR ADC_JSQR
Kojto	115:87f2f5183dfb	1087
Kojto	115:87f2f5183dfb	1088	#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
Kojto	115:87f2f5183dfb	1089	#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
Kojto	115:87f2f5183dfb	1090	#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
Kojto	115:87f2f5183dfb	1091	#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
Kojto	115:87f2f5183dfb	1092	#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
Kojto	115:87f2f5183dfb	1093	#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
Kojto	115:87f2f5183dfb	1094	#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
Kojto	115:87f2f5183dfb	1095	#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
Kojto	115:87f2f5183dfb	1096
Kojto	115:87f2f5183dfb	1097	/**
Kojto	115:87f2f5183dfb	1098	* @}
Kojto	115:87f2f5183dfb	1099	*/
Kojto	115:87f2f5183dfb	1100
Kojto	115:87f2f5183dfb	1101	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1102	* @{
Kojto	115:87f2f5183dfb	1103	*/
Kojto	115:87f2f5183dfb	1104	#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
Kojto	115:87f2f5183dfb	1105	#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
Kojto	115:87f2f5183dfb	1106	#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
Kojto	115:87f2f5183dfb	1107	#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
Kojto	115:87f2f5183dfb	1108
Kojto	115:87f2f5183dfb	1109	/**
Kojto	115:87f2f5183dfb	1110	* @}
Kojto	115:87f2f5183dfb	1111	*/
Kojto	115:87f2f5183dfb	1112
Kojto	115:87f2f5183dfb	1113	/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1114	* @{
Kojto	115:87f2f5183dfb	1115	*/
Kojto	115:87f2f5183dfb	1116	#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
Kojto	115:87f2f5183dfb	1117	#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
Kojto	115:87f2f5183dfb	1118	#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
Kojto	115:87f2f5183dfb	1119	#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
Kojto	115:87f2f5183dfb	1120	#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
Kojto	115:87f2f5183dfb	1121	#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
Kojto	115:87f2f5183dfb	1122	#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
Kojto	115:87f2f5183dfb	1123	#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
Kojto	115:87f2f5183dfb	1124	#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
Kojto	115:87f2f5183dfb	1125	#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
Kojto	115:87f2f5183dfb	1126	#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
Kojto	115:87f2f5183dfb	1127	#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
Kojto	115:87f2f5183dfb	1128	#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
Kojto	115:87f2f5183dfb	1129	#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
Kojto	115:87f2f5183dfb	1130	#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
Kojto	115:87f2f5183dfb	1131	#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
Kojto	115:87f2f5183dfb	1132
Kojto	115:87f2f5183dfb	1133	#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
Kojto	115:87f2f5183dfb	1134	#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
Kojto	115:87f2f5183dfb	1135	#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
Kojto	115:87f2f5183dfb	1136	#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
Kojto	115:87f2f5183dfb	1137	#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
Kojto	115:87f2f5183dfb	1138	#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
Kojto	115:87f2f5183dfb	1139	#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
Kojto	115:87f2f5183dfb	1140	#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
Kojto	115:87f2f5183dfb	1141	#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
Kojto	115:87f2f5183dfb	1142	#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
Kojto	115:87f2f5183dfb	1143	#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
Kojto	115:87f2f5183dfb	1144	#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
Kojto	115:87f2f5183dfb	1145	#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
Kojto	115:87f2f5183dfb	1146	#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
Kojto	115:87f2f5183dfb	1147
Kojto	115:87f2f5183dfb	1148
Kojto	115:87f2f5183dfb	1149	#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
Kojto	115:87f2f5183dfb	1150	#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
Kojto	115:87f2f5183dfb	1151	#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
Kojto	115:87f2f5183dfb	1152	#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
Kojto	115:87f2f5183dfb	1153	#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
Kojto	115:87f2f5183dfb	1154	#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
Kojto	115:87f2f5183dfb	1155	#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
Kojto	115:87f2f5183dfb	1156	#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
Kojto	115:87f2f5183dfb	1157	#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
Kojto	115:87f2f5183dfb	1158	#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
Kojto	115:87f2f5183dfb	1159	#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
Kojto	115:87f2f5183dfb	1160	#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
Kojto	115:87f2f5183dfb	1161	#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
Kojto	115:87f2f5183dfb	1162	#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
Kojto	115:87f2f5183dfb	1163	#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
Kojto	115:87f2f5183dfb	1164	#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
Kojto	115:87f2f5183dfb	1165	#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
Kojto	115:87f2f5183dfb	1166	#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
Kojto	115:87f2f5183dfb	1167	#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
Kojto	115:87f2f5183dfb	1168	#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
Kojto	115:87f2f5183dfb	1169	#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
Kojto	115:87f2f5183dfb	1170	#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
Kojto	115:87f2f5183dfb	1171	#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
Kojto	115:87f2f5183dfb	1172	#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
Kojto	115:87f2f5183dfb	1173
Kojto	115:87f2f5183dfb	1174	/**
Kojto	115:87f2f5183dfb	1175	* @}
Kojto	115:87f2f5183dfb	1176	*/
Kojto	115:87f2f5183dfb	1177
Kojto	115:87f2f5183dfb	1178	/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1179	* @{
Kojto	115:87f2f5183dfb	1180	*/
Kojto	115:87f2f5183dfb	1181
Kojto	115:87f2f5183dfb	1182	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
Kojto	115:87f2f5183dfb	1183	__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
Kojto	115:87f2f5183dfb	1184	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
Kojto	115:87f2f5183dfb	1185	__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
Kojto	115:87f2f5183dfb	1186	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
Kojto	115:87f2f5183dfb	1187	__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
Kojto	115:87f2f5183dfb	1188	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
Kojto	115:87f2f5183dfb	1189	__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
Kojto	115:87f2f5183dfb	1190	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
Kojto	115:87f2f5183dfb	1191	__HAL_COMP_COMP2_EXTI_ENABLE_IT())
Kojto	115:87f2f5183dfb	1192	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
Kojto	115:87f2f5183dfb	1193	__HAL_COMP_COMP2_EXTI_DISABLE_IT())
Kojto	115:87f2f5183dfb	1194	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
Kojto	115:87f2f5183dfb	1195	__HAL_COMP_COMP2_EXTI_GET_FLAG())
Kojto	115:87f2f5183dfb	1196	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
Kojto	115:87f2f5183dfb	1197	__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
Kojto	115:87f2f5183dfb	1198	#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
Kojto	115:87f2f5183dfb	1199
Kojto	115:87f2f5183dfb	1200	/**
Kojto	115:87f2f5183dfb	1201	* @}
Kojto	115:87f2f5183dfb	1202	*/
Kojto	115:87f2f5183dfb	1203
Kojto	115:87f2f5183dfb	1204	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1205	* @{
Kojto	115:87f2f5183dfb	1206	*/
Kojto	115:87f2f5183dfb	1207
Kojto	115:87f2f5183dfb	1208	#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) \|\| \
Kojto	115:87f2f5183dfb	1209	((WAVE) == DAC_WAVE_NOISE)\|\| \
Kojto	115:87f2f5183dfb	1210	((WAVE) == DAC_WAVE_TRIANGLE))
Kojto	115:87f2f5183dfb	1211
Kojto	115:87f2f5183dfb	1212	/**
Kojto	115:87f2f5183dfb	1213	* @}
Kojto	115:87f2f5183dfb	1214	*/
Kojto	115:87f2f5183dfb	1215
Kojto	115:87f2f5183dfb	1216	/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1217	* @{
Kojto	115:87f2f5183dfb	1218	*/
Kojto	115:87f2f5183dfb	1219
Kojto	115:87f2f5183dfb	1220	#define IS_WRPAREA IS_OB_WRPAREA
Kojto	115:87f2f5183dfb	1221	#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
Kojto	115:87f2f5183dfb	1222	#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
Kojto	115:87f2f5183dfb	1223	#define IS_TYPEERASE IS_FLASH_TYPEERASE
Kojto	115:87f2f5183dfb	1224	#define IS_NBSECTORS IS_FLASH_NBSECTORS
Kojto	115:87f2f5183dfb	1225	#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE
Kojto	115:87f2f5183dfb	1226
Kojto	115:87f2f5183dfb	1227	/**
Kojto	115:87f2f5183dfb	1228	* @}
Kojto	115:87f2f5183dfb	1229	*/
Kojto	115:87f2f5183dfb	1230
Kojto	115:87f2f5183dfb	1231	/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1232	* @{
Kojto	115:87f2f5183dfb	1233	*/
Kojto	115:87f2f5183dfb	1234
Kojto	115:87f2f5183dfb	1235	#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
Kojto	115:87f2f5183dfb	1236	#define __HAL_I2C_GENERATE_START I2C_GENERATE_START
Kojto	115:87f2f5183dfb	1237	#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
Kojto	115:87f2f5183dfb	1238	#define __HAL_I2C_RISE_TIME I2C_RISE_TIME
Kojto	115:87f2f5183dfb	1239	#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
Kojto	115:87f2f5183dfb	1240	#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
Kojto	115:87f2f5183dfb	1241	#define __HAL_I2C_SPEED I2C_SPEED
Kojto	115:87f2f5183dfb	1242	#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
Kojto	115:87f2f5183dfb	1243	#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
Kojto	115:87f2f5183dfb	1244	#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
Kojto	115:87f2f5183dfb	1245	#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
Kojto	115:87f2f5183dfb	1246	#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
Kojto	115:87f2f5183dfb	1247	#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
Kojto	115:87f2f5183dfb	1248	#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
Kojto	115:87f2f5183dfb	1249	#define __HAL_I2C_FREQRANGE I2C_FREQRANGE
Kojto	115:87f2f5183dfb	1250	/**
Kojto	115:87f2f5183dfb	1251	* @}
Kojto	115:87f2f5183dfb	1252	*/
Kojto	115:87f2f5183dfb	1253
Kojto	115:87f2f5183dfb	1254	/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1255	* @{
Kojto	115:87f2f5183dfb	1256	*/
Kojto	115:87f2f5183dfb	1257
Kojto	115:87f2f5183dfb	1258	#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
Kojto	115:87f2f5183dfb	1259	#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
Kojto	115:87f2f5183dfb	1260
Kojto	115:87f2f5183dfb	1261	/**
Kojto	115:87f2f5183dfb	1262	* @}
Kojto	115:87f2f5183dfb	1263	*/
Kojto	115:87f2f5183dfb	1264
Kojto	115:87f2f5183dfb	1265	/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1266	* @{
Kojto	115:87f2f5183dfb	1267	*/
Kojto	115:87f2f5183dfb	1268
Kojto	115:87f2f5183dfb	1269	#define __IRDA_DISABLE __HAL_IRDA_DISABLE
Kojto	115:87f2f5183dfb	1270	#define __IRDA_ENABLE __HAL_IRDA_ENABLE
Kojto	115:87f2f5183dfb	1271
Kojto	115:87f2f5183dfb	1272	#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	1273	#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
Kojto	115:87f2f5183dfb	1274	#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	1275	#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
Kojto	115:87f2f5183dfb	1276
Kojto	115:87f2f5183dfb	1277	#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
Kojto	115:87f2f5183dfb	1278
Kojto	115:87f2f5183dfb	1279
Kojto	115:87f2f5183dfb	1280	/**
Kojto	115:87f2f5183dfb	1281	* @}
Kojto	115:87f2f5183dfb	1282	*/
Kojto	115:87f2f5183dfb	1283
Kojto	115:87f2f5183dfb	1284
Kojto	115:87f2f5183dfb	1285	/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1286	* @{
Kojto	115:87f2f5183dfb	1287	*/
Kojto	115:87f2f5183dfb	1288	#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
Kojto	115:87f2f5183dfb	1289	#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
Kojto	115:87f2f5183dfb	1290	/**
Kojto	115:87f2f5183dfb	1291	* @}
Kojto	115:87f2f5183dfb	1292	*/
Kojto	115:87f2f5183dfb	1293
Kojto	115:87f2f5183dfb	1294
Kojto	115:87f2f5183dfb	1295	/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1296	* @{
Kojto	115:87f2f5183dfb	1297	*/
Kojto	115:87f2f5183dfb	1298
Kojto	115:87f2f5183dfb	1299	#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
Kojto	115:87f2f5183dfb	1300	#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
Kojto	115:87f2f5183dfb	1301	#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
Kojto	115:87f2f5183dfb	1302
Kojto	115:87f2f5183dfb	1303	/**
Kojto	115:87f2f5183dfb	1304	* @}
Kojto	115:87f2f5183dfb	1305	*/
Kojto	115:87f2f5183dfb	1306
Kojto	115:87f2f5183dfb	1307
Kojto	115:87f2f5183dfb	1308	/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1309	* @{
Kojto	115:87f2f5183dfb	1310	*/
Kojto	115:87f2f5183dfb	1311	#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
Kojto	115:87f2f5183dfb	1312	#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
Kojto	115:87f2f5183dfb	1313	#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
Kojto	115:87f2f5183dfb	1314	#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
Kojto	115:87f2f5183dfb	1315	#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
Kojto	115:87f2f5183dfb	1316	#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
Kojto	115:87f2f5183dfb	1317	#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
Kojto	115:87f2f5183dfb	1318	#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
Kojto	115:87f2f5183dfb	1319	#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
Kojto	115:87f2f5183dfb	1320	#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
Kojto	115:87f2f5183dfb	1321	#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
Kojto	115:87f2f5183dfb	1322	#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
Kojto	115:87f2f5183dfb	1323	#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
Kojto	115:87f2f5183dfb	1324
Kojto	115:87f2f5183dfb	1325	/**
Kojto	115:87f2f5183dfb	1326	* @}
Kojto	115:87f2f5183dfb	1327	*/
Kojto	115:87f2f5183dfb	1328
Kojto	115:87f2f5183dfb	1329
Kojto	115:87f2f5183dfb	1330	/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	1331	* @{
Kojto	115:87f2f5183dfb	1332	*/
Kojto	115:87f2f5183dfb	1333	#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
Kojto	115:87f2f5183dfb	1334	#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
Kojto	115:87f2f5183dfb	1335	#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1336	#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1337	#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	1338	#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	1339	#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
Kojto	115:87f2f5183dfb	1340	#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
Kojto	115:87f2f5183dfb	1341	#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
Kojto	115:87f2f5183dfb	1342	#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
Kojto	115:87f2f5183dfb	1343	#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
Kojto	115:87f2f5183dfb	1344	#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
Kojto	115:87f2f5183dfb	1345	#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
Kojto	115:87f2f5183dfb	1346	#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
Kojto	115:87f2f5183dfb	1347	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
Kojto	115:87f2f5183dfb	1348	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
Kojto	115:87f2f5183dfb	1349	#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
Kojto	115:87f2f5183dfb	1350	#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
Kojto	115:87f2f5183dfb	1351	#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
Kojto	115:87f2f5183dfb	1352	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1353	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1354	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	1355	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	1356	#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1357	#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	1358	#define __HAL_PWR_PVM_DISABLE() HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4()
Kojto	115:87f2f5183dfb	1359	#define __HAL_PWR_PVM_ENABLE() HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4()
Kojto	115:87f2f5183dfb	1360	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
Kojto	115:87f2f5183dfb	1361	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
Kojto	115:87f2f5183dfb	1362	#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
Kojto	115:87f2f5183dfb	1363	#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
Kojto	115:87f2f5183dfb	1364	#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1365	#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	1366	#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
Kojto	115:87f2f5183dfb	1367	#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
Kojto	115:87f2f5183dfb	1368
Kojto	115:87f2f5183dfb	1369	#if defined (STM32F4)
Kojto	115:87f2f5183dfb	1370	#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
Kojto	115:87f2f5183dfb	1371	#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
Kojto	115:87f2f5183dfb	1372	#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
Kojto	115:87f2f5183dfb	1373	#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
Kojto	115:87f2f5183dfb	1374	#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
Kojto	115:87f2f5183dfb	1375	#else
Kojto	115:87f2f5183dfb	1376	#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
Kojto	115:87f2f5183dfb	1377	#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
Kojto	115:87f2f5183dfb	1378	#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
Kojto	115:87f2f5183dfb	1379	#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
Kojto	115:87f2f5183dfb	1380	#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
Kojto	115:87f2f5183dfb	1381	#endif /* STM32F4 */
Kojto	115:87f2f5183dfb	1382	/**
Kojto	115:87f2f5183dfb	1383	* @}
Kojto	115:87f2f5183dfb	1384	*/
Kojto	115:87f2f5183dfb	1385
Kojto	115:87f2f5183dfb	1386
Kojto	115:87f2f5183dfb	1387	/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
Kojto	115:87f2f5183dfb	1388	* @{
Kojto	115:87f2f5183dfb	1389	*/
Kojto	115:87f2f5183dfb	1390
Kojto	115:87f2f5183dfb	1391	#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
Kojto	115:87f2f5183dfb	1392	#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
Kojto	115:87f2f5183dfb	1393
Kojto	115:87f2f5183dfb	1394	#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
Kojto	115:87f2f5183dfb	1395	#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
Kojto	115:87f2f5183dfb	1396
Kojto	115:87f2f5183dfb	1397	#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1398	#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1399	#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1400	#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1401	#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
Kojto	115:87f2f5183dfb	1402	#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1403	#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1404	#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1405	#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
Kojto	115:87f2f5183dfb	1406	#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1407	#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1408	#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1409	#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1410	#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1411	#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
Kojto	115:87f2f5183dfb	1412	#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1413	#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
Kojto	115:87f2f5183dfb	1414	#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
Kojto	115:87f2f5183dfb	1415	#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
Kojto	115:87f2f5183dfb	1416	#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
Kojto	115:87f2f5183dfb	1417	#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
Kojto	115:87f2f5183dfb	1418	#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
Kojto	115:87f2f5183dfb	1419	#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1420	#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1421	#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
Kojto	115:87f2f5183dfb	1422	#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
Kojto	115:87f2f5183dfb	1423	#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1424	#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1425	#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
Kojto	115:87f2f5183dfb	1426	#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
Kojto	115:87f2f5183dfb	1427	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
Kojto	115:87f2f5183dfb	1428	#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
Kojto	115:87f2f5183dfb	1429	#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
Kojto	115:87f2f5183dfb	1430	#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
Kojto	115:87f2f5183dfb	1431	#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
Kojto	115:87f2f5183dfb	1432	#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
Kojto	115:87f2f5183dfb	1433	#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
Kojto	115:87f2f5183dfb	1434	#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
Kojto	115:87f2f5183dfb	1435	#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
Kojto	115:87f2f5183dfb	1436	#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1437	#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
Kojto	115:87f2f5183dfb	1438	#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1439	#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
Kojto	115:87f2f5183dfb	1440	#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
Kojto	115:87f2f5183dfb	1441	#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
Kojto	115:87f2f5183dfb	1442	#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1443	#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
Kojto	115:87f2f5183dfb	1444	#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1445	#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
Kojto	115:87f2f5183dfb	1446	#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
Kojto	115:87f2f5183dfb	1447	#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
Kojto	115:87f2f5183dfb	1448	#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
Kojto	115:87f2f5183dfb	1449	#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1450	#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1451	#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1452	#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1453	#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
Kojto	115:87f2f5183dfb	1454	#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1455	#define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1456	#define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1457	#define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
Kojto	115:87f2f5183dfb	1458	#define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1459	#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1460	#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1461	#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
Kojto	115:87f2f5183dfb	1462	#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1463	#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1464	#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1465	#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
Kojto	115:87f2f5183dfb	1466	#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
Kojto	115:87f2f5183dfb	1467	#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
Kojto	115:87f2f5183dfb	1468	#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
Kojto	115:87f2f5183dfb	1469	#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1470	#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1471	#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
Kojto	115:87f2f5183dfb	1472	#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1473	#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1474	#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1475	#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1476	#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1477	#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
Kojto	115:87f2f5183dfb	1478	#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1479	#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1480	#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1481	#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
Kojto	115:87f2f5183dfb	1482	#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1483	#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1484	#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1485	#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1486	#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1487	#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
Kojto	115:87f2f5183dfb	1488	#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1489	#define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE
Kojto	115:87f2f5183dfb	1490	#define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE
Kojto	115:87f2f5183dfb	1491	#define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET
Kojto	115:87f2f5183dfb	1492	#define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET
Kojto	115:87f2f5183dfb	1493	#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
Kojto	115:87f2f5183dfb	1494	#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
Kojto	115:87f2f5183dfb	1495	#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1496	#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1497	#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
Kojto	115:87f2f5183dfb	1498	#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
Kojto	115:87f2f5183dfb	1499	#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1500	#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1501	#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1502	#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1503	#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
Kojto	115:87f2f5183dfb	1504	#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1505	#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1506	#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1507	#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1508	#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1509	#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
Kojto	115:87f2f5183dfb	1510	#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1511	#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1512	#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1513	#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
Kojto	115:87f2f5183dfb	1514	#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1515	#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
Kojto	115:87f2f5183dfb	1516	#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
Kojto	115:87f2f5183dfb	1517	#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
Kojto	115:87f2f5183dfb	1518	#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
Kojto	115:87f2f5183dfb	1519	#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
Kojto	115:87f2f5183dfb	1520	#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
Kojto	115:87f2f5183dfb	1521	#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
Kojto	115:87f2f5183dfb	1522	#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
Kojto	115:87f2f5183dfb	1523	#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1524	#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1525	#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
Kojto	115:87f2f5183dfb	1526	#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
Kojto	115:87f2f5183dfb	1527	#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
Kojto	115:87f2f5183dfb	1528	#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
Kojto	115:87f2f5183dfb	1529	#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
Kojto	115:87f2f5183dfb	1530	#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
Kojto	115:87f2f5183dfb	1531	#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1532	#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1533	#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1534	#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1535	#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1536	#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1537	#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
Kojto	115:87f2f5183dfb	1538	#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1539	#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1540	#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1541	#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
Kojto	115:87f2f5183dfb	1542	#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
Kojto	115:87f2f5183dfb	1543	#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1544	#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1545	#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
Kojto	115:87f2f5183dfb	1546	#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
Kojto	115:87f2f5183dfb	1547	#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
Kojto	115:87f2f5183dfb	1548	#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
Kojto	115:87f2f5183dfb	1549	#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1550	#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1551	#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
Kojto	115:87f2f5183dfb	1552	#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
Kojto	115:87f2f5183dfb	1553	#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1554	#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1555	#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1556	#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1557	#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
Kojto	115:87f2f5183dfb	1558	#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1559	#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
Kojto	115:87f2f5183dfb	1560	#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
Kojto	115:87f2f5183dfb	1561	#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1562	#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1563	#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
Kojto	115:87f2f5183dfb	1564	#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
Kojto	115:87f2f5183dfb	1565	#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
Kojto	115:87f2f5183dfb	1566	#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
Kojto	115:87f2f5183dfb	1567	#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1568	#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1569	#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
Kojto	115:87f2f5183dfb	1570	#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
Kojto	115:87f2f5183dfb	1571	#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
Kojto	115:87f2f5183dfb	1572	#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
Kojto	115:87f2f5183dfb	1573	#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1574	#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1575	#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
Kojto	115:87f2f5183dfb	1576	#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
Kojto	115:87f2f5183dfb	1577	#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
Kojto	115:87f2f5183dfb	1578	#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
Kojto	115:87f2f5183dfb	1579	#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1580	#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1581	#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
Kojto	115:87f2f5183dfb	1582	#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
Kojto	115:87f2f5183dfb	1583	#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
Kojto	115:87f2f5183dfb	1584	#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
Kojto	115:87f2f5183dfb	1585	#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1586	#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1587	#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
Kojto	115:87f2f5183dfb	1588	#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
Kojto	115:87f2f5183dfb	1589	#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1590	#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1591	#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1592	#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1593	#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
Kojto	115:87f2f5183dfb	1594	#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1595	#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1596	#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1597	#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1598	#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1599	#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
Kojto	115:87f2f5183dfb	1600	#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1601	#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
Kojto	115:87f2f5183dfb	1602	#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
Kojto	115:87f2f5183dfb	1603	#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1604	#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1605	#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
Kojto	115:87f2f5183dfb	1606	#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
Kojto	115:87f2f5183dfb	1607	#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
Kojto	115:87f2f5183dfb	1608	#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
Kojto	115:87f2f5183dfb	1609	#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1610	#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1611	#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
Kojto	115:87f2f5183dfb	1612	#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
Kojto	115:87f2f5183dfb	1613	#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1614	#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1615	#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1616	#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1617	#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
Kojto	115:87f2f5183dfb	1618	#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1619	#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1620	#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1621	#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1622	#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1623	#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
Kojto	115:87f2f5183dfb	1624	#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1625	#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1626	#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1627	#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1628	#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1629	#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
Kojto	115:87f2f5183dfb	1630	#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1631	#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
Kojto	115:87f2f5183dfb	1632	#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
Kojto	115:87f2f5183dfb	1633	#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1634	#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1635	#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
Kojto	115:87f2f5183dfb	1636	#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
Kojto	115:87f2f5183dfb	1637	#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
Kojto	115:87f2f5183dfb	1638	#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
Kojto	115:87f2f5183dfb	1639	#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1640	#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1641	#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
Kojto	115:87f2f5183dfb	1642	#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
Kojto	115:87f2f5183dfb	1643	#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
Kojto	115:87f2f5183dfb	1644	#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
Kojto	115:87f2f5183dfb	1645	#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1646	#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1647	#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
Kojto	115:87f2f5183dfb	1648	#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
Kojto	115:87f2f5183dfb	1649	#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
Kojto	115:87f2f5183dfb	1650	#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
Kojto	115:87f2f5183dfb	1651	#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1652	#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1653	#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
Kojto	115:87f2f5183dfb	1654	#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
Kojto	115:87f2f5183dfb	1655	#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
Kojto	115:87f2f5183dfb	1656	#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
Kojto	115:87f2f5183dfb	1657	#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1658	#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1659	#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
Kojto	115:87f2f5183dfb	1660	#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
Kojto	115:87f2f5183dfb	1661	#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1662	#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1663	#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1664	#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1665	#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
Kojto	115:87f2f5183dfb	1666	#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1667	#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1668	#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1669	#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1670	#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1671	#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
Kojto	115:87f2f5183dfb	1672	#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1673	#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
Kojto	115:87f2f5183dfb	1674	#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	115:87f2f5183dfb	1675	#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1676	#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1677	#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1678	#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1679	#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
Kojto	115:87f2f5183dfb	1680	#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1681	#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1682	#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1683	#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1684	#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1685	#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
Kojto	115:87f2f5183dfb	1686	#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1687	#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1688	#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1689	#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1690	#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1691	#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
Kojto	115:87f2f5183dfb	1692	#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1693	#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
Kojto	115:87f2f5183dfb	1694	#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
Kojto	115:87f2f5183dfb	1695	#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1696	#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1697	#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
Kojto	115:87f2f5183dfb	1698	#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
Kojto	115:87f2f5183dfb	1699	#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
Kojto	115:87f2f5183dfb	1700	#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
Kojto	115:87f2f5183dfb	1701	#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1702	#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1703	#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1704	#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1705	#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1706	#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1707	#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1708	#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1709	#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
Kojto	115:87f2f5183dfb	1710	#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1711	#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
Kojto	115:87f2f5183dfb	1712	#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
Kojto	115:87f2f5183dfb	1713	#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1714	#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1715	#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
Kojto	115:87f2f5183dfb	1716	#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
Kojto	115:87f2f5183dfb	1717	#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1718	#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1719	#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1720	#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1721	#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
Kojto	115:87f2f5183dfb	1722	#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1723	#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
Kojto	115:87f2f5183dfb	1724	#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
Kojto	115:87f2f5183dfb	1725	#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
Kojto	115:87f2f5183dfb	1726	#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
Kojto	115:87f2f5183dfb	1727	#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
Kojto	115:87f2f5183dfb	1728	#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
Kojto	115:87f2f5183dfb	1729	#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
Kojto	115:87f2f5183dfb	1730	#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
Kojto	115:87f2f5183dfb	1731	#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
Kojto	115:87f2f5183dfb	1732	#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
Kojto	115:87f2f5183dfb	1733	#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
Kojto	115:87f2f5183dfb	1734	#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
Kojto	115:87f2f5183dfb	1735	#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
Kojto	115:87f2f5183dfb	1736	#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
Kojto	115:87f2f5183dfb	1737	#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
Kojto	115:87f2f5183dfb	1738	#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
Kojto	115:87f2f5183dfb	1739	#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
Kojto	115:87f2f5183dfb	1740	#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
Kojto	115:87f2f5183dfb	1741	#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
Kojto	115:87f2f5183dfb	1742	#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
Kojto	115:87f2f5183dfb	1743	#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
Kojto	115:87f2f5183dfb	1744	#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
Kojto	115:87f2f5183dfb	1745	#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1746	#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1747	#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
Kojto	115:87f2f5183dfb	1748	#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
Kojto	115:87f2f5183dfb	1749	#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
Kojto	115:87f2f5183dfb	1750	#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
Kojto	115:87f2f5183dfb	1751	#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1752	#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1753	#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
Kojto	115:87f2f5183dfb	1754	#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
Kojto	115:87f2f5183dfb	1755	#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
Kojto	115:87f2f5183dfb	1756	#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
Kojto	115:87f2f5183dfb	1757	#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1758	#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1759	#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
Kojto	115:87f2f5183dfb	1760	#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
Kojto	115:87f2f5183dfb	1761	#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1762	#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1763	#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1764	#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1765	#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
Kojto	115:87f2f5183dfb	1766	#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1767	#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
Kojto	115:87f2f5183dfb	1768	#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
Kojto	115:87f2f5183dfb	1769	#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1770	#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1771	#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
Kojto	115:87f2f5183dfb	1772	#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
Kojto	115:87f2f5183dfb	1773	#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
Kojto	115:87f2f5183dfb	1774	#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
Kojto	115:87f2f5183dfb	1775	#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1776	#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1777	#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
Kojto	115:87f2f5183dfb	1778	#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
Kojto	115:87f2f5183dfb	1779	#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
Kojto	115:87f2f5183dfb	1780	#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
Kojto	115:87f2f5183dfb	1781	#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1782	#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1783	#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
Kojto	115:87f2f5183dfb	1784	#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
Kojto	115:87f2f5183dfb	1785	#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
Kojto	115:87f2f5183dfb	1786	#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
Kojto	115:87f2f5183dfb	1787	#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1788	#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1789	#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
Kojto	115:87f2f5183dfb	1790	#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
Kojto	115:87f2f5183dfb	1791	#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
Kojto	115:87f2f5183dfb	1792	#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
Kojto	115:87f2f5183dfb	1793	#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1794	#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1795	#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
Kojto	115:87f2f5183dfb	1796	#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
Kojto	115:87f2f5183dfb	1797	#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
Kojto	115:87f2f5183dfb	1798	#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
Kojto	115:87f2f5183dfb	1799	#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1800	#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1801	#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
Kojto	115:87f2f5183dfb	1802	#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
Kojto	115:87f2f5183dfb	1803	#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
Kojto	115:87f2f5183dfb	1804	#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
Kojto	115:87f2f5183dfb	1805	#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
Kojto	115:87f2f5183dfb	1806	#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
Kojto	115:87f2f5183dfb	1807	#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1808	#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1809	#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1810	#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1811	#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
Kojto	115:87f2f5183dfb	1812	#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1813	#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
Kojto	115:87f2f5183dfb	1814	#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
Kojto	115:87f2f5183dfb	1815	#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1816	#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1817	#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
Kojto	115:87f2f5183dfb	1818	#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
Kojto	115:87f2f5183dfb	1819	#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
Kojto	115:87f2f5183dfb	1820	#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
Kojto	115:87f2f5183dfb	1821	#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1822	#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1823	#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
Kojto	115:87f2f5183dfb	1824	#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
Kojto	115:87f2f5183dfb	1825	#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
Kojto	115:87f2f5183dfb	1826	#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
Kojto	115:87f2f5183dfb	1827	#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1828	#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1829	#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
Kojto	115:87f2f5183dfb	1830	#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
Kojto	115:87f2f5183dfb	1831	#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
Kojto	115:87f2f5183dfb	1832	#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
Kojto	115:87f2f5183dfb	1833	#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1834	#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1835	#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
Kojto	115:87f2f5183dfb	1836	#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
Kojto	115:87f2f5183dfb	1837	#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
Kojto	115:87f2f5183dfb	1838	#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
Kojto	115:87f2f5183dfb	1839	#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1840	#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1841	#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
Kojto	115:87f2f5183dfb	1842	#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
Kojto	115:87f2f5183dfb	1843	#define __USART4_CLK_DISABLE __HAL_RCC_USART4_CLK_DISABLE
Kojto	115:87f2f5183dfb	1844	#define __USART4_CLK_ENABLE __HAL_RCC_USART4_CLK_ENABLE
Kojto	115:87f2f5183dfb	1845	#define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_USART4_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1846	#define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_USART4_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1847	#define __USART4_FORCE_RESET __HAL_RCC_USART4_FORCE_RESET
Kojto	115:87f2f5183dfb	1848	#define __USART4_RELEASE_RESET __HAL_RCC_USART4_RELEASE_RESET
Kojto	115:87f2f5183dfb	1849	#define __USART5_CLK_DISABLE __HAL_RCC_USART5_CLK_DISABLE
Kojto	115:87f2f5183dfb	1850	#define __USART5_CLK_ENABLE __HAL_RCC_USART5_CLK_ENABLE
Kojto	115:87f2f5183dfb	1851	#define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_USART5_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1852	#define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_USART5_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1853	#define __USART5_FORCE_RESET __HAL_RCC_USART5_FORCE_RESET
Kojto	115:87f2f5183dfb	1854	#define __USART5_RELEASE_RESET __HAL_RCC_USART5_RELEASE_RESET
Kojto	115:87f2f5183dfb	1855	#define __USART7_CLK_DISABLE __HAL_RCC_USART7_CLK_DISABLE
Kojto	115:87f2f5183dfb	1856	#define __USART7_CLK_ENABLE __HAL_RCC_USART7_CLK_ENABLE
Kojto	115:87f2f5183dfb	1857	#define __USART7_FORCE_RESET __HAL_RCC_USART7_FORCE_RESET
Kojto	115:87f2f5183dfb	1858	#define __USART7_RELEASE_RESET __HAL_RCC_USART7_RELEASE_RESET
Kojto	115:87f2f5183dfb	1859	#define __USART8_CLK_DISABLE __HAL_RCC_USART8_CLK_DISABLE
Kojto	115:87f2f5183dfb	1860	#define __USART8_CLK_ENABLE __HAL_RCC_USART8_CLK_ENABLE
Kojto	115:87f2f5183dfb	1861	#define __USART8_FORCE_RESET __HAL_RCC_USART8_FORCE_RESET
Kojto	115:87f2f5183dfb	1862	#define __USART8_RELEASE_RESET __HAL_RCC_USART8_RELEASE_RESET
Kojto	115:87f2f5183dfb	1863	#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
Kojto	115:87f2f5183dfb	1864	#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
Kojto	115:87f2f5183dfb	1865	#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
Kojto	115:87f2f5183dfb	1866	#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1867	#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1868	#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
Kojto	115:87f2f5183dfb	1869	#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
Kojto	115:87f2f5183dfb	1870	#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
Kojto	115:87f2f5183dfb	1871	#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
Kojto	115:87f2f5183dfb	1872	#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
Kojto	115:87f2f5183dfb	1873	#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1874	#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1875	#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
Kojto	115:87f2f5183dfb	1876	#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
Kojto	115:87f2f5183dfb	1877	#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
Kojto	115:87f2f5183dfb	1878	#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
Kojto	115:87f2f5183dfb	1879	#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
Kojto	115:87f2f5183dfb	1880	#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
Kojto	115:87f2f5183dfb	1881	#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1882	#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1883	#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
Kojto	115:87f2f5183dfb	1884	#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
Kojto	115:87f2f5183dfb	1885	#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
Kojto	115:87f2f5183dfb	1886	#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
Kojto	115:87f2f5183dfb	1887	#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1888	#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1889	#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
Kojto	115:87f2f5183dfb	1890	#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
Kojto	115:87f2f5183dfb	1891	#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1892	#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1893	#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
Kojto	115:87f2f5183dfb	1894	#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
Kojto	115:87f2f5183dfb	1895	#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
Kojto	115:87f2f5183dfb	1896	#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
Kojto	115:87f2f5183dfb	1897
Kojto	115:87f2f5183dfb	1898	#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
Kojto	115:87f2f5183dfb	1899	#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
Kojto	115:87f2f5183dfb	1900	#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1901	#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1902	#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
Kojto	115:87f2f5183dfb	1903	#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
Kojto	115:87f2f5183dfb	1904	#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
Kojto	115:87f2f5183dfb	1905	#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
Kojto	115:87f2f5183dfb	1906	#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1907	#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1908	#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1909	#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1910	#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1911	#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1912	#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1913	#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1914	#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
Kojto	115:87f2f5183dfb	1915	#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
Kojto	115:87f2f5183dfb	1916	#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
Kojto	115:87f2f5183dfb	1917	#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
Kojto	115:87f2f5183dfb	1918	#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
Kojto	115:87f2f5183dfb	1919	#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1920	#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1921	#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
Kojto	115:87f2f5183dfb	1922	#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
Kojto	115:87f2f5183dfb	1923	#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
Kojto	115:87f2f5183dfb	1924	#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
Kojto	115:87f2f5183dfb	1925	#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
Kojto	115:87f2f5183dfb	1926	#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1927	#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1928	#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
Kojto	115:87f2f5183dfb	1929	#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
Kojto	115:87f2f5183dfb	1930	#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
Kojto	115:87f2f5183dfb	1931	#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
Kojto	115:87f2f5183dfb	1932	#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1933	#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1934	#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
Kojto	115:87f2f5183dfb	1935	#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
Kojto	115:87f2f5183dfb	1936	#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
Kojto	115:87f2f5183dfb	1937	#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
Kojto	115:87f2f5183dfb	1938	#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1939	#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1940	#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1941	#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1942	#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1943	#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1944	#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1945	#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1946	#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1947	#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1948	#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1949	#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1950	#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1951	#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
Kojto	115:87f2f5183dfb	1952	#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
Kojto	115:87f2f5183dfb	1953	#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1954	#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1955	#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
Kojto	115:87f2f5183dfb	1956	#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
Kojto	115:87f2f5183dfb	1957	#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
Kojto	115:87f2f5183dfb	1958	#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
Kojto	115:87f2f5183dfb	1959	#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
Kojto	115:87f2f5183dfb	1960	#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
Kojto	115:87f2f5183dfb	1961	#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1962	#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1963	#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
Kojto	115:87f2f5183dfb	1964	#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
Kojto	115:87f2f5183dfb	1965	#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
Kojto	115:87f2f5183dfb	1966	#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
Kojto	115:87f2f5183dfb	1967	#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1968	#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1969	#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
Kojto	115:87f2f5183dfb	1970	#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
Kojto	115:87f2f5183dfb	1971	#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
Kojto	115:87f2f5183dfb	1972	#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
Kojto	115:87f2f5183dfb	1973	#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1974	#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1975	#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
Kojto	115:87f2f5183dfb	1976	#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
Kojto	115:87f2f5183dfb	1977	#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
Kojto	115:87f2f5183dfb	1978	#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
Kojto	115:87f2f5183dfb	1979	#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1980	#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1981	#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
Kojto	115:87f2f5183dfb	1982	#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
Kojto	115:87f2f5183dfb	1983	#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
Kojto	115:87f2f5183dfb	1984	#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1985	#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1986	#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
Kojto	115:87f2f5183dfb	1987	#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
Kojto	115:87f2f5183dfb	1988	#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
Kojto	115:87f2f5183dfb	1989	#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
Kojto	115:87f2f5183dfb	1990	#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
Kojto	115:87f2f5183dfb	1991	#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
Kojto	115:87f2f5183dfb	1992	#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1993	#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	1994	#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
Kojto	115:87f2f5183dfb	1995	#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
Kojto	115:87f2f5183dfb	1996	#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
Kojto	115:87f2f5183dfb	1997	#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
Kojto	115:87f2f5183dfb	1998	#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	1999	#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2000	#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
Kojto	115:87f2f5183dfb	2001	#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
Kojto	115:87f2f5183dfb	2002	#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
Kojto	115:87f2f5183dfb	2003	#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
Kojto	115:87f2f5183dfb	2004	#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2005	#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2006	#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2007	#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2008	#define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
Kojto	115:87f2f5183dfb	2009	#define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
Kojto	115:87f2f5183dfb	2010	#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2011	#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2012	#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2013	#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2014	#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
Kojto	115:87f2f5183dfb	2015	#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
Kojto	115:87f2f5183dfb	2016	#define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
Kojto	115:87f2f5183dfb	2017	#define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
Kojto	115:87f2f5183dfb	2018	#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2019	#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2020	#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
Kojto	115:87f2f5183dfb	2021	#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
Kojto	115:87f2f5183dfb	2022	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
Kojto	115:87f2f5183dfb	2023	#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2024	#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2025	#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2026	#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2027	#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2028	#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2029	#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2030	#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2031	#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2032	#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
Kojto	115:87f2f5183dfb	2033	#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
Kojto	115:87f2f5183dfb	2034	#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2035	#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2036	#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
Kojto	115:87f2f5183dfb	2037	#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
Kojto	115:87f2f5183dfb	2038	#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2039	#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2040	#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
Kojto	115:87f2f5183dfb	2041	#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
Kojto	115:87f2f5183dfb	2042	#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
Kojto	115:87f2f5183dfb	2043	#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
Kojto	115:87f2f5183dfb	2044	#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2045	#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2046
Kojto	115:87f2f5183dfb	2047	/* alias define maintained for legacy */
Kojto	115:87f2f5183dfb	2048	#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
Kojto	115:87f2f5183dfb	2049	#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
Kojto	115:87f2f5183dfb	2050
Kojto	115:87f2f5183dfb	2051	#if defined(STM32F4)
Kojto	115:87f2f5183dfb	2052	#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	115:87f2f5183dfb	2053	#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
Kojto	115:87f2f5183dfb	2054	#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
Kojto	115:87f2f5183dfb	2055	#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2056	#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2057	#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	115:87f2f5183dfb	2058	#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
Kojto	115:87f2f5183dfb	2059	#define Sdmmc1ClockSelection SdioClockSelection
Kojto	115:87f2f5183dfb	2060	#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO
Kojto	115:87f2f5183dfb	2061	#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48
Kojto	115:87f2f5183dfb	2062	#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK
Kojto	115:87f2f5183dfb	2063	#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG
Kojto	115:87f2f5183dfb	2064	#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE
Kojto	115:87f2f5183dfb	2065	#endif
Kojto	115:87f2f5183dfb	2066
Kojto	115:87f2f5183dfb	2067	#if defined(STM32F7) \|\| defined(STM32L4)
Kojto	115:87f2f5183dfb	2068	#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
Kojto	115:87f2f5183dfb	2069	#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
Kojto	115:87f2f5183dfb	2070	#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
Kojto	115:87f2f5183dfb	2071	#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
Kojto	115:87f2f5183dfb	2072	#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
Kojto	115:87f2f5183dfb	2073	#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
Kojto	115:87f2f5183dfb	2074	#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
Kojto	115:87f2f5183dfb	2075	#define SdioClockSelection Sdmmc1ClockSelection
Kojto	115:87f2f5183dfb	2076	#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1
Kojto	115:87f2f5183dfb	2077	#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG
Kojto	115:87f2f5183dfb	2078	#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE
Kojto	115:87f2f5183dfb	2079	#endif
Kojto	115:87f2f5183dfb	2080
Kojto	115:87f2f5183dfb	2081	#if defined(STM32F7)
Kojto	115:87f2f5183dfb	2082	#define RCC_SDIOCLKSOURCE_CK48 RCC_SDMMC1CLKSOURCE_CLK48
Kojto	115:87f2f5183dfb	2083	#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
Kojto	115:87f2f5183dfb	2084	#endif
Kojto	115:87f2f5183dfb	2085
Kojto	115:87f2f5183dfb	2086	#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
Kojto	115:87f2f5183dfb	2087	#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
Kojto	115:87f2f5183dfb	2088
Kojto	115:87f2f5183dfb	2089	#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
Kojto	115:87f2f5183dfb	2090
Kojto	115:87f2f5183dfb	2091	#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
Kojto	115:87f2f5183dfb	2092	#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
Kojto	115:87f2f5183dfb	2093	#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
Kojto	115:87f2f5183dfb	2094	#define IS_RCC_HCLK_DIV IS_RCC_PCLK
Kojto	115:87f2f5183dfb	2095
Kojto	115:87f2f5183dfb	2096	#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
Kojto	115:87f2f5183dfb	2097	#define RCC_MCO_NODIV RCC_MCODIV_1
Kojto	115:87f2f5183dfb	2098	#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
Kojto	115:87f2f5183dfb	2099
Kojto	115:87f2f5183dfb	2100	#define HSION_BitNumber RCC_HSION_BIT_NUMBER
Kojto	115:87f2f5183dfb	2101	#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
Kojto	115:87f2f5183dfb	2102	#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
Kojto	115:87f2f5183dfb	2103	#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
Kojto	115:87f2f5183dfb	2104	#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
Kojto	115:87f2f5183dfb	2105	#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
Kojto	115:87f2f5183dfb	2106	#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
Kojto	115:87f2f5183dfb	2107	#define LSION_BitNumber RCC_LSION_BIT_NUMBER
Kojto	115:87f2f5183dfb	2108	#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
Kojto	115:87f2f5183dfb	2109	#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
Kojto	115:87f2f5183dfb	2110
Kojto	115:87f2f5183dfb	2111	#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
Kojto	115:87f2f5183dfb	2112	#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
Kojto	115:87f2f5183dfb	2113	#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
Kojto	115:87f2f5183dfb	2114	#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
Kojto	115:87f2f5183dfb	2115	#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
Kojto	115:87f2f5183dfb	2116	#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
Kojto	115:87f2f5183dfb	2117
Kojto	115:87f2f5183dfb	2118	#define CR_HSION_BB RCC_CR_HSION_BB
Kojto	115:87f2f5183dfb	2119	#define CR_CSSON_BB RCC_CR_CSSON_BB
Kojto	115:87f2f5183dfb	2120	#define CR_PLLON_BB RCC_CR_PLLON_BB
Kojto	115:87f2f5183dfb	2121	#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
Kojto	115:87f2f5183dfb	2122	#define CR_MSION_BB RCC_CR_MSION_BB
Kojto	115:87f2f5183dfb	2123	#define CSR_LSION_BB RCC_CSR_LSION_BB
Kojto	115:87f2f5183dfb	2124	#define CSR_LSEON_BB RCC_CSR_LSEON_BB
Kojto	115:87f2f5183dfb	2125	#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
Kojto	115:87f2f5183dfb	2126	#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
Kojto	115:87f2f5183dfb	2127	#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
Kojto	115:87f2f5183dfb	2128	#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
Kojto	115:87f2f5183dfb	2129	#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
Kojto	115:87f2f5183dfb	2130	#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
Kojto	115:87f2f5183dfb	2131	#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
Kojto	115:87f2f5183dfb	2132	#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
Kojto	115:87f2f5183dfb	2133
Kojto	115:87f2f5183dfb	2134	/**
Kojto	115:87f2f5183dfb	2135	* @}
Kojto	115:87f2f5183dfb	2136	*/
Kojto	115:87f2f5183dfb	2137
Kojto	115:87f2f5183dfb	2138	/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2139	* @{
Kojto	115:87f2f5183dfb	2140	*/
Kojto	115:87f2f5183dfb	2141	#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
Kojto	115:87f2f5183dfb	2142
Kojto	115:87f2f5183dfb	2143	/**
Kojto	115:87f2f5183dfb	2144	* @}
Kojto	115:87f2f5183dfb	2145	*/
Kojto	115:87f2f5183dfb	2146
Kojto	115:87f2f5183dfb	2147	/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2148	* @{
Kojto	115:87f2f5183dfb	2149	*/
Kojto	115:87f2f5183dfb	2150
Kojto	115:87f2f5183dfb	2151	#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2152	#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
Kojto	115:87f2f5183dfb	2153	#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
Kojto	115:87f2f5183dfb	2154
Kojto	115:87f2f5183dfb	2155	#if defined (STM32F1)
Kojto	115:87f2f5183dfb	2156	#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
Kojto	115:87f2f5183dfb	2157
Kojto	115:87f2f5183dfb	2158	#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
Kojto	115:87f2f5183dfb	2159
Kojto	115:87f2f5183dfb	2160	#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
Kojto	115:87f2f5183dfb	2161
Kojto	115:87f2f5183dfb	2162	#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
Kojto	115:87f2f5183dfb	2163
Kojto	115:87f2f5183dfb	2164	#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
Kojto	115:87f2f5183dfb	2165	#else
Kojto	115:87f2f5183dfb	2166	#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
Kojto	115:87f2f5183dfb	2167	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
Kojto	115:87f2f5183dfb	2168	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
Kojto	115:87f2f5183dfb	2169	#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
Kojto	115:87f2f5183dfb	2170	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
Kojto	115:87f2f5183dfb	2171	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
Kojto	115:87f2f5183dfb	2172	#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
Kojto	115:87f2f5183dfb	2173	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
Kojto	115:87f2f5183dfb	2174	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
Kojto	115:87f2f5183dfb	2175	#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
Kojto	115:87f2f5183dfb	2176	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
Kojto	115:87f2f5183dfb	2177	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
Kojto	115:87f2f5183dfb	2178	#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
Kojto	115:87f2f5183dfb	2179	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
Kojto	115:87f2f5183dfb	2180	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
Kojto	115:87f2f5183dfb	2181	#endif /* STM32F1 */
Kojto	115:87f2f5183dfb	2182
Kojto	115:87f2f5183dfb	2183	#define IS_ALARM IS_RTC_ALARM
Kojto	115:87f2f5183dfb	2184	#define IS_ALARM_MASK IS_RTC_ALARM_MASK
Kojto	115:87f2f5183dfb	2185	#define IS_TAMPER IS_RTC_TAMPER
Kojto	115:87f2f5183dfb	2186	#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
Kojto	115:87f2f5183dfb	2187	#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
Kojto	115:87f2f5183dfb	2188	#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
Kojto	115:87f2f5183dfb	2189	#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
Kojto	115:87f2f5183dfb	2190	#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
Kojto	115:87f2f5183dfb	2191	#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
Kojto	115:87f2f5183dfb	2192	#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
Kojto	115:87f2f5183dfb	2193	#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
Kojto	115:87f2f5183dfb	2194	#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
Kojto	115:87f2f5183dfb	2195	#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
Kojto	115:87f2f5183dfb	2196	#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
Kojto	115:87f2f5183dfb	2197
Kojto	115:87f2f5183dfb	2198	#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
Kojto	115:87f2f5183dfb	2199	#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
Kojto	115:87f2f5183dfb	2200
Kojto	115:87f2f5183dfb	2201	/**
Kojto	115:87f2f5183dfb	2202	* @}
Kojto	115:87f2f5183dfb	2203	*/
Kojto	115:87f2f5183dfb	2204
Kojto	115:87f2f5183dfb	2205	/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2206	* @{
Kojto	115:87f2f5183dfb	2207	*/
Kojto	115:87f2f5183dfb	2208
Kojto	115:87f2f5183dfb	2209	#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
Kojto	115:87f2f5183dfb	2210	#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
Kojto	115:87f2f5183dfb	2211
Kojto	115:87f2f5183dfb	2212	#if defined(STM32F4)
Kojto	115:87f2f5183dfb	2213	#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
Kojto	115:87f2f5183dfb	2214	#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
Kojto	115:87f2f5183dfb	2215	#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
Kojto	115:87f2f5183dfb	2216	#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION
Kojto	115:87f2f5183dfb	2217	#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND
Kojto	115:87f2f5183dfb	2218	#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT
Kojto	115:87f2f5183dfb	2219	#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED
Kojto	115:87f2f5183dfb	2220	#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE
Kojto	115:87f2f5183dfb	2221	#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE
Kojto	115:87f2f5183dfb	2222	#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE
Kojto	115:87f2f5183dfb	2223	#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
Kojto	115:87f2f5183dfb	2224	#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT
Kojto	115:87f2f5183dfb	2225	#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT
Kojto	115:87f2f5183dfb	2226	#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG
Kojto	115:87f2f5183dfb	2227	#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2228	#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT
Kojto	115:87f2f5183dfb	2229	#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT
Kojto	115:87f2f5183dfb	2230	#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS
Kojto	115:87f2f5183dfb	2231	#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT
Kojto	115:87f2f5183dfb	2232	#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND
Kojto	115:87f2f5183dfb	2233	/* alias CMSIS */
Kojto	115:87f2f5183dfb	2234	#define SDMMC1_IRQn SDIO_IRQn
Kojto	115:87f2f5183dfb	2235	#define SDMMC1_IRQHandler SDIO_IRQHandler
Kojto	115:87f2f5183dfb	2236	#endif
Kojto	115:87f2f5183dfb	2237
Kojto	115:87f2f5183dfb	2238	#if defined(STM32F7) \|\| defined(STM32L4)
Kojto	115:87f2f5183dfb	2239	#define SD_SDIO_DISABLED SD_SDMMC_DISABLED
Kojto	115:87f2f5183dfb	2240	#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY
Kojto	115:87f2f5183dfb	2241	#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED
Kojto	115:87f2f5183dfb	2242	#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION
Kojto	115:87f2f5183dfb	2243	#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND
Kojto	115:87f2f5183dfb	2244	#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT
Kojto	115:87f2f5183dfb	2245	#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED
Kojto	115:87f2f5183dfb	2246	#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE
Kojto	115:87f2f5183dfb	2247	#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE
Kojto	115:87f2f5183dfb	2248	#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE
Kojto	115:87f2f5183dfb	2249	#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE
Kojto	115:87f2f5183dfb	2250	#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT
Kojto	115:87f2f5183dfb	2251	#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT
Kojto	115:87f2f5183dfb	2252	#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG
Kojto	115:87f2f5183dfb	2253	#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2254	#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
Kojto	115:87f2f5183dfb	2255	#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
Kojto	115:87f2f5183dfb	2256	#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS
Kojto	115:87f2f5183dfb	2257	#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT
Kojto	115:87f2f5183dfb	2258	#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND
Kojto	115:87f2f5183dfb	2259	/* alias CMSIS for compatibilities */
Kojto	115:87f2f5183dfb	2260	#define SDIO_IRQn SDMMC1_IRQn
Kojto	115:87f2f5183dfb	2261	#define SDIO_IRQHandler SDMMC1_IRQHandler
Kojto	115:87f2f5183dfb	2262	#endif
Kojto	115:87f2f5183dfb	2263	/**
Kojto	115:87f2f5183dfb	2264	* @}
Kojto	115:87f2f5183dfb	2265	*/
Kojto	115:87f2f5183dfb	2266
Kojto	115:87f2f5183dfb	2267	/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2268	* @{
Kojto	115:87f2f5183dfb	2269	*/
Kojto	115:87f2f5183dfb	2270
Kojto	115:87f2f5183dfb	2271	#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
Kojto	115:87f2f5183dfb	2272	#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
Kojto	115:87f2f5183dfb	2273	#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
Kojto	115:87f2f5183dfb	2274	#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
Kojto	115:87f2f5183dfb	2275	#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
Kojto	115:87f2f5183dfb	2276	#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
Kojto	115:87f2f5183dfb	2277
Kojto	115:87f2f5183dfb	2278	#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	2279	#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	2280
Kojto	115:87f2f5183dfb	2281	#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
Kojto	115:87f2f5183dfb	2282
Kojto	115:87f2f5183dfb	2283	/**
Kojto	115:87f2f5183dfb	2284	* @}
Kojto	115:87f2f5183dfb	2285	*/
Kojto	115:87f2f5183dfb	2286
Kojto	115:87f2f5183dfb	2287	/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2288	* @{
Kojto	115:87f2f5183dfb	2289	*/
Kojto	115:87f2f5183dfb	2290	#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
Kojto	115:87f2f5183dfb	2291	#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
Kojto	115:87f2f5183dfb	2292	#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
Kojto	115:87f2f5183dfb	2293	#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
Kojto	115:87f2f5183dfb	2294	#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
Kojto	115:87f2f5183dfb	2295	#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
Kojto	115:87f2f5183dfb	2296	#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
Kojto	115:87f2f5183dfb	2297	#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
Kojto	115:87f2f5183dfb	2298	/**
Kojto	115:87f2f5183dfb	2299	* @}
Kojto	115:87f2f5183dfb	2300	*/
Kojto	115:87f2f5183dfb	2301
Kojto	115:87f2f5183dfb	2302	/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2303	* @{
Kojto	115:87f2f5183dfb	2304	*/
Kojto	115:87f2f5183dfb	2305
Kojto	115:87f2f5183dfb	2306	#define __HAL_SPI_1LINE_TX SPI_1LINE_TX
Kojto	115:87f2f5183dfb	2307	#define __HAL_SPI_1LINE_RX SPI_1LINE_RX
Kojto	115:87f2f5183dfb	2308	#define __HAL_SPI_RESET_CRC SPI_RESET_CRC
Kojto	115:87f2f5183dfb	2309
Kojto	115:87f2f5183dfb	2310	/**
Kojto	115:87f2f5183dfb	2311	* @}
Kojto	115:87f2f5183dfb	2312	*/
Kojto	115:87f2f5183dfb	2313
Kojto	115:87f2f5183dfb	2314	/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2315	* @{
Kojto	115:87f2f5183dfb	2316	*/
Kojto	115:87f2f5183dfb	2317
Kojto	115:87f2f5183dfb	2318	#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	2319	#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
Kojto	115:87f2f5183dfb	2320	#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	2321	#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
Kojto	115:87f2f5183dfb	2322
Kojto	115:87f2f5183dfb	2323	#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
Kojto	115:87f2f5183dfb	2324
Kojto	115:87f2f5183dfb	2325	#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
Kojto	115:87f2f5183dfb	2326	#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
Kojto	115:87f2f5183dfb	2327
Kojto	115:87f2f5183dfb	2328	/**
Kojto	115:87f2f5183dfb	2329	* @}
Kojto	115:87f2f5183dfb	2330	*/
Kojto	115:87f2f5183dfb	2331
Kojto	115:87f2f5183dfb	2332
Kojto	115:87f2f5183dfb	2333	/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2334	* @{
Kojto	115:87f2f5183dfb	2335	*/
Kojto	115:87f2f5183dfb	2336
Kojto	115:87f2f5183dfb	2337	#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
Kojto	115:87f2f5183dfb	2338	#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
Kojto	115:87f2f5183dfb	2339	#define __USART_ENABLE __HAL_USART_ENABLE
Kojto	115:87f2f5183dfb	2340	#define __USART_DISABLE __HAL_USART_DISABLE
Kojto	115:87f2f5183dfb	2341
Kojto	115:87f2f5183dfb	2342	#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	2343	#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
Kojto	115:87f2f5183dfb	2344
Kojto	115:87f2f5183dfb	2345	/**
Kojto	115:87f2f5183dfb	2346	* @}
Kojto	115:87f2f5183dfb	2347	*/
Kojto	115:87f2f5183dfb	2348
Kojto	115:87f2f5183dfb	2349	/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2350	* @{
Kojto	115:87f2f5183dfb	2351	*/
Kojto	115:87f2f5183dfb	2352	#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
Kojto	115:87f2f5183dfb	2353
Kojto	115:87f2f5183dfb	2354	#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
Kojto	115:87f2f5183dfb	2355	#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
Kojto	115:87f2f5183dfb	2356	#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
Kojto	115:87f2f5183dfb	2357	#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
Kojto	115:87f2f5183dfb	2358
Kojto	115:87f2f5183dfb	2359	#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
Kojto	115:87f2f5183dfb	2360	#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
Kojto	115:87f2f5183dfb	2361	#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
Kojto	115:87f2f5183dfb	2362	#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
Kojto	115:87f2f5183dfb	2363
Kojto	115:87f2f5183dfb	2364	#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
Kojto	115:87f2f5183dfb	2365	#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
Kojto	115:87f2f5183dfb	2366	#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
Kojto	115:87f2f5183dfb	2367	#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2368	#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	2369	#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	2370	#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	115:87f2f5183dfb	2371
Kojto	115:87f2f5183dfb	2372	#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
Kojto	115:87f2f5183dfb	2373	#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
Kojto	115:87f2f5183dfb	2374	#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
Kojto	115:87f2f5183dfb	2375	#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2376	#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	2377	#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	2378	#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	115:87f2f5183dfb	2379	#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
Kojto	115:87f2f5183dfb	2380
Kojto	115:87f2f5183dfb	2381	#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
Kojto	115:87f2f5183dfb	2382	#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
Kojto	115:87f2f5183dfb	2383	#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
Kojto	115:87f2f5183dfb	2384	#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2385	#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	115:87f2f5183dfb	2386	#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	115:87f2f5183dfb	2387	#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	115:87f2f5183dfb	2388	#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
Kojto	115:87f2f5183dfb	2389
Kojto	115:87f2f5183dfb	2390	#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
Kojto	115:87f2f5183dfb	2391	#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
Kojto	115:87f2f5183dfb	2392
Kojto	115:87f2f5183dfb	2393	#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
Kojto	115:87f2f5183dfb	2394	#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
Kojto	115:87f2f5183dfb	2395	/**
Kojto	115:87f2f5183dfb	2396	* @}
Kojto	115:87f2f5183dfb	2397	*/
Kojto	115:87f2f5183dfb	2398
Kojto	115:87f2f5183dfb	2399	/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2400	* @{
Kojto	115:87f2f5183dfb	2401	*/
Kojto	115:87f2f5183dfb	2402	#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
Kojto	115:87f2f5183dfb	2403	#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
Kojto	115:87f2f5183dfb	2404
Kojto	115:87f2f5183dfb	2405	#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
Kojto	115:87f2f5183dfb	2406	#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
Kojto	115:87f2f5183dfb	2407
Kojto	115:87f2f5183dfb	2408	#define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
Kojto	115:87f2f5183dfb	2409
Kojto	115:87f2f5183dfb	2410	#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
Kojto	115:87f2f5183dfb	2411	#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
Kojto	115:87f2f5183dfb	2412	#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
Kojto	115:87f2f5183dfb	2413	#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
Kojto	115:87f2f5183dfb	2414	#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
Kojto	115:87f2f5183dfb	2415	#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
Kojto	115:87f2f5183dfb	2416	#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
Kojto	115:87f2f5183dfb	2417	#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
Kojto	115:87f2f5183dfb	2418	#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
Kojto	115:87f2f5183dfb	2419	#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
Kojto	115:87f2f5183dfb	2420	#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
Kojto	115:87f2f5183dfb	2421	#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
Kojto	115:87f2f5183dfb	2422
Kojto	115:87f2f5183dfb	2423	#define TIM_TS_ITR0 ((uint32_t)0x0000)
Kojto	115:87f2f5183dfb	2424	#define TIM_TS_ITR1 ((uint32_t)0x0010)
Kojto	115:87f2f5183dfb	2425	#define TIM_TS_ITR2 ((uint32_t)0x0020)
Kojto	115:87f2f5183dfb	2426	#define TIM_TS_ITR3 ((uint32_t)0x0030)
Kojto	115:87f2f5183dfb	2427	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	115:87f2f5183dfb	2428	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	115:87f2f5183dfb	2429	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	115:87f2f5183dfb	2430	((SELECTION) == TIM_TS_ITR3))
Kojto	115:87f2f5183dfb	2431
Kojto	115:87f2f5183dfb	2432	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto	115:87f2f5183dfb	2433	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto	115:87f2f5183dfb	2434	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
Kojto	115:87f2f5183dfb	2435	((CHANNEL) == TIM_CHANNEL_2))
Kojto	115:87f2f5183dfb	2436
Kojto	115:87f2f5183dfb	2437	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
Kojto	115:87f2f5183dfb	2438	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
Kojto	115:87f2f5183dfb	2439
Kojto	115:87f2f5183dfb	2440	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
Kojto	115:87f2f5183dfb	2441	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
Kojto	115:87f2f5183dfb	2442
Kojto	115:87f2f5183dfb	2443	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
Kojto	115:87f2f5183dfb	2444	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
Kojto	115:87f2f5183dfb	2445
Kojto	115:87f2f5183dfb	2446	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
Kojto	115:87f2f5183dfb	2447	((STATE) == TIM_OUTPUTSTATE_ENABLE))
Kojto	115:87f2f5183dfb	2448	/**
Kojto	115:87f2f5183dfb	2449	* @}
Kojto	115:87f2f5183dfb	2450	*/
Kojto	115:87f2f5183dfb	2451
Kojto	115:87f2f5183dfb	2452	/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2453	* @{
Kojto	115:87f2f5183dfb	2454	*/
Kojto	115:87f2f5183dfb	2455
Kojto	115:87f2f5183dfb	2456	#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
Kojto	115:87f2f5183dfb	2457	#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
Kojto	115:87f2f5183dfb	2458	#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
Kojto	115:87f2f5183dfb	2459	#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
Kojto	115:87f2f5183dfb	2460	#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
Kojto	115:87f2f5183dfb	2461	#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
Kojto	115:87f2f5183dfb	2462	#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
Kojto	115:87f2f5183dfb	2463
Kojto	115:87f2f5183dfb	2464	#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
Kojto	115:87f2f5183dfb	2465	#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
Kojto	115:87f2f5183dfb	2466	#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
Kojto	115:87f2f5183dfb	2467	/**
Kojto	115:87f2f5183dfb	2468	* @}
Kojto	115:87f2f5183dfb	2469	*/
Kojto	115:87f2f5183dfb	2470
Kojto	115:87f2f5183dfb	2471	/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2472	* @{
Kojto	115:87f2f5183dfb	2473	*/
Kojto	115:87f2f5183dfb	2474	#define __HAL_LTDC_LAYER LTDC_LAYER
Kojto	115:87f2f5183dfb	2475	/**
Kojto	115:87f2f5183dfb	2476	* @}
Kojto	115:87f2f5183dfb	2477	*/
Kojto	115:87f2f5183dfb	2478
Kojto	115:87f2f5183dfb	2479	/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2480	* @{
Kojto	115:87f2f5183dfb	2481	*/
Kojto	115:87f2f5183dfb	2482	#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
Kojto	115:87f2f5183dfb	2483	#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
Kojto	115:87f2f5183dfb	2484	#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
Kojto	115:87f2f5183dfb	2485	#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
Kojto	115:87f2f5183dfb	2486	#define SAI_STREOMODE SAI_STEREOMODE
Kojto	115:87f2f5183dfb	2487	#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
Kojto	115:87f2f5183dfb	2488	#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
Kojto	115:87f2f5183dfb	2489	#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
Kojto	115:87f2f5183dfb	2490	#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
Kojto	115:87f2f5183dfb	2491	#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
Kojto	115:87f2f5183dfb	2492	#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
Kojto	115:87f2f5183dfb	2493	#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
Kojto	115:87f2f5183dfb	2494
Kojto	115:87f2f5183dfb	2495	/**
Kojto	115:87f2f5183dfb	2496	* @}
Kojto	115:87f2f5183dfb	2497	*/
Kojto	115:87f2f5183dfb	2498
Kojto	115:87f2f5183dfb	2499
Kojto	115:87f2f5183dfb	2500	/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
Kojto	115:87f2f5183dfb	2501	* @{
Kojto	115:87f2f5183dfb	2502	*/
Kojto	115:87f2f5183dfb	2503
Kojto	115:87f2f5183dfb	2504	/**
Kojto	115:87f2f5183dfb	2505	* @}
Kojto	115:87f2f5183dfb	2506	*/
Kojto	115:87f2f5183dfb	2507
Kojto	115:87f2f5183dfb	2508	#ifdef __cplusplus
Kojto	115:87f2f5183dfb	2509	}
Kojto	115:87f2f5183dfb	2510	#endif
Kojto	115:87f2f5183dfb	2511
Kojto	115:87f2f5183dfb	2512	#endif /* ___STM32_HAL_LEGACY */
Kojto	115:87f2f5183dfb	2513
Kojto	115:87f2f5183dfb	2514	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
Kojto	115:87f2f5183dfb	2515

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	04 Apr 2016
Imports:	4
Forks:	0
Commits:	122
Dependents:	4
Dependencies:	0
Followers:	1

The code in this repository is Apache licensed.

TARGET_NUCLEO_F746ZG/stm32_hal_legacy.h@115:87f2f5183dfb, 2016-03-02 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning