Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

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TARGET_SAMD21G18A/comp_dac.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
111:4336505e4b1c 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 111:4336505e4b1c 1 /**
Kojto 111:4336505e4b1c 2 * \file
Kojto 111:4336505e4b1c 3 *
Kojto 111:4336505e4b1c 4 * \brief Component description for DAC
Kojto 111:4336505e4b1c 5 *
Kojto 111:4336505e4b1c 6 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
Kojto 111:4336505e4b1c 7 *
Kojto 111:4336505e4b1c 8 * \asf_license_start
Kojto 111:4336505e4b1c 9 *
Kojto 111:4336505e4b1c 10 * \page License
Kojto 111:4336505e4b1c 11 *
Kojto 111:4336505e4b1c 12 * Redistribution and use in source and binary forms, with or without
Kojto 111:4336505e4b1c 13 * modification, are permitted provided that the following conditions are met:
Kojto 111:4336505e4b1c 14 *
Kojto 111:4336505e4b1c 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 111:4336505e4b1c 16 * this list of conditions and the following disclaimer.
Kojto 111:4336505e4b1c 17 *
Kojto 111:4336505e4b1c 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 111:4336505e4b1c 19 * this list of conditions and the following disclaimer in the documentation
Kojto 111:4336505e4b1c 20 * and/or other materials provided with the distribution.
Kojto 111:4336505e4b1c 21 *
Kojto 111:4336505e4b1c 22 * 3. The name of Atmel may not be used to endorse or promote products derived
Kojto 111:4336505e4b1c 23 * from this software without specific prior written permission.
Kojto 111:4336505e4b1c 24 *
Kojto 111:4336505e4b1c 25 * 4. This software may only be redistributed and used in connection with an
Kojto 111:4336505e4b1c 26 * Atmel microcontroller product.
Kojto 111:4336505e4b1c 27 *
Kojto 111:4336505e4b1c 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
Kojto 111:4336505e4b1c 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
Kojto 111:4336505e4b1c 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
Kojto 111:4336505e4b1c 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
Kojto 111:4336505e4b1c 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 111:4336505e4b1c 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
Kojto 111:4336505e4b1c 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
Kojto 111:4336505e4b1c 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
Kojto 111:4336505e4b1c 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Kojto 111:4336505e4b1c 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 111:4336505e4b1c 38 * POSSIBILITY OF SUCH DAMAGE.
Kojto 111:4336505e4b1c 39 *
Kojto 111:4336505e4b1c 40 * \asf_license_stop
Kojto 111:4336505e4b1c 41 *
Kojto 111:4336505e4b1c 42 */
Kojto 111:4336505e4b1c 43 /*
Kojto 111:4336505e4b1c 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
Kojto 111:4336505e4b1c 45 */
Kojto 111:4336505e4b1c 46
Kojto 111:4336505e4b1c 47 #ifndef _SAMD21_DAC_COMPONENT_
Kojto 111:4336505e4b1c 48 #define _SAMD21_DAC_COMPONENT_
Kojto 111:4336505e4b1c 49
Kojto 111:4336505e4b1c 50 /* ========================================================================== */
Kojto 111:4336505e4b1c 51 /** SOFTWARE API DEFINITION FOR DAC */
Kojto 111:4336505e4b1c 52 /* ========================================================================== */
Kojto 111:4336505e4b1c 53 /** \addtogroup SAMD21_DAC Digital Analog Converter */
Kojto 111:4336505e4b1c 54 /*@{*/
Kojto 111:4336505e4b1c 55
Kojto 111:4336505e4b1c 56 #define DAC_U2214
Kojto 111:4336505e4b1c 57 #define REV_DAC 0x110
Kojto 111:4336505e4b1c 58
Kojto 111:4336505e4b1c 59 /* -------- DAC_CTRLA : (DAC Offset: 0x0) (R/W 8) Control A -------- */
Kojto 111:4336505e4b1c 60 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 61 typedef union {
Kojto 111:4336505e4b1c 62 struct {
Kojto 111:4336505e4b1c 63 uint8_t SWRST:1; /*!< bit: 0 Software Reset */
Kojto 111:4336505e4b1c 64 uint8_t ENABLE:1; /*!< bit: 1 Enable */
Kojto 111:4336505e4b1c 65 uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */
Kojto 111:4336505e4b1c 66 uint8_t :5; /*!< bit: 3.. 7 Reserved */
Kojto 111:4336505e4b1c 67 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 68 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 69 } DAC_CTRLA_Type;
Kojto 111:4336505e4b1c 70 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 71
Kojto 111:4336505e4b1c 72 #define DAC_CTRLA_OFFSET 0x0 /**< \brief (DAC_CTRLA offset) Control A */
Kojto 111:4336505e4b1c 73 #define DAC_CTRLA_RESETVALUE 0x00ul /**< \brief (DAC_CTRLA reset_value) Control A */
Kojto 111:4336505e4b1c 74
Kojto 111:4336505e4b1c 75 #define DAC_CTRLA_SWRST_Pos 0 /**< \brief (DAC_CTRLA) Software Reset */
Kojto 111:4336505e4b1c 76 #define DAC_CTRLA_SWRST (0x1ul << DAC_CTRLA_SWRST_Pos)
Kojto 111:4336505e4b1c 77 #define DAC_CTRLA_ENABLE_Pos 1 /**< \brief (DAC_CTRLA) Enable */
Kojto 111:4336505e4b1c 78 #define DAC_CTRLA_ENABLE (0x1ul << DAC_CTRLA_ENABLE_Pos)
Kojto 111:4336505e4b1c 79 #define DAC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (DAC_CTRLA) Run in Standby */
Kojto 111:4336505e4b1c 80 #define DAC_CTRLA_RUNSTDBY (0x1ul << DAC_CTRLA_RUNSTDBY_Pos)
Kojto 111:4336505e4b1c 81 #define DAC_CTRLA_MASK 0x07ul /**< \brief (DAC_CTRLA) MASK Register */
Kojto 111:4336505e4b1c 82
Kojto 111:4336505e4b1c 83 /* -------- DAC_CTRLB : (DAC Offset: 0x1) (R/W 8) Control B -------- */
Kojto 111:4336505e4b1c 84 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 85 typedef union {
Kojto 111:4336505e4b1c 86 struct {
Kojto 111:4336505e4b1c 87 uint8_t EOEN:1; /*!< bit: 0 External Output Enable */
Kojto 111:4336505e4b1c 88 uint8_t IOEN:1; /*!< bit: 1 Internal Output Enable */
Kojto 111:4336505e4b1c 89 uint8_t LEFTADJ:1; /*!< bit: 2 Left Adjusted Data */
Kojto 111:4336505e4b1c 90 uint8_t VPD:1; /*!< bit: 3 Voltage Pump Disable */
Kojto 111:4336505e4b1c 91 uint8_t BDWP:1; /*!< bit: 4 Bypass DATABUF Write Protection */
Kojto 111:4336505e4b1c 92 uint8_t :1; /*!< bit: 5 Reserved */
Kojto 111:4336505e4b1c 93 uint8_t REFSEL:2; /*!< bit: 6.. 7 Reference Selection */
Kojto 111:4336505e4b1c 94 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 95 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 96 } DAC_CTRLB_Type;
Kojto 111:4336505e4b1c 97 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 98
Kojto 111:4336505e4b1c 99 #define DAC_CTRLB_OFFSET 0x1 /**< \brief (DAC_CTRLB offset) Control B */
Kojto 111:4336505e4b1c 100 #define DAC_CTRLB_RESETVALUE 0x00ul /**< \brief (DAC_CTRLB reset_value) Control B */
Kojto 111:4336505e4b1c 101
Kojto 111:4336505e4b1c 102 #define DAC_CTRLB_EOEN_Pos 0 /**< \brief (DAC_CTRLB) External Output Enable */
Kojto 111:4336505e4b1c 103 #define DAC_CTRLB_EOEN (0x1ul << DAC_CTRLB_EOEN_Pos)
Kojto 111:4336505e4b1c 104 #define DAC_CTRLB_IOEN_Pos 1 /**< \brief (DAC_CTRLB) Internal Output Enable */
Kojto 111:4336505e4b1c 105 #define DAC_CTRLB_IOEN (0x1ul << DAC_CTRLB_IOEN_Pos)
Kojto 111:4336505e4b1c 106 #define DAC_CTRLB_LEFTADJ_Pos 2 /**< \brief (DAC_CTRLB) Left Adjusted Data */
Kojto 111:4336505e4b1c 107 #define DAC_CTRLB_LEFTADJ (0x1ul << DAC_CTRLB_LEFTADJ_Pos)
Kojto 111:4336505e4b1c 108 #define DAC_CTRLB_VPD_Pos 3 /**< \brief (DAC_CTRLB) Voltage Pump Disable */
Kojto 111:4336505e4b1c 109 #define DAC_CTRLB_VPD (0x1ul << DAC_CTRLB_VPD_Pos)
Kojto 111:4336505e4b1c 110 #define DAC_CTRLB_BDWP_Pos 4 /**< \brief (DAC_CTRLB) Bypass DATABUF Write Protection */
Kojto 111:4336505e4b1c 111 #define DAC_CTRLB_BDWP (0x1ul << DAC_CTRLB_BDWP_Pos)
Kojto 111:4336505e4b1c 112 #define DAC_CTRLB_REFSEL_Pos 6 /**< \brief (DAC_CTRLB) Reference Selection */
Kojto 111:4336505e4b1c 113 #define DAC_CTRLB_REFSEL_Msk (0x3ul << DAC_CTRLB_REFSEL_Pos)
Kojto 111:4336505e4b1c 114 #define DAC_CTRLB_REFSEL(value) ((DAC_CTRLB_REFSEL_Msk & ((value) << DAC_CTRLB_REFSEL_Pos)))
Kojto 111:4336505e4b1c 115 #define DAC_CTRLB_REFSEL_INT1V_Val 0x0ul /**< \brief (DAC_CTRLB) Internal 1.0V reference */
Kojto 111:4336505e4b1c 116 #define DAC_CTRLB_REFSEL_AVCC_Val 0x1ul /**< \brief (DAC_CTRLB) AVCC */
Kojto 111:4336505e4b1c 117 #define DAC_CTRLB_REFSEL_VREFP_Val 0x2ul /**< \brief (DAC_CTRLB) External reference */
Kojto 111:4336505e4b1c 118 #define DAC_CTRLB_REFSEL_INT1V (DAC_CTRLB_REFSEL_INT1V_Val << DAC_CTRLB_REFSEL_Pos)
Kojto 111:4336505e4b1c 119 #define DAC_CTRLB_REFSEL_AVCC (DAC_CTRLB_REFSEL_AVCC_Val << DAC_CTRLB_REFSEL_Pos)
Kojto 111:4336505e4b1c 120 #define DAC_CTRLB_REFSEL_VREFP (DAC_CTRLB_REFSEL_VREFP_Val << DAC_CTRLB_REFSEL_Pos)
Kojto 111:4336505e4b1c 121 #define DAC_CTRLB_MASK 0xDFul /**< \brief (DAC_CTRLB) MASK Register */
Kojto 111:4336505e4b1c 122
Kojto 111:4336505e4b1c 123 /* -------- DAC_EVCTRL : (DAC Offset: 0x2) (R/W 8) Event Control -------- */
Kojto 111:4336505e4b1c 124 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 125 typedef union {
Kojto 111:4336505e4b1c 126 struct {
Kojto 111:4336505e4b1c 127 uint8_t STARTEI:1; /*!< bit: 0 Start Conversion Event Input */
Kojto 111:4336505e4b1c 128 uint8_t EMPTYEO:1; /*!< bit: 1 Data Buffer Empty Event Output */
Kojto 111:4336505e4b1c 129 uint8_t :6; /*!< bit: 2.. 7 Reserved */
Kojto 111:4336505e4b1c 130 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 131 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 132 } DAC_EVCTRL_Type;
Kojto 111:4336505e4b1c 133 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 134
Kojto 111:4336505e4b1c 135 #define DAC_EVCTRL_OFFSET 0x2 /**< \brief (DAC_EVCTRL offset) Event Control */
Kojto 111:4336505e4b1c 136 #define DAC_EVCTRL_RESETVALUE 0x00ul /**< \brief (DAC_EVCTRL reset_value) Event Control */
Kojto 111:4336505e4b1c 137
Kojto 111:4336505e4b1c 138 #define DAC_EVCTRL_STARTEI_Pos 0 /**< \brief (DAC_EVCTRL) Start Conversion Event Input */
Kojto 111:4336505e4b1c 139 #define DAC_EVCTRL_STARTEI (0x1ul << DAC_EVCTRL_STARTEI_Pos)
Kojto 111:4336505e4b1c 140 #define DAC_EVCTRL_EMPTYEO_Pos 1 /**< \brief (DAC_EVCTRL) Data Buffer Empty Event Output */
Kojto 111:4336505e4b1c 141 #define DAC_EVCTRL_EMPTYEO (0x1ul << DAC_EVCTRL_EMPTYEO_Pos)
Kojto 111:4336505e4b1c 142 #define DAC_EVCTRL_MASK 0x03ul /**< \brief (DAC_EVCTRL) MASK Register */
Kojto 111:4336505e4b1c 143
Kojto 111:4336505e4b1c 144 /* -------- DAC_INTENCLR : (DAC Offset: 0x4) (R/W 8) Interrupt Enable Clear -------- */
Kojto 111:4336505e4b1c 145 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 146 typedef union {
Kojto 111:4336505e4b1c 147 struct {
Kojto 111:4336505e4b1c 148 uint8_t UNDERRUN:1; /*!< bit: 0 Underrun Interrupt Enable */
Kojto 111:4336505e4b1c 149 uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty Interrupt Enable */
Kojto 111:4336505e4b1c 150 uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready Interrupt Enable */
Kojto 111:4336505e4b1c 151 uint8_t :5; /*!< bit: 3.. 7 Reserved */
Kojto 111:4336505e4b1c 152 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 153 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 154 } DAC_INTENCLR_Type;
Kojto 111:4336505e4b1c 155 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 156
Kojto 111:4336505e4b1c 157 #define DAC_INTENCLR_OFFSET 0x4 /**< \brief (DAC_INTENCLR offset) Interrupt Enable Clear */
Kojto 111:4336505e4b1c 158 #define DAC_INTENCLR_RESETVALUE 0x00ul /**< \brief (DAC_INTENCLR reset_value) Interrupt Enable Clear */
Kojto 111:4336505e4b1c 159
Kojto 111:4336505e4b1c 160 #define DAC_INTENCLR_UNDERRUN_Pos 0 /**< \brief (DAC_INTENCLR) Underrun Interrupt Enable */
Kojto 111:4336505e4b1c 161 #define DAC_INTENCLR_UNDERRUN (0x1ul << DAC_INTENCLR_UNDERRUN_Pos)
Kojto 111:4336505e4b1c 162 #define DAC_INTENCLR_EMPTY_Pos 1 /**< \brief (DAC_INTENCLR) Data Buffer Empty Interrupt Enable */
Kojto 111:4336505e4b1c 163 #define DAC_INTENCLR_EMPTY (0x1ul << DAC_INTENCLR_EMPTY_Pos)
Kojto 111:4336505e4b1c 164 #define DAC_INTENCLR_SYNCRDY_Pos 2 /**< \brief (DAC_INTENCLR) Synchronization Ready Interrupt Enable */
Kojto 111:4336505e4b1c 165 #define DAC_INTENCLR_SYNCRDY (0x1ul << DAC_INTENCLR_SYNCRDY_Pos)
Kojto 111:4336505e4b1c 166 #define DAC_INTENCLR_MASK 0x07ul /**< \brief (DAC_INTENCLR) MASK Register */
Kojto 111:4336505e4b1c 167
Kojto 111:4336505e4b1c 168 /* -------- DAC_INTENSET : (DAC Offset: 0x5) (R/W 8) Interrupt Enable Set -------- */
Kojto 111:4336505e4b1c 169 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 170 typedef union {
Kojto 111:4336505e4b1c 171 struct {
Kojto 111:4336505e4b1c 172 uint8_t UNDERRUN:1; /*!< bit: 0 Underrun Interrupt Enable */
Kojto 111:4336505e4b1c 173 uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty Interrupt Enable */
Kojto 111:4336505e4b1c 174 uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready Interrupt Enable */
Kojto 111:4336505e4b1c 175 uint8_t :5; /*!< bit: 3.. 7 Reserved */
Kojto 111:4336505e4b1c 176 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 177 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 178 } DAC_INTENSET_Type;
Kojto 111:4336505e4b1c 179 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 180
Kojto 111:4336505e4b1c 181 #define DAC_INTENSET_OFFSET 0x5 /**< \brief (DAC_INTENSET offset) Interrupt Enable Set */
Kojto 111:4336505e4b1c 182 #define DAC_INTENSET_RESETVALUE 0x00ul /**< \brief (DAC_INTENSET reset_value) Interrupt Enable Set */
Kojto 111:4336505e4b1c 183
Kojto 111:4336505e4b1c 184 #define DAC_INTENSET_UNDERRUN_Pos 0 /**< \brief (DAC_INTENSET) Underrun Interrupt Enable */
Kojto 111:4336505e4b1c 185 #define DAC_INTENSET_UNDERRUN (0x1ul << DAC_INTENSET_UNDERRUN_Pos)
Kojto 111:4336505e4b1c 186 #define DAC_INTENSET_EMPTY_Pos 1 /**< \brief (DAC_INTENSET) Data Buffer Empty Interrupt Enable */
Kojto 111:4336505e4b1c 187 #define DAC_INTENSET_EMPTY (0x1ul << DAC_INTENSET_EMPTY_Pos)
Kojto 111:4336505e4b1c 188 #define DAC_INTENSET_SYNCRDY_Pos 2 /**< \brief (DAC_INTENSET) Synchronization Ready Interrupt Enable */
Kojto 111:4336505e4b1c 189 #define DAC_INTENSET_SYNCRDY (0x1ul << DAC_INTENSET_SYNCRDY_Pos)
Kojto 111:4336505e4b1c 190 #define DAC_INTENSET_MASK 0x07ul /**< \brief (DAC_INTENSET) MASK Register */
Kojto 111:4336505e4b1c 191
Kojto 111:4336505e4b1c 192 /* -------- DAC_INTFLAG : (DAC Offset: 0x6) (R/W 8) Interrupt Flag Status and Clear -------- */
Kojto 111:4336505e4b1c 193 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 194 typedef union {
Kojto 111:4336505e4b1c 195 struct {
Kojto 111:4336505e4b1c 196 uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
Kojto 111:4336505e4b1c 197 uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
Kojto 111:4336505e4b1c 198 uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
Kojto 111:4336505e4b1c 199 uint8_t :5; /*!< bit: 3.. 7 Reserved */
Kojto 111:4336505e4b1c 200 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 201 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 202 } DAC_INTFLAG_Type;
Kojto 111:4336505e4b1c 203 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 204
Kojto 111:4336505e4b1c 205 #define DAC_INTFLAG_OFFSET 0x6 /**< \brief (DAC_INTFLAG offset) Interrupt Flag Status and Clear */
Kojto 111:4336505e4b1c 206 #define DAC_INTFLAG_RESETVALUE 0x00ul /**< \brief (DAC_INTFLAG reset_value) Interrupt Flag Status and Clear */
Kojto 111:4336505e4b1c 207
Kojto 111:4336505e4b1c 208 #define DAC_INTFLAG_UNDERRUN_Pos 0 /**< \brief (DAC_INTFLAG) Underrun */
Kojto 111:4336505e4b1c 209 #define DAC_INTFLAG_UNDERRUN (0x1ul << DAC_INTFLAG_UNDERRUN_Pos)
Kojto 111:4336505e4b1c 210 #define DAC_INTFLAG_EMPTY_Pos 1 /**< \brief (DAC_INTFLAG) Data Buffer Empty */
Kojto 111:4336505e4b1c 211 #define DAC_INTFLAG_EMPTY (0x1ul << DAC_INTFLAG_EMPTY_Pos)
Kojto 111:4336505e4b1c 212 #define DAC_INTFLAG_SYNCRDY_Pos 2 /**< \brief (DAC_INTFLAG) Synchronization Ready */
Kojto 111:4336505e4b1c 213 #define DAC_INTFLAG_SYNCRDY (0x1ul << DAC_INTFLAG_SYNCRDY_Pos)
Kojto 111:4336505e4b1c 214 #define DAC_INTFLAG_MASK 0x07ul /**< \brief (DAC_INTFLAG) MASK Register */
Kojto 111:4336505e4b1c 215
Kojto 111:4336505e4b1c 216 /* -------- DAC_STATUS : (DAC Offset: 0x7) (R/ 8) Status -------- */
Kojto 111:4336505e4b1c 217 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 218 typedef union {
Kojto 111:4336505e4b1c 219 struct {
Kojto 111:4336505e4b1c 220 uint8_t :7; /*!< bit: 0.. 6 Reserved */
Kojto 111:4336505e4b1c 221 uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy Status */
Kojto 111:4336505e4b1c 222 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 223 uint8_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 224 } DAC_STATUS_Type;
Kojto 111:4336505e4b1c 225 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 226
Kojto 111:4336505e4b1c 227 #define DAC_STATUS_OFFSET 0x7 /**< \brief (DAC_STATUS offset) Status */
Kojto 111:4336505e4b1c 228 #define DAC_STATUS_RESETVALUE 0x00ul /**< \brief (DAC_STATUS reset_value) Status */
Kojto 111:4336505e4b1c 229
Kojto 111:4336505e4b1c 230 #define DAC_STATUS_SYNCBUSY_Pos 7 /**< \brief (DAC_STATUS) Synchronization Busy Status */
Kojto 111:4336505e4b1c 231 #define DAC_STATUS_SYNCBUSY (0x1ul << DAC_STATUS_SYNCBUSY_Pos)
Kojto 111:4336505e4b1c 232 #define DAC_STATUS_MASK 0x80ul /**< \brief (DAC_STATUS) MASK Register */
Kojto 111:4336505e4b1c 233
Kojto 111:4336505e4b1c 234 /* -------- DAC_DATA : (DAC Offset: 0x8) (R/W 16) Data -------- */
Kojto 111:4336505e4b1c 235 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 236 typedef union {
Kojto 111:4336505e4b1c 237 struct {
Kojto 111:4336505e4b1c 238 uint16_t DATA:16; /*!< bit: 0..15 Data value to be converted */
Kojto 111:4336505e4b1c 239 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 240 uint16_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 241 } DAC_DATA_Type;
Kojto 111:4336505e4b1c 242 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 243
Kojto 111:4336505e4b1c 244 #define DAC_DATA_OFFSET 0x8 /**< \brief (DAC_DATA offset) Data */
Kojto 111:4336505e4b1c 245 #define DAC_DATA_RESETVALUE 0x0000ul /**< \brief (DAC_DATA reset_value) Data */
Kojto 111:4336505e4b1c 246
Kojto 111:4336505e4b1c 247 #define DAC_DATA_DATA_Pos 0 /**< \brief (DAC_DATA) Data value to be converted */
Kojto 111:4336505e4b1c 248 #define DAC_DATA_DATA_Msk (0xFFFFul << DAC_DATA_DATA_Pos)
Kojto 111:4336505e4b1c 249 #define DAC_DATA_DATA(value) ((DAC_DATA_DATA_Msk & ((value) << DAC_DATA_DATA_Pos)))
Kojto 111:4336505e4b1c 250 #define DAC_DATA_MASK 0xFFFFul /**< \brief (DAC_DATA) MASK Register */
Kojto 111:4336505e4b1c 251
Kojto 111:4336505e4b1c 252 /* -------- DAC_DATABUF : (DAC Offset: 0xC) (R/W 16) Data Buffer -------- */
Kojto 111:4336505e4b1c 253 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 254 typedef union {
Kojto 111:4336505e4b1c 255 struct {
Kojto 111:4336505e4b1c 256 uint16_t DATABUF:16; /*!< bit: 0..15 Data Buffer */
Kojto 111:4336505e4b1c 257 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 258 uint16_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 259 } DAC_DATABUF_Type;
Kojto 111:4336505e4b1c 260 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 261
Kojto 111:4336505e4b1c 262 #define DAC_DATABUF_OFFSET 0xC /**< \brief (DAC_DATABUF offset) Data Buffer */
Kojto 111:4336505e4b1c 263 #define DAC_DATABUF_RESETVALUE 0x0000ul /**< \brief (DAC_DATABUF reset_value) Data Buffer */
Kojto 111:4336505e4b1c 264
Kojto 111:4336505e4b1c 265 #define DAC_DATABUF_DATABUF_Pos 0 /**< \brief (DAC_DATABUF) Data Buffer */
Kojto 111:4336505e4b1c 266 #define DAC_DATABUF_DATABUF_Msk (0xFFFFul << DAC_DATABUF_DATABUF_Pos)
Kojto 111:4336505e4b1c 267 #define DAC_DATABUF_DATABUF(value) ((DAC_DATABUF_DATABUF_Msk & ((value) << DAC_DATABUF_DATABUF_Pos)))
Kojto 111:4336505e4b1c 268 #define DAC_DATABUF_MASK 0xFFFFul /**< \brief (DAC_DATABUF) MASK Register */
Kojto 111:4336505e4b1c 269
Kojto 111:4336505e4b1c 270 /** \brief DAC hardware registers */
Kojto 111:4336505e4b1c 271 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 272 typedef struct {
Kojto 111:4336505e4b1c 273 __IO DAC_CTRLA_Type CTRLA; /**< \brief Offset: 0x0 (R/W 8) Control A */
Kojto 111:4336505e4b1c 274 __IO DAC_CTRLB_Type CTRLB; /**< \brief Offset: 0x1 (R/W 8) Control B */
Kojto 111:4336505e4b1c 275 __IO DAC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x2 (R/W 8) Event Control */
Kojto 111:4336505e4b1c 276 RoReg8 Reserved1[0x1];
Kojto 111:4336505e4b1c 277 __IO DAC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x4 (R/W 8) Interrupt Enable Clear */
Kojto 111:4336505e4b1c 278 __IO DAC_INTENSET_Type INTENSET; /**< \brief Offset: 0x5 (R/W 8) Interrupt Enable Set */
Kojto 111:4336505e4b1c 279 __IO DAC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x6 (R/W 8) Interrupt Flag Status and Clear */
Kojto 111:4336505e4b1c 280 __I DAC_STATUS_Type STATUS; /**< \brief Offset: 0x7 (R/ 8) Status */
Kojto 111:4336505e4b1c 281 __IO DAC_DATA_Type DATA; /**< \brief Offset: 0x8 (R/W 16) Data */
Kojto 111:4336505e4b1c 282 RoReg8 Reserved2[0x2];
Kojto 111:4336505e4b1c 283 __IO DAC_DATABUF_Type DATABUF; /**< \brief Offset: 0xC (R/W 16) Data Buffer */
Kojto 111:4336505e4b1c 284 } Dac;
Kojto 111:4336505e4b1c 285 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 286
Kojto 111:4336505e4b1c 287 /*@}*/
Kojto 111:4336505e4b1c 288
Kojto 111:4336505e4b1c 289 #endif /* _SAMD21_DAC_COMPONENT_ */