Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_NUCLEO_F746ZG/stm32f7xx_hal_sram.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
116:c0f6e94411f5 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 115:87f2f5183dfb 1 /**
Kojto 115:87f2f5183dfb 2 ******************************************************************************
Kojto 115:87f2f5183dfb 3 * @file stm32f7xx_hal_sram.h
Kojto 115:87f2f5183dfb 4 * @author MCD Application Team
Kojto 116:c0f6e94411f5 5 * @version V1.0.4
Kojto 116:c0f6e94411f5 6 * @date 09-December-2015
Kojto 115:87f2f5183dfb 7 * @brief Header file of SRAM HAL module.
Kojto 115:87f2f5183dfb 8 ******************************************************************************
Kojto 115:87f2f5183dfb 9 * @attention
Kojto 115:87f2f5183dfb 10 *
Kojto 115:87f2f5183dfb 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 115:87f2f5183dfb 12 *
Kojto 115:87f2f5183dfb 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 115:87f2f5183dfb 14 * are permitted provided that the following conditions are met:
Kojto 115:87f2f5183dfb 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 115:87f2f5183dfb 16 * this list of conditions and the following disclaimer.
Kojto 115:87f2f5183dfb 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 115:87f2f5183dfb 18 * this list of conditions and the following disclaimer in the documentation
Kojto 115:87f2f5183dfb 19 * and/or other materials provided with the distribution.
Kojto 115:87f2f5183dfb 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 115:87f2f5183dfb 21 * may be used to endorse or promote products derived from this software
Kojto 115:87f2f5183dfb 22 * without specific prior written permission.
Kojto 115:87f2f5183dfb 23 *
Kojto 115:87f2f5183dfb 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 115:87f2f5183dfb 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 115:87f2f5183dfb 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 115:87f2f5183dfb 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 115:87f2f5183dfb 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 115:87f2f5183dfb 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 115:87f2f5183dfb 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 115:87f2f5183dfb 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 115:87f2f5183dfb 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 115:87f2f5183dfb 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 115:87f2f5183dfb 34 *
Kojto 115:87f2f5183dfb 35 ******************************************************************************
Kojto 115:87f2f5183dfb 36 */
Kojto 115:87f2f5183dfb 37
Kojto 115:87f2f5183dfb 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 115:87f2f5183dfb 39 #ifndef __STM32F7xx_HAL_SRAM_H
Kojto 115:87f2f5183dfb 40 #define __STM32F7xx_HAL_SRAM_H
Kojto 115:87f2f5183dfb 41
Kojto 115:87f2f5183dfb 42 #ifdef __cplusplus
Kojto 115:87f2f5183dfb 43 extern "C" {
Kojto 115:87f2f5183dfb 44 #endif
Kojto 115:87f2f5183dfb 45
Kojto 115:87f2f5183dfb 46 /* Includes ------------------------------------------------------------------*/
Kojto 115:87f2f5183dfb 47 #include "stm32f7xx_ll_fmc.h"
Kojto 115:87f2f5183dfb 48
Kojto 115:87f2f5183dfb 49 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 115:87f2f5183dfb 50 * @{
Kojto 115:87f2f5183dfb 51 */
Kojto 115:87f2f5183dfb 52 /** @addtogroup SRAM
Kojto 115:87f2f5183dfb 53 * @{
Kojto 115:87f2f5183dfb 54 */
Kojto 115:87f2f5183dfb 55
Kojto 115:87f2f5183dfb 56 /* Exported typedef ----------------------------------------------------------*/
Kojto 115:87f2f5183dfb 57
Kojto 115:87f2f5183dfb 58 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 115:87f2f5183dfb 59 * @{
Kojto 115:87f2f5183dfb 60 */
Kojto 115:87f2f5183dfb 61 /**
Kojto 115:87f2f5183dfb 62 * @brief HAL SRAM State structures definition
Kojto 115:87f2f5183dfb 63 */
Kojto 115:87f2f5183dfb 64 typedef enum
Kojto 115:87f2f5183dfb 65 {
Kojto 115:87f2f5183dfb 66 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Kojto 115:87f2f5183dfb 67 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Kojto 115:87f2f5183dfb 68 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Kojto 115:87f2f5183dfb 69 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Kojto 115:87f2f5183dfb 70 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Kojto 115:87f2f5183dfb 71
Kojto 115:87f2f5183dfb 72 }HAL_SRAM_StateTypeDef;
Kojto 115:87f2f5183dfb 73
Kojto 115:87f2f5183dfb 74 /**
Kojto 115:87f2f5183dfb 75 * @brief SRAM handle Structure definition
Kojto 115:87f2f5183dfb 76 */
Kojto 115:87f2f5183dfb 77 typedef struct
Kojto 115:87f2f5183dfb 78 {
Kojto 115:87f2f5183dfb 79 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Kojto 115:87f2f5183dfb 80
Kojto 115:87f2f5183dfb 81 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Kojto 115:87f2f5183dfb 82
Kojto 115:87f2f5183dfb 83 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Kojto 115:87f2f5183dfb 84
Kojto 115:87f2f5183dfb 85 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Kojto 115:87f2f5183dfb 86
Kojto 115:87f2f5183dfb 87 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Kojto 115:87f2f5183dfb 88
Kojto 115:87f2f5183dfb 89 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 115:87f2f5183dfb 90
Kojto 115:87f2f5183dfb 91 }SRAM_HandleTypeDef;
Kojto 115:87f2f5183dfb 92
Kojto 115:87f2f5183dfb 93 /**
Kojto 115:87f2f5183dfb 94 * @}
Kojto 115:87f2f5183dfb 95 */
Kojto 115:87f2f5183dfb 96
Kojto 115:87f2f5183dfb 97 /* Exported constants --------------------------------------------------------*/
Kojto 115:87f2f5183dfb 98 /* Exported macro ------------------------------------------------------------*/
Kojto 115:87f2f5183dfb 99
Kojto 115:87f2f5183dfb 100 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 115:87f2f5183dfb 101 * @{
Kojto 115:87f2f5183dfb 102 */
Kojto 115:87f2f5183dfb 103
Kojto 115:87f2f5183dfb 104 /** @brief Reset SRAM handle state
Kojto 115:87f2f5183dfb 105 * @param __HANDLE__: SRAM handle
Kojto 115:87f2f5183dfb 106 * @retval None
Kojto 115:87f2f5183dfb 107 */
Kojto 115:87f2f5183dfb 108 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Kojto 115:87f2f5183dfb 109
Kojto 115:87f2f5183dfb 110 /**
Kojto 115:87f2f5183dfb 111 * @}
Kojto 115:87f2f5183dfb 112 */
Kojto 115:87f2f5183dfb 113
Kojto 115:87f2f5183dfb 114 /* Exported functions --------------------------------------------------------*/
Kojto 115:87f2f5183dfb 115 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
Kojto 115:87f2f5183dfb 116 * @{
Kojto 115:87f2f5183dfb 117 */
Kojto 115:87f2f5183dfb 118
Kojto 115:87f2f5183dfb 119 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 115:87f2f5183dfb 120 * @{
Kojto 115:87f2f5183dfb 121 */
Kojto 115:87f2f5183dfb 122
Kojto 115:87f2f5183dfb 123 /* Initialization/de-initialization functions ********************************/
Kojto 115:87f2f5183dfb 124 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 115:87f2f5183dfb 125 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 115:87f2f5183dfb 126 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 115:87f2f5183dfb 127 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Kojto 115:87f2f5183dfb 128
Kojto 115:87f2f5183dfb 129 /**
Kojto 115:87f2f5183dfb 130 * @}
Kojto 115:87f2f5183dfb 131 */
Kojto 115:87f2f5183dfb 132
Kojto 115:87f2f5183dfb 133 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
Kojto 115:87f2f5183dfb 134 * @{
Kojto 115:87f2f5183dfb 135 */
Kojto 115:87f2f5183dfb 136
Kojto 115:87f2f5183dfb 137 /* I/O operation functions ***************************************************/
Kojto 115:87f2f5183dfb 138 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 139 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 140 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 141 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 142 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 143 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 144 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 145 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 115:87f2f5183dfb 146
Kojto 115:87f2f5183dfb 147 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 115:87f2f5183dfb 148 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 115:87f2f5183dfb 149
Kojto 115:87f2f5183dfb 150 /**
Kojto 115:87f2f5183dfb 151 * @}
Kojto 115:87f2f5183dfb 152 */
Kojto 115:87f2f5183dfb 153
Kojto 115:87f2f5183dfb 154 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
Kojto 115:87f2f5183dfb 155 * @{
Kojto 115:87f2f5183dfb 156 */
Kojto 115:87f2f5183dfb 157
Kojto 115:87f2f5183dfb 158 /* SRAM Control functions ****************************************************/
Kojto 115:87f2f5183dfb 159 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Kojto 115:87f2f5183dfb 160 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Kojto 115:87f2f5183dfb 161
Kojto 115:87f2f5183dfb 162 /**
Kojto 115:87f2f5183dfb 163 * @}
Kojto 115:87f2f5183dfb 164 */
Kojto 115:87f2f5183dfb 165
Kojto 115:87f2f5183dfb 166 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
Kojto 115:87f2f5183dfb 167 * @{
Kojto 115:87f2f5183dfb 168 */
Kojto 115:87f2f5183dfb 169
Kojto 115:87f2f5183dfb 170 /* SRAM State functions ******************************************************/
Kojto 115:87f2f5183dfb 171 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 115:87f2f5183dfb 172
Kojto 115:87f2f5183dfb 173 /**
Kojto 115:87f2f5183dfb 174 * @}
Kojto 115:87f2f5183dfb 175 */
Kojto 115:87f2f5183dfb 176
Kojto 115:87f2f5183dfb 177 /**
Kojto 115:87f2f5183dfb 178 * @}
Kojto 115:87f2f5183dfb 179 */
Kojto 115:87f2f5183dfb 180
Kojto 115:87f2f5183dfb 181 /**
Kojto 115:87f2f5183dfb 182 * @}
Kojto 115:87f2f5183dfb 183 */
Kojto 115:87f2f5183dfb 184
Kojto 115:87f2f5183dfb 185 /**
Kojto 115:87f2f5183dfb 186 * @}
Kojto 115:87f2f5183dfb 187 */
Kojto 115:87f2f5183dfb 188
Kojto 115:87f2f5183dfb 189 #ifdef __cplusplus
Kojto 115:87f2f5183dfb 190 }
Kojto 115:87f2f5183dfb 191 #endif
Kojto 115:87f2f5183dfb 192
Kojto 115:87f2f5183dfb 193 #endif /* __STM32F7xx_HAL_SRAM_H */
Kojto 115:87f2f5183dfb 194
Kojto 115:87f2f5183dfb 195 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/