Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_NUCLEO_F401RE/stm32f4xx_hal.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the HAL
emilmont 77:869cf507173a 8 * module driver.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
Kojto 99:dbbf35b96557 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
emilmont 77:869cf507173a 14 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 15 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 16 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 17 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 19 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 20 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 22 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
emilmont 77:869cf507173a 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32F4xx_HAL_H
emilmont 77:869cf507173a 41 #define __STM32F4xx_HAL_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f4xx_hal_conf.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup HAL
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 60 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 61 /** @defgroup HAL_Exported_Macros HAL Exported Macros
Kojto 99:dbbf35b96557 62 * @{
Kojto 99:dbbf35b96557 63 */
emilmont 77:869cf507173a 64
emilmont 77:869cf507173a 65 /** @brief Freeze/Unfreeze Peripherals in Debug mode
emilmont 77:869cf507173a 66 */
Kojto 99:dbbf35b96557 67 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
Kojto 99:dbbf35b96557 68 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
Kojto 99:dbbf35b96557 69 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
Kojto 99:dbbf35b96557 70 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
Kojto 99:dbbf35b96557 71 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
Kojto 99:dbbf35b96557 72 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
Kojto 99:dbbf35b96557 73 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
Kojto 99:dbbf35b96557 74 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
Kojto 99:dbbf35b96557 75 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
Kojto 99:dbbf35b96557 76 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
Kojto 99:dbbf35b96557 77 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
Kojto 99:dbbf35b96557 78 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
Kojto 99:dbbf35b96557 79 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
Kojto 99:dbbf35b96557 80 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
Kojto 99:dbbf35b96557 81 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
Kojto 99:dbbf35b96557 82 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
Kojto 99:dbbf35b96557 83 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
Kojto 99:dbbf35b96557 84 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
Kojto 99:dbbf35b96557 85 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
Kojto 99:dbbf35b96557 86 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
Kojto 99:dbbf35b96557 87 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
Kojto 99:dbbf35b96557 88 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
emilmont 77:869cf507173a 89
Kojto 99:dbbf35b96557 90 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
Kojto 99:dbbf35b96557 91 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
Kojto 99:dbbf35b96557 92 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
Kojto 99:dbbf35b96557 93 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
Kojto 99:dbbf35b96557 94 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
Kojto 99:dbbf35b96557 95 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
Kojto 99:dbbf35b96557 96 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
Kojto 99:dbbf35b96557 97 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
Kojto 99:dbbf35b96557 98 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
Kojto 99:dbbf35b96557 99 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
Kojto 99:dbbf35b96557 100 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
Kojto 99:dbbf35b96557 101 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
Kojto 99:dbbf35b96557 102 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
Kojto 99:dbbf35b96557 103 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
Kojto 99:dbbf35b96557 104 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
Kojto 99:dbbf35b96557 105 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
Kojto 99:dbbf35b96557 106 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
Kojto 99:dbbf35b96557 107 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
Kojto 99:dbbf35b96557 108 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
Kojto 99:dbbf35b96557 109 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
Kojto 99:dbbf35b96557 110 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
Kojto 99:dbbf35b96557 111 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /** @brief Main Flash memory mapped at 0x00000000
emilmont 77:869cf507173a 114 */
Kojto 99:dbbf35b96557 115 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 /** @brief System Flash memory mapped at 0x00000000
emilmont 77:869cf507173a 118 */
Kojto 99:dbbf35b96557 119 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
Kojto 99:dbbf35b96557 120 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
Kojto 99:dbbf35b96557 121 }while(0);
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 /** @brief Embedded SRAM mapped at 0x00000000
emilmont 77:869cf507173a 124 */
Kojto 99:dbbf35b96557 125 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
Kojto 99:dbbf35b96557 126 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
Kojto 99:dbbf35b96557 127 }while(0);
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
emilmont 77:869cf507173a 130 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
emilmont 77:869cf507173a 131 */
Kojto 99:dbbf35b96557 132 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
Kojto 99:dbbf35b96557 133 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
Kojto 99:dbbf35b96557 134 }while(0);
emilmont 77:869cf507173a 135 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
emilmont 77:869cf507173a 136
Kojto 110:165afa46840b 137 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
Kojto 110:165afa46840b 138 defined(STM32F469xx) || defined(STM32F479xx)
emilmont 77:869cf507173a 139 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
emilmont 77:869cf507173a 140 */
Kojto 99:dbbf35b96557 141 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
Kojto 99:dbbf35b96557 142 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
Kojto 99:dbbf35b96557 143 }while(0);
emilmont 77:869cf507173a 144
emilmont 77:869cf507173a 145 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
emilmont 77:869cf507173a 146 */
Kojto 99:dbbf35b96557 147 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
Kojto 99:dbbf35b96557 148 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
Kojto 99:dbbf35b96557 149 }while(0);
Kojto 110:165afa46840b 150 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
Kojto 110:165afa46840b 151
Kojto 110:165afa46840b 152 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
Kojto 110:165afa46840b 153 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
Kojto 110:165afa46840b 154 * @{
Kojto 110:165afa46840b 155 */
Kojto 110:165afa46840b 156 /** @brief SYSCFG Break Lockup lock
Kojto 110:165afa46840b 157 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
Kojto 110:165afa46840b 158 * @note The selected configuration is locked and can be unlocked by system reset
Kojto 110:165afa46840b 159 */
Kojto 110:165afa46840b 160 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
Kojto 110:165afa46840b 161 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
Kojto 110:165afa46840b 162 }while(0)
Kojto 110:165afa46840b 163 /**
Kojto 110:165afa46840b 164 * @}
Kojto 110:165afa46840b 165 */
Kojto 110:165afa46840b 166
Kojto 110:165afa46840b 167 /** @defgroup PVD_Lock_Enable PVD Lock
Kojto 110:165afa46840b 168 * @{
Kojto 110:165afa46840b 169 */
Kojto 110:165afa46840b 170 /** @brief SYSCFG Break PVD lock
Kojto 110:165afa46840b 171 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
Kojto 110:165afa46840b 172 * @note The selected configuration is locked and can be unlocked by system reset
Kojto 110:165afa46840b 173 */
Kojto 110:165afa46840b 174 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
Kojto 110:165afa46840b 175 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
Kojto 110:165afa46840b 176 }while(0)
Kojto 110:165afa46840b 177 /**
Kojto 110:165afa46840b 178 * @}
Kojto 110:165afa46840b 179 */
Kojto 110:165afa46840b 180 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
Kojto 99:dbbf35b96557 181 /**
Kojto 99:dbbf35b96557 182 * @}
Kojto 99:dbbf35b96557 183 */
emilmont 77:869cf507173a 184
emilmont 77:869cf507173a 185 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 186 /** @addtogroup HAL_Exported_Functions
Kojto 99:dbbf35b96557 187 * @{
Kojto 99:dbbf35b96557 188 */
Kojto 99:dbbf35b96557 189 /** @addtogroup HAL_Exported_Functions_Group1
Kojto 99:dbbf35b96557 190 * @{
Kojto 99:dbbf35b96557 191 */
emilmont 77:869cf507173a 192 /* Initialization and de-initialization functions ******************************/
emilmont 77:869cf507173a 193 HAL_StatusTypeDef HAL_Init(void);
emilmont 77:869cf507173a 194 HAL_StatusTypeDef HAL_DeInit(void);
bogdanm 81:7d30d6019079 195 void HAL_MspInit(void);
bogdanm 81:7d30d6019079 196 void HAL_MspDeInit(void);
bogdanm 85:024bf7f99721 197 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
Kojto 99:dbbf35b96557 198 /**
Kojto 99:dbbf35b96557 199 * @}
Kojto 99:dbbf35b96557 200 */
emilmont 77:869cf507173a 201
Kojto 99:dbbf35b96557 202 /** @addtogroup HAL_Exported_Functions_Group2
Kojto 99:dbbf35b96557 203 * @{
Kojto 99:dbbf35b96557 204 */
emilmont 77:869cf507173a 205 /* Peripheral Control functions ************************************************/
bogdanm 85:024bf7f99721 206 void HAL_IncTick(void);
bogdanm 85:024bf7f99721 207 void HAL_Delay(__IO uint32_t Delay);
emilmont 77:869cf507173a 208 uint32_t HAL_GetTick(void);
bogdanm 85:024bf7f99721 209 void HAL_SuspendTick(void);
bogdanm 85:024bf7f99721 210 void HAL_ResumeTick(void);
emilmont 77:869cf507173a 211 uint32_t HAL_GetHalVersion(void);
emilmont 77:869cf507173a 212 uint32_t HAL_GetREVID(void);
emilmont 77:869cf507173a 213 uint32_t HAL_GetDEVID(void);
Kojto 99:dbbf35b96557 214 void HAL_DBGMCU_EnableDBGSleepMode(void);
Kojto 99:dbbf35b96557 215 void HAL_DBGMCU_DisableDBGSleepMode(void);
Kojto 99:dbbf35b96557 216 void HAL_DBGMCU_EnableDBGStopMode(void);
Kojto 99:dbbf35b96557 217 void HAL_DBGMCU_DisableDBGStopMode(void);
Kojto 99:dbbf35b96557 218 void HAL_DBGMCU_EnableDBGStandbyMode(void);
Kojto 99:dbbf35b96557 219 void HAL_DBGMCU_DisableDBGStandbyMode(void);
emilmont 77:869cf507173a 220 void HAL_EnableCompensationCell(void);
emilmont 77:869cf507173a 221 void HAL_DisableCompensationCell(void);
Kojto 110:165afa46840b 222 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
Kojto 110:165afa46840b 223 defined(STM32F469xx) || defined(STM32F479xx)
emilmont 77:869cf507173a 224 void HAL_EnableMemorySwappingBank(void);
emilmont 77:869cf507173a 225 void HAL_DisableMemorySwappingBank(void);
Kojto 110:165afa46840b 226 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
Kojto 99:dbbf35b96557 227 /**
Kojto 99:dbbf35b96557 228 * @}
Kojto 99:dbbf35b96557 229 */
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 /**
emilmont 77:869cf507173a 232 * @}
Kojto 99:dbbf35b96557 233 */
Kojto 99:dbbf35b96557 234 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 235 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 236 /** @defgroup HAL_Private_Variables HAL Private Variables
Kojto 99:dbbf35b96557 237 * @{
Kojto 99:dbbf35b96557 238 */
Kojto 99:dbbf35b96557 239 /**
Kojto 99:dbbf35b96557 240 * @}
Kojto 99:dbbf35b96557 241 */
Kojto 99:dbbf35b96557 242 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 243 /** @defgroup HAL_Private_Constants HAL Private Constants
Kojto 99:dbbf35b96557 244 * @{
Kojto 99:dbbf35b96557 245 */
Kojto 99:dbbf35b96557 246 /**
Kojto 99:dbbf35b96557 247 * @}
Kojto 99:dbbf35b96557 248 */
Kojto 99:dbbf35b96557 249 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 250 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 251 /**
Kojto 99:dbbf35b96557 252 * @}
Kojto 99:dbbf35b96557 253 */
emilmont 77:869cf507173a 254
emilmont 77:869cf507173a 255 /**
emilmont 77:869cf507173a 256 * @}
emilmont 77:869cf507173a 257 */
emilmont 77:869cf507173a 258
emilmont 77:869cf507173a 259 #ifdef __cplusplus
emilmont 77:869cf507173a 260 }
emilmont 77:869cf507173a 261 #endif
emilmont 77:869cf507173a 262
emilmont 77:869cf507173a 263 #endif /* __STM32F4xx_HAL_H */
emilmont 77:869cf507173a 264
emilmont 77:869cf507173a 265 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/