Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_NRF51_MICROBIT_B/nrf51.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
104:b9ad9a133dc7 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 104:b9ad9a133dc7 1
Kojto 104:b9ad9a133dc7 2 /****************************************************************************************************//**
Kojto 104:b9ad9a133dc7 3 * @file nRF51.h
Kojto 104:b9ad9a133dc7 4 *
Kojto 104:b9ad9a133dc7 5 * @brief CMSIS Cortex-M0 Peripheral Access Layer Header File for
Kojto 104:b9ad9a133dc7 6 * nRF51 from Nordic Semiconductor.
Kojto 104:b9ad9a133dc7 7 *
Kojto 104:b9ad9a133dc7 8 * @version V522
Kojto 104:b9ad9a133dc7 9 * @date 31. October 2014
Kojto 104:b9ad9a133dc7 10 *
Kojto 104:b9ad9a133dc7 11 * @note Generated with SVDConv V2.81d
Kojto 104:b9ad9a133dc7 12 * from CMSIS SVD File 'nRF51.xml' Version 522,
Kojto 104:b9ad9a133dc7 13 *
Kojto 104:b9ad9a133dc7 14 * @par Copyright (c) 2013, Nordic Semiconductor ASA
Kojto 104:b9ad9a133dc7 15 * All rights reserved.
Kojto 104:b9ad9a133dc7 16 *
Kojto 104:b9ad9a133dc7 17 * Redistribution and use in source and binary forms, with or without
Kojto 104:b9ad9a133dc7 18 * modification, are permitted provided that the following conditions are met:
Kojto 104:b9ad9a133dc7 19 *
Kojto 104:b9ad9a133dc7 20 * * Redistributions of source code must retain the above copyright notice, this
Kojto 104:b9ad9a133dc7 21 * list of conditions and the following disclaimer.
Kojto 104:b9ad9a133dc7 22 *
Kojto 104:b9ad9a133dc7 23 * * Redistributions in binary form must reproduce the above copyright notice,
Kojto 104:b9ad9a133dc7 24 * this list of conditions and the following disclaimer in the documentation
Kojto 104:b9ad9a133dc7 25 * and/or other materials provided with the distribution.
Kojto 104:b9ad9a133dc7 26 *
Kojto 104:b9ad9a133dc7 27 * * Neither the name of Nordic Semiconductor ASA nor the names of its
Kojto 104:b9ad9a133dc7 28 * contributors may be used to endorse or promote products derived from
Kojto 104:b9ad9a133dc7 29 * this software without specific prior written permission.
Kojto 104:b9ad9a133dc7 30 *
Kojto 104:b9ad9a133dc7 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 104:b9ad9a133dc7 32 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 104:b9ad9a133dc7 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 104:b9ad9a133dc7 34 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 104:b9ad9a133dc7 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 104:b9ad9a133dc7 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 104:b9ad9a133dc7 37 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 104:b9ad9a133dc7 38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 104:b9ad9a133dc7 39 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 104:b9ad9a133dc7 40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 104:b9ad9a133dc7 41 *
Kojto 104:b9ad9a133dc7 42 *
Kojto 104:b9ad9a133dc7 43 *******************************************************************************************************/
Kojto 104:b9ad9a133dc7 44
Kojto 104:b9ad9a133dc7 45
Kojto 104:b9ad9a133dc7 46
Kojto 104:b9ad9a133dc7 47 /** @addtogroup Nordic Semiconductor
Kojto 104:b9ad9a133dc7 48 * @{
Kojto 104:b9ad9a133dc7 49 */
Kojto 104:b9ad9a133dc7 50
Kojto 104:b9ad9a133dc7 51 /** @addtogroup nRF51
Kojto 104:b9ad9a133dc7 52 * @{
Kojto 104:b9ad9a133dc7 53 */
Kojto 104:b9ad9a133dc7 54
Kojto 104:b9ad9a133dc7 55 #ifndef NRF51_H
Kojto 104:b9ad9a133dc7 56 #define NRF51_H
Kojto 104:b9ad9a133dc7 57
Kojto 104:b9ad9a133dc7 58 #ifdef __cplusplus
Kojto 104:b9ad9a133dc7 59 extern "C" {
Kojto 104:b9ad9a133dc7 60 #endif
Kojto 104:b9ad9a133dc7 61
Kojto 104:b9ad9a133dc7 62
Kojto 104:b9ad9a133dc7 63 /* ------------------------- Interrupt Number Definition ------------------------ */
Kojto 104:b9ad9a133dc7 64
Kojto 104:b9ad9a133dc7 65 typedef enum {
Kojto 104:b9ad9a133dc7 66 /* ------------------- Cortex-M0 Processor Exceptions Numbers ------------------- */
Kojto 104:b9ad9a133dc7 67 Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */
Kojto 104:b9ad9a133dc7 68 NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */
Kojto 104:b9ad9a133dc7 69 HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */
Kojto 104:b9ad9a133dc7 70 SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */
Kojto 104:b9ad9a133dc7 71 DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */
Kojto 104:b9ad9a133dc7 72 PendSV_IRQn = -2, /*!< 14 Pendable request for system service */
Kojto 104:b9ad9a133dc7 73 SysTick_IRQn = -1, /*!< 15 System Tick Timer */
Kojto 104:b9ad9a133dc7 74 /* ---------------------- nRF51 Specific Interrupt Numbers ---------------------- */
Kojto 104:b9ad9a133dc7 75 POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
Kojto 104:b9ad9a133dc7 76 RADIO_IRQn = 1, /*!< 1 RADIO */
Kojto 104:b9ad9a133dc7 77 UART0_IRQn = 2, /*!< 2 UART0 */
Kojto 104:b9ad9a133dc7 78 SPI0_TWI0_IRQn = 3, /*!< 3 SPI0_TWI0 */
Kojto 104:b9ad9a133dc7 79 SPI1_TWI1_IRQn = 4, /*!< 4 SPI1_TWI1 */
Kojto 104:b9ad9a133dc7 80 GPIOTE_IRQn = 6, /*!< 6 GPIOTE */
Kojto 104:b9ad9a133dc7 81 ADC_IRQn = 7, /*!< 7 ADC */
Kojto 104:b9ad9a133dc7 82 TIMER0_IRQn = 8, /*!< 8 TIMER0 */
Kojto 104:b9ad9a133dc7 83 TIMER1_IRQn = 9, /*!< 9 TIMER1 */
Kojto 104:b9ad9a133dc7 84 TIMER2_IRQn = 10, /*!< 10 TIMER2 */
Kojto 104:b9ad9a133dc7 85 RTC0_IRQn = 11, /*!< 11 RTC0 */
Kojto 104:b9ad9a133dc7 86 TEMP_IRQn = 12, /*!< 12 TEMP */
Kojto 104:b9ad9a133dc7 87 RNG_IRQn = 13, /*!< 13 RNG */
Kojto 104:b9ad9a133dc7 88 ECB_IRQn = 14, /*!< 14 ECB */
Kojto 104:b9ad9a133dc7 89 CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */
Kojto 104:b9ad9a133dc7 90 WDT_IRQn = 16, /*!< 16 WDT */
Kojto 104:b9ad9a133dc7 91 RTC1_IRQn = 17, /*!< 17 RTC1 */
Kojto 104:b9ad9a133dc7 92 QDEC_IRQn = 18, /*!< 18 QDEC */
Kojto 104:b9ad9a133dc7 93 LPCOMP_IRQn = 19, /*!< 19 LPCOMP */
Kojto 104:b9ad9a133dc7 94 SWI0_IRQn = 20, /*!< 20 SWI0 */
Kojto 104:b9ad9a133dc7 95 SWI1_IRQn = 21, /*!< 21 SWI1 */
Kojto 104:b9ad9a133dc7 96 SWI2_IRQn = 22, /*!< 22 SWI2 */
Kojto 104:b9ad9a133dc7 97 SWI3_IRQn = 23, /*!< 23 SWI3 */
Kojto 104:b9ad9a133dc7 98 SWI4_IRQn = 24, /*!< 24 SWI4 */
Kojto 104:b9ad9a133dc7 99 SWI5_IRQn = 25 /*!< 25 SWI5 */
Kojto 104:b9ad9a133dc7 100 } IRQn_Type;
Kojto 104:b9ad9a133dc7 101
Kojto 104:b9ad9a133dc7 102
Kojto 104:b9ad9a133dc7 103 /** @addtogroup Configuration_of_CMSIS
Kojto 104:b9ad9a133dc7 104 * @{
Kojto 104:b9ad9a133dc7 105 */
Kojto 104:b9ad9a133dc7 106
Kojto 104:b9ad9a133dc7 107
Kojto 104:b9ad9a133dc7 108 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 109 /* ================ Processor and Core Peripheral Section ================ */
Kojto 104:b9ad9a133dc7 110 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 111
Kojto 104:b9ad9a133dc7 112 /* ----------------Configuration of the Cortex-M0 Processor and Core Peripherals---------------- */
Kojto 104:b9ad9a133dc7 113 #define __CM0_REV 0x0301 /*!< Cortex-M0 Core Revision */
Kojto 104:b9ad9a133dc7 114 #define __MPU_PRESENT 0 /*!< MPU present or not */
Kojto 104:b9ad9a133dc7 115 #define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */
Kojto 104:b9ad9a133dc7 116 #define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
Kojto 104:b9ad9a133dc7 117 /** @} */ /* End of group Configuration_of_CMSIS */
Kojto 104:b9ad9a133dc7 118
Kojto 104:b9ad9a133dc7 119 #include "core_cm0.h" /*!< Cortex-M0 processor and core peripherals */
Kojto 104:b9ad9a133dc7 120 #include "system_nrf51.h" /*!< nRF51 System */
Kojto 104:b9ad9a133dc7 121
Kojto 104:b9ad9a133dc7 122 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 123 /* ================ Device Specific Peripheral Section ================ */
Kojto 104:b9ad9a133dc7 124 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 125
Kojto 104:b9ad9a133dc7 126
Kojto 104:b9ad9a133dc7 127 /** @addtogroup Device_Peripheral_Registers
Kojto 104:b9ad9a133dc7 128 * @{
Kojto 104:b9ad9a133dc7 129 */
Kojto 104:b9ad9a133dc7 130
Kojto 104:b9ad9a133dc7 131
Kojto 104:b9ad9a133dc7 132 /* ------------------- Start of section using anonymous unions ------------------ */
Kojto 104:b9ad9a133dc7 133 #if defined(__CC_ARM)
Kojto 104:b9ad9a133dc7 134 #pragma push
Kojto 104:b9ad9a133dc7 135 #pragma anon_unions
Kojto 104:b9ad9a133dc7 136 #elif defined(__ICCARM__)
Kojto 104:b9ad9a133dc7 137 #pragma language=extended
Kojto 104:b9ad9a133dc7 138 #elif defined(__GNUC__)
Kojto 104:b9ad9a133dc7 139 /* anonymous unions are enabled by default */
Kojto 104:b9ad9a133dc7 140 #elif defined(__TMS470__)
Kojto 104:b9ad9a133dc7 141 /* anonymous unions are enabled by default */
Kojto 104:b9ad9a133dc7 142 #elif defined(__TASKING__)
Kojto 104:b9ad9a133dc7 143 #pragma warning 586
Kojto 104:b9ad9a133dc7 144 #else
Kojto 104:b9ad9a133dc7 145 #warning Not supported compiler type
Kojto 104:b9ad9a133dc7 146 #endif
Kojto 104:b9ad9a133dc7 147
Kojto 104:b9ad9a133dc7 148
Kojto 104:b9ad9a133dc7 149 typedef struct {
Kojto 104:b9ad9a133dc7 150 __IO uint32_t CPU0; /*!< Configurable priority configuration register for CPU0. */
Kojto 104:b9ad9a133dc7 151 __IO uint32_t SPIS1; /*!< Configurable priority configuration register for SPIS1. */
Kojto 104:b9ad9a133dc7 152 __IO uint32_t RADIO; /*!< Configurable priority configuration register for RADIO. */
Kojto 104:b9ad9a133dc7 153 __IO uint32_t ECB; /*!< Configurable priority configuration register for ECB. */
Kojto 104:b9ad9a133dc7 154 __IO uint32_t CCM; /*!< Configurable priority configuration register for CCM. */
Kojto 104:b9ad9a133dc7 155 __IO uint32_t AAR; /*!< Configurable priority configuration register for AAR. */
Kojto 104:b9ad9a133dc7 156 } AMLI_RAMPRI_Type;
Kojto 104:b9ad9a133dc7 157
Kojto 104:b9ad9a133dc7 158 typedef struct {
Kojto 104:b9ad9a133dc7 159 __IO uint32_t SCK; /*!< Pin select for SCK. */
Kojto 104:b9ad9a133dc7 160 __IO uint32_t MOSI; /*!< Pin select for MOSI. */
Kojto 104:b9ad9a133dc7 161 __IO uint32_t MISO; /*!< Pin select for MISO. */
Kojto 104:b9ad9a133dc7 162 } SPIM_PSEL_Type;
Kojto 104:b9ad9a133dc7 163
Kojto 104:b9ad9a133dc7 164 typedef struct {
Kojto 104:b9ad9a133dc7 165 __IO uint32_t PTR; /*!< Data pointer. */
Kojto 104:b9ad9a133dc7 166 __IO uint32_t MAXCNT; /*!< Maximum number of buffer bytes to receive. */
Kojto 104:b9ad9a133dc7 167 __I uint32_t AMOUNT; /*!< Number of bytes received in the last transaction. */
Kojto 104:b9ad9a133dc7 168 } SPIM_RXD_Type;
Kojto 104:b9ad9a133dc7 169
Kojto 104:b9ad9a133dc7 170 typedef struct {
Kojto 104:b9ad9a133dc7 171 __IO uint32_t PTR; /*!< Data pointer. */
Kojto 104:b9ad9a133dc7 172 __IO uint32_t MAXCNT; /*!< Maximum number of buffer bytes to send. */
Kojto 104:b9ad9a133dc7 173 __I uint32_t AMOUNT; /*!< Number of bytes sent in the last transaction. */
Kojto 104:b9ad9a133dc7 174 } SPIM_TXD_Type;
Kojto 104:b9ad9a133dc7 175
Kojto 104:b9ad9a133dc7 176 typedef struct {
Kojto 104:b9ad9a133dc7 177 __O uint32_t EN; /*!< Enable channel group. */
Kojto 104:b9ad9a133dc7 178 __O uint32_t DIS; /*!< Disable channel group. */
Kojto 104:b9ad9a133dc7 179 } PPI_TASKS_CHG_Type;
Kojto 104:b9ad9a133dc7 180
Kojto 104:b9ad9a133dc7 181 typedef struct {
Kojto 104:b9ad9a133dc7 182 __IO uint32_t EEP; /*!< Channel event end-point. */
Kojto 104:b9ad9a133dc7 183 __IO uint32_t TEP; /*!< Channel task end-point. */
Kojto 104:b9ad9a133dc7 184 } PPI_CH_Type;
Kojto 104:b9ad9a133dc7 185
Kojto 104:b9ad9a133dc7 186 typedef struct {
Kojto 104:b9ad9a133dc7 187 __I uint32_t PART; /*!< Part code */
Kojto 104:b9ad9a133dc7 188 __I uint32_t VARIANT; /*!< Part variant */
Kojto 104:b9ad9a133dc7 189 __I uint32_t PACKAGE; /*!< Package option */
Kojto 104:b9ad9a133dc7 190 __I uint32_t RAM; /*!< RAM variant */
Kojto 104:b9ad9a133dc7 191 __I uint32_t FLASH; /*!< Flash variant */
Kojto 104:b9ad9a133dc7 192 __I uint32_t RESERVED[3]; /*!< Reserved */
Kojto 104:b9ad9a133dc7 193 } FICR_INFO_Type;
Kojto 104:b9ad9a133dc7 194
Kojto 104:b9ad9a133dc7 195
Kojto 104:b9ad9a133dc7 196 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 197 /* ================ POWER ================ */
Kojto 104:b9ad9a133dc7 198 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 199
Kojto 104:b9ad9a133dc7 200
Kojto 104:b9ad9a133dc7 201 /**
Kojto 104:b9ad9a133dc7 202 * @brief Power Control. (POWER)
Kojto 104:b9ad9a133dc7 203 */
Kojto 104:b9ad9a133dc7 204
Kojto 104:b9ad9a133dc7 205 typedef struct { /*!< POWER Structure */
Kojto 104:b9ad9a133dc7 206 __I uint32_t RESERVED0[30];
Kojto 104:b9ad9a133dc7 207 __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode. */
Kojto 104:b9ad9a133dc7 208 __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency). */
Kojto 104:b9ad9a133dc7 209 __I uint32_t RESERVED1[34];
Kojto 104:b9ad9a133dc7 210 __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning. */
Kojto 104:b9ad9a133dc7 211 __I uint32_t RESERVED2[126];
Kojto 104:b9ad9a133dc7 212 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 213 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 214 __I uint32_t RESERVED3[61];
Kojto 104:b9ad9a133dc7 215 __IO uint32_t RESETREAS; /*!< Reset reason. */
Kojto 104:b9ad9a133dc7 216 __I uint32_t RESERVED4[9];
Kojto 104:b9ad9a133dc7 217 __I uint32_t RAMSTATUS; /*!< Ram status register. */
Kojto 104:b9ad9a133dc7 218 __I uint32_t RESERVED5[53];
Kojto 104:b9ad9a133dc7 219 __O uint32_t SYSTEMOFF; /*!< System off register. */
Kojto 104:b9ad9a133dc7 220 __I uint32_t RESERVED6[3];
Kojto 104:b9ad9a133dc7 221 __IO uint32_t POFCON; /*!< Power failure configuration. */
Kojto 104:b9ad9a133dc7 222 __I uint32_t RESERVED7[2];
Kojto 104:b9ad9a133dc7 223 __IO uint32_t GPREGRET; /*!< General purpose retention register. This register is a retained
Kojto 104:b9ad9a133dc7 224 register. */
Kojto 104:b9ad9a133dc7 225 __I uint32_t RESERVED8;
Kojto 104:b9ad9a133dc7 226 __IO uint32_t RAMON; /*!< Ram on/off. */
Kojto 104:b9ad9a133dc7 227 __I uint32_t RESERVED9[7];
Kojto 104:b9ad9a133dc7 228 __IO uint32_t RESET; /*!< Pin reset functionality configuration register. This register
Kojto 104:b9ad9a133dc7 229 is a retained register. */
Kojto 104:b9ad9a133dc7 230 __I uint32_t RESERVED10[3];
Kojto 104:b9ad9a133dc7 231 __IO uint32_t RAMONB; /*!< Ram on/off. */
Kojto 104:b9ad9a133dc7 232 __I uint32_t RESERVED11[8];
Kojto 104:b9ad9a133dc7 233 __IO uint32_t DCDCEN; /*!< DCDC converter enable configuration register. */
Kojto 104:b9ad9a133dc7 234 __I uint32_t RESERVED12[291];
Kojto 104:b9ad9a133dc7 235 __IO uint32_t DCDCFORCE; /*!< DCDC power-up force register. */
Kojto 104:b9ad9a133dc7 236 } NRF_POWER_Type;
Kojto 104:b9ad9a133dc7 237
Kojto 104:b9ad9a133dc7 238
Kojto 104:b9ad9a133dc7 239 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 240 /* ================ CLOCK ================ */
Kojto 104:b9ad9a133dc7 241 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 242
Kojto 104:b9ad9a133dc7 243
Kojto 104:b9ad9a133dc7 244 /**
Kojto 104:b9ad9a133dc7 245 * @brief Clock control. (CLOCK)
Kojto 104:b9ad9a133dc7 246 */
Kojto 104:b9ad9a133dc7 247
Kojto 104:b9ad9a133dc7 248 typedef struct { /*!< CLOCK Structure */
Kojto 104:b9ad9a133dc7 249 __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK clock source. */
Kojto 104:b9ad9a133dc7 250 __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK clock source. */
Kojto 104:b9ad9a133dc7 251 __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK clock source. */
Kojto 104:b9ad9a133dc7 252 __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK clock source. */
Kojto 104:b9ad9a133dc7 253 __O uint32_t TASKS_CAL; /*!< Start calibration of LFCLK RC oscillator. */
Kojto 104:b9ad9a133dc7 254 __O uint32_t TASKS_CTSTART; /*!< Start calibration timer. */
Kojto 104:b9ad9a133dc7 255 __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer. */
Kojto 104:b9ad9a133dc7 256 __I uint32_t RESERVED0[57];
Kojto 104:b9ad9a133dc7 257 __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started. */
Kojto 104:b9ad9a133dc7 258 __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK oscillator started. */
Kojto 104:b9ad9a133dc7 259 __I uint32_t RESERVED1;
Kojto 104:b9ad9a133dc7 260 __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator completed. */
Kojto 104:b9ad9a133dc7 261 __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout. */
Kojto 104:b9ad9a133dc7 262 __I uint32_t RESERVED2[124];
Kojto 104:b9ad9a133dc7 263 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 264 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 265 __I uint32_t RESERVED3[63];
Kojto 104:b9ad9a133dc7 266 __I uint32_t HFCLKRUN; /*!< Task HFCLKSTART trigger status. */
Kojto 104:b9ad9a133dc7 267 __I uint32_t HFCLKSTAT; /*!< High frequency clock status. */
Kojto 104:b9ad9a133dc7 268 __I uint32_t RESERVED4;
Kojto 104:b9ad9a133dc7 269 __I uint32_t LFCLKRUN; /*!< Task LFCLKSTART triggered status. */
Kojto 104:b9ad9a133dc7 270 __I uint32_t LFCLKSTAT; /*!< Low frequency clock status. */
Kojto 104:b9ad9a133dc7 271 __I uint32_t LFCLKSRCCOPY; /*!< Clock source for the LFCLK clock, set when task LKCLKSTART is
Kojto 104:b9ad9a133dc7 272 triggered. */
Kojto 104:b9ad9a133dc7 273 __I uint32_t RESERVED5[62];
Kojto 104:b9ad9a133dc7 274 __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK clock. */
Kojto 104:b9ad9a133dc7 275 __I uint32_t RESERVED6[7];
Kojto 104:b9ad9a133dc7 276 __IO uint32_t CTIV; /*!< Calibration timer interval. */
Kojto 104:b9ad9a133dc7 277 __I uint32_t RESERVED7[5];
Kojto 104:b9ad9a133dc7 278 __IO uint32_t XTALFREQ; /*!< Crystal frequency. */
Kojto 104:b9ad9a133dc7 279 } NRF_CLOCK_Type;
Kojto 104:b9ad9a133dc7 280
Kojto 104:b9ad9a133dc7 281
Kojto 104:b9ad9a133dc7 282 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 283 /* ================ MPU ================ */
Kojto 104:b9ad9a133dc7 284 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 285
Kojto 104:b9ad9a133dc7 286
Kojto 104:b9ad9a133dc7 287 /**
Kojto 104:b9ad9a133dc7 288 * @brief Memory Protection Unit. (MPU)
Kojto 104:b9ad9a133dc7 289 */
Kojto 104:b9ad9a133dc7 290
Kojto 104:b9ad9a133dc7 291 typedef struct { /*!< MPU Structure */
Kojto 104:b9ad9a133dc7 292 __I uint32_t RESERVED0[330];
Kojto 104:b9ad9a133dc7 293 __IO uint32_t PERR0; /*!< Configuration of peripherals in mpu regions. */
Kojto 104:b9ad9a133dc7 294 __IO uint32_t RLENR0; /*!< Length of RAM region 0. */
Kojto 104:b9ad9a133dc7 295 __I uint32_t RESERVED1[52];
Kojto 104:b9ad9a133dc7 296 __IO uint32_t PROTENSET0; /*!< Erase and write protection bit enable set register. */
Kojto 104:b9ad9a133dc7 297 __IO uint32_t PROTENSET1; /*!< Erase and write protection bit enable set register. */
Kojto 104:b9ad9a133dc7 298 __IO uint32_t DISABLEINDEBUG; /*!< Disable erase and write protection mechanism in debug mode. */
Kojto 104:b9ad9a133dc7 299 __IO uint32_t PROTBLOCKSIZE; /*!< Erase and write protection block size. */
Kojto 104:b9ad9a133dc7 300 } NRF_MPU_Type;
Kojto 104:b9ad9a133dc7 301
Kojto 104:b9ad9a133dc7 302
Kojto 104:b9ad9a133dc7 303 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 304 /* ================ PU ================ */
Kojto 104:b9ad9a133dc7 305 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 306
Kojto 104:b9ad9a133dc7 307
Kojto 104:b9ad9a133dc7 308 /**
Kojto 104:b9ad9a133dc7 309 * @brief Patch unit. (PU)
Kojto 104:b9ad9a133dc7 310 */
Kojto 104:b9ad9a133dc7 311
Kojto 104:b9ad9a133dc7 312 typedef struct { /*!< PU Structure */
Kojto 104:b9ad9a133dc7 313 __I uint32_t RESERVED0[448];
Kojto 104:b9ad9a133dc7 314 __IO uint32_t REPLACEADDR[8]; /*!< Address of first instruction to replace. */
Kojto 104:b9ad9a133dc7 315 __I uint32_t RESERVED1[24];
Kojto 104:b9ad9a133dc7 316 __IO uint32_t PATCHADDR[8]; /*!< Relative address of patch instructions. */
Kojto 104:b9ad9a133dc7 317 __I uint32_t RESERVED2[24];
Kojto 104:b9ad9a133dc7 318 __IO uint32_t PATCHEN; /*!< Patch enable register. */
Kojto 104:b9ad9a133dc7 319 __IO uint32_t PATCHENSET; /*!< Patch enable register. */
Kojto 104:b9ad9a133dc7 320 __IO uint32_t PATCHENCLR; /*!< Patch disable register. */
Kojto 104:b9ad9a133dc7 321 } NRF_PU_Type;
Kojto 104:b9ad9a133dc7 322
Kojto 104:b9ad9a133dc7 323
Kojto 104:b9ad9a133dc7 324 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 325 /* ================ AMLI ================ */
Kojto 104:b9ad9a133dc7 326 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 327
Kojto 104:b9ad9a133dc7 328
Kojto 104:b9ad9a133dc7 329 /**
Kojto 104:b9ad9a133dc7 330 * @brief AHB Multi-Layer Interface. (AMLI)
Kojto 104:b9ad9a133dc7 331 */
Kojto 104:b9ad9a133dc7 332
Kojto 104:b9ad9a133dc7 333 typedef struct { /*!< AMLI Structure */
Kojto 104:b9ad9a133dc7 334 __I uint32_t RESERVED0[896];
Kojto 104:b9ad9a133dc7 335 AMLI_RAMPRI_Type RAMPRI; /*!< RAM configurable priority configuration structure. */
Kojto 104:b9ad9a133dc7 336 } NRF_AMLI_Type;
Kojto 104:b9ad9a133dc7 337
Kojto 104:b9ad9a133dc7 338
Kojto 104:b9ad9a133dc7 339 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 340 /* ================ RADIO ================ */
Kojto 104:b9ad9a133dc7 341 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 342
Kojto 104:b9ad9a133dc7 343
Kojto 104:b9ad9a133dc7 344 /**
Kojto 104:b9ad9a133dc7 345 * @brief The radio. (RADIO)
Kojto 104:b9ad9a133dc7 346 */
Kojto 104:b9ad9a133dc7 347
Kojto 104:b9ad9a133dc7 348 typedef struct { /*!< RADIO Structure */
Kojto 104:b9ad9a133dc7 349 __O uint32_t TASKS_TXEN; /*!< Enable radio in TX mode. */
Kojto 104:b9ad9a133dc7 350 __O uint32_t TASKS_RXEN; /*!< Enable radio in RX mode. */
Kojto 104:b9ad9a133dc7 351 __O uint32_t TASKS_START; /*!< Start radio. */
Kojto 104:b9ad9a133dc7 352 __O uint32_t TASKS_STOP; /*!< Stop radio. */
Kojto 104:b9ad9a133dc7 353 __O uint32_t TASKS_DISABLE; /*!< Disable radio. */
Kojto 104:b9ad9a133dc7 354 __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one sample of the receive signal strength. */
Kojto 104:b9ad9a133dc7 355 __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement. */
Kojto 104:b9ad9a133dc7 356 __O uint32_t TASKS_BCSTART; /*!< Start the bit counter. */
Kojto 104:b9ad9a133dc7 357 __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter. */
Kojto 104:b9ad9a133dc7 358 __I uint32_t RESERVED0[55];
Kojto 104:b9ad9a133dc7 359 __IO uint32_t EVENTS_READY; /*!< Ready event. */
Kojto 104:b9ad9a133dc7 360 __IO uint32_t EVENTS_ADDRESS; /*!< Address event. */
Kojto 104:b9ad9a133dc7 361 __IO uint32_t EVENTS_PAYLOAD; /*!< Payload event. */
Kojto 104:b9ad9a133dc7 362 __IO uint32_t EVENTS_END; /*!< End event. */
Kojto 104:b9ad9a133dc7 363 __IO uint32_t EVENTS_DISABLED; /*!< Disable event. */
Kojto 104:b9ad9a133dc7 364 __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet. */
Kojto 104:b9ad9a133dc7 365 __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet. */
Kojto 104:b9ad9a133dc7 366 __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of the receive signal strength complete. A new RSSI
Kojto 104:b9ad9a133dc7 367 sample is ready for readout at the RSSISAMPLE register. */
Kojto 104:b9ad9a133dc7 368 __I uint32_t RESERVED1[2];
Kojto 104:b9ad9a133dc7 369 __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value specified in BC register. */
Kojto 104:b9ad9a133dc7 370 __I uint32_t RESERVED2[53];
Kojto 104:b9ad9a133dc7 371 __IO uint32_t SHORTS; /*!< Shortcuts for the radio. */
Kojto 104:b9ad9a133dc7 372 __I uint32_t RESERVED3[64];
Kojto 104:b9ad9a133dc7 373 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 374 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 375 __I uint32_t RESERVED4[61];
Kojto 104:b9ad9a133dc7 376 __I uint32_t CRCSTATUS; /*!< CRC status of received packet. */
Kojto 104:b9ad9a133dc7 377 __I uint32_t CD; /*!< Carrier detect. */
Kojto 104:b9ad9a133dc7 378 __I uint32_t RXMATCH; /*!< Received address. */
Kojto 104:b9ad9a133dc7 379 __I uint32_t RXCRC; /*!< Received CRC. */
Kojto 104:b9ad9a133dc7 380 __I uint32_t DAI; /*!< Device address match index. */
Kojto 104:b9ad9a133dc7 381 __I uint32_t RESERVED5[60];
Kojto 104:b9ad9a133dc7 382 __IO uint32_t PACKETPTR; /*!< Packet pointer. Decision point: START task. */
Kojto 104:b9ad9a133dc7 383 __IO uint32_t FREQUENCY; /*!< Frequency. */
Kojto 104:b9ad9a133dc7 384 __IO uint32_t TXPOWER; /*!< Output power. */
Kojto 104:b9ad9a133dc7 385 __IO uint32_t MODE; /*!< Data rate and modulation. */
Kojto 104:b9ad9a133dc7 386 __IO uint32_t PCNF0; /*!< Packet configuration 0. */
Kojto 104:b9ad9a133dc7 387 __IO uint32_t PCNF1; /*!< Packet configuration 1. */
Kojto 104:b9ad9a133dc7 388 __IO uint32_t BASE0; /*!< Radio base address 0. Decision point: START task. */
Kojto 104:b9ad9a133dc7 389 __IO uint32_t BASE1; /*!< Radio base address 1. Decision point: START task. */
Kojto 104:b9ad9a133dc7 390 __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0 to 3. */
Kojto 104:b9ad9a133dc7 391 __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4 to 7. */
Kojto 104:b9ad9a133dc7 392 __IO uint32_t TXADDRESS; /*!< Transmit address select. */
Kojto 104:b9ad9a133dc7 393 __IO uint32_t RXADDRESSES; /*!< Receive address select. */
Kojto 104:b9ad9a133dc7 394 __IO uint32_t CRCCNF; /*!< CRC configuration. */
Kojto 104:b9ad9a133dc7 395 __IO uint32_t CRCPOLY; /*!< CRC polynomial. */
Kojto 104:b9ad9a133dc7 396 __IO uint32_t CRCINIT; /*!< CRC initial value. */
Kojto 104:b9ad9a133dc7 397 __IO uint32_t TEST; /*!< Test features enable register. */
Kojto 104:b9ad9a133dc7 398 __IO uint32_t TIFS; /*!< Inter Frame Spacing in microseconds. */
Kojto 104:b9ad9a133dc7 399 __I uint32_t RSSISAMPLE; /*!< RSSI sample. */
Kojto 104:b9ad9a133dc7 400 __I uint32_t RESERVED6;
Kojto 104:b9ad9a133dc7 401 __I uint32_t STATE; /*!< Current radio state. */
Kojto 104:b9ad9a133dc7 402 __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value. */
Kojto 104:b9ad9a133dc7 403 __I uint32_t RESERVED7[2];
Kojto 104:b9ad9a133dc7 404 __IO uint32_t BCC; /*!< Bit counter compare. */
Kojto 104:b9ad9a133dc7 405 __I uint32_t RESERVED8[39];
Kojto 104:b9ad9a133dc7 406 __IO uint32_t DAB[8]; /*!< Device address base segment. */
Kojto 104:b9ad9a133dc7 407 __IO uint32_t DAP[8]; /*!< Device address prefix. */
Kojto 104:b9ad9a133dc7 408 __IO uint32_t DACNF; /*!< Device address match configuration. */
Kojto 104:b9ad9a133dc7 409 __I uint32_t RESERVED9[56];
Kojto 104:b9ad9a133dc7 410 __IO uint32_t OVERRIDE0; /*!< Trim value override register 0. */
Kojto 104:b9ad9a133dc7 411 __IO uint32_t OVERRIDE1; /*!< Trim value override register 1. */
Kojto 104:b9ad9a133dc7 412 __IO uint32_t OVERRIDE2; /*!< Trim value override register 2. */
Kojto 104:b9ad9a133dc7 413 __IO uint32_t OVERRIDE3; /*!< Trim value override register 3. */
Kojto 104:b9ad9a133dc7 414 __IO uint32_t OVERRIDE4; /*!< Trim value override register 4. */
Kojto 104:b9ad9a133dc7 415 __I uint32_t RESERVED10[561];
Kojto 104:b9ad9a133dc7 416 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 417 } NRF_RADIO_Type;
Kojto 104:b9ad9a133dc7 418
Kojto 104:b9ad9a133dc7 419
Kojto 104:b9ad9a133dc7 420 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 421 /* ================ UART ================ */
Kojto 104:b9ad9a133dc7 422 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 423
Kojto 104:b9ad9a133dc7 424
Kojto 104:b9ad9a133dc7 425 /**
Kojto 104:b9ad9a133dc7 426 * @brief Universal Asynchronous Receiver/Transmitter. (UART)
Kojto 104:b9ad9a133dc7 427 */
Kojto 104:b9ad9a133dc7 428
Kojto 104:b9ad9a133dc7 429 typedef struct { /*!< UART Structure */
Kojto 104:b9ad9a133dc7 430 __O uint32_t TASKS_STARTRX; /*!< Start UART receiver. */
Kojto 104:b9ad9a133dc7 431 __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver. */
Kojto 104:b9ad9a133dc7 432 __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter. */
Kojto 104:b9ad9a133dc7 433 __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter. */
Kojto 104:b9ad9a133dc7 434 __I uint32_t RESERVED0[3];
Kojto 104:b9ad9a133dc7 435 __O uint32_t TASKS_SUSPEND; /*!< Suspend UART. */
Kojto 104:b9ad9a133dc7 436 __I uint32_t RESERVED1[56];
Kojto 104:b9ad9a133dc7 437 __IO uint32_t EVENTS_CTS; /*!< CTS activated. */
Kojto 104:b9ad9a133dc7 438 __IO uint32_t EVENTS_NCTS; /*!< CTS deactivated. */
Kojto 104:b9ad9a133dc7 439 __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD. */
Kojto 104:b9ad9a133dc7 440 __I uint32_t RESERVED2[4];
Kojto 104:b9ad9a133dc7 441 __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD. */
Kojto 104:b9ad9a133dc7 442 __I uint32_t RESERVED3;
Kojto 104:b9ad9a133dc7 443 __IO uint32_t EVENTS_ERROR; /*!< Error detected. */
Kojto 104:b9ad9a133dc7 444 __I uint32_t RESERVED4[7];
Kojto 104:b9ad9a133dc7 445 __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout. */
Kojto 104:b9ad9a133dc7 446 __I uint32_t RESERVED5[46];
Kojto 104:b9ad9a133dc7 447 __IO uint32_t SHORTS; /*!< Shortcuts for UART. */
Kojto 104:b9ad9a133dc7 448 __I uint32_t RESERVED6[64];
Kojto 104:b9ad9a133dc7 449 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 450 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 451 __I uint32_t RESERVED7[93];
Kojto 104:b9ad9a133dc7 452 __IO uint32_t ERRORSRC; /*!< Error source. Write error field to 1 to clear error. */
Kojto 104:b9ad9a133dc7 453 __I uint32_t RESERVED8[31];
Kojto 104:b9ad9a133dc7 454 __IO uint32_t ENABLE; /*!< Enable UART and acquire IOs. */
Kojto 104:b9ad9a133dc7 455 __I uint32_t RESERVED9;
Kojto 104:b9ad9a133dc7 456 __IO uint32_t PSELRTS; /*!< Pin select for RTS. */
Kojto 104:b9ad9a133dc7 457 __IO uint32_t PSELTXD; /*!< Pin select for TXD. */
Kojto 104:b9ad9a133dc7 458 __IO uint32_t PSELCTS; /*!< Pin select for CTS. */
Kojto 104:b9ad9a133dc7 459 __IO uint32_t PSELRXD; /*!< Pin select for RXD. */
Kojto 104:b9ad9a133dc7 460 __I uint32_t RXD; /*!< RXD register. On read action the buffer pointer is displaced.
Kojto 104:b9ad9a133dc7 461 Once read the character is consumed. If read when no character
Kojto 104:b9ad9a133dc7 462 available, the UART will stop working. */
Kojto 104:b9ad9a133dc7 463 __O uint32_t TXD; /*!< TXD register. */
Kojto 104:b9ad9a133dc7 464 __I uint32_t RESERVED10;
Kojto 104:b9ad9a133dc7 465 __IO uint32_t BAUDRATE; /*!< UART Baudrate. */
Kojto 104:b9ad9a133dc7 466 __I uint32_t RESERVED11[17];
Kojto 104:b9ad9a133dc7 467 __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control register. */
Kojto 104:b9ad9a133dc7 468 __I uint32_t RESERVED12[675];
Kojto 104:b9ad9a133dc7 469 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 470 } NRF_UART_Type;
Kojto 104:b9ad9a133dc7 471
Kojto 104:b9ad9a133dc7 472
Kojto 104:b9ad9a133dc7 473 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 474 /* ================ SPI ================ */
Kojto 104:b9ad9a133dc7 475 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 476
Kojto 104:b9ad9a133dc7 477
Kojto 104:b9ad9a133dc7 478 /**
Kojto 104:b9ad9a133dc7 479 * @brief SPI master 0. (SPI)
Kojto 104:b9ad9a133dc7 480 */
Kojto 104:b9ad9a133dc7 481
Kojto 104:b9ad9a133dc7 482 typedef struct { /*!< SPI Structure */
Kojto 104:b9ad9a133dc7 483 __I uint32_t RESERVED0[66];
Kojto 104:b9ad9a133dc7 484 __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received. */
Kojto 104:b9ad9a133dc7 485 __I uint32_t RESERVED1[126];
Kojto 104:b9ad9a133dc7 486 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 487 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 488 __I uint32_t RESERVED2[125];
Kojto 104:b9ad9a133dc7 489 __IO uint32_t ENABLE; /*!< Enable SPI. */
Kojto 104:b9ad9a133dc7 490 __I uint32_t RESERVED3;
Kojto 104:b9ad9a133dc7 491 __IO uint32_t PSELSCK; /*!< Pin select for SCK. */
Kojto 104:b9ad9a133dc7 492 __IO uint32_t PSELMOSI; /*!< Pin select for MOSI. */
Kojto 104:b9ad9a133dc7 493 __IO uint32_t PSELMISO; /*!< Pin select for MISO. */
Kojto 104:b9ad9a133dc7 494 __I uint32_t RESERVED4;
Kojto 104:b9ad9a133dc7 495 __I uint32_t RXD; /*!< RX data. */
Kojto 104:b9ad9a133dc7 496 __IO uint32_t TXD; /*!< TX data. */
Kojto 104:b9ad9a133dc7 497 __I uint32_t RESERVED5;
Kojto 104:b9ad9a133dc7 498 __IO uint32_t FREQUENCY; /*!< SPI frequency */
Kojto 104:b9ad9a133dc7 499 __I uint32_t RESERVED6[11];
Kojto 104:b9ad9a133dc7 500 __IO uint32_t CONFIG; /*!< Configuration register. */
Kojto 104:b9ad9a133dc7 501 __I uint32_t RESERVED7[681];
Kojto 104:b9ad9a133dc7 502 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 503 } NRF_SPI_Type;
Kojto 104:b9ad9a133dc7 504
Kojto 104:b9ad9a133dc7 505
Kojto 104:b9ad9a133dc7 506 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 507 /* ================ TWI ================ */
Kojto 104:b9ad9a133dc7 508 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 509
Kojto 104:b9ad9a133dc7 510
Kojto 104:b9ad9a133dc7 511 /**
Kojto 104:b9ad9a133dc7 512 * @brief Two-wire interface master 0. (TWI)
Kojto 104:b9ad9a133dc7 513 */
Kojto 104:b9ad9a133dc7 514
Kojto 104:b9ad9a133dc7 515 typedef struct { /*!< TWI Structure */
Kojto 104:b9ad9a133dc7 516 __O uint32_t TASKS_STARTRX; /*!< Start 2-Wire master receive sequence. */
Kojto 104:b9ad9a133dc7 517 __I uint32_t RESERVED0;
Kojto 104:b9ad9a133dc7 518 __O uint32_t TASKS_STARTTX; /*!< Start 2-Wire master transmit sequence. */
Kojto 104:b9ad9a133dc7 519 __I uint32_t RESERVED1[2];
Kojto 104:b9ad9a133dc7 520 __O uint32_t TASKS_STOP; /*!< Stop 2-Wire transaction. */
Kojto 104:b9ad9a133dc7 521 __I uint32_t RESERVED2;
Kojto 104:b9ad9a133dc7 522 __O uint32_t TASKS_SUSPEND; /*!< Suspend 2-Wire transaction. */
Kojto 104:b9ad9a133dc7 523 __O uint32_t TASKS_RESUME; /*!< Resume 2-Wire transaction. */
Kojto 104:b9ad9a133dc7 524 __I uint32_t RESERVED3[56];
Kojto 104:b9ad9a133dc7 525 __IO uint32_t EVENTS_STOPPED; /*!< Two-wire stopped. */
Kojto 104:b9ad9a133dc7 526 __IO uint32_t EVENTS_RXDREADY; /*!< Two-wire ready to deliver new RXD byte received. */
Kojto 104:b9ad9a133dc7 527 __I uint32_t RESERVED4[4];
Kojto 104:b9ad9a133dc7 528 __IO uint32_t EVENTS_TXDSENT; /*!< Two-wire finished sending last TXD byte. */
Kojto 104:b9ad9a133dc7 529 __I uint32_t RESERVED5;
Kojto 104:b9ad9a133dc7 530 __IO uint32_t EVENTS_ERROR; /*!< Two-wire error detected. */
Kojto 104:b9ad9a133dc7 531 __I uint32_t RESERVED6[4];
Kojto 104:b9ad9a133dc7 532 __IO uint32_t EVENTS_BB; /*!< Two-wire byte boundary. */
Kojto 104:b9ad9a133dc7 533 __I uint32_t RESERVED7[3];
Kojto 104:b9ad9a133dc7 534 __IO uint32_t EVENTS_SUSPENDED; /*!< Two-wire suspended. */
Kojto 104:b9ad9a133dc7 535 __I uint32_t RESERVED8[45];
Kojto 104:b9ad9a133dc7 536 __IO uint32_t SHORTS; /*!< Shortcuts for TWI. */
Kojto 104:b9ad9a133dc7 537 __I uint32_t RESERVED9[64];
Kojto 104:b9ad9a133dc7 538 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 539 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 540 __I uint32_t RESERVED10[110];
Kojto 104:b9ad9a133dc7 541 __IO uint32_t ERRORSRC; /*!< Two-wire error source. Write error field to 1 to clear error. */
Kojto 104:b9ad9a133dc7 542 __I uint32_t RESERVED11[14];
Kojto 104:b9ad9a133dc7 543 __IO uint32_t ENABLE; /*!< Enable two-wire master. */
Kojto 104:b9ad9a133dc7 544 __I uint32_t RESERVED12;
Kojto 104:b9ad9a133dc7 545 __IO uint32_t PSELSCL; /*!< Pin select for SCL. */
Kojto 104:b9ad9a133dc7 546 __IO uint32_t PSELSDA; /*!< Pin select for SDA. */
Kojto 104:b9ad9a133dc7 547 __I uint32_t RESERVED13[2];
Kojto 104:b9ad9a133dc7 548 __I uint32_t RXD; /*!< RX data register. */
Kojto 104:b9ad9a133dc7 549 __IO uint32_t TXD; /*!< TX data register. */
Kojto 104:b9ad9a133dc7 550 __I uint32_t RESERVED14;
Kojto 104:b9ad9a133dc7 551 __IO uint32_t FREQUENCY; /*!< Two-wire frequency. */
Kojto 104:b9ad9a133dc7 552 __I uint32_t RESERVED15[24];
Kojto 104:b9ad9a133dc7 553 __IO uint32_t ADDRESS; /*!< Address used in the two-wire transfer. */
Kojto 104:b9ad9a133dc7 554 __I uint32_t RESERVED16[668];
Kojto 104:b9ad9a133dc7 555 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 556 } NRF_TWI_Type;
Kojto 104:b9ad9a133dc7 557
Kojto 104:b9ad9a133dc7 558
Kojto 104:b9ad9a133dc7 559 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 560 /* ================ SPIS ================ */
Kojto 104:b9ad9a133dc7 561 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 562
Kojto 104:b9ad9a133dc7 563
Kojto 104:b9ad9a133dc7 564 /**
Kojto 104:b9ad9a133dc7 565 * @brief SPI slave 1. (SPIS)
Kojto 104:b9ad9a133dc7 566 */
Kojto 104:b9ad9a133dc7 567
Kojto 104:b9ad9a133dc7 568 typedef struct { /*!< SPIS Structure */
Kojto 104:b9ad9a133dc7 569 __I uint32_t RESERVED0[9];
Kojto 104:b9ad9a133dc7 570 __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore. */
Kojto 104:b9ad9a133dc7 571 __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore. */
Kojto 104:b9ad9a133dc7 572 __I uint32_t RESERVED1[54];
Kojto 104:b9ad9a133dc7 573 __IO uint32_t EVENTS_END; /*!< Granted transaction completed. */
Kojto 104:b9ad9a133dc7 574 __I uint32_t RESERVED2[8];
Kojto 104:b9ad9a133dc7 575 __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired. */
Kojto 104:b9ad9a133dc7 576 __I uint32_t RESERVED3[53];
Kojto 104:b9ad9a133dc7 577 __IO uint32_t SHORTS; /*!< Shortcuts for SPIS. */
Kojto 104:b9ad9a133dc7 578 __I uint32_t RESERVED4[64];
Kojto 104:b9ad9a133dc7 579 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 580 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 581 __I uint32_t RESERVED5[61];
Kojto 104:b9ad9a133dc7 582 __I uint32_t SEMSTAT; /*!< Semaphore status. */
Kojto 104:b9ad9a133dc7 583 __I uint32_t RESERVED6[15];
Kojto 104:b9ad9a133dc7 584 __IO uint32_t STATUS; /*!< Status from last transaction. */
Kojto 104:b9ad9a133dc7 585 __I uint32_t RESERVED7[47];
Kojto 104:b9ad9a133dc7 586 __IO uint32_t ENABLE; /*!< Enable SPIS. */
Kojto 104:b9ad9a133dc7 587 __I uint32_t RESERVED8;
Kojto 104:b9ad9a133dc7 588 __IO uint32_t PSELSCK; /*!< Pin select for SCK. */
Kojto 104:b9ad9a133dc7 589 __IO uint32_t PSELMISO; /*!< Pin select for MISO. */
Kojto 104:b9ad9a133dc7 590 __IO uint32_t PSELMOSI; /*!< Pin select for MOSI. */
Kojto 104:b9ad9a133dc7 591 __IO uint32_t PSELCSN; /*!< Pin select for CSN. */
Kojto 104:b9ad9a133dc7 592 __I uint32_t RESERVED9[7];
Kojto 104:b9ad9a133dc7 593 __IO uint32_t RXDPTR; /*!< RX data pointer. */
Kojto 104:b9ad9a133dc7 594 __IO uint32_t MAXRX; /*!< Maximum number of bytes in the receive buffer. */
Kojto 104:b9ad9a133dc7 595 __I uint32_t AMOUNTRX; /*!< Number of bytes received in last granted transaction. */
Kojto 104:b9ad9a133dc7 596 __I uint32_t RESERVED10;
Kojto 104:b9ad9a133dc7 597 __IO uint32_t TXDPTR; /*!< TX data pointer. */
Kojto 104:b9ad9a133dc7 598 __IO uint32_t MAXTX; /*!< Maximum number of bytes in the transmit buffer. */
Kojto 104:b9ad9a133dc7 599 __I uint32_t AMOUNTTX; /*!< Number of bytes transmitted in last granted transaction. */
Kojto 104:b9ad9a133dc7 600 __I uint32_t RESERVED11;
Kojto 104:b9ad9a133dc7 601 __IO uint32_t CONFIG; /*!< Configuration register. */
Kojto 104:b9ad9a133dc7 602 __I uint32_t RESERVED12;
Kojto 104:b9ad9a133dc7 603 __IO uint32_t DEF; /*!< Default character. */
Kojto 104:b9ad9a133dc7 604 __I uint32_t RESERVED13[24];
Kojto 104:b9ad9a133dc7 605 __IO uint32_t ORC; /*!< Over-read character. */
Kojto 104:b9ad9a133dc7 606 __I uint32_t RESERVED14[654];
Kojto 104:b9ad9a133dc7 607 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 608 } NRF_SPIS_Type;
Kojto 104:b9ad9a133dc7 609
Kojto 104:b9ad9a133dc7 610
Kojto 104:b9ad9a133dc7 611 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 612 /* ================ SPIM ================ */
Kojto 104:b9ad9a133dc7 613 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 614
Kojto 104:b9ad9a133dc7 615
Kojto 104:b9ad9a133dc7 616 /**
Kojto 104:b9ad9a133dc7 617 * @brief SPI master with easyDMA 1. (SPIM)
Kojto 104:b9ad9a133dc7 618 */
Kojto 104:b9ad9a133dc7 619
Kojto 104:b9ad9a133dc7 620 typedef struct { /*!< SPIM Structure */
Kojto 104:b9ad9a133dc7 621 __I uint32_t RESERVED0[4];
Kojto 104:b9ad9a133dc7 622 __O uint32_t TASKS_START; /*!< Start SPI transaction. */
Kojto 104:b9ad9a133dc7 623 __O uint32_t TASKS_STOP; /*!< Stop SPI transaction. */
Kojto 104:b9ad9a133dc7 624 __I uint32_t RESERVED1;
Kojto 104:b9ad9a133dc7 625 __O uint32_t TASKS_SUSPEND; /*!< Suspend SPI transaction. */
Kojto 104:b9ad9a133dc7 626 __O uint32_t TASKS_RESUME; /*!< Resume SPI transaction. */
Kojto 104:b9ad9a133dc7 627 __I uint32_t RESERVED2[56];
Kojto 104:b9ad9a133dc7 628 __IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped. */
Kojto 104:b9ad9a133dc7 629 __I uint32_t RESERVED3[2];
Kojto 104:b9ad9a133dc7 630 __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached. */
Kojto 104:b9ad9a133dc7 631 __I uint32_t RESERVED4;
Kojto 104:b9ad9a133dc7 632 __IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached. */
Kojto 104:b9ad9a133dc7 633 __I uint32_t RESERVED5;
Kojto 104:b9ad9a133dc7 634 __IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached. */
Kojto 104:b9ad9a133dc7 635 __I uint32_t RESERVED6[10];
Kojto 104:b9ad9a133dc7 636 __IO uint32_t EVENTS_STARTED; /*!< Transaction started. */
Kojto 104:b9ad9a133dc7 637 __I uint32_t RESERVED7[44];
Kojto 104:b9ad9a133dc7 638 __IO uint32_t SHORTS; /*!< Shortcuts for SPIM. */
Kojto 104:b9ad9a133dc7 639 __I uint32_t RESERVED8[64];
Kojto 104:b9ad9a133dc7 640 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 641 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 642 __I uint32_t RESERVED9[125];
Kojto 104:b9ad9a133dc7 643 __IO uint32_t ENABLE; /*!< Enable SPIM. */
Kojto 104:b9ad9a133dc7 644 __I uint32_t RESERVED10;
Kojto 104:b9ad9a133dc7 645 SPIM_PSEL_Type PSEL; /*!< Pin select configuration. */
Kojto 104:b9ad9a133dc7 646 __I uint32_t RESERVED11;
Kojto 104:b9ad9a133dc7 647 __I uint32_t RXDDATA; /*!< RXD register. */
Kojto 104:b9ad9a133dc7 648 __IO uint32_t TXDDATA; /*!< TXD register. */
Kojto 104:b9ad9a133dc7 649 __I uint32_t RESERVED12;
Kojto 104:b9ad9a133dc7 650 __IO uint32_t FREQUENCY; /*!< SPI frequency. */
Kojto 104:b9ad9a133dc7 651 __I uint32_t RESERVED13[3];
Kojto 104:b9ad9a133dc7 652 SPIM_RXD_Type RXD; /*!< RXD EasyDMA configuration and status. */
Kojto 104:b9ad9a133dc7 653 __I uint32_t RESERVED14;
Kojto 104:b9ad9a133dc7 654 SPIM_TXD_Type TXD; /*!< TXD EasyDMA configuration and status. */
Kojto 104:b9ad9a133dc7 655 __I uint32_t RESERVED15;
Kojto 104:b9ad9a133dc7 656 __IO uint32_t CONFIG; /*!< Configuration register. */
Kojto 104:b9ad9a133dc7 657 __I uint32_t RESERVED16[26];
Kojto 104:b9ad9a133dc7 658 __IO uint32_t ORC; /*!< Over-read character. */
Kojto 104:b9ad9a133dc7 659 __I uint32_t RESERVED17[654];
Kojto 104:b9ad9a133dc7 660 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 661 } NRF_SPIM_Type;
Kojto 104:b9ad9a133dc7 662
Kojto 104:b9ad9a133dc7 663
Kojto 104:b9ad9a133dc7 664 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 665 /* ================ GPIOTE ================ */
Kojto 104:b9ad9a133dc7 666 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 667
Kojto 104:b9ad9a133dc7 668
Kojto 104:b9ad9a133dc7 669 /**
Kojto 104:b9ad9a133dc7 670 * @brief GPIO tasks and events. (GPIOTE)
Kojto 104:b9ad9a133dc7 671 */
Kojto 104:b9ad9a133dc7 672
Kojto 104:b9ad9a133dc7 673 typedef struct { /*!< GPIOTE Structure */
Kojto 104:b9ad9a133dc7 674 __O uint32_t TASKS_OUT[4]; /*!< Tasks asssociated with GPIOTE channels. */
Kojto 104:b9ad9a133dc7 675 __I uint32_t RESERVED0[60];
Kojto 104:b9ad9a133dc7 676 __IO uint32_t EVENTS_IN[4]; /*!< Tasks asssociated with GPIOTE channels. */
Kojto 104:b9ad9a133dc7 677 __I uint32_t RESERVED1[27];
Kojto 104:b9ad9a133dc7 678 __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple pins. */
Kojto 104:b9ad9a133dc7 679 __I uint32_t RESERVED2[97];
Kojto 104:b9ad9a133dc7 680 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 681 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 682 __I uint32_t RESERVED3[129];
Kojto 104:b9ad9a133dc7 683 __IO uint32_t CONFIG[4]; /*!< Channel configuration registers. */
Kojto 104:b9ad9a133dc7 684 __I uint32_t RESERVED4[695];
Kojto 104:b9ad9a133dc7 685 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 686 } NRF_GPIOTE_Type;
Kojto 104:b9ad9a133dc7 687
Kojto 104:b9ad9a133dc7 688
Kojto 104:b9ad9a133dc7 689 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 690 /* ================ ADC ================ */
Kojto 104:b9ad9a133dc7 691 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 692
Kojto 104:b9ad9a133dc7 693
Kojto 104:b9ad9a133dc7 694 /**
Kojto 104:b9ad9a133dc7 695 * @brief Analog to digital converter. (ADC)
Kojto 104:b9ad9a133dc7 696 */
Kojto 104:b9ad9a133dc7 697
Kojto 104:b9ad9a133dc7 698 typedef struct { /*!< ADC Structure */
Kojto 104:b9ad9a133dc7 699 __O uint32_t TASKS_START; /*!< Start an ADC conversion. */
Kojto 104:b9ad9a133dc7 700 __O uint32_t TASKS_STOP; /*!< Stop ADC. */
Kojto 104:b9ad9a133dc7 701 __I uint32_t RESERVED0[62];
Kojto 104:b9ad9a133dc7 702 __IO uint32_t EVENTS_END; /*!< ADC conversion complete. */
Kojto 104:b9ad9a133dc7 703 __I uint32_t RESERVED1[128];
Kojto 104:b9ad9a133dc7 704 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 705 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 706 __I uint32_t RESERVED2[61];
Kojto 104:b9ad9a133dc7 707 __I uint32_t BUSY; /*!< ADC busy register. */
Kojto 104:b9ad9a133dc7 708 __I uint32_t RESERVED3[63];
Kojto 104:b9ad9a133dc7 709 __IO uint32_t ENABLE; /*!< ADC enable. */
Kojto 104:b9ad9a133dc7 710 __IO uint32_t CONFIG; /*!< ADC configuration register. */
Kojto 104:b9ad9a133dc7 711 __I uint32_t RESULT; /*!< Result of ADC conversion. */
Kojto 104:b9ad9a133dc7 712 __I uint32_t RESERVED4[700];
Kojto 104:b9ad9a133dc7 713 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 714 } NRF_ADC_Type;
Kojto 104:b9ad9a133dc7 715
Kojto 104:b9ad9a133dc7 716
Kojto 104:b9ad9a133dc7 717 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 718 /* ================ TIMER ================ */
Kojto 104:b9ad9a133dc7 719 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 720
Kojto 104:b9ad9a133dc7 721
Kojto 104:b9ad9a133dc7 722 /**
Kojto 104:b9ad9a133dc7 723 * @brief Timer 0. (TIMER)
Kojto 104:b9ad9a133dc7 724 */
Kojto 104:b9ad9a133dc7 725
Kojto 104:b9ad9a133dc7 726 typedef struct { /*!< TIMER Structure */
Kojto 104:b9ad9a133dc7 727 __O uint32_t TASKS_START; /*!< Start Timer. */
Kojto 104:b9ad9a133dc7 728 __O uint32_t TASKS_STOP; /*!< Stop Timer. */
Kojto 104:b9ad9a133dc7 729 __O uint32_t TASKS_COUNT; /*!< Increment Timer (In counter mode). */
Kojto 104:b9ad9a133dc7 730 __O uint32_t TASKS_CLEAR; /*!< Clear timer. */
Kojto 104:b9ad9a133dc7 731 __O uint32_t TASKS_SHUTDOWN; /*!< Shutdown timer. */
Kojto 104:b9ad9a133dc7 732 __I uint32_t RESERVED0[11];
Kojto 104:b9ad9a133dc7 733 __O uint32_t TASKS_CAPTURE[4]; /*!< Capture Timer value to CC[n] registers. */
Kojto 104:b9ad9a133dc7 734 __I uint32_t RESERVED1[60];
Kojto 104:b9ad9a133dc7 735 __IO uint32_t EVENTS_COMPARE[4]; /*!< Compare event on CC[n] match. */
Kojto 104:b9ad9a133dc7 736 __I uint32_t RESERVED2[44];
Kojto 104:b9ad9a133dc7 737 __IO uint32_t SHORTS; /*!< Shortcuts for Timer. */
Kojto 104:b9ad9a133dc7 738 __I uint32_t RESERVED3[64];
Kojto 104:b9ad9a133dc7 739 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 740 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 741 __I uint32_t RESERVED4[126];
Kojto 104:b9ad9a133dc7 742 __IO uint32_t MODE; /*!< Timer Mode selection. */
Kojto 104:b9ad9a133dc7 743 __IO uint32_t BITMODE; /*!< Sets timer behaviour. */
Kojto 104:b9ad9a133dc7 744 __I uint32_t RESERVED5;
Kojto 104:b9ad9a133dc7 745 __IO uint32_t PRESCALER; /*!< 4-bit prescaler to source clock frequency (max value 9). Source
Kojto 104:b9ad9a133dc7 746 clock frequency is divided by 2^SCALE. */
Kojto 104:b9ad9a133dc7 747 __I uint32_t RESERVED6[11];
Kojto 104:b9ad9a133dc7 748 __IO uint32_t CC[4]; /*!< Capture/compare registers. */
Kojto 104:b9ad9a133dc7 749 __I uint32_t RESERVED7[683];
Kojto 104:b9ad9a133dc7 750 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 751 } NRF_TIMER_Type;
Kojto 104:b9ad9a133dc7 752
Kojto 104:b9ad9a133dc7 753
Kojto 104:b9ad9a133dc7 754 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 755 /* ================ RTC ================ */
Kojto 104:b9ad9a133dc7 756 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 757
Kojto 104:b9ad9a133dc7 758
Kojto 104:b9ad9a133dc7 759 /**
Kojto 104:b9ad9a133dc7 760 * @brief Real time counter 0. (RTC)
Kojto 104:b9ad9a133dc7 761 */
Kojto 104:b9ad9a133dc7 762
Kojto 104:b9ad9a133dc7 763 typedef struct { /*!< RTC Structure */
Kojto 104:b9ad9a133dc7 764 __O uint32_t TASKS_START; /*!< Start RTC Counter. */
Kojto 104:b9ad9a133dc7 765 __O uint32_t TASKS_STOP; /*!< Stop RTC Counter. */
Kojto 104:b9ad9a133dc7 766 __O uint32_t TASKS_CLEAR; /*!< Clear RTC Counter. */
Kojto 104:b9ad9a133dc7 767 __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFFFF0. */
Kojto 104:b9ad9a133dc7 768 __I uint32_t RESERVED0[60];
Kojto 104:b9ad9a133dc7 769 __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment. */
Kojto 104:b9ad9a133dc7 770 __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow. */
Kojto 104:b9ad9a133dc7 771 __I uint32_t RESERVED1[14];
Kojto 104:b9ad9a133dc7 772 __IO uint32_t EVENTS_COMPARE[4]; /*!< Compare event on CC[n] match. */
Kojto 104:b9ad9a133dc7 773 __I uint32_t RESERVED2[109];
Kojto 104:b9ad9a133dc7 774 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 775 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 776 __I uint32_t RESERVED3[13];
Kojto 104:b9ad9a133dc7 777 __IO uint32_t EVTEN; /*!< Configures event enable routing to PPI for each RTC event. */
Kojto 104:b9ad9a133dc7 778 __IO uint32_t EVTENSET; /*!< Enable events routing to PPI. The reading of this register gives
Kojto 104:b9ad9a133dc7 779 the value of EVTEN. */
Kojto 104:b9ad9a133dc7 780 __IO uint32_t EVTENCLR; /*!< Disable events routing to PPI. The reading of this register
Kojto 104:b9ad9a133dc7 781 gives the value of EVTEN. */
Kojto 104:b9ad9a133dc7 782 __I uint32_t RESERVED4[110];
Kojto 104:b9ad9a133dc7 783 __I uint32_t COUNTER; /*!< Current COUNTER value. */
Kojto 104:b9ad9a133dc7 784 __IO uint32_t PRESCALER; /*!< 12-bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).
Kojto 104:b9ad9a133dc7 785 Must be written when RTC is STOPed. */
Kojto 104:b9ad9a133dc7 786 __I uint32_t RESERVED5[13];
Kojto 104:b9ad9a133dc7 787 __IO uint32_t CC[4]; /*!< Capture/compare registers. */
Kojto 104:b9ad9a133dc7 788 __I uint32_t RESERVED6[683];
Kojto 104:b9ad9a133dc7 789 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 790 } NRF_RTC_Type;
Kojto 104:b9ad9a133dc7 791
Kojto 104:b9ad9a133dc7 792
Kojto 104:b9ad9a133dc7 793 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 794 /* ================ TEMP ================ */
Kojto 104:b9ad9a133dc7 795 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 796
Kojto 104:b9ad9a133dc7 797
Kojto 104:b9ad9a133dc7 798 /**
Kojto 104:b9ad9a133dc7 799 * @brief Temperature Sensor. (TEMP)
Kojto 104:b9ad9a133dc7 800 */
Kojto 104:b9ad9a133dc7 801
Kojto 104:b9ad9a133dc7 802 typedef struct { /*!< TEMP Structure */
Kojto 104:b9ad9a133dc7 803 __O uint32_t TASKS_START; /*!< Start temperature measurement. */
Kojto 104:b9ad9a133dc7 804 __O uint32_t TASKS_STOP; /*!< Stop temperature measurement. */
Kojto 104:b9ad9a133dc7 805 __I uint32_t RESERVED0[62];
Kojto 104:b9ad9a133dc7 806 __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready event. */
Kojto 104:b9ad9a133dc7 807 __I uint32_t RESERVED1[128];
Kojto 104:b9ad9a133dc7 808 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 809 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 810 __I uint32_t RESERVED2[127];
Kojto 104:b9ad9a133dc7 811 __I int32_t TEMP; /*!< Die temperature in degC, 2's complement format, 0.25 degC pecision. */
Kojto 104:b9ad9a133dc7 812 __I uint32_t RESERVED3[700];
Kojto 104:b9ad9a133dc7 813 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 814 } NRF_TEMP_Type;
Kojto 104:b9ad9a133dc7 815
Kojto 104:b9ad9a133dc7 816
Kojto 104:b9ad9a133dc7 817 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 818 /* ================ RNG ================ */
Kojto 104:b9ad9a133dc7 819 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 820
Kojto 104:b9ad9a133dc7 821
Kojto 104:b9ad9a133dc7 822 /**
Kojto 104:b9ad9a133dc7 823 * @brief Random Number Generator. (RNG)
Kojto 104:b9ad9a133dc7 824 */
Kojto 104:b9ad9a133dc7 825
Kojto 104:b9ad9a133dc7 826 typedef struct { /*!< RNG Structure */
Kojto 104:b9ad9a133dc7 827 __O uint32_t TASKS_START; /*!< Start the random number generator. */
Kojto 104:b9ad9a133dc7 828 __O uint32_t TASKS_STOP; /*!< Stop the random number generator. */
Kojto 104:b9ad9a133dc7 829 __I uint32_t RESERVED0[62];
Kojto 104:b9ad9a133dc7 830 __IO uint32_t EVENTS_VALRDY; /*!< New random number generated and written to VALUE register. */
Kojto 104:b9ad9a133dc7 831 __I uint32_t RESERVED1[63];
Kojto 104:b9ad9a133dc7 832 __IO uint32_t SHORTS; /*!< Shortcuts for the RNG. */
Kojto 104:b9ad9a133dc7 833 __I uint32_t RESERVED2[64];
Kojto 104:b9ad9a133dc7 834 __IO uint32_t INTENSET; /*!< Interrupt enable set register */
Kojto 104:b9ad9a133dc7 835 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register */
Kojto 104:b9ad9a133dc7 836 __I uint32_t RESERVED3[126];
Kojto 104:b9ad9a133dc7 837 __IO uint32_t CONFIG; /*!< Configuration register. */
Kojto 104:b9ad9a133dc7 838 __I uint32_t VALUE; /*!< RNG random number. */
Kojto 104:b9ad9a133dc7 839 __I uint32_t RESERVED4[700];
Kojto 104:b9ad9a133dc7 840 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 841 } NRF_RNG_Type;
Kojto 104:b9ad9a133dc7 842
Kojto 104:b9ad9a133dc7 843
Kojto 104:b9ad9a133dc7 844 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 845 /* ================ ECB ================ */
Kojto 104:b9ad9a133dc7 846 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 847
Kojto 104:b9ad9a133dc7 848
Kojto 104:b9ad9a133dc7 849 /**
Kojto 104:b9ad9a133dc7 850 * @brief AES ECB Mode Encryption. (ECB)
Kojto 104:b9ad9a133dc7 851 */
Kojto 104:b9ad9a133dc7 852
Kojto 104:b9ad9a133dc7 853 typedef struct { /*!< ECB Structure */
Kojto 104:b9ad9a133dc7 854 __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt. If a crypto operation is running, this
Kojto 104:b9ad9a133dc7 855 will not initiate a new encryption and the ERRORECB event will
Kojto 104:b9ad9a133dc7 856 be triggered. */
Kojto 104:b9ad9a133dc7 857 __O uint32_t TASKS_STOPECB; /*!< Stop current ECB encryption. If a crypto operation is running,
Kojto 104:b9ad9a133dc7 858 this will will trigger the ERRORECB event. */
Kojto 104:b9ad9a133dc7 859 __I uint32_t RESERVED0[62];
Kojto 104:b9ad9a133dc7 860 __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete. */
Kojto 104:b9ad9a133dc7 861 __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted due to a STOPECB task or due to an
Kojto 104:b9ad9a133dc7 862 error. */
Kojto 104:b9ad9a133dc7 863 __I uint32_t RESERVED1[127];
Kojto 104:b9ad9a133dc7 864 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 865 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 866 __I uint32_t RESERVED2[126];
Kojto 104:b9ad9a133dc7 867 __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointer. */
Kojto 104:b9ad9a133dc7 868 __I uint32_t RESERVED3[701];
Kojto 104:b9ad9a133dc7 869 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 870 } NRF_ECB_Type;
Kojto 104:b9ad9a133dc7 871
Kojto 104:b9ad9a133dc7 872
Kojto 104:b9ad9a133dc7 873 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 874 /* ================ AAR ================ */
Kojto 104:b9ad9a133dc7 875 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 876
Kojto 104:b9ad9a133dc7 877
Kojto 104:b9ad9a133dc7 878 /**
Kojto 104:b9ad9a133dc7 879 * @brief Accelerated Address Resolver. (AAR)
Kojto 104:b9ad9a133dc7 880 */
Kojto 104:b9ad9a133dc7 881
Kojto 104:b9ad9a133dc7 882 typedef struct { /*!< AAR Structure */
Kojto 104:b9ad9a133dc7 883 __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK
Kojto 104:b9ad9a133dc7 884 data structure. */
Kojto 104:b9ad9a133dc7 885 __I uint32_t RESERVED0;
Kojto 104:b9ad9a133dc7 886 __O uint32_t TASKS_STOP; /*!< Stop resolving addresses. */
Kojto 104:b9ad9a133dc7 887 __I uint32_t RESERVED1[61];
Kojto 104:b9ad9a133dc7 888 __IO uint32_t EVENTS_END; /*!< Address resolution procedure completed. */
Kojto 104:b9ad9a133dc7 889 __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved. */
Kojto 104:b9ad9a133dc7 890 __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved. */
Kojto 104:b9ad9a133dc7 891 __I uint32_t RESERVED2[126];
Kojto 104:b9ad9a133dc7 892 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 893 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 894 __I uint32_t RESERVED3[61];
Kojto 104:b9ad9a133dc7 895 __I uint32_t STATUS; /*!< Resolution status. */
Kojto 104:b9ad9a133dc7 896 __I uint32_t RESERVED4[63];
Kojto 104:b9ad9a133dc7 897 __IO uint32_t ENABLE; /*!< Enable AAR. */
Kojto 104:b9ad9a133dc7 898 __IO uint32_t NIRK; /*!< Number of Identity root Keys in the IRK data structure. */
Kojto 104:b9ad9a133dc7 899 __IO uint32_t IRKPTR; /*!< Pointer to the IRK data structure. */
Kojto 104:b9ad9a133dc7 900 __I uint32_t RESERVED5;
Kojto 104:b9ad9a133dc7 901 __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address (6 bytes). */
Kojto 104:b9ad9a133dc7 902 __IO uint32_t SCRATCHPTR; /*!< Pointer to a "scratch" data area used for temporary storage
Kojto 104:b9ad9a133dc7 903 during resolution. A minimum of 3 bytes must be reserved. */
Kojto 104:b9ad9a133dc7 904 __I uint32_t RESERVED6[697];
Kojto 104:b9ad9a133dc7 905 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 906 } NRF_AAR_Type;
Kojto 104:b9ad9a133dc7 907
Kojto 104:b9ad9a133dc7 908
Kojto 104:b9ad9a133dc7 909 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 910 /* ================ CCM ================ */
Kojto 104:b9ad9a133dc7 911 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 912
Kojto 104:b9ad9a133dc7 913
Kojto 104:b9ad9a133dc7 914 /**
Kojto 104:b9ad9a133dc7 915 * @brief AES CCM Mode Encryption. (CCM)
Kojto 104:b9ad9a133dc7 916 */
Kojto 104:b9ad9a133dc7 917
Kojto 104:b9ad9a133dc7 918 typedef struct { /*!< CCM Structure */
Kojto 104:b9ad9a133dc7 919 __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by
Kojto 104:b9ad9a133dc7 920 itself when completed. */
Kojto 104:b9ad9a133dc7 921 __O uint32_t TASKS_CRYPT; /*!< Start encrypt/decrypt. This operation will stop by itself when
Kojto 104:b9ad9a133dc7 922 completed. */
Kojto 104:b9ad9a133dc7 923 __O uint32_t TASKS_STOP; /*!< Stop encrypt/decrypt. */
Kojto 104:b9ad9a133dc7 924 __I uint32_t RESERVED0[61];
Kojto 104:b9ad9a133dc7 925 __IO uint32_t EVENTS_ENDKSGEN; /*!< Keystream generation completed. */
Kojto 104:b9ad9a133dc7 926 __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt completed. */
Kojto 104:b9ad9a133dc7 927 __IO uint32_t EVENTS_ERROR; /*!< Error happened. */
Kojto 104:b9ad9a133dc7 928 __I uint32_t RESERVED1[61];
Kojto 104:b9ad9a133dc7 929 __IO uint32_t SHORTS; /*!< Shortcuts for the CCM. */
Kojto 104:b9ad9a133dc7 930 __I uint32_t RESERVED2[64];
Kojto 104:b9ad9a133dc7 931 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 932 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 933 __I uint32_t RESERVED3[61];
Kojto 104:b9ad9a133dc7 934 __I uint32_t MICSTATUS; /*!< CCM RX MIC check result. */
Kojto 104:b9ad9a133dc7 935 __I uint32_t RESERVED4[63];
Kojto 104:b9ad9a133dc7 936 __IO uint32_t ENABLE; /*!< CCM enable. */
Kojto 104:b9ad9a133dc7 937 __IO uint32_t MODE; /*!< Operation mode. */
Kojto 104:b9ad9a133dc7 938 __IO uint32_t CNFPTR; /*!< Pointer to a data structure holding AES key and NONCE vector. */
Kojto 104:b9ad9a133dc7 939 __IO uint32_t INPTR; /*!< Pointer to the input packet. */
Kojto 104:b9ad9a133dc7 940 __IO uint32_t OUTPTR; /*!< Pointer to the output packet. */
Kojto 104:b9ad9a133dc7 941 __IO uint32_t SCRATCHPTR; /*!< Pointer to a "scratch" data area used for temporary storage
Kojto 104:b9ad9a133dc7 942 during resolution. A minimum of 43 bytes must be reserved. */
Kojto 104:b9ad9a133dc7 943 __I uint32_t RESERVED5[697];
Kojto 104:b9ad9a133dc7 944 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 945 } NRF_CCM_Type;
Kojto 104:b9ad9a133dc7 946
Kojto 104:b9ad9a133dc7 947
Kojto 104:b9ad9a133dc7 948 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 949 /* ================ WDT ================ */
Kojto 104:b9ad9a133dc7 950 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 951
Kojto 104:b9ad9a133dc7 952
Kojto 104:b9ad9a133dc7 953 /**
Kojto 104:b9ad9a133dc7 954 * @brief Watchdog Timer. (WDT)
Kojto 104:b9ad9a133dc7 955 */
Kojto 104:b9ad9a133dc7 956
Kojto 104:b9ad9a133dc7 957 typedef struct { /*!< WDT Structure */
Kojto 104:b9ad9a133dc7 958 __O uint32_t TASKS_START; /*!< Start the watchdog. */
Kojto 104:b9ad9a133dc7 959 __I uint32_t RESERVED0[63];
Kojto 104:b9ad9a133dc7 960 __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout. */
Kojto 104:b9ad9a133dc7 961 __I uint32_t RESERVED1[128];
Kojto 104:b9ad9a133dc7 962 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 963 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 964 __I uint32_t RESERVED2[61];
Kojto 104:b9ad9a133dc7 965 __I uint32_t RUNSTATUS; /*!< Watchdog running status. */
Kojto 104:b9ad9a133dc7 966 __I uint32_t REQSTATUS; /*!< Request status. */
Kojto 104:b9ad9a133dc7 967 __I uint32_t RESERVED3[63];
Kojto 104:b9ad9a133dc7 968 __IO uint32_t CRV; /*!< Counter reload value in number of 32kiHz clock cycles. */
Kojto 104:b9ad9a133dc7 969 __IO uint32_t RREN; /*!< Reload request enable. */
Kojto 104:b9ad9a133dc7 970 __IO uint32_t CONFIG; /*!< Configuration register. */
Kojto 104:b9ad9a133dc7 971 __I uint32_t RESERVED4[60];
Kojto 104:b9ad9a133dc7 972 __O uint32_t RR[8]; /*!< Reload requests registers. */
Kojto 104:b9ad9a133dc7 973 __I uint32_t RESERVED5[631];
Kojto 104:b9ad9a133dc7 974 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 975 } NRF_WDT_Type;
Kojto 104:b9ad9a133dc7 976
Kojto 104:b9ad9a133dc7 977
Kojto 104:b9ad9a133dc7 978 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 979 /* ================ QDEC ================ */
Kojto 104:b9ad9a133dc7 980 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 981
Kojto 104:b9ad9a133dc7 982
Kojto 104:b9ad9a133dc7 983 /**
Kojto 104:b9ad9a133dc7 984 * @brief Rotary decoder. (QDEC)
Kojto 104:b9ad9a133dc7 985 */
Kojto 104:b9ad9a133dc7 986
Kojto 104:b9ad9a133dc7 987 typedef struct { /*!< QDEC Structure */
Kojto 104:b9ad9a133dc7 988 __O uint32_t TASKS_START; /*!< Start the quadrature decoder. */
Kojto 104:b9ad9a133dc7 989 __O uint32_t TASKS_STOP; /*!< Stop the quadrature decoder. */
Kojto 104:b9ad9a133dc7 990 __O uint32_t TASKS_READCLRACC; /*!< Transfers the content from ACC registers to ACCREAD registers,
Kojto 104:b9ad9a133dc7 991 and clears the ACC registers. */
Kojto 104:b9ad9a133dc7 992 __I uint32_t RESERVED0[61];
Kojto 104:b9ad9a133dc7 993 __IO uint32_t EVENTS_SAMPLERDY; /*!< A new sample is written to the sample register. */
Kojto 104:b9ad9a133dc7 994 __IO uint32_t EVENTS_REPORTRDY; /*!< REPORTPER number of samples accumulated in ACC register, and
Kojto 104:b9ad9a133dc7 995 ACC register different than zero. */
Kojto 104:b9ad9a133dc7 996 __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow. */
Kojto 104:b9ad9a133dc7 997 __I uint32_t RESERVED1[61];
Kojto 104:b9ad9a133dc7 998 __IO uint32_t SHORTS; /*!< Shortcuts for the QDEC. */
Kojto 104:b9ad9a133dc7 999 __I uint32_t RESERVED2[64];
Kojto 104:b9ad9a133dc7 1000 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 1001 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 1002 __I uint32_t RESERVED3[125];
Kojto 104:b9ad9a133dc7 1003 __IO uint32_t ENABLE; /*!< Enable the QDEC. */
Kojto 104:b9ad9a133dc7 1004 __IO uint32_t LEDPOL; /*!< LED output pin polarity. */
Kojto 104:b9ad9a133dc7 1005 __IO uint32_t SAMPLEPER; /*!< Sample period. */
Kojto 104:b9ad9a133dc7 1006 __I int32_t SAMPLE; /*!< Motion sample value. */
Kojto 104:b9ad9a133dc7 1007 __IO uint32_t REPORTPER; /*!< Number of samples to generate an EVENT_REPORTRDY. */
Kojto 104:b9ad9a133dc7 1008 __I int32_t ACC; /*!< Accumulated valid transitions register. */
Kojto 104:b9ad9a133dc7 1009 __I int32_t ACCREAD; /*!< Snapshot of ACC register. Value generated by the TASKS_READCLEACC
Kojto 104:b9ad9a133dc7 1010 task. */
Kojto 104:b9ad9a133dc7 1011 __IO uint32_t PSELLED; /*!< Pin select for LED output. */
Kojto 104:b9ad9a133dc7 1012 __IO uint32_t PSELA; /*!< Pin select for phase A input. */
Kojto 104:b9ad9a133dc7 1013 __IO uint32_t PSELB; /*!< Pin select for phase B input. */
Kojto 104:b9ad9a133dc7 1014 __IO uint32_t DBFEN; /*!< Enable debouncer input filters. */
Kojto 104:b9ad9a133dc7 1015 __I uint32_t RESERVED4[5];
Kojto 104:b9ad9a133dc7 1016 __IO uint32_t LEDPRE; /*!< Time LED is switched ON before the sample. */
Kojto 104:b9ad9a133dc7 1017 __I uint32_t ACCDBL; /*!< Accumulated double (error) transitions register. */
Kojto 104:b9ad9a133dc7 1018 __I uint32_t ACCDBLREAD; /*!< Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC
Kojto 104:b9ad9a133dc7 1019 task. */
Kojto 104:b9ad9a133dc7 1020 __I uint32_t RESERVED5[684];
Kojto 104:b9ad9a133dc7 1021 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 1022 } NRF_QDEC_Type;
Kojto 104:b9ad9a133dc7 1023
Kojto 104:b9ad9a133dc7 1024
Kojto 104:b9ad9a133dc7 1025 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1026 /* ================ LPCOMP ================ */
Kojto 104:b9ad9a133dc7 1027 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1028
Kojto 104:b9ad9a133dc7 1029
Kojto 104:b9ad9a133dc7 1030 /**
Kojto 104:b9ad9a133dc7 1031 * @brief Low power comparator. (LPCOMP)
Kojto 104:b9ad9a133dc7 1032 */
Kojto 104:b9ad9a133dc7 1033
Kojto 104:b9ad9a133dc7 1034 typedef struct { /*!< LPCOMP Structure */
Kojto 104:b9ad9a133dc7 1035 __O uint32_t TASKS_START; /*!< Start the comparator. */
Kojto 104:b9ad9a133dc7 1036 __O uint32_t TASKS_STOP; /*!< Stop the comparator. */
Kojto 104:b9ad9a133dc7 1037 __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value. */
Kojto 104:b9ad9a133dc7 1038 __I uint32_t RESERVED0[61];
Kojto 104:b9ad9a133dc7 1039 __IO uint32_t EVENTS_READY; /*!< LPCOMP is ready and output is valid. */
Kojto 104:b9ad9a133dc7 1040 __IO uint32_t EVENTS_DOWN; /*!< Input voltage crossed the threshold going down. */
Kojto 104:b9ad9a133dc7 1041 __IO uint32_t EVENTS_UP; /*!< Input voltage crossed the threshold going up. */
Kojto 104:b9ad9a133dc7 1042 __IO uint32_t EVENTS_CROSS; /*!< Input voltage crossed the threshold in any direction. */
Kojto 104:b9ad9a133dc7 1043 __I uint32_t RESERVED1[60];
Kojto 104:b9ad9a133dc7 1044 __IO uint32_t SHORTS; /*!< Shortcuts for the LPCOMP. */
Kojto 104:b9ad9a133dc7 1045 __I uint32_t RESERVED2[64];
Kojto 104:b9ad9a133dc7 1046 __IO uint32_t INTENSET; /*!< Interrupt enable set register. */
Kojto 104:b9ad9a133dc7 1047 __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
Kojto 104:b9ad9a133dc7 1048 __I uint32_t RESERVED3[61];
Kojto 104:b9ad9a133dc7 1049 __I uint32_t RESULT; /*!< Result of last compare. */
Kojto 104:b9ad9a133dc7 1050 __I uint32_t RESERVED4[63];
Kojto 104:b9ad9a133dc7 1051 __IO uint32_t ENABLE; /*!< Enable the LPCOMP. */
Kojto 104:b9ad9a133dc7 1052 __IO uint32_t PSEL; /*!< Input pin select. */
Kojto 104:b9ad9a133dc7 1053 __IO uint32_t REFSEL; /*!< Reference select. */
Kojto 104:b9ad9a133dc7 1054 __IO uint32_t EXTREFSEL; /*!< External reference select. */
Kojto 104:b9ad9a133dc7 1055 __I uint32_t RESERVED5[4];
Kojto 104:b9ad9a133dc7 1056 __IO uint32_t ANADETECT; /*!< Analog detect configuration. */
Kojto 104:b9ad9a133dc7 1057 __I uint32_t RESERVED6[694];
Kojto 104:b9ad9a133dc7 1058 __IO uint32_t POWER; /*!< Peripheral power control. */
Kojto 104:b9ad9a133dc7 1059 } NRF_LPCOMP_Type;
Kojto 104:b9ad9a133dc7 1060
Kojto 104:b9ad9a133dc7 1061
Kojto 104:b9ad9a133dc7 1062 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1063 /* ================ SWI ================ */
Kojto 104:b9ad9a133dc7 1064 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1065
Kojto 104:b9ad9a133dc7 1066
Kojto 104:b9ad9a133dc7 1067 /**
Kojto 104:b9ad9a133dc7 1068 * @brief SW Interrupts. (SWI)
Kojto 104:b9ad9a133dc7 1069 */
Kojto 104:b9ad9a133dc7 1070
Kojto 104:b9ad9a133dc7 1071 typedef struct { /*!< SWI Structure */
Kojto 104:b9ad9a133dc7 1072 __I uint32_t UNUSED; /*!< Unused. */
Kojto 104:b9ad9a133dc7 1073 } NRF_SWI_Type;
Kojto 104:b9ad9a133dc7 1074
Kojto 104:b9ad9a133dc7 1075
Kojto 104:b9ad9a133dc7 1076 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1077 /* ================ NVMC ================ */
Kojto 104:b9ad9a133dc7 1078 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1079
Kojto 104:b9ad9a133dc7 1080
Kojto 104:b9ad9a133dc7 1081 /**
Kojto 104:b9ad9a133dc7 1082 * @brief Non Volatile Memory Controller. (NVMC)
Kojto 104:b9ad9a133dc7 1083 */
Kojto 104:b9ad9a133dc7 1084
Kojto 104:b9ad9a133dc7 1085 typedef struct { /*!< NVMC Structure */
Kojto 104:b9ad9a133dc7 1086 __I uint32_t RESERVED0[256];
Kojto 104:b9ad9a133dc7 1087 __I uint32_t READY; /*!< Ready flag. */
Kojto 104:b9ad9a133dc7 1088 __I uint32_t RESERVED1[64];
Kojto 104:b9ad9a133dc7 1089 __IO uint32_t CONFIG; /*!< Configuration register. */
Kojto 104:b9ad9a133dc7 1090 __IO uint32_t ERASEPAGE; /*!< Register for erasing a non-protected non-volatile memory page. */
Kojto 104:b9ad9a133dc7 1091 __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory. */
Kojto 104:b9ad9a133dc7 1092 __IO uint32_t ERASEPROTECTEDPAGE; /*!< Register for erasing a protected non-volatile memory page. */
Kojto 104:b9ad9a133dc7 1093 __IO uint32_t ERASEUICR; /*!< Register for start erasing User Information Congfiguration Registers. */
Kojto 104:b9ad9a133dc7 1094 } NRF_NVMC_Type;
Kojto 104:b9ad9a133dc7 1095
Kojto 104:b9ad9a133dc7 1096
Kojto 104:b9ad9a133dc7 1097 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1098 /* ================ PPI ================ */
Kojto 104:b9ad9a133dc7 1099 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1100
Kojto 104:b9ad9a133dc7 1101
Kojto 104:b9ad9a133dc7 1102 /**
Kojto 104:b9ad9a133dc7 1103 * @brief PPI controller. (PPI)
Kojto 104:b9ad9a133dc7 1104 */
Kojto 104:b9ad9a133dc7 1105
Kojto 104:b9ad9a133dc7 1106 typedef struct { /*!< PPI Structure */
Kojto 104:b9ad9a133dc7 1107 PPI_TASKS_CHG_Type TASKS_CHG[4]; /*!< Channel group tasks. */
Kojto 104:b9ad9a133dc7 1108 __I uint32_t RESERVED0[312];
Kojto 104:b9ad9a133dc7 1109 __IO uint32_t CHEN; /*!< Channel enable. */
Kojto 104:b9ad9a133dc7 1110 __IO uint32_t CHENSET; /*!< Channel enable set. */
Kojto 104:b9ad9a133dc7 1111 __IO uint32_t CHENCLR; /*!< Channel enable clear. */
Kojto 104:b9ad9a133dc7 1112 __I uint32_t RESERVED1;
Kojto 104:b9ad9a133dc7 1113 PPI_CH_Type CH[16]; /*!< PPI Channel. */
Kojto 104:b9ad9a133dc7 1114 __I uint32_t RESERVED2[156];
Kojto 104:b9ad9a133dc7 1115 __IO uint32_t CHG[4]; /*!< Channel group configuration. */
Kojto 104:b9ad9a133dc7 1116 } NRF_PPI_Type;
Kojto 104:b9ad9a133dc7 1117
Kojto 104:b9ad9a133dc7 1118
Kojto 104:b9ad9a133dc7 1119 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1120 /* ================ FICR ================ */
Kojto 104:b9ad9a133dc7 1121 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1122
Kojto 104:b9ad9a133dc7 1123
Kojto 104:b9ad9a133dc7 1124 /**
Kojto 104:b9ad9a133dc7 1125 * @brief Factory Information Configuration. (FICR)
Kojto 104:b9ad9a133dc7 1126 */
Kojto 104:b9ad9a133dc7 1127
Kojto 104:b9ad9a133dc7 1128 typedef struct { /*!< FICR Structure */
Kojto 104:b9ad9a133dc7 1129 __I uint32_t RESERVED0[4];
Kojto 104:b9ad9a133dc7 1130 __I uint32_t CODEPAGESIZE; /*!< Code memory page size in bytes. */
Kojto 104:b9ad9a133dc7 1131 __I uint32_t CODESIZE; /*!< Code memory size in pages. */
Kojto 104:b9ad9a133dc7 1132 __I uint32_t RESERVED1[4];
Kojto 104:b9ad9a133dc7 1133 __I uint32_t CLENR0; /*!< Length of code region 0 in bytes. */
Kojto 104:b9ad9a133dc7 1134 __I uint32_t PPFC; /*!< Pre-programmed factory code present. */
Kojto 104:b9ad9a133dc7 1135 __I uint32_t RESERVED2;
Kojto 104:b9ad9a133dc7 1136 __I uint32_t NUMRAMBLOCK; /*!< Number of individualy controllable RAM blocks. */
Kojto 104:b9ad9a133dc7 1137
Kojto 104:b9ad9a133dc7 1138 union {
Kojto 104:b9ad9a133dc7 1139 __I uint32_t SIZERAMBLOCK[4]; /*!< Deprecated array of size of RAM block in bytes. This name is
Kojto 104:b9ad9a133dc7 1140 kept for backward compatinility purposes. Use SIZERAMBLOCKS
Kojto 104:b9ad9a133dc7 1141 instead. */
Kojto 104:b9ad9a133dc7 1142 __I uint32_t SIZERAMBLOCKS; /*!< Size of RAM blocks in bytes. */
Kojto 104:b9ad9a133dc7 1143 };
Kojto 104:b9ad9a133dc7 1144 __I uint32_t RESERVED3[5];
Kojto 104:b9ad9a133dc7 1145 __I uint32_t CONFIGID; /*!< Configuration identifier. */
Kojto 104:b9ad9a133dc7 1146 __I uint32_t DEVICEID[2]; /*!< Device identifier. */
Kojto 104:b9ad9a133dc7 1147 __I uint32_t RESERVED4[6];
Kojto 104:b9ad9a133dc7 1148 __I uint32_t ER[4]; /*!< Encryption root. */
Kojto 104:b9ad9a133dc7 1149 __I uint32_t IR[4]; /*!< Identity root. */
Kojto 104:b9ad9a133dc7 1150 __I uint32_t DEVICEADDRTYPE; /*!< Device address type. */
Kojto 104:b9ad9a133dc7 1151 __I uint32_t DEVICEADDR[2]; /*!< Device address. */
Kojto 104:b9ad9a133dc7 1152 __I uint32_t OVERRIDEEN; /*!< Radio calibration override enable. */
Kojto 104:b9ad9a133dc7 1153 __I uint32_t NRF_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for NRF_1Mbit
Kojto 104:b9ad9a133dc7 1154 mode. */
Kojto 104:b9ad9a133dc7 1155 __I uint32_t RESERVED5[10];
Kojto 104:b9ad9a133dc7 1156 __I uint32_t BLE_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit
Kojto 104:b9ad9a133dc7 1157 mode. */
Kojto 104:b9ad9a133dc7 1158 FICR_INFO_Type INFO; /*!< Device info */
Kojto 104:b9ad9a133dc7 1159 } NRF_FICR_Type;
Kojto 104:b9ad9a133dc7 1160
Kojto 104:b9ad9a133dc7 1161
Kojto 104:b9ad9a133dc7 1162 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1163 /* ================ UICR ================ */
Kojto 104:b9ad9a133dc7 1164 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1165
Kojto 104:b9ad9a133dc7 1166
Kojto 104:b9ad9a133dc7 1167 /**
Kojto 104:b9ad9a133dc7 1168 * @brief User Information Configuration. (UICR)
Kojto 104:b9ad9a133dc7 1169 */
Kojto 104:b9ad9a133dc7 1170
Kojto 104:b9ad9a133dc7 1171 typedef struct { /*!< UICR Structure */
Kojto 104:b9ad9a133dc7 1172 __IO uint32_t CLENR0; /*!< Length of code region 0. */
Kojto 104:b9ad9a133dc7 1173 __IO uint32_t RBPCONF; /*!< Readback protection configuration. */
Kojto 104:b9ad9a133dc7 1174 __IO uint32_t XTALFREQ; /*!< Reset value for CLOCK XTALFREQ register. */
Kojto 104:b9ad9a133dc7 1175 __I uint32_t RESERVED0;
Kojto 104:b9ad9a133dc7 1176 __I uint32_t FWID; /*!< Firmware ID. */
Kojto 104:b9ad9a133dc7 1177 __IO uint32_t BOOTLOADERADDR; /*!< Bootloader start address. */
Kojto 104:b9ad9a133dc7 1178 } NRF_UICR_Type;
Kojto 104:b9ad9a133dc7 1179
Kojto 104:b9ad9a133dc7 1180
Kojto 104:b9ad9a133dc7 1181 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1182 /* ================ GPIO ================ */
Kojto 104:b9ad9a133dc7 1183 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1184
Kojto 104:b9ad9a133dc7 1185
Kojto 104:b9ad9a133dc7 1186 /**
Kojto 104:b9ad9a133dc7 1187 * @brief General purpose input and output. (GPIO)
Kojto 104:b9ad9a133dc7 1188 */
Kojto 104:b9ad9a133dc7 1189
Kojto 104:b9ad9a133dc7 1190 typedef struct { /*!< GPIO Structure */
Kojto 104:b9ad9a133dc7 1191 __I uint32_t RESERVED0[321];
Kojto 104:b9ad9a133dc7 1192 __IO uint32_t OUT; /*!< Write GPIO port. */
Kojto 104:b9ad9a133dc7 1193 __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port. */
Kojto 104:b9ad9a133dc7 1194 __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port. */
Kojto 104:b9ad9a133dc7 1195 __I uint32_t IN; /*!< Read GPIO port. */
Kojto 104:b9ad9a133dc7 1196 __IO uint32_t DIR; /*!< Direction of GPIO pins. */
Kojto 104:b9ad9a133dc7 1197 __IO uint32_t DIRSET; /*!< DIR set register. */
Kojto 104:b9ad9a133dc7 1198 __IO uint32_t DIRCLR; /*!< DIR clear register. */
Kojto 104:b9ad9a133dc7 1199 __I uint32_t RESERVED1[120];
Kojto 104:b9ad9a133dc7 1200 __IO uint32_t PIN_CNF[32]; /*!< Configuration of GPIO pins. */
Kojto 104:b9ad9a133dc7 1201 } NRF_GPIO_Type;
Kojto 104:b9ad9a133dc7 1202
Kojto 104:b9ad9a133dc7 1203
Kojto 104:b9ad9a133dc7 1204 /* -------------------- End of section using anonymous unions ------------------- */
Kojto 104:b9ad9a133dc7 1205 #if defined(__CC_ARM)
Kojto 104:b9ad9a133dc7 1206 #pragma pop
Kojto 104:b9ad9a133dc7 1207 #elif defined(__ICCARM__)
Kojto 104:b9ad9a133dc7 1208 /* leave anonymous unions enabled */
Kojto 104:b9ad9a133dc7 1209 #elif defined(__GNUC__)
Kojto 104:b9ad9a133dc7 1210 /* anonymous unions are enabled by default */
Kojto 104:b9ad9a133dc7 1211 #elif defined(__TMS470__)
Kojto 104:b9ad9a133dc7 1212 /* anonymous unions are enabled by default */
Kojto 104:b9ad9a133dc7 1213 #elif defined(__TASKING__)
Kojto 104:b9ad9a133dc7 1214 #pragma warning restore
Kojto 104:b9ad9a133dc7 1215 #else
Kojto 104:b9ad9a133dc7 1216 #warning Not supported compiler type
Kojto 104:b9ad9a133dc7 1217 #endif
Kojto 104:b9ad9a133dc7 1218
Kojto 104:b9ad9a133dc7 1219
Kojto 104:b9ad9a133dc7 1220
Kojto 104:b9ad9a133dc7 1221
Kojto 104:b9ad9a133dc7 1222 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1223 /* ================ Peripheral memory map ================ */
Kojto 104:b9ad9a133dc7 1224 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1225
Kojto 104:b9ad9a133dc7 1226 #define NRF_POWER_BASE 0x40000000UL
Kojto 104:b9ad9a133dc7 1227 #define NRF_CLOCK_BASE 0x40000000UL
Kojto 104:b9ad9a133dc7 1228 #define NRF_MPU_BASE 0x40000000UL
Kojto 104:b9ad9a133dc7 1229 #define NRF_PU_BASE 0x40000000UL
Kojto 104:b9ad9a133dc7 1230 #define NRF_AMLI_BASE 0x40000000UL
Kojto 104:b9ad9a133dc7 1231 #define NRF_RADIO_BASE 0x40001000UL
Kojto 104:b9ad9a133dc7 1232 #define NRF_UART0_BASE 0x40002000UL
Kojto 104:b9ad9a133dc7 1233 #define NRF_SPI0_BASE 0x40003000UL
Kojto 104:b9ad9a133dc7 1234 #define NRF_TWI0_BASE 0x40003000UL
Kojto 104:b9ad9a133dc7 1235 #define NRF_SPI1_BASE 0x40004000UL
Kojto 104:b9ad9a133dc7 1236 #define NRF_TWI1_BASE 0x40004000UL
Kojto 104:b9ad9a133dc7 1237 #define NRF_SPIS1_BASE 0x40004000UL
Kojto 104:b9ad9a133dc7 1238 #define NRF_SPIM1_BASE 0x40004000UL
Kojto 104:b9ad9a133dc7 1239 #define NRF_GPIOTE_BASE 0x40006000UL
Kojto 104:b9ad9a133dc7 1240 #define NRF_ADC_BASE 0x40007000UL
Kojto 104:b9ad9a133dc7 1241 #define NRF_TIMER0_BASE 0x40008000UL
Kojto 104:b9ad9a133dc7 1242 #define NRF_TIMER1_BASE 0x40009000UL
Kojto 104:b9ad9a133dc7 1243 #define NRF_TIMER2_BASE 0x4000A000UL
Kojto 104:b9ad9a133dc7 1244 #define NRF_RTC0_BASE 0x4000B000UL
Kojto 104:b9ad9a133dc7 1245 #define NRF_TEMP_BASE 0x4000C000UL
Kojto 104:b9ad9a133dc7 1246 #define NRF_RNG_BASE 0x4000D000UL
Kojto 104:b9ad9a133dc7 1247 #define NRF_ECB_BASE 0x4000E000UL
Kojto 104:b9ad9a133dc7 1248 #define NRF_AAR_BASE 0x4000F000UL
Kojto 104:b9ad9a133dc7 1249 #define NRF_CCM_BASE 0x4000F000UL
Kojto 104:b9ad9a133dc7 1250 #define NRF_WDT_BASE 0x40010000UL
Kojto 104:b9ad9a133dc7 1251 #define NRF_RTC1_BASE 0x40011000UL
Kojto 104:b9ad9a133dc7 1252 #define NRF_QDEC_BASE 0x40012000UL
Kojto 104:b9ad9a133dc7 1253 #define NRF_LPCOMP_BASE 0x40013000UL
Kojto 104:b9ad9a133dc7 1254 #define NRF_SWI_BASE 0x40014000UL
Kojto 104:b9ad9a133dc7 1255 #define NRF_NVMC_BASE 0x4001E000UL
Kojto 104:b9ad9a133dc7 1256 #define NRF_PPI_BASE 0x4001F000UL
Kojto 104:b9ad9a133dc7 1257 #define NRF_FICR_BASE 0x10000000UL
Kojto 104:b9ad9a133dc7 1258 #define NRF_UICR_BASE 0x10001000UL
Kojto 104:b9ad9a133dc7 1259 #define NRF_GPIO_BASE 0x50000000UL
Kojto 104:b9ad9a133dc7 1260
Kojto 104:b9ad9a133dc7 1261
Kojto 104:b9ad9a133dc7 1262 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1263 /* ================ Peripheral declaration ================ */
Kojto 104:b9ad9a133dc7 1264 /* ================================================================================ */
Kojto 104:b9ad9a133dc7 1265
Kojto 104:b9ad9a133dc7 1266 #define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE)
Kojto 104:b9ad9a133dc7 1267 #define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE)
Kojto 104:b9ad9a133dc7 1268 #define NRF_MPU ((NRF_MPU_Type *) NRF_MPU_BASE)
Kojto 104:b9ad9a133dc7 1269 #define NRF_PU ((NRF_PU_Type *) NRF_PU_BASE)
Kojto 104:b9ad9a133dc7 1270 #define NRF_AMLI ((NRF_AMLI_Type *) NRF_AMLI_BASE)
Kojto 104:b9ad9a133dc7 1271 #define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE)
Kojto 104:b9ad9a133dc7 1272 #define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE)
Kojto 104:b9ad9a133dc7 1273 #define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE)
Kojto 104:b9ad9a133dc7 1274 #define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE)
Kojto 104:b9ad9a133dc7 1275 #define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE)
Kojto 104:b9ad9a133dc7 1276 #define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE)
Kojto 104:b9ad9a133dc7 1277 #define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE)
Kojto 104:b9ad9a133dc7 1278 #define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE)
Kojto 104:b9ad9a133dc7 1279 #define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE)
Kojto 104:b9ad9a133dc7 1280 #define NRF_ADC ((NRF_ADC_Type *) NRF_ADC_BASE)
Kojto 104:b9ad9a133dc7 1281 #define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE)
Kojto 104:b9ad9a133dc7 1282 #define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE)
Kojto 104:b9ad9a133dc7 1283 #define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE)
Kojto 104:b9ad9a133dc7 1284 #define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE)
Kojto 104:b9ad9a133dc7 1285 #define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE)
Kojto 104:b9ad9a133dc7 1286 #define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE)
Kojto 104:b9ad9a133dc7 1287 #define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE)
Kojto 104:b9ad9a133dc7 1288 #define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE)
Kojto 104:b9ad9a133dc7 1289 #define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE)
Kojto 104:b9ad9a133dc7 1290 #define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE)
Kojto 104:b9ad9a133dc7 1291 #define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE)
Kojto 104:b9ad9a133dc7 1292 #define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE)
Kojto 104:b9ad9a133dc7 1293 #define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE)
Kojto 104:b9ad9a133dc7 1294 #define NRF_SWI ((NRF_SWI_Type *) NRF_SWI_BASE)
Kojto 104:b9ad9a133dc7 1295 #define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE)
Kojto 104:b9ad9a133dc7 1296 #define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE)
Kojto 104:b9ad9a133dc7 1297 #define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE)
Kojto 104:b9ad9a133dc7 1298 #define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE)
Kojto 104:b9ad9a133dc7 1299 #define NRF_GPIO ((NRF_GPIO_Type *) NRF_GPIO_BASE)
Kojto 104:b9ad9a133dc7 1300
Kojto 104:b9ad9a133dc7 1301
Kojto 104:b9ad9a133dc7 1302 /** @} */ /* End of group Device_Peripheral_Registers */
Kojto 104:b9ad9a133dc7 1303 /** @} */ /* End of group nRF51 */
Kojto 104:b9ad9a133dc7 1304 /** @} */ /* End of group Nordic Semiconductor */
Kojto 104:b9ad9a133dc7 1305
Kojto 104:b9ad9a133dc7 1306 #ifdef __cplusplus
Kojto 104:b9ad9a133dc7 1307 }
Kojto 104:b9ad9a133dc7 1308 #endif
Kojto 104:b9ad9a133dc7 1309
Kojto 104:b9ad9a133dc7 1310
Kojto 104:b9ad9a133dc7 1311 #endif /* nRF51_H */
Kojto 104:b9ad9a133dc7 1312