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Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b
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Kojto 108:34e6b704fe68 1 /**
Kojto 108:34e6b704fe68 2 ******************************************************************************
Kojto 108:34e6b704fe68 3 * @file stm32f4xx_ll_sdmmc.h
Kojto 108:34e6b704fe68 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
Kojto 108:34e6b704fe68 7 * @brief Header file of SDMMC HAL module.
Kojto 108:34e6b704fe68 8 ******************************************************************************
Kojto 108:34e6b704fe68 9 * @attention
Kojto 108:34e6b704fe68 10 *
Kojto 108:34e6b704fe68 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 108:34e6b704fe68 12 *
Kojto 108:34e6b704fe68 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 108:34e6b704fe68 14 * are permitted provided that the following conditions are met:
Kojto 108:34e6b704fe68 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 108:34e6b704fe68 16 * this list of conditions and the following disclaimer.
Kojto 108:34e6b704fe68 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 108:34e6b704fe68 18 * this list of conditions and the following disclaimer in the documentation
Kojto 108:34e6b704fe68 19 * and/or other materials provided with the distribution.
Kojto 108:34e6b704fe68 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 108:34e6b704fe68 21 * may be used to endorse or promote products derived from this software
Kojto 108:34e6b704fe68 22 * without specific prior written permission.
Kojto 108:34e6b704fe68 23 *
Kojto 108:34e6b704fe68 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 108:34e6b704fe68 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 108:34e6b704fe68 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 108:34e6b704fe68 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 108:34e6b704fe68 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 108:34e6b704fe68 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 108:34e6b704fe68 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 108:34e6b704fe68 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 108:34e6b704fe68 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 108:34e6b704fe68 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 108:34e6b704fe68 34 *
Kojto 108:34e6b704fe68 35 ******************************************************************************
Kojto 108:34e6b704fe68 36 */
Kojto 108:34e6b704fe68 37
Kojto 108:34e6b704fe68 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 108:34e6b704fe68 39 #ifndef __STM32F4xx_LL_SDMMC_H
Kojto 108:34e6b704fe68 40 #define __STM32F4xx_LL_SDMMC_H
Kojto 108:34e6b704fe68 41
Kojto 108:34e6b704fe68 42 #ifdef __cplusplus
Kojto 108:34e6b704fe68 43 extern "C" {
Kojto 108:34e6b704fe68 44 #endif
Kojto 110:165afa46840b 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
Kojto 110:165afa46840b 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
Kojto 110:165afa46840b 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
Kojto 110:165afa46840b 48 defined(STM32F469xx) || defined(STM32F479xx)
Kojto 108:34e6b704fe68 49 /* Includes ------------------------------------------------------------------*/
Kojto 108:34e6b704fe68 50 #include "stm32f4xx_hal_def.h"
Kojto 108:34e6b704fe68 51
Kojto 108:34e6b704fe68 52 /** @addtogroup STM32F4xx_Driver
Kojto 108:34e6b704fe68 53 * @{
Kojto 108:34e6b704fe68 54 */
Kojto 108:34e6b704fe68 55
Kojto 108:34e6b704fe68 56 /** @addtogroup SDMMC_LL
Kojto 108:34e6b704fe68 57 * @{
Kojto 108:34e6b704fe68 58 */
Kojto 108:34e6b704fe68 59
Kojto 108:34e6b704fe68 60 /* Exported types ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 61 /** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types
Kojto 108:34e6b704fe68 62 * @{
Kojto 108:34e6b704fe68 63 */
Kojto 108:34e6b704fe68 64
Kojto 108:34e6b704fe68 65 /**
Kojto 108:34e6b704fe68 66 * @brief SDMMC Configuration Structure definition
Kojto 108:34e6b704fe68 67 */
Kojto 108:34e6b704fe68 68 typedef struct
Kojto 108:34e6b704fe68 69 {
Kojto 108:34e6b704fe68 70 uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
Kojto 108:34e6b704fe68 71 This parameter can be a value of @ref SDIO_Clock_Edge */
Kojto 108:34e6b704fe68 72
Kojto 108:34e6b704fe68 73 uint32_t ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
Kojto 108:34e6b704fe68 74 enabled or disabled.
Kojto 108:34e6b704fe68 75 This parameter can be a value of @ref SDIO_Clock_Bypass */
Kojto 108:34e6b704fe68 76
Kojto 108:34e6b704fe68 77 uint32_t ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
Kojto 108:34e6b704fe68 78 disabled when the bus is idle.
Kojto 108:34e6b704fe68 79 This parameter can be a value of @ref SDIO_Clock_Power_Save */
Kojto 108:34e6b704fe68 80
Kojto 108:34e6b704fe68 81 uint32_t BusWide; /*!< Specifies the SDIO bus width.
Kojto 108:34e6b704fe68 82 This parameter can be a value of @ref SDIO_Bus_Wide */
Kojto 108:34e6b704fe68 83
Kojto 108:34e6b704fe68 84 uint32_t HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
Kojto 108:34e6b704fe68 85 This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
Kojto 108:34e6b704fe68 86
Kojto 108:34e6b704fe68 87 uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
Kojto 108:34e6b704fe68 88 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 89
Kojto 108:34e6b704fe68 90 }SDIO_InitTypeDef;
Kojto 108:34e6b704fe68 91
Kojto 108:34e6b704fe68 92
Kojto 108:34e6b704fe68 93 /**
Kojto 108:34e6b704fe68 94 * @brief SDIO Command Control structure
Kojto 108:34e6b704fe68 95 */
Kojto 108:34e6b704fe68 96 typedef struct
Kojto 108:34e6b704fe68 97 {
Kojto 108:34e6b704fe68 98 uint32_t Argument; /*!< Specifies the SDIO command argument which is sent
Kojto 108:34e6b704fe68 99 to a card as part of a command message. If a command
Kojto 108:34e6b704fe68 100 contains an argument, it must be loaded into this register
Kojto 108:34e6b704fe68 101 before writing the command to the command register. */
Kojto 108:34e6b704fe68 102
Kojto 108:34e6b704fe68 103 uint32_t CmdIndex; /*!< Specifies the SDIO command index. It must be Min_Data = 0 and
Kojto 108:34e6b704fe68 104 Max_Data = 64 */
Kojto 108:34e6b704fe68 105
Kojto 108:34e6b704fe68 106 uint32_t Response; /*!< Specifies the SDIO response type.
Kojto 108:34e6b704fe68 107 This parameter can be a value of @ref SDIO_Response_Type */
Kojto 108:34e6b704fe68 108
Kojto 108:34e6b704fe68 109 uint32_t WaitForInterrupt; /*!< Specifies whether SDIO wait for interrupt request is
Kojto 108:34e6b704fe68 110 enabled or disabled.
Kojto 108:34e6b704fe68 111 This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
Kojto 108:34e6b704fe68 112
Kojto 108:34e6b704fe68 113 uint32_t CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
Kojto 108:34e6b704fe68 114 is enabled or disabled.
Kojto 108:34e6b704fe68 115 This parameter can be a value of @ref SDIO_CPSM_State */
Kojto 108:34e6b704fe68 116 }SDIO_CmdInitTypeDef;
Kojto 108:34e6b704fe68 117
Kojto 108:34e6b704fe68 118
Kojto 108:34e6b704fe68 119 /**
Kojto 108:34e6b704fe68 120 * @brief SDIO Data Control structure
Kojto 108:34e6b704fe68 121 */
Kojto 108:34e6b704fe68 122 typedef struct
Kojto 108:34e6b704fe68 123 {
Kojto 108:34e6b704fe68 124 uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
Kojto 108:34e6b704fe68 125
Kojto 108:34e6b704fe68 126 uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */
Kojto 108:34e6b704fe68 127
Kojto 108:34e6b704fe68 128 uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer.
Kojto 108:34e6b704fe68 129 This parameter can be a value of @ref SDIO_Data_Block_Size */
Kojto 108:34e6b704fe68 130
Kojto 108:34e6b704fe68 131 uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer
Kojto 108:34e6b704fe68 132 is a read or write.
Kojto 108:34e6b704fe68 133 This parameter can be a value of @ref SDIO_Transfer_Direction */
Kojto 108:34e6b704fe68 134
Kojto 108:34e6b704fe68 135 uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
Kojto 108:34e6b704fe68 136 This parameter can be a value of @ref SDIO_Transfer_Type */
Kojto 108:34e6b704fe68 137
Kojto 108:34e6b704fe68 138 uint32_t DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
Kojto 108:34e6b704fe68 139 is enabled or disabled.
Kojto 108:34e6b704fe68 140 This parameter can be a value of @ref SDIO_DPSM_State */
Kojto 108:34e6b704fe68 141 }SDIO_DataInitTypeDef;
Kojto 108:34e6b704fe68 142
Kojto 108:34e6b704fe68 143 /**
Kojto 108:34e6b704fe68 144 * @}
Kojto 108:34e6b704fe68 145 */
Kojto 108:34e6b704fe68 146
Kojto 108:34e6b704fe68 147 /* Exported constants --------------------------------------------------------*/
Kojto 108:34e6b704fe68 148 /** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants
Kojto 108:34e6b704fe68 149 * @{
Kojto 108:34e6b704fe68 150 */
Kojto 108:34e6b704fe68 151
Kojto 108:34e6b704fe68 152 /** @defgroup SDIO_Clock_Edge Clock Edge
Kojto 108:34e6b704fe68 153 * @{
Kojto 108:34e6b704fe68 154 */
Kojto 108:34e6b704fe68 155 #define SDIO_CLOCK_EDGE_RISING ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 156 #define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE
Kojto 108:34e6b704fe68 157
Kojto 108:34e6b704fe68 158 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) || \
Kojto 108:34e6b704fe68 159 ((EDGE) == SDIO_CLOCK_EDGE_FALLING))
Kojto 108:34e6b704fe68 160 /**
Kojto 108:34e6b704fe68 161 * @}
Kojto 108:34e6b704fe68 162 */
Kojto 108:34e6b704fe68 163
Kojto 108:34e6b704fe68 164 /** @defgroup SDIO_Clock_Bypass Clock Bypass
Kojto 108:34e6b704fe68 165 * @{
Kojto 108:34e6b704fe68 166 */
Kojto 108:34e6b704fe68 167 #define SDIO_CLOCK_BYPASS_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 168 #define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS
Kojto 108:34e6b704fe68 169
Kojto 108:34e6b704fe68 170 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) || \
Kojto 108:34e6b704fe68 171 ((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE))
Kojto 108:34e6b704fe68 172 /**
Kojto 108:34e6b704fe68 173 * @}
Kojto 108:34e6b704fe68 174 */
Kojto 108:34e6b704fe68 175
Kojto 108:34e6b704fe68 176 /** @defgroup SDIO_Clock_Power_Save Clock Power Saving
Kojto 108:34e6b704fe68 177 * @{
Kojto 108:34e6b704fe68 178 */
Kojto 108:34e6b704fe68 179 #define SDIO_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 180 #define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV
Kojto 108:34e6b704fe68 181
Kojto 108:34e6b704fe68 182 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) || \
Kojto 108:34e6b704fe68 183 ((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE))
Kojto 108:34e6b704fe68 184 /**
Kojto 108:34e6b704fe68 185 * @}
Kojto 108:34e6b704fe68 186 */
Kojto 108:34e6b704fe68 187
Kojto 108:34e6b704fe68 188 /** @defgroup SDIO_Bus_Wide Bus Width
Kojto 108:34e6b704fe68 189 * @{
Kojto 108:34e6b704fe68 190 */
Kojto 108:34e6b704fe68 191 #define SDIO_BUS_WIDE_1B ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 192 #define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0
Kojto 108:34e6b704fe68 193 #define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1
Kojto 108:34e6b704fe68 194
Kojto 108:34e6b704fe68 195 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) || \
Kojto 108:34e6b704fe68 196 ((WIDE) == SDIO_BUS_WIDE_4B) || \
Kojto 108:34e6b704fe68 197 ((WIDE) == SDIO_BUS_WIDE_8B))
Kojto 108:34e6b704fe68 198 /**
Kojto 108:34e6b704fe68 199 * @}
Kojto 108:34e6b704fe68 200 */
Kojto 108:34e6b704fe68 201
Kojto 108:34e6b704fe68 202 /** @defgroup SDIO_Hardware_Flow_Control Hardware Flow Control
Kojto 108:34e6b704fe68 203 * @{
Kojto 108:34e6b704fe68 204 */
Kojto 108:34e6b704fe68 205 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 206 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN
Kojto 108:34e6b704fe68 207
Kojto 108:34e6b704fe68 208 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) || \
Kojto 108:34e6b704fe68 209 ((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE))
Kojto 108:34e6b704fe68 210 /**
Kojto 108:34e6b704fe68 211 * @}
Kojto 108:34e6b704fe68 212 */
Kojto 108:34e6b704fe68 213
Kojto 108:34e6b704fe68 214 /** @defgroup SDIO_Clock_Division Clock Division
Kojto 108:34e6b704fe68 215 * @{
Kojto 108:34e6b704fe68 216 */
Kojto 108:34e6b704fe68 217 #define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFF)
Kojto 108:34e6b704fe68 218 /**
Kojto 108:34e6b704fe68 219 * @}
Kojto 108:34e6b704fe68 220 */
Kojto 108:34e6b704fe68 221
Kojto 108:34e6b704fe68 222 /** @defgroup SDIO_Command_Index Command Index
Kojto 108:34e6b704fe68 223 * @{
Kojto 108:34e6b704fe68 224 */
Kojto 108:34e6b704fe68 225 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
Kojto 108:34e6b704fe68 226 /**
Kojto 108:34e6b704fe68 227 * @}
Kojto 108:34e6b704fe68 228 */
Kojto 108:34e6b704fe68 229
Kojto 108:34e6b704fe68 230 /** @defgroup SDIO_Response_Type Response Type
Kojto 108:34e6b704fe68 231 * @{
Kojto 108:34e6b704fe68 232 */
Kojto 108:34e6b704fe68 233 #define SDIO_RESPONSE_NO ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 234 #define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0
Kojto 108:34e6b704fe68 235 #define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP
Kojto 108:34e6b704fe68 236
Kojto 108:34e6b704fe68 237 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) || \
Kojto 108:34e6b704fe68 238 ((RESPONSE) == SDIO_RESPONSE_SHORT) || \
Kojto 108:34e6b704fe68 239 ((RESPONSE) == SDIO_RESPONSE_LONG))
Kojto 108:34e6b704fe68 240 /**
Kojto 108:34e6b704fe68 241 * @}
Kojto 108:34e6b704fe68 242 */
Kojto 108:34e6b704fe68 243
Kojto 108:34e6b704fe68 244 /** @defgroup SDIO_Wait_Interrupt_State Wait Interrupt
Kojto 108:34e6b704fe68 245 * @{
Kojto 108:34e6b704fe68 246 */
Kojto 108:34e6b704fe68 247 #define SDIO_WAIT_NO ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 248 #define SDIO_WAIT_IT SDIO_CMD_WAITINT
Kojto 108:34e6b704fe68 249 #define SDIO_WAIT_PEND SDIO_CMD_WAITPEND
Kojto 108:34e6b704fe68 250
Kojto 108:34e6b704fe68 251 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || \
Kojto 108:34e6b704fe68 252 ((WAIT) == SDIO_WAIT_IT) || \
Kojto 108:34e6b704fe68 253 ((WAIT) == SDIO_WAIT_PEND))
Kojto 108:34e6b704fe68 254 /**
Kojto 108:34e6b704fe68 255 * @}
Kojto 108:34e6b704fe68 256 */
Kojto 108:34e6b704fe68 257
Kojto 108:34e6b704fe68 258 /** @defgroup SDIO_CPSM_State CPSM State
Kojto 108:34e6b704fe68 259 * @{
Kojto 108:34e6b704fe68 260 */
Kojto 108:34e6b704fe68 261 #define SDIO_CPSM_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 262 #define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN
Kojto 108:34e6b704fe68 263
Kojto 108:34e6b704fe68 264 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) || \
Kojto 108:34e6b704fe68 265 ((CPSM) == SDIO_CPSM_ENABLE))
Kojto 108:34e6b704fe68 266 /**
Kojto 108:34e6b704fe68 267 * @}
Kojto 108:34e6b704fe68 268 */
Kojto 108:34e6b704fe68 269
Kojto 108:34e6b704fe68 270 /** @defgroup SDIO_Response_Registers Response Register
Kojto 108:34e6b704fe68 271 * @{
Kojto 108:34e6b704fe68 272 */
Kojto 108:34e6b704fe68 273 #define SDIO_RESP1 ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 274 #define SDIO_RESP2 ((uint32_t)0x00000004)
Kojto 108:34e6b704fe68 275 #define SDIO_RESP3 ((uint32_t)0x00000008)
Kojto 108:34e6b704fe68 276 #define SDIO_RESP4 ((uint32_t)0x0000000C)
Kojto 108:34e6b704fe68 277
Kojto 108:34e6b704fe68 278 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || \
Kojto 108:34e6b704fe68 279 ((RESP) == SDIO_RESP2) || \
Kojto 108:34e6b704fe68 280 ((RESP) == SDIO_RESP3) || \
Kojto 108:34e6b704fe68 281 ((RESP) == SDIO_RESP4))
Kojto 108:34e6b704fe68 282 /**
Kojto 108:34e6b704fe68 283 * @}
Kojto 108:34e6b704fe68 284 */
Kojto 108:34e6b704fe68 285
Kojto 108:34e6b704fe68 286 /** @defgroup SDIO_Data_Length Data Lenght
Kojto 108:34e6b704fe68 287 * @{
Kojto 108:34e6b704fe68 288 */
Kojto 108:34e6b704fe68 289 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
Kojto 108:34e6b704fe68 290 /**
Kojto 108:34e6b704fe68 291 * @}
Kojto 108:34e6b704fe68 292 */
Kojto 108:34e6b704fe68 293
Kojto 108:34e6b704fe68 294 /** @defgroup SDIO_Data_Block_Size Data Block Size
Kojto 108:34e6b704fe68 295 * @{
Kojto 108:34e6b704fe68 296 */
Kojto 108:34e6b704fe68 297 #define SDIO_DATABLOCK_SIZE_1B ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 298 #define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0
Kojto 108:34e6b704fe68 299 #define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1
Kojto 108:34e6b704fe68 300 #define SDIO_DATABLOCK_SIZE_8B ((uint32_t)0x00000030)
Kojto 108:34e6b704fe68 301 #define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2
Kojto 108:34e6b704fe68 302 #define SDIO_DATABLOCK_SIZE_32B ((uint32_t)0x00000050)
Kojto 108:34e6b704fe68 303 #define SDIO_DATABLOCK_SIZE_64B ((uint32_t)0x00000060)
Kojto 108:34e6b704fe68 304 #define SDIO_DATABLOCK_SIZE_128B ((uint32_t)0x00000070)
Kojto 108:34e6b704fe68 305 #define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3
Kojto 108:34e6b704fe68 306 #define SDIO_DATABLOCK_SIZE_512B ((uint32_t)0x00000090)
Kojto 108:34e6b704fe68 307 #define SDIO_DATABLOCK_SIZE_1024B ((uint32_t)0x000000A0)
Kojto 108:34e6b704fe68 308 #define SDIO_DATABLOCK_SIZE_2048B ((uint32_t)0x000000B0)
Kojto 108:34e6b704fe68 309 #define SDIO_DATABLOCK_SIZE_4096B ((uint32_t)0x000000C0)
Kojto 108:34e6b704fe68 310 #define SDIO_DATABLOCK_SIZE_8192B ((uint32_t)0x000000D0)
Kojto 108:34e6b704fe68 311 #define SDIO_DATABLOCK_SIZE_16384B ((uint32_t)0x000000E0)
Kojto 108:34e6b704fe68 312
Kojto 108:34e6b704fe68 313 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) || \
Kojto 108:34e6b704fe68 314 ((SIZE) == SDIO_DATABLOCK_SIZE_2B) || \
Kojto 108:34e6b704fe68 315 ((SIZE) == SDIO_DATABLOCK_SIZE_4B) || \
Kojto 108:34e6b704fe68 316 ((SIZE) == SDIO_DATABLOCK_SIZE_8B) || \
Kojto 108:34e6b704fe68 317 ((SIZE) == SDIO_DATABLOCK_SIZE_16B) || \
Kojto 108:34e6b704fe68 318 ((SIZE) == SDIO_DATABLOCK_SIZE_32B) || \
Kojto 108:34e6b704fe68 319 ((SIZE) == SDIO_DATABLOCK_SIZE_64B) || \
Kojto 108:34e6b704fe68 320 ((SIZE) == SDIO_DATABLOCK_SIZE_128B) || \
Kojto 108:34e6b704fe68 321 ((SIZE) == SDIO_DATABLOCK_SIZE_256B) || \
Kojto 108:34e6b704fe68 322 ((SIZE) == SDIO_DATABLOCK_SIZE_512B) || \
Kojto 108:34e6b704fe68 323 ((SIZE) == SDIO_DATABLOCK_SIZE_1024B) || \
Kojto 108:34e6b704fe68 324 ((SIZE) == SDIO_DATABLOCK_SIZE_2048B) || \
Kojto 108:34e6b704fe68 325 ((SIZE) == SDIO_DATABLOCK_SIZE_4096B) || \
Kojto 108:34e6b704fe68 326 ((SIZE) == SDIO_DATABLOCK_SIZE_8192B) || \
Kojto 108:34e6b704fe68 327 ((SIZE) == SDIO_DATABLOCK_SIZE_16384B))
Kojto 108:34e6b704fe68 328 /**
Kojto 108:34e6b704fe68 329 * @}
Kojto 108:34e6b704fe68 330 */
Kojto 108:34e6b704fe68 331
Kojto 108:34e6b704fe68 332 /** @defgroup SDIO_Transfer_Direction Transfer Direction
Kojto 108:34e6b704fe68 333 * @{
Kojto 108:34e6b704fe68 334 */
Kojto 108:34e6b704fe68 335 #define SDIO_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 336 #define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR
Kojto 108:34e6b704fe68 337
Kojto 108:34e6b704fe68 338 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) || \
Kojto 108:34e6b704fe68 339 ((DIR) == SDIO_TRANSFER_DIR_TO_SDIO))
Kojto 108:34e6b704fe68 340 /**
Kojto 108:34e6b704fe68 341 * @}
Kojto 108:34e6b704fe68 342 */
Kojto 108:34e6b704fe68 343
Kojto 108:34e6b704fe68 344 /** @defgroup SDIO_Transfer_Type Transfer Type
Kojto 108:34e6b704fe68 345 * @{
Kojto 108:34e6b704fe68 346 */
Kojto 108:34e6b704fe68 347 #define SDIO_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 348 #define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE
Kojto 108:34e6b704fe68 349
Kojto 108:34e6b704fe68 350 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) || \
Kojto 108:34e6b704fe68 351 ((MODE) == SDIO_TRANSFER_MODE_STREAM))
Kojto 108:34e6b704fe68 352 /**
Kojto 108:34e6b704fe68 353 * @}
Kojto 108:34e6b704fe68 354 */
Kojto 108:34e6b704fe68 355
Kojto 108:34e6b704fe68 356 /** @defgroup SDIO_DPSM_State DPSM State
Kojto 108:34e6b704fe68 357 * @{
Kojto 108:34e6b704fe68 358 */
Kojto 108:34e6b704fe68 359 #define SDIO_DPSM_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 360 #define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN
Kojto 108:34e6b704fe68 361
Kojto 108:34e6b704fe68 362 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) ||\
Kojto 108:34e6b704fe68 363 ((DPSM) == SDIO_DPSM_ENABLE))
Kojto 108:34e6b704fe68 364 /**
Kojto 108:34e6b704fe68 365 * @}
Kojto 108:34e6b704fe68 366 */
Kojto 108:34e6b704fe68 367
Kojto 108:34e6b704fe68 368 /** @defgroup SDIO_Read_Wait_Mode Read Wait Mode
Kojto 108:34e6b704fe68 369 * @{
Kojto 108:34e6b704fe68 370 */
Kojto 108:34e6b704fe68 371 #define SDIO_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 372 #define SDIO_READ_WAIT_MODE_CLK ((uint32_t)0x00000001)
Kojto 108:34e6b704fe68 373
Kojto 108:34e6b704fe68 374 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) || \
Kojto 108:34e6b704fe68 375 ((MODE) == SDIO_READ_WAIT_MODE_DATA2))
Kojto 108:34e6b704fe68 376 /**
Kojto 108:34e6b704fe68 377 * @}
Kojto 108:34e6b704fe68 378 */
Kojto 108:34e6b704fe68 379
Kojto 108:34e6b704fe68 380 /** @defgroup SDIO_Interrupt_sources Interrupt Sources
Kojto 108:34e6b704fe68 381 * @{
Kojto 108:34e6b704fe68 382 */
Kojto 108:34e6b704fe68 383 #define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL
Kojto 108:34e6b704fe68 384 #define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL
Kojto 108:34e6b704fe68 385 #define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT
Kojto 108:34e6b704fe68 386 #define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT
Kojto 108:34e6b704fe68 387 #define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR
Kojto 108:34e6b704fe68 388 #define SDIO_IT_RXOVERR SDIO_STA_RXOVERR
Kojto 108:34e6b704fe68 389 #define SDIO_IT_CMDREND SDIO_STA_CMDREND
Kojto 108:34e6b704fe68 390 #define SDIO_IT_CMDSENT SDIO_STA_CMDSENT
Kojto 108:34e6b704fe68 391 #define SDIO_IT_DATAEND SDIO_STA_DATAEND
Kojto 108:34e6b704fe68 392 #define SDIO_IT_STBITERR SDIO_STA_STBITERR
Kojto 108:34e6b704fe68 393 #define SDIO_IT_DBCKEND SDIO_STA_DBCKEND
Kojto 108:34e6b704fe68 394 #define SDIO_IT_CMDACT SDIO_STA_CMDACT
Kojto 108:34e6b704fe68 395 #define SDIO_IT_TXACT SDIO_STA_TXACT
Kojto 108:34e6b704fe68 396 #define SDIO_IT_RXACT SDIO_STA_RXACT
Kojto 108:34e6b704fe68 397 #define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE
Kojto 108:34e6b704fe68 398 #define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF
Kojto 108:34e6b704fe68 399 #define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF
Kojto 108:34e6b704fe68 400 #define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF
Kojto 108:34e6b704fe68 401 #define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE
Kojto 108:34e6b704fe68 402 #define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE
Kojto 108:34e6b704fe68 403 #define SDIO_IT_TXDAVL SDIO_STA_TXDAVL
Kojto 108:34e6b704fe68 404 #define SDIO_IT_RXDAVL SDIO_STA_RXDAVL
Kojto 108:34e6b704fe68 405 #define SDIO_IT_SDIOIT SDIO_STA_SDIOIT
Kojto 108:34e6b704fe68 406 #define SDIO_IT_CEATAEND SDIO_STA_CEATAEND
Kojto 108:34e6b704fe68 407 /**
Kojto 108:34e6b704fe68 408 * @}
Kojto 108:34e6b704fe68 409 */
Kojto 108:34e6b704fe68 410
Kojto 108:34e6b704fe68 411 /** @defgroup SDIO_Flags Flags
Kojto 108:34e6b704fe68 412 * @{
Kojto 108:34e6b704fe68 413 */
Kojto 108:34e6b704fe68 414 #define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL
Kojto 108:34e6b704fe68 415 #define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL
Kojto 108:34e6b704fe68 416 #define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT
Kojto 108:34e6b704fe68 417 #define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT
Kojto 108:34e6b704fe68 418 #define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR
Kojto 108:34e6b704fe68 419 #define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR
Kojto 108:34e6b704fe68 420 #define SDIO_FLAG_CMDREND SDIO_STA_CMDREND
Kojto 108:34e6b704fe68 421 #define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT
Kojto 108:34e6b704fe68 422 #define SDIO_FLAG_DATAEND SDIO_STA_DATAEND
Kojto 108:34e6b704fe68 423 #define SDIO_FLAG_STBITERR SDIO_STA_STBITERR
Kojto 108:34e6b704fe68 424 #define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND
Kojto 108:34e6b704fe68 425 #define SDIO_FLAG_CMDACT SDIO_STA_CMDACT
Kojto 108:34e6b704fe68 426 #define SDIO_FLAG_TXACT SDIO_STA_TXACT
Kojto 108:34e6b704fe68 427 #define SDIO_FLAG_RXACT SDIO_STA_RXACT
Kojto 108:34e6b704fe68 428 #define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE
Kojto 108:34e6b704fe68 429 #define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF
Kojto 108:34e6b704fe68 430 #define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF
Kojto 108:34e6b704fe68 431 #define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF
Kojto 108:34e6b704fe68 432 #define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE
Kojto 108:34e6b704fe68 433 #define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE
Kojto 108:34e6b704fe68 434 #define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL
Kojto 108:34e6b704fe68 435 #define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL
Kojto 108:34e6b704fe68 436 #define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT
Kojto 108:34e6b704fe68 437 #define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND
Kojto 108:34e6b704fe68 438 /**
Kojto 108:34e6b704fe68 439 * @}
Kojto 108:34e6b704fe68 440 */
Kojto 108:34e6b704fe68 441
Kojto 108:34e6b704fe68 442 /**
Kojto 108:34e6b704fe68 443 * @}
Kojto 108:34e6b704fe68 444 */
Kojto 108:34e6b704fe68 445 /* Exported macro ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 446 /** @defgroup SDMMC_LL_Exported_macros SDMMC_LL Exported Macros
Kojto 108:34e6b704fe68 447 * @{
Kojto 108:34e6b704fe68 448 */
Kojto 108:34e6b704fe68 449
Kojto 108:34e6b704fe68 450 /** @defgroup SDMMC_LL_Alias_Region Bit Address in the alias region
Kojto 108:34e6b704fe68 451 * @{
Kojto 108:34e6b704fe68 452 */
Kojto 108:34e6b704fe68 453 /* ------------ SDIO registers bit address in the alias region -------------- */
Kojto 108:34e6b704fe68 454 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
Kojto 108:34e6b704fe68 455
Kojto 108:34e6b704fe68 456 /* --- CLKCR Register ---*/
Kojto 108:34e6b704fe68 457 /* Alias word address of CLKEN bit */
Kojto 108:34e6b704fe68 458 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
Kojto 108:34e6b704fe68 459 #define CLKEN_BITNUMBER 0x08
Kojto 108:34e6b704fe68 460 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BITNUMBER * 4))
Kojto 108:34e6b704fe68 461
Kojto 108:34e6b704fe68 462 /* --- CMD Register ---*/
Kojto 108:34e6b704fe68 463 /* Alias word address of SDIOSUSPEND bit */
Kojto 108:34e6b704fe68 464 #define CMD_OFFSET (SDIO_OFFSET + 0x0C)
Kojto 108:34e6b704fe68 465 #define SDIOSUSPEND_BITNUMBER 0x0B
Kojto 108:34e6b704fe68 466 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BITNUMBER * 4))
Kojto 108:34e6b704fe68 467
Kojto 108:34e6b704fe68 468 /* Alias word address of ENCMDCOMPL bit */
Kojto 108:34e6b704fe68 469 #define ENCMDCOMPL_BITNUMBER 0x0C
Kojto 108:34e6b704fe68 470 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BITNUMBER * 4))
Kojto 108:34e6b704fe68 471
Kojto 108:34e6b704fe68 472 /* Alias word address of NIEN bit */
Kojto 108:34e6b704fe68 473 #define NIEN_BITNUMBER 0x0D
Kojto 108:34e6b704fe68 474 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BITNUMBER * 4))
Kojto 108:34e6b704fe68 475
Kojto 108:34e6b704fe68 476 /* Alias word address of ATACMD bit */
Kojto 108:34e6b704fe68 477 #define ATACMD_BITNUMBER 0x0E
Kojto 108:34e6b704fe68 478 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BITNUMBER * 4))
Kojto 108:34e6b704fe68 479
Kojto 108:34e6b704fe68 480 /* --- DCTRL Register ---*/
Kojto 108:34e6b704fe68 481 /* Alias word address of DMAEN bit */
Kojto 108:34e6b704fe68 482 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
Kojto 108:34e6b704fe68 483 #define DMAEN_BITNUMBER 0x03
Kojto 108:34e6b704fe68 484 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BITNUMBER * 4))
Kojto 108:34e6b704fe68 485
Kojto 108:34e6b704fe68 486 /* Alias word address of RWSTART bit */
Kojto 108:34e6b704fe68 487 #define RWSTART_BITNUMBER 0x08
Kojto 108:34e6b704fe68 488 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BITNUMBER * 4))
Kojto 108:34e6b704fe68 489
Kojto 108:34e6b704fe68 490 /* Alias word address of RWSTOP bit */
Kojto 108:34e6b704fe68 491 #define RWSTOP_BITNUMBER 0x09
Kojto 108:34e6b704fe68 492 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BITNUMBER * 4))
Kojto 108:34e6b704fe68 493
Kojto 108:34e6b704fe68 494 /* Alias word address of RWMOD bit */
Kojto 108:34e6b704fe68 495 #define RWMOD_BITNUMBER 0x0A
Kojto 108:34e6b704fe68 496 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BITNUMBER * 4))
Kojto 108:34e6b704fe68 497
Kojto 108:34e6b704fe68 498 /* Alias word address of SDIOEN bit */
Kojto 108:34e6b704fe68 499 #define SDIOEN_BITNUMBER 0x0B
Kojto 108:34e6b704fe68 500 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BITNUMBER * 4))
Kojto 108:34e6b704fe68 501 /**
Kojto 108:34e6b704fe68 502 * @}
Kojto 108:34e6b704fe68 503 */
Kojto 108:34e6b704fe68 504
Kojto 108:34e6b704fe68 505 /** @defgroup SDMMC_LL_Register Bits And Addresses Definitions
Kojto 108:34e6b704fe68 506 * @brief SDMMC_LL registers bit address in the alias region
Kojto 108:34e6b704fe68 507 * @{
Kojto 108:34e6b704fe68 508 */
Kojto 108:34e6b704fe68 509
Kojto 108:34e6b704fe68 510 /* ---------------------- SDIO registers bit mask --------------------------- */
Kojto 108:34e6b704fe68 511 /* --- CLKCR Register ---*/
Kojto 108:34e6b704fe68 512 /* CLKCR register clear mask */
Kojto 108:34e6b704fe68 513 #define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV | SDIO_CLKCR_PWRSAV |\
Kojto 108:34e6b704fe68 514 SDIO_CLKCR_BYPASS | SDIO_CLKCR_WIDBUS |\
Kojto 108:34e6b704fe68 515 SDIO_CLKCR_NEGEDGE | SDIO_CLKCR_HWFC_EN))
Kojto 108:34e6b704fe68 516
Kojto 108:34e6b704fe68 517 /* --- PWRCTRL Register ---*/
Kojto 108:34e6b704fe68 518 /* --- DCTRL Register ---*/
Kojto 108:34e6b704fe68 519 /* SDIO DCTRL Clear Mask */
Kojto 108:34e6b704fe68 520 #define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN | SDIO_DCTRL_DTDIR |\
Kojto 108:34e6b704fe68 521 SDIO_DCTRL_DTMODE | SDIO_DCTRL_DBLOCKSIZE))
Kojto 108:34e6b704fe68 522
Kojto 108:34e6b704fe68 523 /* --- CMD Register ---*/
Kojto 108:34e6b704fe68 524 /* CMD Register clear mask */
Kojto 108:34e6b704fe68 525 #define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX | SDIO_CMD_WAITRESP |\
Kojto 108:34e6b704fe68 526 SDIO_CMD_WAITINT | SDIO_CMD_WAITPEND |\
Kojto 108:34e6b704fe68 527 SDIO_CMD_CPSMEN | SDIO_CMD_SDIOSUSPEND))
Kojto 108:34e6b704fe68 528
Kojto 108:34e6b704fe68 529 /* SDIO RESP Registers Address */
Kojto 108:34e6b704fe68 530 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
Kojto 108:34e6b704fe68 531
Kojto 108:34e6b704fe68 532 /* SDIO Initialization Frequency (400KHz max) */
Kojto 108:34e6b704fe68 533 #define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
Kojto 108:34e6b704fe68 534
Kojto 108:34e6b704fe68 535 /* SDIO Data Transfer Frequency (25MHz max) */
Kojto 108:34e6b704fe68 536 #define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0)
Kojto 108:34e6b704fe68 537 /**
Kojto 108:34e6b704fe68 538 * @}
Kojto 108:34e6b704fe68 539 */
Kojto 108:34e6b704fe68 540
Kojto 108:34e6b704fe68 541 /** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration
Kojto 108:34e6b704fe68 542 * @brief macros to handle interrupts and specific clock configurations
Kojto 108:34e6b704fe68 543 * @{
Kojto 108:34e6b704fe68 544 */
Kojto 108:34e6b704fe68 545
Kojto 108:34e6b704fe68 546 /**
Kojto 108:34e6b704fe68 547 * @brief Enable the SDIO device.
Kojto 108:34e6b704fe68 548 * @retval None
Kojto 108:34e6b704fe68 549 */
Kojto 108:34e6b704fe68 550 #define __SDIO_ENABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
Kojto 108:34e6b704fe68 551
Kojto 108:34e6b704fe68 552 /**
Kojto 108:34e6b704fe68 553 * @brief Disable the SDIO device.
Kojto 108:34e6b704fe68 554 * @retval None
Kojto 108:34e6b704fe68 555 */
Kojto 108:34e6b704fe68 556 #define __SDIO_DISABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
Kojto 108:34e6b704fe68 557
Kojto 108:34e6b704fe68 558 /**
Kojto 108:34e6b704fe68 559 * @brief Enable the SDIO DMA transfer.
Kojto 108:34e6b704fe68 560 * @retval None
Kojto 108:34e6b704fe68 561 */
Kojto 108:34e6b704fe68 562 #define __SDIO_DMA_ENABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
Kojto 108:34e6b704fe68 563
Kojto 108:34e6b704fe68 564 /**
Kojto 108:34e6b704fe68 565 * @brief Disable the SDIO DMA transfer.
Kojto 108:34e6b704fe68 566 * @retval None
Kojto 108:34e6b704fe68 567 */
Kojto 108:34e6b704fe68 568 #define __SDIO_DMA_DISABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
Kojto 108:34e6b704fe68 569
Kojto 108:34e6b704fe68 570 /**
Kojto 108:34e6b704fe68 571 * @brief Enable the SDIO device interrupt.
Kojto 108:34e6b704fe68 572 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 108:34e6b704fe68 573 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be enabled.
Kojto 108:34e6b704fe68 574 * This parameter can be one or a combination of the following values:
Kojto 108:34e6b704fe68 575 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 576 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 577 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 108:34e6b704fe68 578 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 108:34e6b704fe68 579 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 108:34e6b704fe68 580 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 108:34e6b704fe68 581 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 582 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 108:34e6b704fe68 583 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 108:34e6b704fe68 584 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 108:34e6b704fe68 585 * bus mode interrupt
Kojto 108:34e6b704fe68 586 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 587 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 108:34e6b704fe68 588 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 108:34e6b704fe68 589 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 108:34e6b704fe68 590 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 108:34e6b704fe68 591 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 108:34e6b704fe68 592 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 108:34e6b704fe68 593 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 108:34e6b704fe68 594 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 108:34e6b704fe68 595 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 108:34e6b704fe68 596 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 108:34e6b704fe68 597 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 108:34e6b704fe68 598 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 108:34e6b704fe68 599 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 108:34e6b704fe68 600 * @retval None
Kojto 108:34e6b704fe68 601 */
Kojto 108:34e6b704fe68 602 #define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__))
Kojto 108:34e6b704fe68 603
Kojto 108:34e6b704fe68 604 /**
Kojto 108:34e6b704fe68 605 * @brief Disable the SDIO device interrupt.
Kojto 108:34e6b704fe68 606 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 108:34e6b704fe68 607 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be disabled.
Kojto 108:34e6b704fe68 608 * This parameter can be one or a combination of the following values:
Kojto 108:34e6b704fe68 609 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 610 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 611 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 108:34e6b704fe68 612 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 108:34e6b704fe68 613 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 108:34e6b704fe68 614 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 108:34e6b704fe68 615 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 616 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 108:34e6b704fe68 617 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 108:34e6b704fe68 618 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 108:34e6b704fe68 619 * bus mode interrupt
Kojto 108:34e6b704fe68 620 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 621 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 108:34e6b704fe68 622 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 108:34e6b704fe68 623 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 108:34e6b704fe68 624 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 108:34e6b704fe68 625 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 108:34e6b704fe68 626 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 108:34e6b704fe68 627 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 108:34e6b704fe68 628 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 108:34e6b704fe68 629 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 108:34e6b704fe68 630 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 108:34e6b704fe68 631 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 108:34e6b704fe68 632 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 108:34e6b704fe68 633 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 108:34e6b704fe68 634 * @retval None
Kojto 108:34e6b704fe68 635 */
Kojto 108:34e6b704fe68 636 #define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
Kojto 108:34e6b704fe68 637
Kojto 108:34e6b704fe68 638 /**
Kojto 108:34e6b704fe68 639 * @brief Checks whether the specified SDIO flag is set or not.
Kojto 108:34e6b704fe68 640 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 108:34e6b704fe68 641 * @param __FLAG__: specifies the flag to check.
Kojto 108:34e6b704fe68 642 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 643 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
Kojto 108:34e6b704fe68 644 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
Kojto 108:34e6b704fe68 645 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
Kojto 108:34e6b704fe68 646 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
Kojto 108:34e6b704fe68 647 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
Kojto 108:34e6b704fe68 648 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
Kojto 108:34e6b704fe68 649 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
Kojto 108:34e6b704fe68 650 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
Kojto 108:34e6b704fe68 651 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Kojto 108:34e6b704fe68 652 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
Kojto 108:34e6b704fe68 653 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
Kojto 108:34e6b704fe68 654 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
Kojto 108:34e6b704fe68 655 * @arg SDIO_FLAG_TXACT: Data transmit in progress
Kojto 108:34e6b704fe68 656 * @arg SDIO_FLAG_RXACT: Data receive in progress
Kojto 108:34e6b704fe68 657 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
Kojto 108:34e6b704fe68 658 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
Kojto 108:34e6b704fe68 659 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
Kojto 108:34e6b704fe68 660 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
Kojto 108:34e6b704fe68 661 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
Kojto 108:34e6b704fe68 662 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
Kojto 108:34e6b704fe68 663 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
Kojto 108:34e6b704fe68 664 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
Kojto 108:34e6b704fe68 665 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
Kojto 108:34e6b704fe68 666 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 108:34e6b704fe68 667 * @retval The new state of SDIO_FLAG (SET or RESET).
Kojto 108:34e6b704fe68 668 */
Kojto 108:34e6b704fe68 669 #define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
Kojto 108:34e6b704fe68 670
Kojto 108:34e6b704fe68 671
Kojto 108:34e6b704fe68 672 /**
Kojto 108:34e6b704fe68 673 * @brief Clears the SDIO pending flags.
Kojto 108:34e6b704fe68 674 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 108:34e6b704fe68 675 * @param __FLAG__: specifies the flag to clear.
Kojto 108:34e6b704fe68 676 * This parameter can be one or a combination of the following values:
Kojto 108:34e6b704fe68 677 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
Kojto 108:34e6b704fe68 678 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
Kojto 108:34e6b704fe68 679 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
Kojto 108:34e6b704fe68 680 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
Kojto 108:34e6b704fe68 681 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
Kojto 108:34e6b704fe68 682 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
Kojto 108:34e6b704fe68 683 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
Kojto 108:34e6b704fe68 684 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
Kojto 108:34e6b704fe68 685 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Kojto 108:34e6b704fe68 686 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
Kojto 108:34e6b704fe68 687 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
Kojto 108:34e6b704fe68 688 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
Kojto 108:34e6b704fe68 689 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 108:34e6b704fe68 690 * @retval None
Kojto 108:34e6b704fe68 691 */
Kojto 108:34e6b704fe68 692 #define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__))
Kojto 108:34e6b704fe68 693
Kojto 108:34e6b704fe68 694 /**
Kojto 108:34e6b704fe68 695 * @brief Checks whether the specified SDIO interrupt has occurred or not.
Kojto 108:34e6b704fe68 696 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 108:34e6b704fe68 697 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
Kojto 108:34e6b704fe68 698 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 699 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 700 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 701 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 108:34e6b704fe68 702 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 108:34e6b704fe68 703 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 108:34e6b704fe68 704 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 108:34e6b704fe68 705 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 706 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 108:34e6b704fe68 707 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 108:34e6b704fe68 708 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 108:34e6b704fe68 709 * bus mode interrupt
Kojto 108:34e6b704fe68 710 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 711 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 108:34e6b704fe68 712 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 108:34e6b704fe68 713 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 108:34e6b704fe68 714 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 108:34e6b704fe68 715 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 108:34e6b704fe68 716 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 108:34e6b704fe68 717 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 108:34e6b704fe68 718 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 108:34e6b704fe68 719 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 108:34e6b704fe68 720 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 108:34e6b704fe68 721 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 108:34e6b704fe68 722 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 108:34e6b704fe68 723 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 108:34e6b704fe68 724 * @retval The new state of SDIO_IT (SET or RESET).
Kojto 108:34e6b704fe68 725 */
Kojto 108:34e6b704fe68 726 #define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
Kojto 108:34e6b704fe68 727
Kojto 108:34e6b704fe68 728 /**
Kojto 108:34e6b704fe68 729 * @brief Clears the SDIO's interrupt pending bits.
Kojto 108:34e6b704fe68 730 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 108:34e6b704fe68 731 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
Kojto 108:34e6b704fe68 732 * This parameter can be one or a combination of the following values:
Kojto 108:34e6b704fe68 733 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 734 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 108:34e6b704fe68 735 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 108:34e6b704fe68 736 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 108:34e6b704fe68 737 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 108:34e6b704fe68 738 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 108:34e6b704fe68 739 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 108:34e6b704fe68 740 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 108:34e6b704fe68 741 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
Kojto 108:34e6b704fe68 742 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 108:34e6b704fe68 743 * bus mode interrupt
Kojto 108:34e6b704fe68 744 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 108:34e6b704fe68 745 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 108:34e6b704fe68 746 * @retval None
Kojto 108:34e6b704fe68 747 */
Kojto 108:34e6b704fe68 748 #define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__))
Kojto 108:34e6b704fe68 749
Kojto 108:34e6b704fe68 750 /**
Kojto 108:34e6b704fe68 751 * @brief Enable Start the SD I/O Read Wait operation.
Kojto 108:34e6b704fe68 752 * @retval None
Kojto 108:34e6b704fe68 753 */
Kojto 108:34e6b704fe68 754 #define __SDIO_START_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
Kojto 108:34e6b704fe68 755
Kojto 108:34e6b704fe68 756 /**
Kojto 108:34e6b704fe68 757 * @brief Disable Start the SD I/O Read Wait operations.
Kojto 108:34e6b704fe68 758 * @retval None
Kojto 108:34e6b704fe68 759 */
Kojto 108:34e6b704fe68 760 #define __SDIO_START_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
Kojto 108:34e6b704fe68 761
Kojto 108:34e6b704fe68 762 /**
Kojto 108:34e6b704fe68 763 * @brief Enable Start the SD I/O Read Wait operation.
Kojto 108:34e6b704fe68 764 * @retval None
Kojto 108:34e6b704fe68 765 */
Kojto 108:34e6b704fe68 766 #define __SDIO_STOP_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
Kojto 108:34e6b704fe68 767
Kojto 108:34e6b704fe68 768 /**
Kojto 108:34e6b704fe68 769 * @brief Disable Stop the SD I/O Read Wait operations.
Kojto 108:34e6b704fe68 770 * @retval None
Kojto 108:34e6b704fe68 771 */
Kojto 108:34e6b704fe68 772 #define __SDIO_STOP_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
Kojto 108:34e6b704fe68 773
Kojto 108:34e6b704fe68 774 /**
Kojto 108:34e6b704fe68 775 * @brief Enable the SD I/O Mode Operation.
Kojto 108:34e6b704fe68 776 * @retval None
Kojto 108:34e6b704fe68 777 */
Kojto 108:34e6b704fe68 778 #define __SDIO_OPERATION_ENABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
Kojto 108:34e6b704fe68 779
Kojto 108:34e6b704fe68 780 /**
Kojto 108:34e6b704fe68 781 * @brief Disable the SD I/O Mode Operation.
Kojto 108:34e6b704fe68 782 * @retval None
Kojto 108:34e6b704fe68 783 */
Kojto 108:34e6b704fe68 784 #define __SDIO_OPERATION_DISABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
Kojto 108:34e6b704fe68 785
Kojto 108:34e6b704fe68 786 /**
Kojto 108:34e6b704fe68 787 * @brief Enable the SD I/O Suspend command sending.
Kojto 108:34e6b704fe68 788 * @retval None
Kojto 108:34e6b704fe68 789 */
Kojto 108:34e6b704fe68 790 #define __SDIO_SUSPEND_CMD_ENABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
Kojto 108:34e6b704fe68 791
Kojto 108:34e6b704fe68 792 /**
Kojto 108:34e6b704fe68 793 * @brief Disable the SD I/O Suspend command sending.
Kojto 108:34e6b704fe68 794 * @retval None
Kojto 108:34e6b704fe68 795 */
Kojto 108:34e6b704fe68 796 #define __SDIO_SUSPEND_CMD_DISABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
Kojto 108:34e6b704fe68 797
Kojto 110:165afa46840b 798 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 110:165afa46840b 799 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 800 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
Kojto 108:34e6b704fe68 801 /**
Kojto 108:34e6b704fe68 802 * @brief Enable the command completion signal.
Kojto 108:34e6b704fe68 803 * @retval None
Kojto 108:34e6b704fe68 804 */
Kojto 108:34e6b704fe68 805 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
Kojto 108:34e6b704fe68 806
Kojto 108:34e6b704fe68 807 /**
Kojto 108:34e6b704fe68 808 * @brief Disable the command completion signal.
Kojto 108:34e6b704fe68 809 * @retval None
Kojto 108:34e6b704fe68 810 */
Kojto 108:34e6b704fe68 811 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
Kojto 108:34e6b704fe68 812
Kojto 108:34e6b704fe68 813 /**
Kojto 108:34e6b704fe68 814 * @brief Enable the CE-ATA interrupt.
Kojto 108:34e6b704fe68 815 * @retval None
Kojto 108:34e6b704fe68 816 */
Kojto 108:34e6b704fe68 817 #define __SDIO_CEATA_ENABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)0)
Kojto 108:34e6b704fe68 818
Kojto 108:34e6b704fe68 819 /**
Kojto 108:34e6b704fe68 820 * @brief Disable the CE-ATA interrupt.
Kojto 108:34e6b704fe68 821 * @retval None
Kojto 108:34e6b704fe68 822 */
Kojto 108:34e6b704fe68 823 #define __SDIO_CEATA_DISABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)1)
Kojto 108:34e6b704fe68 824
Kojto 108:34e6b704fe68 825 /**
Kojto 108:34e6b704fe68 826 * @brief Enable send CE-ATA command (CMD61).
Kojto 108:34e6b704fe68 827 * @retval None
Kojto 108:34e6b704fe68 828 */
Kojto 108:34e6b704fe68 829 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
Kojto 108:34e6b704fe68 830
Kojto 108:34e6b704fe68 831 /**
Kojto 108:34e6b704fe68 832 * @brief Disable send CE-ATA command (CMD61).
Kojto 108:34e6b704fe68 833 * @retval None
Kojto 108:34e6b704fe68 834 */
Kojto 108:34e6b704fe68 835 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
Kojto 110:165afa46840b 836 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE ||\
Kojto 110:165afa46840b 837 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
Kojto 108:34e6b704fe68 838 /**
Kojto 108:34e6b704fe68 839 * @}
Kojto 108:34e6b704fe68 840 */
Kojto 108:34e6b704fe68 841
Kojto 108:34e6b704fe68 842 /**
Kojto 108:34e6b704fe68 843 * @}
Kojto 108:34e6b704fe68 844 */
Kojto 108:34e6b704fe68 845
Kojto 108:34e6b704fe68 846 /* Exported functions --------------------------------------------------------*/
Kojto 108:34e6b704fe68 847 /** @addtogroup SDMMC_LL_Exported_Functions
Kojto 108:34e6b704fe68 848 * @{
Kojto 108:34e6b704fe68 849 */
Kojto 108:34e6b704fe68 850
Kojto 108:34e6b704fe68 851 /* Initialization/de-initialization functions **********************************/
Kojto 108:34e6b704fe68 852 /** @addtogroup HAL_SDMMC_LL_Group1
Kojto 108:34e6b704fe68 853 * @{
Kojto 108:34e6b704fe68 854 */
Kojto 108:34e6b704fe68 855 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init);
Kojto 108:34e6b704fe68 856 /**
Kojto 108:34e6b704fe68 857 * @}
Kojto 108:34e6b704fe68 858 */
Kojto 108:34e6b704fe68 859
Kojto 108:34e6b704fe68 860 /* I/O operation functions *****************************************************/
Kojto 108:34e6b704fe68 861 /** @addtogroup HAL_SDMMC_LL_Group2
Kojto 108:34e6b704fe68 862 * @{
Kojto 108:34e6b704fe68 863 */
Kojto 108:34e6b704fe68 864 /* Blocking mode: Polling */
Kojto 108:34e6b704fe68 865 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 866 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData);
Kojto 108:34e6b704fe68 867 /**
Kojto 108:34e6b704fe68 868 * @}
Kojto 108:34e6b704fe68 869 */
Kojto 108:34e6b704fe68 870
Kojto 108:34e6b704fe68 871 /* Peripheral Control functions ************************************************/
Kojto 108:34e6b704fe68 872 /** @addtogroup HAL_SDMMC_LL_Group3
Kojto 108:34e6b704fe68 873 * @{
Kojto 108:34e6b704fe68 874 */
Kojto 108:34e6b704fe68 875 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 876 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 877 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 878
Kojto 108:34e6b704fe68 879 /* Command path state machine (CPSM) management functions */
Kojto 108:34e6b704fe68 880 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
Kojto 108:34e6b704fe68 881 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 882 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
Kojto 108:34e6b704fe68 883
Kojto 108:34e6b704fe68 884 /* Data path state machine (DPSM) management functions */
Kojto 108:34e6b704fe68 885 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct);
Kojto 108:34e6b704fe68 886 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 887 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
Kojto 108:34e6b704fe68 888
Kojto 108:34e6b704fe68 889 /* SDIO IO Cards mode management functions */
Kojto 108:34e6b704fe68 890 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
Kojto 108:34e6b704fe68 891
Kojto 108:34e6b704fe68 892 /**
Kojto 108:34e6b704fe68 893 * @}
Kojto 108:34e6b704fe68 894 */
Kojto 108:34e6b704fe68 895
Kojto 108:34e6b704fe68 896 /**
Kojto 108:34e6b704fe68 897 * @}
Kojto 108:34e6b704fe68 898 */
Kojto 108:34e6b704fe68 899
Kojto 108:34e6b704fe68 900 /**
Kojto 108:34e6b704fe68 901 * @}
Kojto 108:34e6b704fe68 902 */
Kojto 108:34e6b704fe68 903
Kojto 108:34e6b704fe68 904 /**
Kojto 108:34e6b704fe68 905 * @}
Kojto 108:34e6b704fe68 906 */
Kojto 110:165afa46840b 907 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
Kojto 110:165afa46840b 908 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 909 #ifdef __cplusplus
Kojto 108:34e6b704fe68 910 }
Kojto 108:34e6b704fe68 911 #endif
Kojto 108:34e6b704fe68 912
Kojto 108:34e6b704fe68 913 #endif /* __STM32F4xx_LL_SDMMC_H */
Kojto 108:34e6b704fe68 914
Kojto 108:34e6b704fe68 915 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/