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TARGET_DISCO_F334C8/stm32f3xx_hal_dma.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
100:cbbeb26dbd92 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 100:cbbeb26dbd92 1 /**
Kojto 100:cbbeb26dbd92 2 ******************************************************************************
Kojto 100:cbbeb26dbd92 3 * @file stm32f3xx_hal_dma.h
Kojto 100:cbbeb26dbd92 4 * @author MCD Application Team
Kojto 100:cbbeb26dbd92 5 * @version V1.1.0
Kojto 100:cbbeb26dbd92 6 * @date 12-Sept-2014
Kojto 100:cbbeb26dbd92 7 * @brief Header file of DMA HAL module.
Kojto 100:cbbeb26dbd92 8 ******************************************************************************
Kojto 100:cbbeb26dbd92 9 * @attention
Kojto 100:cbbeb26dbd92 10 *
Kojto 100:cbbeb26dbd92 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 100:cbbeb26dbd92 12 *
Kojto 100:cbbeb26dbd92 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 100:cbbeb26dbd92 14 * are permitted provided that the following conditions are met:
Kojto 100:cbbeb26dbd92 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 100:cbbeb26dbd92 16 * this list of conditions and the following disclaimer.
Kojto 100:cbbeb26dbd92 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 100:cbbeb26dbd92 18 * this list of conditions and the following disclaimer in the documentation
Kojto 100:cbbeb26dbd92 19 * and/or other materials provided with the distribution.
Kojto 100:cbbeb26dbd92 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 100:cbbeb26dbd92 21 * may be used to endorse or promote products derived from this software
Kojto 100:cbbeb26dbd92 22 * without specific prior written permission.
Kojto 100:cbbeb26dbd92 23 *
Kojto 100:cbbeb26dbd92 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 100:cbbeb26dbd92 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 100:cbbeb26dbd92 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 100:cbbeb26dbd92 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 100:cbbeb26dbd92 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 100:cbbeb26dbd92 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 100:cbbeb26dbd92 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 100:cbbeb26dbd92 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 100:cbbeb26dbd92 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 100:cbbeb26dbd92 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 100:cbbeb26dbd92 34 *
Kojto 100:cbbeb26dbd92 35 ******************************************************************************
Kojto 100:cbbeb26dbd92 36 */
Kojto 100:cbbeb26dbd92 37
Kojto 100:cbbeb26dbd92 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 100:cbbeb26dbd92 39 #ifndef __STM32F3xx_HAL_DMA_H
Kojto 100:cbbeb26dbd92 40 #define __STM32F3xx_HAL_DMA_H
Kojto 100:cbbeb26dbd92 41
Kojto 100:cbbeb26dbd92 42 #ifdef __cplusplus
Kojto 100:cbbeb26dbd92 43 extern "C" {
Kojto 100:cbbeb26dbd92 44 #endif
Kojto 100:cbbeb26dbd92 45
Kojto 100:cbbeb26dbd92 46 /* Includes ------------------------------------------------------------------*/
Kojto 100:cbbeb26dbd92 47 #include "stm32f3xx_hal_def.h"
Kojto 100:cbbeb26dbd92 48
Kojto 100:cbbeb26dbd92 49 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 100:cbbeb26dbd92 50 * @{
Kojto 100:cbbeb26dbd92 51 */
Kojto 100:cbbeb26dbd92 52
Kojto 100:cbbeb26dbd92 53 /** @addtogroup DMA DMA HAL module driver
Kojto 100:cbbeb26dbd92 54 * @{
Kojto 100:cbbeb26dbd92 55 */
Kojto 100:cbbeb26dbd92 56
Kojto 100:cbbeb26dbd92 57 /* Exported types ------------------------------------------------------------*/
Kojto 100:cbbeb26dbd92 58 /** @defgroup DMA_Exported_Types DMA Exported Types
Kojto 100:cbbeb26dbd92 59 * @{
Kojto 100:cbbeb26dbd92 60 */
Kojto 100:cbbeb26dbd92 61
Kojto 100:cbbeb26dbd92 62 /**
Kojto 100:cbbeb26dbd92 63 * @brief DMA Configuration Structure definition
Kojto 100:cbbeb26dbd92 64 */
Kojto 100:cbbeb26dbd92 65 typedef struct
Kojto 100:cbbeb26dbd92 66 {
Kojto 100:cbbeb26dbd92 67 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 100:cbbeb26dbd92 68 from memory to memory or from peripheral to memory.
Kojto 100:cbbeb26dbd92 69 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 100:cbbeb26dbd92 70
Kojto 100:cbbeb26dbd92 71 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 100:cbbeb26dbd92 72 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 100:cbbeb26dbd92 73
Kojto 100:cbbeb26dbd92 74 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 100:cbbeb26dbd92 75 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 100:cbbeb26dbd92 76
Kojto 100:cbbeb26dbd92 77 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 100:cbbeb26dbd92 78 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 100:cbbeb26dbd92 79
Kojto 100:cbbeb26dbd92 80 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 100:cbbeb26dbd92 81 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 100:cbbeb26dbd92 82
Kojto 100:cbbeb26dbd92 83 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
Kojto 100:cbbeb26dbd92 84 This parameter can be a value of @ref DMA_mode
Kojto 100:cbbeb26dbd92 85 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 100:cbbeb26dbd92 86 data transfer is configured on the selected Channel */
Kojto 100:cbbeb26dbd92 87
Kojto 100:cbbeb26dbd92 88 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
Kojto 100:cbbeb26dbd92 89 This parameter can be a value of @ref DMA_Priority_level */
Kojto 100:cbbeb26dbd92 90
Kojto 100:cbbeb26dbd92 91 } DMA_InitTypeDef;
Kojto 100:cbbeb26dbd92 92
Kojto 100:cbbeb26dbd92 93 /**
Kojto 100:cbbeb26dbd92 94 * @brief DMA Configuration enumeration values definition
Kojto 100:cbbeb26dbd92 95 */
Kojto 100:cbbeb26dbd92 96 typedef enum
Kojto 100:cbbeb26dbd92 97 {
Kojto 100:cbbeb26dbd92 98 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
Kojto 100:cbbeb26dbd92 99 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
Kojto 100:cbbeb26dbd92 100
Kojto 100:cbbeb26dbd92 101 } DMA_ControlTypeDef;
Kojto 100:cbbeb26dbd92 102
Kojto 100:cbbeb26dbd92 103 /**
Kojto 100:cbbeb26dbd92 104 * @brief HAL DMA State structures definition
Kojto 100:cbbeb26dbd92 105 */
Kojto 100:cbbeb26dbd92 106 typedef enum
Kojto 100:cbbeb26dbd92 107 {
Kojto 100:cbbeb26dbd92 108 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 100:cbbeb26dbd92 109 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
Kojto 100:cbbeb26dbd92 110 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
Kojto 100:cbbeb26dbd92 111 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 100:cbbeb26dbd92 112 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 100:cbbeb26dbd92 113 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
Kojto 100:cbbeb26dbd92 114
Kojto 100:cbbeb26dbd92 115 }HAL_DMA_StateTypeDef;
Kojto 100:cbbeb26dbd92 116
Kojto 100:cbbeb26dbd92 117 /**
Kojto 100:cbbeb26dbd92 118 * @brief HAL DMA Error Code structure definition
Kojto 100:cbbeb26dbd92 119 */
Kojto 100:cbbeb26dbd92 120 typedef enum
Kojto 100:cbbeb26dbd92 121 {
Kojto 100:cbbeb26dbd92 122 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 100:cbbeb26dbd92 123 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
Kojto 100:cbbeb26dbd92 124
Kojto 100:cbbeb26dbd92 125 }HAL_DMA_LevelCompleteTypeDef;
Kojto 100:cbbeb26dbd92 126
Kojto 100:cbbeb26dbd92 127
Kojto 100:cbbeb26dbd92 128 /**
Kojto 100:cbbeb26dbd92 129 * @brief DMA handle Structure definition
Kojto 100:cbbeb26dbd92 130 */
Kojto 100:cbbeb26dbd92 131 typedef struct __DMA_HandleTypeDef
Kojto 100:cbbeb26dbd92 132 {
Kojto 100:cbbeb26dbd92 133 DMA_Channel_TypeDef *Instance; /*!< Register base address */
Kojto 100:cbbeb26dbd92 134
Kojto 100:cbbeb26dbd92 135 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 100:cbbeb26dbd92 136
Kojto 100:cbbeb26dbd92 137 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 100:cbbeb26dbd92 138
Kojto 100:cbbeb26dbd92 139 HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 100:cbbeb26dbd92 140
Kojto 100:cbbeb26dbd92 141 void *Parent; /*!< Parent object state */
Kojto 100:cbbeb26dbd92 142
Kojto 100:cbbeb26dbd92 143 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 100:cbbeb26dbd92 144
Kojto 100:cbbeb26dbd92 145 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 100:cbbeb26dbd92 146
Kojto 100:cbbeb26dbd92 147 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 100:cbbeb26dbd92 148
Kojto 100:cbbeb26dbd92 149 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 100:cbbeb26dbd92 150
Kojto 100:cbbeb26dbd92 151 } DMA_HandleTypeDef;
Kojto 100:cbbeb26dbd92 152 /**
Kojto 100:cbbeb26dbd92 153 * @}
Kojto 100:cbbeb26dbd92 154 */
Kojto 100:cbbeb26dbd92 155
Kojto 100:cbbeb26dbd92 156 /* Exported constants --------------------------------------------------------*/
Kojto 100:cbbeb26dbd92 157 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 100:cbbeb26dbd92 158 * @{
Kojto 100:cbbeb26dbd92 159 */
Kojto 100:cbbeb26dbd92 160
Kojto 100:cbbeb26dbd92 161 /** @defgroup DMA_Error_Code DMA Error Code
Kojto 100:cbbeb26dbd92 162 * @{
Kojto 100:cbbeb26dbd92 163 */
Kojto 100:cbbeb26dbd92 164 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 100:cbbeb26dbd92 165 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 100:cbbeb26dbd92 166 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 100:cbbeb26dbd92 167 /**
Kojto 100:cbbeb26dbd92 168 * @}
Kojto 100:cbbeb26dbd92 169 */
Kojto 100:cbbeb26dbd92 170
Kojto 100:cbbeb26dbd92 171
Kojto 100:cbbeb26dbd92 172 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
Kojto 100:cbbeb26dbd92 173 * @{
Kojto 100:cbbeb26dbd92 174 */
Kojto 100:cbbeb26dbd92 175 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 100:cbbeb26dbd92 176 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
Kojto 100:cbbeb26dbd92 177 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
Kojto 100:cbbeb26dbd92 178
Kojto 100:cbbeb26dbd92 179 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 100:cbbeb26dbd92 180 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 100:cbbeb26dbd92 181 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 100:cbbeb26dbd92 182 /**
Kojto 100:cbbeb26dbd92 183 * @}
Kojto 100:cbbeb26dbd92 184 */
Kojto 100:cbbeb26dbd92 185
Kojto 100:cbbeb26dbd92 186 /** @defgroup DMA_Data_buffer_size DMA Data buffer size
Kojto 100:cbbeb26dbd92 187 * @{
Kojto 100:cbbeb26dbd92 188 */
Kojto 100:cbbeb26dbd92 189 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 100:cbbeb26dbd92 190 /**
Kojto 100:cbbeb26dbd92 191 * @}
Kojto 100:cbbeb26dbd92 192 */
Kojto 100:cbbeb26dbd92 193
Kojto 100:cbbeb26dbd92 194 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
Kojto 100:cbbeb26dbd92 195 * @{
Kojto 100:cbbeb26dbd92 196 */
Kojto 100:cbbeb26dbd92 197 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
Kojto 100:cbbeb26dbd92 198 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
Kojto 100:cbbeb26dbd92 199
Kojto 100:cbbeb26dbd92 200 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 100:cbbeb26dbd92 201 ((STATE) == DMA_PINC_DISABLE))
Kojto 100:cbbeb26dbd92 202 /**
Kojto 100:cbbeb26dbd92 203 * @}
Kojto 100:cbbeb26dbd92 204 */
Kojto 100:cbbeb26dbd92 205
Kojto 100:cbbeb26dbd92 206 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
Kojto 100:cbbeb26dbd92 207 * @{
Kojto 100:cbbeb26dbd92 208 */
Kojto 100:cbbeb26dbd92 209 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
Kojto 100:cbbeb26dbd92 210 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
Kojto 100:cbbeb26dbd92 211
Kojto 100:cbbeb26dbd92 212 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 100:cbbeb26dbd92 213 ((STATE) == DMA_MINC_DISABLE))
Kojto 100:cbbeb26dbd92 214 /**
Kojto 100:cbbeb26dbd92 215 * @}
Kojto 100:cbbeb26dbd92 216 */
Kojto 100:cbbeb26dbd92 217
Kojto 100:cbbeb26dbd92 218 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
Kojto 100:cbbeb26dbd92 219 * @{
Kojto 100:cbbeb26dbd92 220 */
Kojto 100:cbbeb26dbd92 221 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
Kojto 100:cbbeb26dbd92 222 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
Kojto 100:cbbeb26dbd92 223 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
Kojto 100:cbbeb26dbd92 224
Kojto 100:cbbeb26dbd92 225 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 100:cbbeb26dbd92 226 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 100:cbbeb26dbd92 227 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 100:cbbeb26dbd92 228 /**
Kojto 100:cbbeb26dbd92 229 * @}
Kojto 100:cbbeb26dbd92 230 */
Kojto 100:cbbeb26dbd92 231
Kojto 100:cbbeb26dbd92 232
Kojto 100:cbbeb26dbd92 233 /** @defgroup DMA_Memory_data_size DMA Memory data size
Kojto 100:cbbeb26dbd92 234 * @{
Kojto 100:cbbeb26dbd92 235 */
Kojto 100:cbbeb26dbd92 236 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
Kojto 100:cbbeb26dbd92 237 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
Kojto 100:cbbeb26dbd92 238 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
Kojto 100:cbbeb26dbd92 239
Kojto 100:cbbeb26dbd92 240 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 100:cbbeb26dbd92 241 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 100:cbbeb26dbd92 242 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 100:cbbeb26dbd92 243 /**
Kojto 100:cbbeb26dbd92 244 * @}
Kojto 100:cbbeb26dbd92 245 */
Kojto 100:cbbeb26dbd92 246
Kojto 100:cbbeb26dbd92 247 /** @defgroup DMA_mode DMA mode
Kojto 100:cbbeb26dbd92 248 * @{
Kojto 100:cbbeb26dbd92 249 */
Kojto 100:cbbeb26dbd92 250 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
Kojto 100:cbbeb26dbd92 251 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
Kojto 100:cbbeb26dbd92 252
Kojto 100:cbbeb26dbd92 253 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 100:cbbeb26dbd92 254 ((MODE) == DMA_CIRCULAR))
Kojto 100:cbbeb26dbd92 255 /**
Kojto 100:cbbeb26dbd92 256 * @}
Kojto 100:cbbeb26dbd92 257 */
Kojto 100:cbbeb26dbd92 258
Kojto 100:cbbeb26dbd92 259 /** @defgroup DMA_Priority_level DMA Priority level
Kojto 100:cbbeb26dbd92 260 * @{
Kojto 100:cbbeb26dbd92 261 */
Kojto 100:cbbeb26dbd92 262 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
Kojto 100:cbbeb26dbd92 263 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
Kojto 100:cbbeb26dbd92 264 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
Kojto 100:cbbeb26dbd92 265 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
Kojto 100:cbbeb26dbd92 266
Kojto 100:cbbeb26dbd92 267 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 100:cbbeb26dbd92 268 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 100:cbbeb26dbd92 269 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 100:cbbeb26dbd92 270 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 100:cbbeb26dbd92 271 /**
Kojto 100:cbbeb26dbd92 272 * @}
Kojto 100:cbbeb26dbd92 273 */
Kojto 100:cbbeb26dbd92 274
Kojto 100:cbbeb26dbd92 275
Kojto 100:cbbeb26dbd92 276 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
Kojto 100:cbbeb26dbd92 277 * @{
Kojto 100:cbbeb26dbd92 278 */
Kojto 100:cbbeb26dbd92 279
Kojto 100:cbbeb26dbd92 280 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
Kojto 100:cbbeb26dbd92 281 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
Kojto 100:cbbeb26dbd92 282 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
Kojto 100:cbbeb26dbd92 283
Kojto 100:cbbeb26dbd92 284 /**
Kojto 100:cbbeb26dbd92 285 * @}
Kojto 100:cbbeb26dbd92 286 */
Kojto 100:cbbeb26dbd92 287
Kojto 100:cbbeb26dbd92 288 /** @defgroup DMA_flag_definitions DMA flag definitions
Kojto 100:cbbeb26dbd92 289 * @{
Kojto 100:cbbeb26dbd92 290 */
Kojto 100:cbbeb26dbd92 291
Kojto 100:cbbeb26dbd92 292 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
Kojto 100:cbbeb26dbd92 293 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
Kojto 100:cbbeb26dbd92 294 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
Kojto 100:cbbeb26dbd92 295 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
Kojto 100:cbbeb26dbd92 296 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
Kojto 100:cbbeb26dbd92 297 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
Kojto 100:cbbeb26dbd92 298 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
Kojto 100:cbbeb26dbd92 299 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
Kojto 100:cbbeb26dbd92 300 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
Kojto 100:cbbeb26dbd92 301 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
Kojto 100:cbbeb26dbd92 302 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
Kojto 100:cbbeb26dbd92 303 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
Kojto 100:cbbeb26dbd92 304 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
Kojto 100:cbbeb26dbd92 305 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
Kojto 100:cbbeb26dbd92 306 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
Kojto 100:cbbeb26dbd92 307 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
Kojto 100:cbbeb26dbd92 308 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
Kojto 100:cbbeb26dbd92 309 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
Kojto 100:cbbeb26dbd92 310 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
Kojto 100:cbbeb26dbd92 311 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
Kojto 100:cbbeb26dbd92 312 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
Kojto 100:cbbeb26dbd92 313 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
Kojto 100:cbbeb26dbd92 314 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
Kojto 100:cbbeb26dbd92 315 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
Kojto 100:cbbeb26dbd92 316 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
Kojto 100:cbbeb26dbd92 317 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
Kojto 100:cbbeb26dbd92 318 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
Kojto 100:cbbeb26dbd92 319 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
Kojto 100:cbbeb26dbd92 320
Kojto 100:cbbeb26dbd92 321
Kojto 100:cbbeb26dbd92 322 /**
Kojto 100:cbbeb26dbd92 323 * @}
Kojto 100:cbbeb26dbd92 324 */
Kojto 100:cbbeb26dbd92 325
Kojto 100:cbbeb26dbd92 326 /**
Kojto 100:cbbeb26dbd92 327 * @}
Kojto 100:cbbeb26dbd92 328 */
Kojto 100:cbbeb26dbd92 329
Kojto 100:cbbeb26dbd92 330 /* Exported macros -----------------------------------------------------------*/
Kojto 100:cbbeb26dbd92 331 /** @defgroup DMA_Exported_Macros DMA Exported Macros
Kojto 100:cbbeb26dbd92 332 * @{
Kojto 100:cbbeb26dbd92 333 */
Kojto 100:cbbeb26dbd92 334
Kojto 100:cbbeb26dbd92 335 /** @brief Reset DMA handle state
Kojto 100:cbbeb26dbd92 336 * @param __HANDLE__: DMA handle.
Kojto 100:cbbeb26dbd92 337 * @retval None
Kojto 100:cbbeb26dbd92 338 */
Kojto 100:cbbeb26dbd92 339 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 100:cbbeb26dbd92 340
Kojto 100:cbbeb26dbd92 341 /**
Kojto 100:cbbeb26dbd92 342 * @brief Enable the specified DMA Channel.
Kojto 100:cbbeb26dbd92 343 * @param __HANDLE__: DMA handle
Kojto 100:cbbeb26dbd92 344 * @retval None.
Kojto 100:cbbeb26dbd92 345 */
Kojto 100:cbbeb26dbd92 346 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
Kojto 100:cbbeb26dbd92 347
Kojto 100:cbbeb26dbd92 348 /**
Kojto 100:cbbeb26dbd92 349 * @brief Disable the specified DMA Channel.
Kojto 100:cbbeb26dbd92 350 * @param __HANDLE__: DMA handle
Kojto 100:cbbeb26dbd92 351 * @retval None.
Kojto 100:cbbeb26dbd92 352 */
Kojto 100:cbbeb26dbd92 353 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
Kojto 100:cbbeb26dbd92 354
Kojto 100:cbbeb26dbd92 355
Kojto 100:cbbeb26dbd92 356 /* Interrupt & Flag management */
Kojto 100:cbbeb26dbd92 357
Kojto 100:cbbeb26dbd92 358 /**
Kojto 100:cbbeb26dbd92 359 * @brief Enables the specified DMA Channel interrupts.
Kojto 100:cbbeb26dbd92 360 * @param __HANDLE__: DMA handle
Kojto 100:cbbeb26dbd92 361 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 100:cbbeb26dbd92 362 * This parameter can be any combination of the following values:
Kojto 100:cbbeb26dbd92 363 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 100:cbbeb26dbd92 364 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 100:cbbeb26dbd92 365 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 100:cbbeb26dbd92 366 * @retval None
Kojto 100:cbbeb26dbd92 367 */
Kojto 100:cbbeb26dbd92 368 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
Kojto 100:cbbeb26dbd92 369
Kojto 100:cbbeb26dbd92 370 /**
Kojto 100:cbbeb26dbd92 371 * @brief Disables the specified DMA Channel interrupts.
Kojto 100:cbbeb26dbd92 372 * @param __HANDLE__: DMA handle
Kojto 100:cbbeb26dbd92 373 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 100:cbbeb26dbd92 374 * This parameter can be any combination of the following values:
Kojto 100:cbbeb26dbd92 375 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 100:cbbeb26dbd92 376 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 100:cbbeb26dbd92 377 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 100:cbbeb26dbd92 378 * @retval None
Kojto 100:cbbeb26dbd92 379 */
Kojto 100:cbbeb26dbd92 380 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
Kojto 100:cbbeb26dbd92 381
Kojto 100:cbbeb26dbd92 382 /**
Kojto 100:cbbeb26dbd92 383 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
Kojto 100:cbbeb26dbd92 384 * @param __HANDLE__: DMA handle
Kojto 100:cbbeb26dbd92 385 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 100:cbbeb26dbd92 386 * This parameter can be one of the following values:
Kojto 100:cbbeb26dbd92 387 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 100:cbbeb26dbd92 388 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 100:cbbeb26dbd92 389 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 100:cbbeb26dbd92 390 * @retval The state of DMA_IT (SET or RESET).
Kojto 100:cbbeb26dbd92 391 */
Kojto 100:cbbeb26dbd92 392 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 100:cbbeb26dbd92 393
Kojto 100:cbbeb26dbd92 394 /**
Kojto 100:cbbeb26dbd92 395 * @}
Kojto 100:cbbeb26dbd92 396 */
Kojto 100:cbbeb26dbd92 397
Kojto 100:cbbeb26dbd92 398 /* Include DMA HAL Extended module */
Kojto 100:cbbeb26dbd92 399 #include "stm32f3xx_hal_dma_ex.h"
Kojto 100:cbbeb26dbd92 400
Kojto 100:cbbeb26dbd92 401 /* Exported functions --------------------------------------------------------*/
Kojto 100:cbbeb26dbd92 402 /** @addtogroup DMA_Exported_Functions DMA Exported Functions
Kojto 100:cbbeb26dbd92 403 * @{
Kojto 100:cbbeb26dbd92 404 */
Kojto 100:cbbeb26dbd92 405
Kojto 100:cbbeb26dbd92 406 /** @addtogroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 100:cbbeb26dbd92 407 * @{
Kojto 100:cbbeb26dbd92 408 */
Kojto 100:cbbeb26dbd92 409 /* Initialization and de-initialization functions *****************************/
Kojto 100:cbbeb26dbd92 410 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 100:cbbeb26dbd92 411 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
Kojto 100:cbbeb26dbd92 412
Kojto 100:cbbeb26dbd92 413 /**
Kojto 100:cbbeb26dbd92 414 * @}
Kojto 100:cbbeb26dbd92 415 */
Kojto 100:cbbeb26dbd92 416
Kojto 100:cbbeb26dbd92 417 /** @addtogroup DMA_Exported_Functions_Group2 Input and Output operation functions
Kojto 100:cbbeb26dbd92 418 * @{
Kojto 100:cbbeb26dbd92 419 */
Kojto 100:cbbeb26dbd92 420 /* IO operation functions *****************************************************/
Kojto 100:cbbeb26dbd92 421 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 100:cbbeb26dbd92 422 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 100:cbbeb26dbd92 423 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 100:cbbeb26dbd92 424 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 100:cbbeb26dbd92 425 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 100:cbbeb26dbd92 426
Kojto 100:cbbeb26dbd92 427 /**
Kojto 100:cbbeb26dbd92 428 * @}
Kojto 100:cbbeb26dbd92 429 */
Kojto 100:cbbeb26dbd92 430
Kojto 100:cbbeb26dbd92 431 /** @addtogroup DMA_Exported_Functions_Group3 Peripheral State functions
Kojto 100:cbbeb26dbd92 432 * @{
Kojto 100:cbbeb26dbd92 433 */
Kojto 100:cbbeb26dbd92 434 /* Peripheral State and Error functions ***************************************/
Kojto 100:cbbeb26dbd92 435 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 100:cbbeb26dbd92 436 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 100:cbbeb26dbd92 437
Kojto 100:cbbeb26dbd92 438 /**
Kojto 100:cbbeb26dbd92 439 * @}
Kojto 100:cbbeb26dbd92 440 */
Kojto 100:cbbeb26dbd92 441
Kojto 100:cbbeb26dbd92 442 /**
Kojto 100:cbbeb26dbd92 443 * @}
Kojto 100:cbbeb26dbd92 444 */
Kojto 100:cbbeb26dbd92 445
Kojto 100:cbbeb26dbd92 446 /**
Kojto 100:cbbeb26dbd92 447 * @}
Kojto 100:cbbeb26dbd92 448 */
Kojto 100:cbbeb26dbd92 449
Kojto 100:cbbeb26dbd92 450 /**
Kojto 100:cbbeb26dbd92 451 * @}
Kojto 100:cbbeb26dbd92 452 */
Kojto 100:cbbeb26dbd92 453
Kojto 100:cbbeb26dbd92 454 #ifdef __cplusplus
Kojto 100:cbbeb26dbd92 455 }
Kojto 100:cbbeb26dbd92 456 #endif
Kojto 100:cbbeb26dbd92 457
Kojto 100:cbbeb26dbd92 458 #endif /* __STM32F3xx_HAL_DMA_H */
Kojto 100:cbbeb26dbd92 459
Kojto 100:cbbeb26dbd92 460 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/