Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

Committer:
Kojto
Date:
Wed Sep 16 15:32:31 2015 +0100
Revision:
107:4f6c30876dfa
Release 107  of the mbed library

Changes:
- new platforms - DISCO_F746NG, DISCO_L476VG, NUCLEO_L476RG
- KL43Z - bugfix RTC init function
- K20 - SPI mode fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 107:4f6c30876dfa 1 /**
Kojto 107:4f6c30876dfa 2 ******************************************************************************
Kojto 107:4f6c30876dfa 3 * @file stm32l4xx_hal_sram.h
Kojto 107:4f6c30876dfa 4 * @author MCD Application Team
Kojto 107:4f6c30876dfa 5 * @version V1.0.0
Kojto 107:4f6c30876dfa 6 * @date 26-June-2015
Kojto 107:4f6c30876dfa 7 * @brief Header file of SRAM HAL module.
Kojto 107:4f6c30876dfa 8 ******************************************************************************
Kojto 107:4f6c30876dfa 9 * @attention
Kojto 107:4f6c30876dfa 10 *
Kojto 107:4f6c30876dfa 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 107:4f6c30876dfa 12 *
Kojto 107:4f6c30876dfa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 107:4f6c30876dfa 14 * are permitted provided that the following conditions are met:
Kojto 107:4f6c30876dfa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 107:4f6c30876dfa 16 * this list of conditions and the following disclaimer.
Kojto 107:4f6c30876dfa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 107:4f6c30876dfa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 107:4f6c30876dfa 19 * and/or other materials provided with the distribution.
Kojto 107:4f6c30876dfa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 107:4f6c30876dfa 21 * may be used to endorse or promote products derived from this software
Kojto 107:4f6c30876dfa 22 * without specific prior written permission.
Kojto 107:4f6c30876dfa 23 *
Kojto 107:4f6c30876dfa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 107:4f6c30876dfa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 107:4f6c30876dfa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 107:4f6c30876dfa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 107:4f6c30876dfa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 107:4f6c30876dfa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 107:4f6c30876dfa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 107:4f6c30876dfa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 107:4f6c30876dfa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 107:4f6c30876dfa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 107:4f6c30876dfa 34 *
Kojto 107:4f6c30876dfa 35 ******************************************************************************
Kojto 107:4f6c30876dfa 36 */
Kojto 107:4f6c30876dfa 37
Kojto 107:4f6c30876dfa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 107:4f6c30876dfa 39 #ifndef __STM32L4xx_HAL_SRAM_H
Kojto 107:4f6c30876dfa 40 #define __STM32L4xx_HAL_SRAM_H
Kojto 107:4f6c30876dfa 41
Kojto 107:4f6c30876dfa 42 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 43 extern "C" {
Kojto 107:4f6c30876dfa 44 #endif
Kojto 107:4f6c30876dfa 45
Kojto 107:4f6c30876dfa 46 /* Includes ------------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 47 #include "stm32l4xx_ll_fmc.h"
Kojto 107:4f6c30876dfa 48
Kojto 107:4f6c30876dfa 49 /** @addtogroup STM32L4xx_HAL_Driver
Kojto 107:4f6c30876dfa 50 * @{
Kojto 107:4f6c30876dfa 51 */
Kojto 107:4f6c30876dfa 52
Kojto 107:4f6c30876dfa 53 /** @addtogroup SRAM
Kojto 107:4f6c30876dfa 54 * @{
Kojto 107:4f6c30876dfa 55 */
Kojto 107:4f6c30876dfa 56
Kojto 107:4f6c30876dfa 57 /* Exported typedef ----------------------------------------------------------*/
Kojto 107:4f6c30876dfa 58
Kojto 107:4f6c30876dfa 59 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 107:4f6c30876dfa 60 * @{
Kojto 107:4f6c30876dfa 61 */
Kojto 107:4f6c30876dfa 62 /**
Kojto 107:4f6c30876dfa 63 * @brief HAL SRAM State structures definition
Kojto 107:4f6c30876dfa 64 */
Kojto 107:4f6c30876dfa 65 typedef enum
Kojto 107:4f6c30876dfa 66 {
Kojto 107:4f6c30876dfa 67 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Kojto 107:4f6c30876dfa 68 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Kojto 107:4f6c30876dfa 69 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Kojto 107:4f6c30876dfa 70 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Kojto 107:4f6c30876dfa 71 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Kojto 107:4f6c30876dfa 72
Kojto 107:4f6c30876dfa 73 }HAL_SRAM_StateTypeDef;
Kojto 107:4f6c30876dfa 74
Kojto 107:4f6c30876dfa 75 /**
Kojto 107:4f6c30876dfa 76 * @brief SRAM handle Structure definition
Kojto 107:4f6c30876dfa 77 */
Kojto 107:4f6c30876dfa 78 typedef struct
Kojto 107:4f6c30876dfa 79 {
Kojto 107:4f6c30876dfa 80 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Kojto 107:4f6c30876dfa 81
Kojto 107:4f6c30876dfa 82 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Kojto 107:4f6c30876dfa 83
Kojto 107:4f6c30876dfa 84 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Kojto 107:4f6c30876dfa 85
Kojto 107:4f6c30876dfa 86 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Kojto 107:4f6c30876dfa 87
Kojto 107:4f6c30876dfa 88 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Kojto 107:4f6c30876dfa 89
Kojto 107:4f6c30876dfa 90 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 107:4f6c30876dfa 91
Kojto 107:4f6c30876dfa 92 }SRAM_HandleTypeDef;
Kojto 107:4f6c30876dfa 93
Kojto 107:4f6c30876dfa 94 /**
Kojto 107:4f6c30876dfa 95 * @}
Kojto 107:4f6c30876dfa 96 */
Kojto 107:4f6c30876dfa 97
Kojto 107:4f6c30876dfa 98 /* Exported constants --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 99 /* Exported macro ------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 100
Kojto 107:4f6c30876dfa 101 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 107:4f6c30876dfa 102 * @{
Kojto 107:4f6c30876dfa 103 */
Kojto 107:4f6c30876dfa 104
Kojto 107:4f6c30876dfa 105 /** @brief Reset SRAM handle state.
Kojto 107:4f6c30876dfa 106 * @param __HANDLE__: SRAM handle
Kojto 107:4f6c30876dfa 107 * @retval None
Kojto 107:4f6c30876dfa 108 */
Kojto 107:4f6c30876dfa 109 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Kojto 107:4f6c30876dfa 110
Kojto 107:4f6c30876dfa 111 /**
Kojto 107:4f6c30876dfa 112 * @}
Kojto 107:4f6c30876dfa 113 */
Kojto 107:4f6c30876dfa 114
Kojto 107:4f6c30876dfa 115 /* Exported functions --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 116 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
Kojto 107:4f6c30876dfa 117 * @{
Kojto 107:4f6c30876dfa 118 */
Kojto 107:4f6c30876dfa 119
Kojto 107:4f6c30876dfa 120 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 107:4f6c30876dfa 121 * @{
Kojto 107:4f6c30876dfa 122 */
Kojto 107:4f6c30876dfa 123
Kojto 107:4f6c30876dfa 124 /* Initialization/de-initialization functions ********************************/
Kojto 107:4f6c30876dfa 125 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 107:4f6c30876dfa 126 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 107:4f6c30876dfa 127 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 107:4f6c30876dfa 128 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Kojto 107:4f6c30876dfa 129
Kojto 107:4f6c30876dfa 130 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 131 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 132
Kojto 107:4f6c30876dfa 133 /**
Kojto 107:4f6c30876dfa 134 * @}
Kojto 107:4f6c30876dfa 135 */
Kojto 107:4f6c30876dfa 136
Kojto 107:4f6c30876dfa 137 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
Kojto 107:4f6c30876dfa 138 * @{
Kojto 107:4f6c30876dfa 139 */
Kojto 107:4f6c30876dfa 140
Kojto 107:4f6c30876dfa 141 /* I/O operation functions ***************************************************/
Kojto 107:4f6c30876dfa 142 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 143 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 144 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 145 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 146 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 147 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 148 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 149 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 107:4f6c30876dfa 150
Kojto 107:4f6c30876dfa 151 /**
Kojto 107:4f6c30876dfa 152 * @}
Kojto 107:4f6c30876dfa 153 */
Kojto 107:4f6c30876dfa 154
Kojto 107:4f6c30876dfa 155 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
Kojto 107:4f6c30876dfa 156 * @{
Kojto 107:4f6c30876dfa 157 */
Kojto 107:4f6c30876dfa 158
Kojto 107:4f6c30876dfa 159 /* SRAM Control functions ****************************************************/
Kojto 107:4f6c30876dfa 160 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Kojto 107:4f6c30876dfa 161 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Kojto 107:4f6c30876dfa 162
Kojto 107:4f6c30876dfa 163 /**
Kojto 107:4f6c30876dfa 164 * @}
Kojto 107:4f6c30876dfa 165 */
Kojto 107:4f6c30876dfa 166
Kojto 107:4f6c30876dfa 167 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
Kojto 107:4f6c30876dfa 168 * @{
Kojto 107:4f6c30876dfa 169 */
Kojto 107:4f6c30876dfa 170
Kojto 107:4f6c30876dfa 171 /* SRAM Peripheral State functions ********************************************/
Kojto 107:4f6c30876dfa 172 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 107:4f6c30876dfa 173
Kojto 107:4f6c30876dfa 174 /**
Kojto 107:4f6c30876dfa 175 * @}
Kojto 107:4f6c30876dfa 176 */
Kojto 107:4f6c30876dfa 177
Kojto 107:4f6c30876dfa 178 /**
Kojto 107:4f6c30876dfa 179 * @}
Kojto 107:4f6c30876dfa 180 */
Kojto 107:4f6c30876dfa 181
Kojto 107:4f6c30876dfa 182 /**
Kojto 107:4f6c30876dfa 183 * @}
Kojto 107:4f6c30876dfa 184 */
Kojto 107:4f6c30876dfa 185
Kojto 107:4f6c30876dfa 186 /**
Kojto 107:4f6c30876dfa 187 * @}
Kojto 107:4f6c30876dfa 188 */
Kojto 107:4f6c30876dfa 189
Kojto 107:4f6c30876dfa 190 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 191 }
Kojto 107:4f6c30876dfa 192 #endif
Kojto 107:4f6c30876dfa 193
Kojto 107:4f6c30876dfa 194 #endif /* __STM32L4xx_HAL_SRAM_H */
Kojto 107:4f6c30876dfa 195
Kojto 107:4f6c30876dfa 196 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/