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TARGET_DISCO_L476VG/stm32l4xx_hal_dma.h@107:4f6c30876dfa, 2015-09-16 (annotated)
- Committer:
- Kojto
- Date:
- Wed Sep 16 15:32:31 2015 +0100
- Revision:
- 107:4f6c30876dfa
Release 107 of the mbed library
Changes:
- new platforms - DISCO_F746NG, DISCO_L476VG, NUCLEO_L476RG
- KL43Z - bugfix RTC init function
- K20 - SPI mode fix
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 107:4f6c30876dfa | 1 | /** |
| Kojto | 107:4f6c30876dfa | 2 | ****************************************************************************** |
| Kojto | 107:4f6c30876dfa | 3 | * @file stm32l4xx_hal_dma.h |
| Kojto | 107:4f6c30876dfa | 4 | * @author MCD Application Team |
| Kojto | 107:4f6c30876dfa | 5 | * @version V1.0.0 |
| Kojto | 107:4f6c30876dfa | 6 | * @date 26-June-2015 |
| Kojto | 107:4f6c30876dfa | 7 | * @brief Header file of DMA HAL module. |
| Kojto | 107:4f6c30876dfa | 8 | ****************************************************************************** |
| Kojto | 107:4f6c30876dfa | 9 | * @attention |
| Kojto | 107:4f6c30876dfa | 10 | * |
| Kojto | 107:4f6c30876dfa | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| Kojto | 107:4f6c30876dfa | 12 | * |
| Kojto | 107:4f6c30876dfa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 107:4f6c30876dfa | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 107:4f6c30876dfa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 107:4f6c30876dfa | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 107:4f6c30876dfa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 107:4f6c30876dfa | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 107:4f6c30876dfa | 19 | * and/or other materials provided with the distribution. |
| Kojto | 107:4f6c30876dfa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 107:4f6c30876dfa | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 107:4f6c30876dfa | 22 | * without specific prior written permission. |
| Kojto | 107:4f6c30876dfa | 23 | * |
| Kojto | 107:4f6c30876dfa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 107:4f6c30876dfa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 107:4f6c30876dfa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 107:4f6c30876dfa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 107:4f6c30876dfa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 107:4f6c30876dfa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 107:4f6c30876dfa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 107:4f6c30876dfa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 107:4f6c30876dfa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 107:4f6c30876dfa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 107:4f6c30876dfa | 34 | * |
| Kojto | 107:4f6c30876dfa | 35 | ****************************************************************************** |
| Kojto | 107:4f6c30876dfa | 36 | */ |
| Kojto | 107:4f6c30876dfa | 37 | |
| Kojto | 107:4f6c30876dfa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 39 | #ifndef __STM32L4xx_HAL_DMA_H |
| Kojto | 107:4f6c30876dfa | 40 | #define __STM32L4xx_HAL_DMA_H |
| Kojto | 107:4f6c30876dfa | 41 | |
| Kojto | 107:4f6c30876dfa | 42 | #ifdef __cplusplus |
| Kojto | 107:4f6c30876dfa | 43 | extern "C" { |
| Kojto | 107:4f6c30876dfa | 44 | #endif |
| Kojto | 107:4f6c30876dfa | 45 | |
| Kojto | 107:4f6c30876dfa | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 47 | #include "stm32l4xx_hal_def.h" |
| Kojto | 107:4f6c30876dfa | 48 | |
| Kojto | 107:4f6c30876dfa | 49 | /** @addtogroup STM32L4xx_HAL_Driver |
| Kojto | 107:4f6c30876dfa | 50 | * @{ |
| Kojto | 107:4f6c30876dfa | 51 | */ |
| Kojto | 107:4f6c30876dfa | 52 | |
| Kojto | 107:4f6c30876dfa | 53 | /** @addtogroup DMA |
| Kojto | 107:4f6c30876dfa | 54 | * @{ |
| Kojto | 107:4f6c30876dfa | 55 | */ |
| Kojto | 107:4f6c30876dfa | 56 | |
| Kojto | 107:4f6c30876dfa | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 58 | /** @defgroup DMA_Exported_Types DMA Exported Types |
| Kojto | 107:4f6c30876dfa | 59 | * @{ |
| Kojto | 107:4f6c30876dfa | 60 | */ |
| Kojto | 107:4f6c30876dfa | 61 | |
| Kojto | 107:4f6c30876dfa | 62 | /** |
| Kojto | 107:4f6c30876dfa | 63 | * @brief DMA Configuration Structure definition |
| Kojto | 107:4f6c30876dfa | 64 | */ |
| Kojto | 107:4f6c30876dfa | 65 | typedef struct |
| Kojto | 107:4f6c30876dfa | 66 | { |
| Kojto | 107:4f6c30876dfa | 67 | uint32_t Request; /*!< Specifies the request selected for the specified channel. |
| Kojto | 107:4f6c30876dfa | 68 | This parameter can be a value of @ref DMA_request */ |
| Kojto | 107:4f6c30876dfa | 69 | |
| Kojto | 107:4f6c30876dfa | 70 | uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, |
| Kojto | 107:4f6c30876dfa | 71 | from memory to memory or from peripheral to memory. |
| Kojto | 107:4f6c30876dfa | 72 | This parameter can be a value of @ref DMA_Data_transfer_direction */ |
| Kojto | 107:4f6c30876dfa | 73 | |
| Kojto | 107:4f6c30876dfa | 74 | uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not. |
| Kojto | 107:4f6c30876dfa | 75 | This parameter can be a value of @ref DMA_Peripheral_incremented_mode */ |
| Kojto | 107:4f6c30876dfa | 76 | |
| Kojto | 107:4f6c30876dfa | 77 | uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not. |
| Kojto | 107:4f6c30876dfa | 78 | This parameter can be a value of @ref DMA_Memory_incremented_mode */ |
| Kojto | 107:4f6c30876dfa | 79 | |
| Kojto | 107:4f6c30876dfa | 80 | uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width. |
| Kojto | 107:4f6c30876dfa | 81 | This parameter can be a value of @ref DMA_Peripheral_data_size */ |
| Kojto | 107:4f6c30876dfa | 82 | |
| Kojto | 107:4f6c30876dfa | 83 | uint32_t MemDataAlignment; /*!< Specifies the Memory data width. |
| Kojto | 107:4f6c30876dfa | 84 | This parameter can be a value of @ref DMA_Memory_data_size */ |
| Kojto | 107:4f6c30876dfa | 85 | |
| Kojto | 107:4f6c30876dfa | 86 | uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx. |
| Kojto | 107:4f6c30876dfa | 87 | This parameter can be a value of @ref DMA_mode |
| Kojto | 107:4f6c30876dfa | 88 | @note The circular buffer mode cannot be used if the memory-to-memory |
| Kojto | 107:4f6c30876dfa | 89 | data transfer is configured on the selected Channel */ |
| Kojto | 107:4f6c30876dfa | 90 | |
| Kojto | 107:4f6c30876dfa | 91 | uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx. |
| Kojto | 107:4f6c30876dfa | 92 | This parameter can be a value of @ref DMA_Priority_level */ |
| Kojto | 107:4f6c30876dfa | 93 | } DMA_InitTypeDef; |
| Kojto | 107:4f6c30876dfa | 94 | |
| Kojto | 107:4f6c30876dfa | 95 | /** |
| Kojto | 107:4f6c30876dfa | 96 | * @brief DMA Configuration enumeration values definition |
| Kojto | 107:4f6c30876dfa | 97 | */ |
| Kojto | 107:4f6c30876dfa | 98 | typedef enum |
| Kojto | 107:4f6c30876dfa | 99 | { |
| Kojto | 107:4f6c30876dfa | 100 | DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */ |
| Kojto | 107:4f6c30876dfa | 101 | DMA_PRIORITY = 1 /*!< Control related priority level Parameter in DMA_InitTypeDef */ |
| Kojto | 107:4f6c30876dfa | 102 | |
| Kojto | 107:4f6c30876dfa | 103 | } DMA_ControlTypeDef; |
| Kojto | 107:4f6c30876dfa | 104 | |
| Kojto | 107:4f6c30876dfa | 105 | /** |
| Kojto | 107:4f6c30876dfa | 106 | * @brief HAL DMA State structures definition |
| Kojto | 107:4f6c30876dfa | 107 | */ |
| Kojto | 107:4f6c30876dfa | 108 | typedef enum |
| Kojto | 107:4f6c30876dfa | 109 | { |
| Kojto | 107:4f6c30876dfa | 110 | HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */ |
| Kojto | 107:4f6c30876dfa | 111 | HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */ |
| Kojto | 107:4f6c30876dfa | 112 | HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */ |
| Kojto | 107:4f6c30876dfa | 113 | HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */ |
| Kojto | 107:4f6c30876dfa | 114 | HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */ |
| Kojto | 107:4f6c30876dfa | 115 | HAL_DMA_STATE_ERROR = 0x04 /*!< DMA error state */ |
| Kojto | 107:4f6c30876dfa | 116 | |
| Kojto | 107:4f6c30876dfa | 117 | }HAL_DMA_StateTypeDef; |
| Kojto | 107:4f6c30876dfa | 118 | |
| Kojto | 107:4f6c30876dfa | 119 | /** |
| Kojto | 107:4f6c30876dfa | 120 | * @brief HAL DMA Error Code structure definition |
| Kojto | 107:4f6c30876dfa | 121 | */ |
| Kojto | 107:4f6c30876dfa | 122 | typedef enum |
| Kojto | 107:4f6c30876dfa | 123 | { |
| Kojto | 107:4f6c30876dfa | 124 | HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */ |
| Kojto | 107:4f6c30876dfa | 125 | HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */ |
| Kojto | 107:4f6c30876dfa | 126 | |
| Kojto | 107:4f6c30876dfa | 127 | }HAL_DMA_LevelCompleteTypeDef; |
| Kojto | 107:4f6c30876dfa | 128 | |
| Kojto | 107:4f6c30876dfa | 129 | |
| Kojto | 107:4f6c30876dfa | 130 | /** |
| Kojto | 107:4f6c30876dfa | 131 | * @brief DMA handle Structure definition |
| Kojto | 107:4f6c30876dfa | 132 | */ |
| Kojto | 107:4f6c30876dfa | 133 | typedef struct __DMA_HandleTypeDef |
| Kojto | 107:4f6c30876dfa | 134 | { |
| Kojto | 107:4f6c30876dfa | 135 | DMA_Channel_TypeDef *Instance; /*!< Register base address */ |
| Kojto | 107:4f6c30876dfa | 136 | |
| Kojto | 107:4f6c30876dfa | 137 | DMA_InitTypeDef Init; /*!< DMA communication parameters */ |
| Kojto | 107:4f6c30876dfa | 138 | |
| Kojto | 107:4f6c30876dfa | 139 | HAL_LockTypeDef Lock; /*!< DMA locking object */ |
| Kojto | 107:4f6c30876dfa | 140 | |
| Kojto | 107:4f6c30876dfa | 141 | __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */ |
| Kojto | 107:4f6c30876dfa | 142 | |
| Kojto | 107:4f6c30876dfa | 143 | void *Parent; /*!< Parent object state */ |
| Kojto | 107:4f6c30876dfa | 144 | |
| Kojto | 107:4f6c30876dfa | 145 | void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */ |
| Kojto | 107:4f6c30876dfa | 146 | |
| Kojto | 107:4f6c30876dfa | 147 | void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */ |
| Kojto | 107:4f6c30876dfa | 148 | |
| Kojto | 107:4f6c30876dfa | 149 | void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */ |
| Kojto | 107:4f6c30876dfa | 150 | |
| Kojto | 107:4f6c30876dfa | 151 | __IO uint32_t ErrorCode; /*!< DMA Error code */ |
| Kojto | 107:4f6c30876dfa | 152 | |
| Kojto | 107:4f6c30876dfa | 153 | }DMA_HandleTypeDef; |
| Kojto | 107:4f6c30876dfa | 154 | |
| Kojto | 107:4f6c30876dfa | 155 | /** |
| Kojto | 107:4f6c30876dfa | 156 | * @} |
| Kojto | 107:4f6c30876dfa | 157 | */ |
| Kojto | 107:4f6c30876dfa | 158 | |
| Kojto | 107:4f6c30876dfa | 159 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 160 | |
| Kojto | 107:4f6c30876dfa | 161 | /** @defgroup DMA_Exported_Constants DMA Exported Constants |
| Kojto | 107:4f6c30876dfa | 162 | * @{ |
| Kojto | 107:4f6c30876dfa | 163 | */ |
| Kojto | 107:4f6c30876dfa | 164 | |
| Kojto | 107:4f6c30876dfa | 165 | /** @defgroup DMA_Error_Code |
| Kojto | 107:4f6c30876dfa | 166 | * @{ |
| Kojto | 107:4f6c30876dfa | 167 | */ |
| Kojto | 107:4f6c30876dfa | 168 | #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| Kojto | 107:4f6c30876dfa | 169 | #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */ |
| Kojto | 107:4f6c30876dfa | 170 | #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */ |
| Kojto | 107:4f6c30876dfa | 171 | /** |
| Kojto | 107:4f6c30876dfa | 172 | * @} |
| Kojto | 107:4f6c30876dfa | 173 | */ |
| Kojto | 107:4f6c30876dfa | 174 | |
| Kojto | 107:4f6c30876dfa | 175 | /** @defgroup DMA_request |
| Kojto | 107:4f6c30876dfa | 176 | * @{ |
| Kojto | 107:4f6c30876dfa | 177 | */ |
| Kojto | 107:4f6c30876dfa | 178 | #define DMA_REQUEST_0 ((uint32_t)0x00000000) |
| Kojto | 107:4f6c30876dfa | 179 | #define DMA_REQUEST_1 ((uint32_t)0x00000001) |
| Kojto | 107:4f6c30876dfa | 180 | #define DMA_REQUEST_2 ((uint32_t)0x00000002) |
| Kojto | 107:4f6c30876dfa | 181 | #define DMA_REQUEST_3 ((uint32_t)0x00000003) |
| Kojto | 107:4f6c30876dfa | 182 | #define DMA_REQUEST_4 ((uint32_t)0x00000004) |
| Kojto | 107:4f6c30876dfa | 183 | #define DMA_REQUEST_5 ((uint32_t)0x00000005) |
| Kojto | 107:4f6c30876dfa | 184 | #define DMA_REQUEST_6 ((uint32_t)0x00000006) |
| Kojto | 107:4f6c30876dfa | 185 | #define DMA_REQUEST_7 ((uint32_t)0x00000007) |
| Kojto | 107:4f6c30876dfa | 186 | |
| Kojto | 107:4f6c30876dfa | 187 | /** |
| Kojto | 107:4f6c30876dfa | 188 | * @} |
| Kojto | 107:4f6c30876dfa | 189 | */ |
| Kojto | 107:4f6c30876dfa | 190 | |
| Kojto | 107:4f6c30876dfa | 191 | /** @defgroup DMA_Data_transfer_direction |
| Kojto | 107:4f6c30876dfa | 192 | * @{ |
| Kojto | 107:4f6c30876dfa | 193 | */ |
| Kojto | 107:4f6c30876dfa | 194 | #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */ |
| Kojto | 107:4f6c30876dfa | 195 | #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */ |
| Kojto | 107:4f6c30876dfa | 196 | #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */ |
| Kojto | 107:4f6c30876dfa | 197 | |
| Kojto | 107:4f6c30876dfa | 198 | /** |
| Kojto | 107:4f6c30876dfa | 199 | * @} |
| Kojto | 107:4f6c30876dfa | 200 | */ |
| Kojto | 107:4f6c30876dfa | 201 | |
| Kojto | 107:4f6c30876dfa | 202 | /** @defgroup DMA_Peripheral_incremented_mode |
| Kojto | 107:4f6c30876dfa | 203 | * @{ |
| Kojto | 107:4f6c30876dfa | 204 | */ |
| Kojto | 107:4f6c30876dfa | 205 | #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */ |
| Kojto | 107:4f6c30876dfa | 206 | #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */ |
| Kojto | 107:4f6c30876dfa | 207 | |
| Kojto | 107:4f6c30876dfa | 208 | /** |
| Kojto | 107:4f6c30876dfa | 209 | * @} |
| Kojto | 107:4f6c30876dfa | 210 | */ |
| Kojto | 107:4f6c30876dfa | 211 | |
| Kojto | 107:4f6c30876dfa | 212 | /** @defgroup DMA_Memory_incremented_mode |
| Kojto | 107:4f6c30876dfa | 213 | * @{ |
| Kojto | 107:4f6c30876dfa | 214 | */ |
| Kojto | 107:4f6c30876dfa | 215 | #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */ |
| Kojto | 107:4f6c30876dfa | 216 | #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */ |
| Kojto | 107:4f6c30876dfa | 217 | |
| Kojto | 107:4f6c30876dfa | 218 | /** |
| Kojto | 107:4f6c30876dfa | 219 | * @} |
| Kojto | 107:4f6c30876dfa | 220 | */ |
| Kojto | 107:4f6c30876dfa | 221 | |
| Kojto | 107:4f6c30876dfa | 222 | /** @defgroup DMA_Peripheral_data_size |
| Kojto | 107:4f6c30876dfa | 223 | * @{ |
| Kojto | 107:4f6c30876dfa | 224 | */ |
| Kojto | 107:4f6c30876dfa | 225 | #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */ |
| Kojto | 107:4f6c30876dfa | 226 | #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */ |
| Kojto | 107:4f6c30876dfa | 227 | #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */ |
| Kojto | 107:4f6c30876dfa | 228 | |
| Kojto | 107:4f6c30876dfa | 229 | /** |
| Kojto | 107:4f6c30876dfa | 230 | * @} |
| Kojto | 107:4f6c30876dfa | 231 | */ |
| Kojto | 107:4f6c30876dfa | 232 | |
| Kojto | 107:4f6c30876dfa | 233 | /** @defgroup DMA_Memory_data_size |
| Kojto | 107:4f6c30876dfa | 234 | * @{ |
| Kojto | 107:4f6c30876dfa | 235 | */ |
| Kojto | 107:4f6c30876dfa | 236 | #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */ |
| Kojto | 107:4f6c30876dfa | 237 | #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */ |
| Kojto | 107:4f6c30876dfa | 238 | #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */ |
| Kojto | 107:4f6c30876dfa | 239 | |
| Kojto | 107:4f6c30876dfa | 240 | /** |
| Kojto | 107:4f6c30876dfa | 241 | * @} |
| Kojto | 107:4f6c30876dfa | 242 | */ |
| Kojto | 107:4f6c30876dfa | 243 | |
| Kojto | 107:4f6c30876dfa | 244 | /** @defgroup DMA_mode |
| Kojto | 107:4f6c30876dfa | 245 | * @{ |
| Kojto | 107:4f6c30876dfa | 246 | */ |
| Kojto | 107:4f6c30876dfa | 247 | #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */ |
| Kojto | 107:4f6c30876dfa | 248 | #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */ |
| Kojto | 107:4f6c30876dfa | 249 | |
| Kojto | 107:4f6c30876dfa | 250 | /** |
| Kojto | 107:4f6c30876dfa | 251 | * @} |
| Kojto | 107:4f6c30876dfa | 252 | */ |
| Kojto | 107:4f6c30876dfa | 253 | |
| Kojto | 107:4f6c30876dfa | 254 | /** @defgroup DMA_Priority_level |
| Kojto | 107:4f6c30876dfa | 255 | * @{ |
| Kojto | 107:4f6c30876dfa | 256 | */ |
| Kojto | 107:4f6c30876dfa | 257 | #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */ |
| Kojto | 107:4f6c30876dfa | 258 | #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */ |
| Kojto | 107:4f6c30876dfa | 259 | #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */ |
| Kojto | 107:4f6c30876dfa | 260 | #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */ |
| Kojto | 107:4f6c30876dfa | 261 | |
| Kojto | 107:4f6c30876dfa | 262 | /** |
| Kojto | 107:4f6c30876dfa | 263 | * @} |
| Kojto | 107:4f6c30876dfa | 264 | */ |
| Kojto | 107:4f6c30876dfa | 265 | |
| Kojto | 107:4f6c30876dfa | 266 | |
| Kojto | 107:4f6c30876dfa | 267 | /** @defgroup DMA_interrupt_enable_definitions |
| Kojto | 107:4f6c30876dfa | 268 | * @{ |
| Kojto | 107:4f6c30876dfa | 269 | */ |
| Kojto | 107:4f6c30876dfa | 270 | |
| Kojto | 107:4f6c30876dfa | 271 | #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) |
| Kojto | 107:4f6c30876dfa | 272 | #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) |
| Kojto | 107:4f6c30876dfa | 273 | #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) |
| Kojto | 107:4f6c30876dfa | 274 | |
| Kojto | 107:4f6c30876dfa | 275 | /** |
| Kojto | 107:4f6c30876dfa | 276 | * @} |
| Kojto | 107:4f6c30876dfa | 277 | */ |
| Kojto | 107:4f6c30876dfa | 278 | |
| Kojto | 107:4f6c30876dfa | 279 | /** @defgroup DMA_flag_definitions |
| Kojto | 107:4f6c30876dfa | 280 | * @{ |
| Kojto | 107:4f6c30876dfa | 281 | */ |
| Kojto | 107:4f6c30876dfa | 282 | |
| Kojto | 107:4f6c30876dfa | 283 | #define DMA_FLAG_GL1 ((uint32_t)0x00000001) |
| Kojto | 107:4f6c30876dfa | 284 | #define DMA_FLAG_TC1 ((uint32_t)0x00000002) |
| Kojto | 107:4f6c30876dfa | 285 | #define DMA_FLAG_HT1 ((uint32_t)0x00000004) |
| Kojto | 107:4f6c30876dfa | 286 | #define DMA_FLAG_TE1 ((uint32_t)0x00000008) |
| Kojto | 107:4f6c30876dfa | 287 | #define DMA_FLAG_GL2 ((uint32_t)0x00000010) |
| Kojto | 107:4f6c30876dfa | 288 | #define DMA_FLAG_TC2 ((uint32_t)0x00000020) |
| Kojto | 107:4f6c30876dfa | 289 | #define DMA_FLAG_HT2 ((uint32_t)0x00000040) |
| Kojto | 107:4f6c30876dfa | 290 | #define DMA_FLAG_TE2 ((uint32_t)0x00000080) |
| Kojto | 107:4f6c30876dfa | 291 | #define DMA_FLAG_GL3 ((uint32_t)0x00000100) |
| Kojto | 107:4f6c30876dfa | 292 | #define DMA_FLAG_TC3 ((uint32_t)0x00000200) |
| Kojto | 107:4f6c30876dfa | 293 | #define DMA_FLAG_HT3 ((uint32_t)0x00000400) |
| Kojto | 107:4f6c30876dfa | 294 | #define DMA_FLAG_TE3 ((uint32_t)0x00000800) |
| Kojto | 107:4f6c30876dfa | 295 | #define DMA_FLAG_GL4 ((uint32_t)0x00001000) |
| Kojto | 107:4f6c30876dfa | 296 | #define DMA_FLAG_TC4 ((uint32_t)0x00002000) |
| Kojto | 107:4f6c30876dfa | 297 | #define DMA_FLAG_HT4 ((uint32_t)0x00004000) |
| Kojto | 107:4f6c30876dfa | 298 | #define DMA_FLAG_TE4 ((uint32_t)0x00008000) |
| Kojto | 107:4f6c30876dfa | 299 | #define DMA_FLAG_GL5 ((uint32_t)0x00010000) |
| Kojto | 107:4f6c30876dfa | 300 | #define DMA_FLAG_TC5 ((uint32_t)0x00020000) |
| Kojto | 107:4f6c30876dfa | 301 | #define DMA_FLAG_HT5 ((uint32_t)0x00040000) |
| Kojto | 107:4f6c30876dfa | 302 | #define DMA_FLAG_TE5 ((uint32_t)0x00080000) |
| Kojto | 107:4f6c30876dfa | 303 | #define DMA_FLAG_GL6 ((uint32_t)0x00100000) |
| Kojto | 107:4f6c30876dfa | 304 | #define DMA_FLAG_TC6 ((uint32_t)0x00200000) |
| Kojto | 107:4f6c30876dfa | 305 | #define DMA_FLAG_HT6 ((uint32_t)0x00400000) |
| Kojto | 107:4f6c30876dfa | 306 | #define DMA_FLAG_TE6 ((uint32_t)0x00800000) |
| Kojto | 107:4f6c30876dfa | 307 | #define DMA_FLAG_GL7 ((uint32_t)0x01000000) |
| Kojto | 107:4f6c30876dfa | 308 | #define DMA_FLAG_TC7 ((uint32_t)0x02000000) |
| Kojto | 107:4f6c30876dfa | 309 | #define DMA_FLAG_HT7 ((uint32_t)0x04000000) |
| Kojto | 107:4f6c30876dfa | 310 | #define DMA_FLAG_TE7 ((uint32_t)0x08000000) |
| Kojto | 107:4f6c30876dfa | 311 | |
| Kojto | 107:4f6c30876dfa | 312 | |
| Kojto | 107:4f6c30876dfa | 313 | /** |
| Kojto | 107:4f6c30876dfa | 314 | * @} |
| Kojto | 107:4f6c30876dfa | 315 | */ |
| Kojto | 107:4f6c30876dfa | 316 | |
| Kojto | 107:4f6c30876dfa | 317 | /** |
| Kojto | 107:4f6c30876dfa | 318 | * @} |
| Kojto | 107:4f6c30876dfa | 319 | */ |
| Kojto | 107:4f6c30876dfa | 320 | |
| Kojto | 107:4f6c30876dfa | 321 | /* Exported macros -----------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 322 | /** @defgroup DMA_Exported_Macros DMA Exported Macros |
| Kojto | 107:4f6c30876dfa | 323 | * @{ |
| Kojto | 107:4f6c30876dfa | 324 | */ |
| Kojto | 107:4f6c30876dfa | 325 | |
| Kojto | 107:4f6c30876dfa | 326 | /** @brief Reset DMA handle state. |
| Kojto | 107:4f6c30876dfa | 327 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 328 | * @retval None |
| Kojto | 107:4f6c30876dfa | 329 | */ |
| Kojto | 107:4f6c30876dfa | 330 | #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET) |
| Kojto | 107:4f6c30876dfa | 331 | |
| Kojto | 107:4f6c30876dfa | 332 | /** |
| Kojto | 107:4f6c30876dfa | 333 | * @brief Enable the specified DMA Channel. |
| Kojto | 107:4f6c30876dfa | 334 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 335 | * @retval None |
| Kojto | 107:4f6c30876dfa | 336 | */ |
| Kojto | 107:4f6c30876dfa | 337 | #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN) |
| Kojto | 107:4f6c30876dfa | 338 | |
| Kojto | 107:4f6c30876dfa | 339 | /** |
| Kojto | 107:4f6c30876dfa | 340 | * @brief Disable the specified DMA Channel. |
| Kojto | 107:4f6c30876dfa | 341 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 342 | * @retval None |
| Kojto | 107:4f6c30876dfa | 343 | */ |
| Kojto | 107:4f6c30876dfa | 344 | #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN) |
| Kojto | 107:4f6c30876dfa | 345 | |
| Kojto | 107:4f6c30876dfa | 346 | |
| Kojto | 107:4f6c30876dfa | 347 | /* Interrupt & Flag management */ |
| Kojto | 107:4f6c30876dfa | 348 | |
| Kojto | 107:4f6c30876dfa | 349 | /** |
| Kojto | 107:4f6c30876dfa | 350 | * @brief Return the current DMA Channel transfer complete flag. |
| Kojto | 107:4f6c30876dfa | 351 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 352 | * @retval The specified transfer complete flag index. |
| Kojto | 107:4f6c30876dfa | 353 | */ |
| Kojto | 107:4f6c30876dfa | 354 | |
| Kojto | 107:4f6c30876dfa | 355 | #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ |
| Kojto | 107:4f6c30876dfa | 356 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ |
| Kojto | 107:4f6c30876dfa | 357 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ |
| Kojto | 107:4f6c30876dfa | 358 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ |
| Kojto | 107:4f6c30876dfa | 359 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ |
| Kojto | 107:4f6c30876dfa | 360 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ |
| Kojto | 107:4f6c30876dfa | 361 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ |
| Kojto | 107:4f6c30876dfa | 362 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ |
| Kojto | 107:4f6c30876dfa | 363 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ |
| Kojto | 107:4f6c30876dfa | 364 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ |
| Kojto | 107:4f6c30876dfa | 365 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\ |
| Kojto | 107:4f6c30876dfa | 366 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ |
| Kojto | 107:4f6c30876dfa | 367 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TC6 :\ |
| Kojto | 107:4f6c30876dfa | 368 | DMA_FLAG_TC7) |
| Kojto | 107:4f6c30876dfa | 369 | |
| Kojto | 107:4f6c30876dfa | 370 | /** |
| Kojto | 107:4f6c30876dfa | 371 | * @brief Return the current DMA Channel half transfer complete flag. |
| Kojto | 107:4f6c30876dfa | 372 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 373 | * @retval The specified half transfer complete flag index. |
| Kojto | 107:4f6c30876dfa | 374 | */ |
| Kojto | 107:4f6c30876dfa | 375 | #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ |
| Kojto | 107:4f6c30876dfa | 376 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ |
| Kojto | 107:4f6c30876dfa | 377 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ |
| Kojto | 107:4f6c30876dfa | 378 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ |
| Kojto | 107:4f6c30876dfa | 379 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ |
| Kojto | 107:4f6c30876dfa | 380 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ |
| Kojto | 107:4f6c30876dfa | 381 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ |
| Kojto | 107:4f6c30876dfa | 382 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ |
| Kojto | 107:4f6c30876dfa | 383 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ |
| Kojto | 107:4f6c30876dfa | 384 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ |
| Kojto | 107:4f6c30876dfa | 385 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\ |
| Kojto | 107:4f6c30876dfa | 386 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ |
| Kojto | 107:4f6c30876dfa | 387 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_HT6 :\ |
| Kojto | 107:4f6c30876dfa | 388 | DMA_FLAG_HT7) |
| Kojto | 107:4f6c30876dfa | 389 | |
| Kojto | 107:4f6c30876dfa | 390 | /** |
| Kojto | 107:4f6c30876dfa | 391 | * @brief Return the current DMA Channel transfer error flag. |
| Kojto | 107:4f6c30876dfa | 392 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 393 | * @retval The specified transfer error flag index. |
| Kojto | 107:4f6c30876dfa | 394 | */ |
| Kojto | 107:4f6c30876dfa | 395 | #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ |
| Kojto | 107:4f6c30876dfa | 396 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ |
| Kojto | 107:4f6c30876dfa | 397 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ |
| Kojto | 107:4f6c30876dfa | 398 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ |
| Kojto | 107:4f6c30876dfa | 399 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ |
| Kojto | 107:4f6c30876dfa | 400 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ |
| Kojto | 107:4f6c30876dfa | 401 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ |
| Kojto | 107:4f6c30876dfa | 402 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ |
| Kojto | 107:4f6c30876dfa | 403 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ |
| Kojto | 107:4f6c30876dfa | 404 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ |
| Kojto | 107:4f6c30876dfa | 405 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\ |
| Kojto | 107:4f6c30876dfa | 406 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ |
| Kojto | 107:4f6c30876dfa | 407 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TE6 :\ |
| Kojto | 107:4f6c30876dfa | 408 | DMA_FLAG_TE7) |
| Kojto | 107:4f6c30876dfa | 409 | |
| Kojto | 107:4f6c30876dfa | 410 | /** |
| Kojto | 107:4f6c30876dfa | 411 | * @brief Return the current DMA Channel Global interrupt flag. |
| Kojto | 107:4f6c30876dfa | 412 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 413 | * @retval The specified transfer error flag index. |
| Kojto | 107:4f6c30876dfa | 414 | */ |
| Kojto | 107:4f6c30876dfa | 415 | #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ |
| Kojto | 107:4f6c30876dfa | 416 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\ |
| Kojto | 107:4f6c30876dfa | 417 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\ |
| Kojto | 107:4f6c30876dfa | 418 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\ |
| Kojto | 107:4f6c30876dfa | 419 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\ |
| Kojto | 107:4f6c30876dfa | 420 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\ |
| Kojto | 107:4f6c30876dfa | 421 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\ |
| Kojto | 107:4f6c30876dfa | 422 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\ |
| Kojto | 107:4f6c30876dfa | 423 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\ |
| Kojto | 107:4f6c30876dfa | 424 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\ |
| Kojto | 107:4f6c30876dfa | 425 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\ |
| Kojto | 107:4f6c30876dfa | 426 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\ |
| Kojto | 107:4f6c30876dfa | 427 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_ISR_GIF6 :\ |
| Kojto | 107:4f6c30876dfa | 428 | DMA_ISR_GIF7) |
| Kojto | 107:4f6c30876dfa | 429 | |
| Kojto | 107:4f6c30876dfa | 430 | /** |
| Kojto | 107:4f6c30876dfa | 431 | * @brief Get the DMA Channel pending flags. |
| Kojto | 107:4f6c30876dfa | 432 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 433 | * @param __FLAG__: Get the specified flag. |
| Kojto | 107:4f6c30876dfa | 434 | * This parameter can be any combination of the following values: |
| Kojto | 107:4f6c30876dfa | 435 | * @arg DMA_FLAG_TCIFx: Transfer complete flag |
| Kojto | 107:4f6c30876dfa | 436 | * @arg DMA_FLAG_HTIFx: Half transfer complete flag |
| Kojto | 107:4f6c30876dfa | 437 | * @arg DMA_FLAG_TEIFx: Transfer error flag |
| Kojto | 107:4f6c30876dfa | 438 | * @arg DMA_ISR_GIFx: Global interrupt flag |
| Kojto | 107:4f6c30876dfa | 439 | * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag. |
| Kojto | 107:4f6c30876dfa | 440 | * @retval The state of FLAG (SET or RESET). |
| Kojto | 107:4f6c30876dfa | 441 | */ |
| Kojto | 107:4f6c30876dfa | 442 | #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \ |
| Kojto | 107:4f6c30876dfa | 443 | (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__))) |
| Kojto | 107:4f6c30876dfa | 444 | |
| Kojto | 107:4f6c30876dfa | 445 | /** |
| Kojto | 107:4f6c30876dfa | 446 | * @brief Clear the DMA Channel pending flags. |
| Kojto | 107:4f6c30876dfa | 447 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 448 | * @param __FLAG__: specifies the flag to clear. |
| Kojto | 107:4f6c30876dfa | 449 | * This parameter can be any combination of the following values: |
| Kojto | 107:4f6c30876dfa | 450 | * @arg DMA_FLAG_TCIFx: Transfer complete flag |
| Kojto | 107:4f6c30876dfa | 451 | * @arg DMA_FLAG_HTIFx: Half transfer complete flag |
| Kojto | 107:4f6c30876dfa | 452 | * @arg DMA_FLAG_TEIFx: Transfer error flag |
| Kojto | 107:4f6c30876dfa | 453 | * @arg DMA_ISR_GIFx: Global interrupt flag |
| Kojto | 107:4f6c30876dfa | 454 | * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag. |
| Kojto | 107:4f6c30876dfa | 455 | * @retval None |
| Kojto | 107:4f6c30876dfa | 456 | */ |
| Kojto | 107:4f6c30876dfa | 457 | #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \ |
| Kojto | 107:4f6c30876dfa | 458 | (DMA2->IFCR |= (__FLAG__)) : (DMA1->IFCR |= (__FLAG__))) |
| Kojto | 107:4f6c30876dfa | 459 | |
| Kojto | 107:4f6c30876dfa | 460 | /** |
| Kojto | 107:4f6c30876dfa | 461 | * @brief Enable the specified DMA Channel interrupts. |
| Kojto | 107:4f6c30876dfa | 462 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 463 | * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. |
| Kojto | 107:4f6c30876dfa | 464 | * This parameter can be any combination of the following values: |
| Kojto | 107:4f6c30876dfa | 465 | * @arg DMA_IT_TC: Transfer complete interrupt mask |
| Kojto | 107:4f6c30876dfa | 466 | * @arg DMA_IT_HT: Half transfer complete interrupt mask |
| Kojto | 107:4f6c30876dfa | 467 | * @arg DMA_IT_TE: Transfer error interrupt mask |
| Kojto | 107:4f6c30876dfa | 468 | * @retval None |
| Kojto | 107:4f6c30876dfa | 469 | */ |
| Kojto | 107:4f6c30876dfa | 470 | #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__)) |
| Kojto | 107:4f6c30876dfa | 471 | |
| Kojto | 107:4f6c30876dfa | 472 | /** |
| Kojto | 107:4f6c30876dfa | 473 | * @brief Disable the specified DMA Channel interrupts. |
| Kojto | 107:4f6c30876dfa | 474 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 475 | * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. |
| Kojto | 107:4f6c30876dfa | 476 | * This parameter can be any combination of the following values: |
| Kojto | 107:4f6c30876dfa | 477 | * @arg DMA_IT_TC: Transfer complete interrupt mask |
| Kojto | 107:4f6c30876dfa | 478 | * @arg DMA_IT_HT: Half transfer complete interrupt mask |
| Kojto | 107:4f6c30876dfa | 479 | * @arg DMA_IT_TE: Transfer error interrupt mask |
| Kojto | 107:4f6c30876dfa | 480 | * @retval None |
| Kojto | 107:4f6c30876dfa | 481 | */ |
| Kojto | 107:4f6c30876dfa | 482 | #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__)) |
| Kojto | 107:4f6c30876dfa | 483 | |
| Kojto | 107:4f6c30876dfa | 484 | /** |
| Kojto | 107:4f6c30876dfa | 485 | * @brief Check whether the specified DMA Channel interrupt is enabled or not. |
| Kojto | 107:4f6c30876dfa | 486 | * @param __HANDLE__: DMA handle |
| Kojto | 107:4f6c30876dfa | 487 | * @param __INTERRUPT__: specifies the DMA interrupt source to check. |
| Kojto | 107:4f6c30876dfa | 488 | * This parameter can be one of the following values: |
| Kojto | 107:4f6c30876dfa | 489 | * @arg DMA_IT_TC: Transfer complete interrupt mask |
| Kojto | 107:4f6c30876dfa | 490 | * @arg DMA_IT_HT: Half transfer complete interrupt mask |
| Kojto | 107:4f6c30876dfa | 491 | * @arg DMA_IT_TE: Transfer error interrupt mask |
| Kojto | 107:4f6c30876dfa | 492 | * @retval The state of DMA_IT (SET or RESET). |
| Kojto | 107:4f6c30876dfa | 493 | */ |
| Kojto | 107:4f6c30876dfa | 494 | #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__))) |
| Kojto | 107:4f6c30876dfa | 495 | |
| Kojto | 107:4f6c30876dfa | 496 | /** |
| Kojto | 107:4f6c30876dfa | 497 | * @} |
| Kojto | 107:4f6c30876dfa | 498 | */ |
| Kojto | 107:4f6c30876dfa | 499 | |
| Kojto | 107:4f6c30876dfa | 500 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 501 | |
| Kojto | 107:4f6c30876dfa | 502 | /** @addtogroup DMA_Exported_Functions |
| Kojto | 107:4f6c30876dfa | 503 | * @{ |
| Kojto | 107:4f6c30876dfa | 504 | */ |
| Kojto | 107:4f6c30876dfa | 505 | |
| Kojto | 107:4f6c30876dfa | 506 | /** @addtogroup DMA_Exported_Functions_Group1 |
| Kojto | 107:4f6c30876dfa | 507 | * @{ |
| Kojto | 107:4f6c30876dfa | 508 | */ |
| Kojto | 107:4f6c30876dfa | 509 | HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); |
| Kojto | 107:4f6c30876dfa | 510 | HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); |
| Kojto | 107:4f6c30876dfa | 511 | |
| Kojto | 107:4f6c30876dfa | 512 | /** |
| Kojto | 107:4f6c30876dfa | 513 | * @} |
| Kojto | 107:4f6c30876dfa | 514 | */ |
| Kojto | 107:4f6c30876dfa | 515 | |
| Kojto | 107:4f6c30876dfa | 516 | /** @addtogroup DMA_Exported_Functions_Group2 |
| Kojto | 107:4f6c30876dfa | 517 | * @{ |
| Kojto | 107:4f6c30876dfa | 518 | */ |
| Kojto | 107:4f6c30876dfa | 519 | HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
| Kojto | 107:4f6c30876dfa | 520 | HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
| Kojto | 107:4f6c30876dfa | 521 | HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma); |
| Kojto | 107:4f6c30876dfa | 522 | HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout); |
| Kojto | 107:4f6c30876dfa | 523 | void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma); |
| Kojto | 107:4f6c30876dfa | 524 | |
| Kojto | 107:4f6c30876dfa | 525 | /** |
| Kojto | 107:4f6c30876dfa | 526 | * @} |
| Kojto | 107:4f6c30876dfa | 527 | */ |
| Kojto | 107:4f6c30876dfa | 528 | |
| Kojto | 107:4f6c30876dfa | 529 | /** @addtogroup DMA_Exported_Functions_Group3 |
| Kojto | 107:4f6c30876dfa | 530 | * @{ |
| Kojto | 107:4f6c30876dfa | 531 | */ |
| Kojto | 107:4f6c30876dfa | 532 | |
| Kojto | 107:4f6c30876dfa | 533 | HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma); |
| Kojto | 107:4f6c30876dfa | 534 | uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); |
| Kojto | 107:4f6c30876dfa | 535 | |
| Kojto | 107:4f6c30876dfa | 536 | /** |
| Kojto | 107:4f6c30876dfa | 537 | * @} |
| Kojto | 107:4f6c30876dfa | 538 | */ |
| Kojto | 107:4f6c30876dfa | 539 | |
| Kojto | 107:4f6c30876dfa | 540 | /** |
| Kojto | 107:4f6c30876dfa | 541 | * @} |
| Kojto | 107:4f6c30876dfa | 542 | */ |
| Kojto | 107:4f6c30876dfa | 543 | |
| Kojto | 107:4f6c30876dfa | 544 | /* Private macros ------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 545 | /** @defgroup DMA_Private_Macros DMA Private Macros |
| Kojto | 107:4f6c30876dfa | 546 | * @{ |
| Kojto | 107:4f6c30876dfa | 547 | */ |
| Kojto | 107:4f6c30876dfa | 548 | |
| Kojto | 107:4f6c30876dfa | 549 | #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ |
| Kojto | 107:4f6c30876dfa | 550 | ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ |
| Kojto | 107:4f6c30876dfa | 551 | ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) |
| Kojto | 107:4f6c30876dfa | 552 | |
| Kojto | 107:4f6c30876dfa | 553 | #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) |
| Kojto | 107:4f6c30876dfa | 554 | |
| Kojto | 107:4f6c30876dfa | 555 | #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ |
| Kojto | 107:4f6c30876dfa | 556 | ((STATE) == DMA_PINC_DISABLE)) |
| Kojto | 107:4f6c30876dfa | 557 | |
| Kojto | 107:4f6c30876dfa | 558 | #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ |
| Kojto | 107:4f6c30876dfa | 559 | ((STATE) == DMA_MINC_DISABLE)) |
| Kojto | 107:4f6c30876dfa | 560 | |
| Kojto | 107:4f6c30876dfa | 561 | #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \ |
| Kojto | 107:4f6c30876dfa | 562 | ((REQUEST) == DMA_REQUEST_1) || \ |
| Kojto | 107:4f6c30876dfa | 563 | ((REQUEST) == DMA_REQUEST_2) || \ |
| Kojto | 107:4f6c30876dfa | 564 | ((REQUEST) == DMA_REQUEST_3) || \ |
| Kojto | 107:4f6c30876dfa | 565 | ((REQUEST) == DMA_REQUEST_4) || \ |
| Kojto | 107:4f6c30876dfa | 566 | ((REQUEST) == DMA_REQUEST_5) || \ |
| Kojto | 107:4f6c30876dfa | 567 | ((REQUEST) == DMA_REQUEST_6) || \ |
| Kojto | 107:4f6c30876dfa | 568 | ((REQUEST) == DMA_REQUEST_7)) |
| Kojto | 107:4f6c30876dfa | 569 | |
| Kojto | 107:4f6c30876dfa | 570 | #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ |
| Kojto | 107:4f6c30876dfa | 571 | ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ |
| Kojto | 107:4f6c30876dfa | 572 | ((SIZE) == DMA_PDATAALIGN_WORD)) |
| Kojto | 107:4f6c30876dfa | 573 | |
| Kojto | 107:4f6c30876dfa | 574 | |
| Kojto | 107:4f6c30876dfa | 575 | #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ |
| Kojto | 107:4f6c30876dfa | 576 | ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ |
| Kojto | 107:4f6c30876dfa | 577 | ((SIZE) == DMA_MDATAALIGN_WORD )) |
| Kojto | 107:4f6c30876dfa | 578 | |
| Kojto | 107:4f6c30876dfa | 579 | #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ |
| Kojto | 107:4f6c30876dfa | 580 | ((MODE) == DMA_CIRCULAR)) |
| Kojto | 107:4f6c30876dfa | 581 | |
| Kojto | 107:4f6c30876dfa | 582 | #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ |
| Kojto | 107:4f6c30876dfa | 583 | ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ |
| Kojto | 107:4f6c30876dfa | 584 | ((PRIORITY) == DMA_PRIORITY_HIGH) || \ |
| Kojto | 107:4f6c30876dfa | 585 | ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) |
| Kojto | 107:4f6c30876dfa | 586 | |
| Kojto | 107:4f6c30876dfa | 587 | /** |
| Kojto | 107:4f6c30876dfa | 588 | * @} |
| Kojto | 107:4f6c30876dfa | 589 | */ |
| Kojto | 107:4f6c30876dfa | 590 | |
| Kojto | 107:4f6c30876dfa | 591 | /* Private functions ---------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 592 | |
| Kojto | 107:4f6c30876dfa | 593 | /** |
| Kojto | 107:4f6c30876dfa | 594 | * @} |
| Kojto | 107:4f6c30876dfa | 595 | */ |
| Kojto | 107:4f6c30876dfa | 596 | |
| Kojto | 107:4f6c30876dfa | 597 | /** |
| Kojto | 107:4f6c30876dfa | 598 | * @} |
| Kojto | 107:4f6c30876dfa | 599 | */ |
| Kojto | 107:4f6c30876dfa | 600 | |
| Kojto | 107:4f6c30876dfa | 601 | #ifdef __cplusplus |
| Kojto | 107:4f6c30876dfa | 602 | } |
| Kojto | 107:4f6c30876dfa | 603 | #endif |
| Kojto | 107:4f6c30876dfa | 604 | |
| Kojto | 107:4f6c30876dfa | 605 | #endif /* __STM32L4xx_HAL_DMA_H */ |
| Kojto | 107:4f6c30876dfa | 606 | |
| Kojto | 107:4f6c30876dfa | 607 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |