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TARGET_DISCO_L476VG/stm32_hal_legacy.h@107:4f6c30876dfa, 2015-09-16 (annotated)

Committer:: Kojto
Date:: Wed Sep 16 15:32:31 2015 +0100
Revision:: 107:4f6c30876dfa

Release 107  of the mbed library



Changes:

- new platforms - DISCO_F746NG, DISCO_L476VG, NUCLEO_L476RG

- KL43Z - bugfix RTC init function

- K20 - SPI mode fix

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	107:4f6c30876dfa	1	/**
Kojto	107:4f6c30876dfa	2	******************************************************************************
Kojto	107:4f6c30876dfa	3	* @file stm32_hal_legacy.h
Kojto	107:4f6c30876dfa	4	* @author MCD Application Team
Kojto	107:4f6c30876dfa	5	* @version V1.0.0
Kojto	107:4f6c30876dfa	6	* @date 26-June-2015
Kojto	107:4f6c30876dfa	7	* @brief This file contains aliases definition for the STM32Cube HAL constants
Kojto	107:4f6c30876dfa	8	* macros and functions maintained for legacy purpose.
Kojto	107:4f6c30876dfa	9	******************************************************************************
Kojto	107:4f6c30876dfa	10	* @attention
Kojto	107:4f6c30876dfa	11	*
Kojto	107:4f6c30876dfa	12	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto	107:4f6c30876dfa	13	*
Kojto	107:4f6c30876dfa	14	* Redistribution and use in source and binary forms, with or without modification,
Kojto	107:4f6c30876dfa	15	* are permitted provided that the following conditions are met:
Kojto	107:4f6c30876dfa	16	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	107:4f6c30876dfa	17	* this list of conditions and the following disclaimer.
Kojto	107:4f6c30876dfa	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	107:4f6c30876dfa	19	* this list of conditions and the following disclaimer in the documentation
Kojto	107:4f6c30876dfa	20	* and/or other materials provided with the distribution.
Kojto	107:4f6c30876dfa	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	107:4f6c30876dfa	22	* may be used to endorse or promote products derived from this software
Kojto	107:4f6c30876dfa	23	* without specific prior written permission.
Kojto	107:4f6c30876dfa	24	*
Kojto	107:4f6c30876dfa	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	107:4f6c30876dfa	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	107:4f6c30876dfa	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	107:4f6c30876dfa	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	107:4f6c30876dfa	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	107:4f6c30876dfa	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	107:4f6c30876dfa	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	107:4f6c30876dfa	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	107:4f6c30876dfa	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	107:4f6c30876dfa	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	107:4f6c30876dfa	35	*
Kojto	107:4f6c30876dfa	36	******************************************************************************
Kojto	107:4f6c30876dfa	37	*/
Kojto	107:4f6c30876dfa	38
Kojto	107:4f6c30876dfa	39	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	107:4f6c30876dfa	40	#ifndef __STM32_HAL_LEGACY
Kojto	107:4f6c30876dfa	41	#define __STM32_HAL_LEGACY
Kojto	107:4f6c30876dfa	42
Kojto	107:4f6c30876dfa	43	#ifdef __cplusplus
Kojto	107:4f6c30876dfa	44	extern "C" {
Kojto	107:4f6c30876dfa	45	#endif
Kojto	107:4f6c30876dfa	46
Kojto	107:4f6c30876dfa	47	/* Includes ------------------------------------------------------------------*/
Kojto	107:4f6c30876dfa	48	/* Exported types ------------------------------------------------------------*/
Kojto	107:4f6c30876dfa	49	/* Exported constants --------------------------------------------------------*/
Kojto	107:4f6c30876dfa	50
Kojto	107:4f6c30876dfa	51	/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	52	* @{
Kojto	107:4f6c30876dfa	53	*/
Kojto	107:4f6c30876dfa	54	#define AES_FLAG_RDERR CRYP_FLAG_RDERR
Kojto	107:4f6c30876dfa	55	#define AES_FLAG_WRERR CRYP_FLAG_WRERR
Kojto	107:4f6c30876dfa	56	#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
Kojto	107:4f6c30876dfa	57	#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
Kojto	107:4f6c30876dfa	58	#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
Kojto	107:4f6c30876dfa	59
Kojto	107:4f6c30876dfa	60	/**
Kojto	107:4f6c30876dfa	61	* @}
Kojto	107:4f6c30876dfa	62	*/
Kojto	107:4f6c30876dfa	63
Kojto	107:4f6c30876dfa	64	/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	65	* @{
Kojto	107:4f6c30876dfa	66	*/
Kojto	107:4f6c30876dfa	67	#define ADC_RESOLUTION12b ADC_RESOLUTION_12B
Kojto	107:4f6c30876dfa	68	#define ADC_RESOLUTION10b ADC_RESOLUTION_10B
Kojto	107:4f6c30876dfa	69	#define ADC_RESOLUTION8b ADC_RESOLUTION_8B
Kojto	107:4f6c30876dfa	70	#define ADC_RESOLUTION6b ADC_RESOLUTION_6B
Kojto	107:4f6c30876dfa	71	#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
Kojto	107:4f6c30876dfa	72	#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
Kojto	107:4f6c30876dfa	73	#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
Kojto	107:4f6c30876dfa	74	#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
Kojto	107:4f6c30876dfa	75	#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
Kojto	107:4f6c30876dfa	76	#define REGULAR_GROUP ADC_REGULAR_GROUP
Kojto	107:4f6c30876dfa	77	#define INJECTED_GROUP ADC_INJECTED_GROUP
Kojto	107:4f6c30876dfa	78	#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
Kojto	107:4f6c30876dfa	79	#define AWD_EVENT ADC_AWD_EVENT
Kojto	107:4f6c30876dfa	80	#define AWD1_EVENT ADC_AWD1_EVENT
Kojto	107:4f6c30876dfa	81	#define AWD2_EVENT ADC_AWD2_EVENT
Kojto	107:4f6c30876dfa	82	#define AWD3_EVENT ADC_AWD3_EVENT
Kojto	107:4f6c30876dfa	83	#define OVR_EVENT ADC_OVR_EVENT
Kojto	107:4f6c30876dfa	84	#define JQOVF_EVENT ADC_JQOVF_EVENT
Kojto	107:4f6c30876dfa	85	#define ALL_CHANNELS ADC_ALL_CHANNELS
Kojto	107:4f6c30876dfa	86	#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
Kojto	107:4f6c30876dfa	87	#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
Kojto	107:4f6c30876dfa	88	#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
Kojto	107:4f6c30876dfa	89	#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
Kojto	107:4f6c30876dfa	90	#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
Kojto	107:4f6c30876dfa	91	#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
Kojto	107:4f6c30876dfa	92	#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
Kojto	107:4f6c30876dfa	93	#define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6
Kojto	107:4f6c30876dfa	94	#define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8
Kojto	107:4f6c30876dfa	95	#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
Kojto	107:4f6c30876dfa	96	#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
Kojto	107:4f6c30876dfa	97	#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
Kojto	107:4f6c30876dfa	98	#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
Kojto	107:4f6c30876dfa	99	#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
Kojto	107:4f6c30876dfa	100	#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
Kojto	107:4f6c30876dfa	101	#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
Kojto	107:4f6c30876dfa	102	#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
Kojto	107:4f6c30876dfa	103	#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
Kojto	107:4f6c30876dfa	104	#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
Kojto	107:4f6c30876dfa	105	#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
Kojto	107:4f6c30876dfa	106	/**
Kojto	107:4f6c30876dfa	107	* @}
Kojto	107:4f6c30876dfa	108	*/
Kojto	107:4f6c30876dfa	109
Kojto	107:4f6c30876dfa	110	/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	111	* @{
Kojto	107:4f6c30876dfa	112	*/
Kojto	107:4f6c30876dfa	113
Kojto	107:4f6c30876dfa	114	#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
Kojto	107:4f6c30876dfa	115
Kojto	107:4f6c30876dfa	116	/**
Kojto	107:4f6c30876dfa	117	* @}
Kojto	107:4f6c30876dfa	118	*/
Kojto	107:4f6c30876dfa	119
Kojto	107:4f6c30876dfa	120	/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	121	* @{
Kojto	107:4f6c30876dfa	122	*/
Kojto	107:4f6c30876dfa	123
Kojto	107:4f6c30876dfa	124	#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
Kojto	107:4f6c30876dfa	125	#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
Kojto	107:4f6c30876dfa	126	#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
Kojto	107:4f6c30876dfa	127	#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
Kojto	107:4f6c30876dfa	128
Kojto	107:4f6c30876dfa	129	/**
Kojto	107:4f6c30876dfa	130	* @}
Kojto	107:4f6c30876dfa	131	*/
Kojto	107:4f6c30876dfa	132
Kojto	107:4f6c30876dfa	133	/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	134	* @{
Kojto	107:4f6c30876dfa	135	*/
Kojto	107:4f6c30876dfa	136
Kojto	107:4f6c30876dfa	137	#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
Kojto	107:4f6c30876dfa	138	#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
Kojto	107:4f6c30876dfa	139
Kojto	107:4f6c30876dfa	140	/**
Kojto	107:4f6c30876dfa	141	* @}
Kojto	107:4f6c30876dfa	142	*/
Kojto	107:4f6c30876dfa	143
Kojto	107:4f6c30876dfa	144	/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	145	* @{
Kojto	107:4f6c30876dfa	146	*/
Kojto	107:4f6c30876dfa	147
Kojto	107:4f6c30876dfa	148	#define DAC1_CHANNEL_1 DAC_CHANNEL_1
Kojto	107:4f6c30876dfa	149	#define DAC1_CHANNEL_2 DAC_CHANNEL_2
Kojto	107:4f6c30876dfa	150	#define DAC2_CHANNEL_1 DAC_CHANNEL_1
Kojto	107:4f6c30876dfa	151	#define DAC_WAVE_NONE ((uint32_t)0x00000000)
Kojto	107:4f6c30876dfa	152	#define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0)
Kojto	107:4f6c30876dfa	153	#define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1)
Kojto	107:4f6c30876dfa	154	#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
Kojto	107:4f6c30876dfa	155	#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
Kojto	107:4f6c30876dfa	156	#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
Kojto	107:4f6c30876dfa	157
Kojto	107:4f6c30876dfa	158	/**
Kojto	107:4f6c30876dfa	159	* @}
Kojto	107:4f6c30876dfa	160	*/
Kojto	107:4f6c30876dfa	161
Kojto	107:4f6c30876dfa	162	/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	163	* @{
Kojto	107:4f6c30876dfa	164	*/
Kojto	107:4f6c30876dfa	165	#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2
Kojto	107:4f6c30876dfa	166	#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4
Kojto	107:4f6c30876dfa	167	#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5
Kojto	107:4f6c30876dfa	168	#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4
Kojto	107:4f6c30876dfa	169	#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2
Kojto	107:4f6c30876dfa	170	#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
Kojto	107:4f6c30876dfa	171	#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6
Kojto	107:4f6c30876dfa	172	#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
Kojto	107:4f6c30876dfa	173	#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
Kojto	107:4f6c30876dfa	174	#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
Kojto	107:4f6c30876dfa	175	#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
Kojto	107:4f6c30876dfa	176	#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
Kojto	107:4f6c30876dfa	177	#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
Kojto	107:4f6c30876dfa	178	#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
Kojto	107:4f6c30876dfa	179	#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6
Kojto	107:4f6c30876dfa	180
Kojto	107:4f6c30876dfa	181	#define IS_HAL_REMAPDMA IS_DMA_REMAP
Kojto	107:4f6c30876dfa	182	#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE
Kojto	107:4f6c30876dfa	183	#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE
Kojto	107:4f6c30876dfa	184
Kojto	107:4f6c30876dfa	185
Kojto	107:4f6c30876dfa	186
Kojto	107:4f6c30876dfa	187	/**
Kojto	107:4f6c30876dfa	188	* @}
Kojto	107:4f6c30876dfa	189	*/
Kojto	107:4f6c30876dfa	190
Kojto	107:4f6c30876dfa	191	/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	192	* @{
Kojto	107:4f6c30876dfa	193	*/
Kojto	107:4f6c30876dfa	194
Kojto	107:4f6c30876dfa	195	#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
Kojto	107:4f6c30876dfa	196	#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
Kojto	107:4f6c30876dfa	197	#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
Kojto	107:4f6c30876dfa	198	#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
Kojto	107:4f6c30876dfa	199	#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
Kojto	107:4f6c30876dfa	200	#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
Kojto	107:4f6c30876dfa	201	#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
Kojto	107:4f6c30876dfa	202	#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
Kojto	107:4f6c30876dfa	203	#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
Kojto	107:4f6c30876dfa	204	#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
Kojto	107:4f6c30876dfa	205	#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
Kojto	107:4f6c30876dfa	206	#define OBEX_PCROP OPTIONBYTE_PCROP
Kojto	107:4f6c30876dfa	207	#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
Kojto	107:4f6c30876dfa	208	#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
Kojto	107:4f6c30876dfa	209	#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
Kojto	107:4f6c30876dfa	210	#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
Kojto	107:4f6c30876dfa	211	#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
Kojto	107:4f6c30876dfa	212	#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
Kojto	107:4f6c30876dfa	213	#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
Kojto	107:4f6c30876dfa	214	#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
Kojto	107:4f6c30876dfa	215	#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
Kojto	107:4f6c30876dfa	216	#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
Kojto	107:4f6c30876dfa	217	#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
Kojto	107:4f6c30876dfa	218	#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
Kojto	107:4f6c30876dfa	219	#define PAGESIZE FLASH_PAGE_SIZE
Kojto	107:4f6c30876dfa	220	#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
Kojto	107:4f6c30876dfa	221	#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
Kojto	107:4f6c30876dfa	222	#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
Kojto	107:4f6c30876dfa	223	#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
Kojto	107:4f6c30876dfa	224	#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
Kojto	107:4f6c30876dfa	225	#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
Kojto	107:4f6c30876dfa	226	#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
Kojto	107:4f6c30876dfa	227	#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
Kojto	107:4f6c30876dfa	228	#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
Kojto	107:4f6c30876dfa	229	#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
Kojto	107:4f6c30876dfa	230	#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
Kojto	107:4f6c30876dfa	231	#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
Kojto	107:4f6c30876dfa	232	#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
Kojto	107:4f6c30876dfa	233	#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
Kojto	107:4f6c30876dfa	234	#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
Kojto	107:4f6c30876dfa	235	#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
Kojto	107:4f6c30876dfa	236	#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
Kojto	107:4f6c30876dfa	237	#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
Kojto	107:4f6c30876dfa	238	#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
Kojto	107:4f6c30876dfa	239	#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
Kojto	107:4f6c30876dfa	240	#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
Kojto	107:4f6c30876dfa	241	#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
Kojto	107:4f6c30876dfa	242	#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
Kojto	107:4f6c30876dfa	243	#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
Kojto	107:4f6c30876dfa	244	#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
Kojto	107:4f6c30876dfa	245	#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
Kojto	107:4f6c30876dfa	246	#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
Kojto	107:4f6c30876dfa	247	#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
Kojto	107:4f6c30876dfa	248	#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
Kojto	107:4f6c30876dfa	249	#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
Kojto	107:4f6c30876dfa	250	#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
Kojto	107:4f6c30876dfa	251	#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
Kojto	107:4f6c30876dfa	252	#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
Kojto	107:4f6c30876dfa	253	#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
Kojto	107:4f6c30876dfa	254	#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
Kojto	107:4f6c30876dfa	255	#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
Kojto	107:4f6c30876dfa	256	#define OB_WDG_SW OB_IWDG_SW
Kojto	107:4f6c30876dfa	257	#define OB_WDG_HW OB_IWDG_HW
Kojto	107:4f6c30876dfa	258
Kojto	107:4f6c30876dfa	259	/**
Kojto	107:4f6c30876dfa	260	* @}
Kojto	107:4f6c30876dfa	261	*/
Kojto	107:4f6c30876dfa	262
Kojto	107:4f6c30876dfa	263	/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	264	* @{
Kojto	107:4f6c30876dfa	265	*/
Kojto	107:4f6c30876dfa	266
Kojto	107:4f6c30876dfa	267	#define SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
Kojto	107:4f6c30876dfa	268	#define SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
Kojto	107:4f6c30876dfa	269	#define SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
Kojto	107:4f6c30876dfa	270	#define SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
Kojto	107:4f6c30876dfa	271	#define SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
Kojto	107:4f6c30876dfa	272	#define SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
Kojto	107:4f6c30876dfa	273	#define SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
Kojto	107:4f6c30876dfa	274
Kojto	107:4f6c30876dfa	275	/**
Kojto	107:4f6c30876dfa	276	* @}
Kojto	107:4f6c30876dfa	277	*/
Kojto	107:4f6c30876dfa	278
Kojto	107:4f6c30876dfa	279
Kojto	107:4f6c30876dfa	280	/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
Kojto	107:4f6c30876dfa	281	* @{
Kojto	107:4f6c30876dfa	282	*/
Kojto	107:4f6c30876dfa	283	#if defined(STM32L4) \|\| defined(STM32F7)
Kojto	107:4f6c30876dfa	284	#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
Kojto	107:4f6c30876dfa	285	#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
Kojto	107:4f6c30876dfa	286	#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
Kojto	107:4f6c30876dfa	287	#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16
Kojto	107:4f6c30876dfa	288	#else
Kojto	107:4f6c30876dfa	289	#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE
Kojto	107:4f6c30876dfa	290	#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE
Kojto	107:4f6c30876dfa	291	#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8
Kojto	107:4f6c30876dfa	292	#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16
Kojto	107:4f6c30876dfa	293	#endif
Kojto	107:4f6c30876dfa	294	/**
Kojto	107:4f6c30876dfa	295	* @}
Kojto	107:4f6c30876dfa	296	*/
Kojto	107:4f6c30876dfa	297
Kojto	107:4f6c30876dfa	298	/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	299	* @{
Kojto	107:4f6c30876dfa	300	*/
Kojto	107:4f6c30876dfa	301
Kojto	107:4f6c30876dfa	302	#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
Kojto	107:4f6c30876dfa	303	#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
Kojto	107:4f6c30876dfa	304	/**
Kojto	107:4f6c30876dfa	305	* @}
Kojto	107:4f6c30876dfa	306	*/
Kojto	107:4f6c30876dfa	307
Kojto	107:4f6c30876dfa	308	/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	309	* @{
Kojto	107:4f6c30876dfa	310	*/
Kojto	107:4f6c30876dfa	311	#define GET_GPIO_SOURCE GPIO_GET_INDEX
Kojto	107:4f6c30876dfa	312	#define GET_GPIO_INDEX GPIO_GET_INDEX
Kojto	107:4f6c30876dfa	313
Kojto	107:4f6c30876dfa	314	#if defined(STM32F4)
Kojto	107:4f6c30876dfa	315	#define GPIO_AF12_SDMMC GPIO_AF12_SDIO
Kojto	107:4f6c30876dfa	316	#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO
Kojto	107:4f6c30876dfa	317	#endif
Kojto	107:4f6c30876dfa	318
Kojto	107:4f6c30876dfa	319	#if defined(STM32F7)
Kojto	107:4f6c30876dfa	320	#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
Kojto	107:4f6c30876dfa	321	#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
Kojto	107:4f6c30876dfa	322	#endif
Kojto	107:4f6c30876dfa	323
Kojto	107:4f6c30876dfa	324	#if defined(STM32L4)
Kojto	107:4f6c30876dfa	325	#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
Kojto	107:4f6c30876dfa	326	#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
Kojto	107:4f6c30876dfa	327	#endif
Kojto	107:4f6c30876dfa	328
Kojto	107:4f6c30876dfa	329	#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
Kojto	107:4f6c30876dfa	330	#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
Kojto	107:4f6c30876dfa	331	#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
Kojto	107:4f6c30876dfa	332
Kojto	107:4f6c30876dfa	333	/**
Kojto	107:4f6c30876dfa	334	* @}
Kojto	107:4f6c30876dfa	335	*/
Kojto	107:4f6c30876dfa	336
Kojto	107:4f6c30876dfa	337	/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	338	* @{
Kojto	107:4f6c30876dfa	339	*/
Kojto	107:4f6c30876dfa	340	#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
Kojto	107:4f6c30876dfa	341	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
Kojto	107:4f6c30876dfa	342	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
Kojto	107:4f6c30876dfa	343	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
Kojto	107:4f6c30876dfa	344	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
Kojto	107:4f6c30876dfa	345	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
Kojto	107:4f6c30876dfa	346	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
Kojto	107:4f6c30876dfa	347	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
Kojto	107:4f6c30876dfa	348	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
Kojto	107:4f6c30876dfa	349	/**
Kojto	107:4f6c30876dfa	350	* @}
Kojto	107:4f6c30876dfa	351	*/
Kojto	107:4f6c30876dfa	352
Kojto	107:4f6c30876dfa	353	/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	354	* @{
Kojto	107:4f6c30876dfa	355	*/
Kojto	107:4f6c30876dfa	356	#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
Kojto	107:4f6c30876dfa	357	#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
Kojto	107:4f6c30876dfa	358	#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
Kojto	107:4f6c30876dfa	359	#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
Kojto	107:4f6c30876dfa	360	#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
Kojto	107:4f6c30876dfa	361	#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
Kojto	107:4f6c30876dfa	362	#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
Kojto	107:4f6c30876dfa	363	#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
Kojto	107:4f6c30876dfa	364	/**
Kojto	107:4f6c30876dfa	365	* @}
Kojto	107:4f6c30876dfa	366	*/
Kojto	107:4f6c30876dfa	367
Kojto	107:4f6c30876dfa	368	/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	369	* @{
Kojto	107:4f6c30876dfa	370	*/
Kojto	107:4f6c30876dfa	371	#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
Kojto	107:4f6c30876dfa	372	#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
Kojto	107:4f6c30876dfa	373
Kojto	107:4f6c30876dfa	374	/**
Kojto	107:4f6c30876dfa	375	* @}
Kojto	107:4f6c30876dfa	376	*/
Kojto	107:4f6c30876dfa	377
Kojto	107:4f6c30876dfa	378	/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	379	* @{
Kojto	107:4f6c30876dfa	380	*/
Kojto	107:4f6c30876dfa	381	#define KR_KEY_RELOAD IWDG_KEY_RELOAD
Kojto	107:4f6c30876dfa	382	#define KR_KEY_ENABLE IWDG_KEY_ENABLE
Kojto	107:4f6c30876dfa	383	#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
Kojto	107:4f6c30876dfa	384	#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
Kojto	107:4f6c30876dfa	385	/**
Kojto	107:4f6c30876dfa	386	* @}
Kojto	107:4f6c30876dfa	387	*/
Kojto	107:4f6c30876dfa	388
Kojto	107:4f6c30876dfa	389	/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	390	* @{
Kojto	107:4f6c30876dfa	391	*/
Kojto	107:4f6c30876dfa	392
Kojto	107:4f6c30876dfa	393	#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
Kojto	107:4f6c30876dfa	394	#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
Kojto	107:4f6c30876dfa	395	#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
Kojto	107:4f6c30876dfa	396	#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
Kojto	107:4f6c30876dfa	397
Kojto	107:4f6c30876dfa	398	#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
Kojto	107:4f6c30876dfa	399	#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
Kojto	107:4f6c30876dfa	400	#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
Kojto	107:4f6c30876dfa	401
Kojto	107:4f6c30876dfa	402	#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSISTIONS
Kojto	107:4f6c30876dfa	403	#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSISTIONS
Kojto	107:4f6c30876dfa	404	#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSISTIONS
Kojto	107:4f6c30876dfa	405
Kojto	107:4f6c30876dfa	406	/**
Kojto	107:4f6c30876dfa	407	* @}
Kojto	107:4f6c30876dfa	408	*/
Kojto	107:4f6c30876dfa	409
Kojto	107:4f6c30876dfa	410	/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	411	* @{
Kojto	107:4f6c30876dfa	412	*/
Kojto	107:4f6c30876dfa	413	#define NAND_AddressTypedef NAND_AddressTypeDef
Kojto	107:4f6c30876dfa	414
Kojto	107:4f6c30876dfa	415	#define __ARRAY_ADDRESS ARRAY_ADDRESS
Kojto	107:4f6c30876dfa	416	#define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
Kojto	107:4f6c30876dfa	417	#define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
Kojto	107:4f6c30876dfa	418	#define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
Kojto	107:4f6c30876dfa	419	#define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
Kojto	107:4f6c30876dfa	420	/**
Kojto	107:4f6c30876dfa	421	* @}
Kojto	107:4f6c30876dfa	422	*/
Kojto	107:4f6c30876dfa	423
Kojto	107:4f6c30876dfa	424	/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	425	* @{
Kojto	107:4f6c30876dfa	426	*/
Kojto	107:4f6c30876dfa	427	#define NOR_StatusTypedef HAL_NOR_StatusTypeDef
Kojto	107:4f6c30876dfa	428	#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
Kojto	107:4f6c30876dfa	429	#define NOR_ONGOING HAL_NOR_STATUS_ONGOING
Kojto	107:4f6c30876dfa	430	#define NOR_ERROR HAL_NOR_STATUS_ERROR
Kojto	107:4f6c30876dfa	431	#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
Kojto	107:4f6c30876dfa	432
Kojto	107:4f6c30876dfa	433	#define __NOR_WRITE NOR_WRITE
Kojto	107:4f6c30876dfa	434	#define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
Kojto	107:4f6c30876dfa	435	/**
Kojto	107:4f6c30876dfa	436	* @}
Kojto	107:4f6c30876dfa	437	*/
Kojto	107:4f6c30876dfa	438
Kojto	107:4f6c30876dfa	439	/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	440	* @{
Kojto	107:4f6c30876dfa	441	*/
Kojto	107:4f6c30876dfa	442
Kojto	107:4f6c30876dfa	443	#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
Kojto	107:4f6c30876dfa	444	#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	445	#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
Kojto	107:4f6c30876dfa	446	#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
Kojto	107:4f6c30876dfa	447
Kojto	107:4f6c30876dfa	448	#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
Kojto	107:4f6c30876dfa	449	#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	450	#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
Kojto	107:4f6c30876dfa	451	#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
Kojto	107:4f6c30876dfa	452
Kojto	107:4f6c30876dfa	453	#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
Kojto	107:4f6c30876dfa	454	#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	455
Kojto	107:4f6c30876dfa	456	#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
Kojto	107:4f6c30876dfa	457	#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	458
Kojto	107:4f6c30876dfa	459	#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
Kojto	107:4f6c30876dfa	460	#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	461
Kojto	107:4f6c30876dfa	462	#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	463
Kojto	107:4f6c30876dfa	464	#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
Kojto	107:4f6c30876dfa	465	#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
Kojto	107:4f6c30876dfa	466	#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
Kojto	107:4f6c30876dfa	467
Kojto	107:4f6c30876dfa	468	/**
Kojto	107:4f6c30876dfa	469	* @}
Kojto	107:4f6c30876dfa	470	*/
Kojto	107:4f6c30876dfa	471
Kojto	107:4f6c30876dfa	472	/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	473	* @{
Kojto	107:4f6c30876dfa	474	*/
Kojto	107:4f6c30876dfa	475	#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
Kojto	107:4f6c30876dfa	476	/**
Kojto	107:4f6c30876dfa	477	* @}
Kojto	107:4f6c30876dfa	478	*/
Kojto	107:4f6c30876dfa	479
Kojto	107:4f6c30876dfa	480	/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	481	* @{
Kojto	107:4f6c30876dfa	482	*/
Kojto	107:4f6c30876dfa	483
Kojto	107:4f6c30876dfa	484	/* Compact Flash-ATA registers description */
Kojto	107:4f6c30876dfa	485	#define CF_DATA ATA_DATA
Kojto	107:4f6c30876dfa	486	#define CF_SECTOR_COUNT ATA_SECTOR_COUNT
Kojto	107:4f6c30876dfa	487	#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
Kojto	107:4f6c30876dfa	488	#define CF_CYLINDER_LOW ATA_CYLINDER_LOW
Kojto	107:4f6c30876dfa	489	#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
Kojto	107:4f6c30876dfa	490	#define CF_CARD_HEAD ATA_CARD_HEAD
Kojto	107:4f6c30876dfa	491	#define CF_STATUS_CMD ATA_STATUS_CMD
Kojto	107:4f6c30876dfa	492	#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
Kojto	107:4f6c30876dfa	493	#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
Kojto	107:4f6c30876dfa	494
Kojto	107:4f6c30876dfa	495	/* Compact Flash-ATA commands */
Kojto	107:4f6c30876dfa	496	#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
Kojto	107:4f6c30876dfa	497	#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
Kojto	107:4f6c30876dfa	498	#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
Kojto	107:4f6c30876dfa	499	#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
Kojto	107:4f6c30876dfa	500
Kojto	107:4f6c30876dfa	501	#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
Kojto	107:4f6c30876dfa	502	#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
Kojto	107:4f6c30876dfa	503	#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
Kojto	107:4f6c30876dfa	504	#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
Kojto	107:4f6c30876dfa	505	#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
Kojto	107:4f6c30876dfa	506	/**
Kojto	107:4f6c30876dfa	507	* @}
Kojto	107:4f6c30876dfa	508	*/
Kojto	107:4f6c30876dfa	509
Kojto	107:4f6c30876dfa	510	/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	511	* @{
Kojto	107:4f6c30876dfa	512	*/
Kojto	107:4f6c30876dfa	513
Kojto	107:4f6c30876dfa	514	#define FORMAT_BIN RTC_FORMAT_BIN
Kojto	107:4f6c30876dfa	515	#define FORMAT_BCD RTC_FORMAT_BCD
Kojto	107:4f6c30876dfa	516
Kojto	107:4f6c30876dfa	517	#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
Kojto	107:4f6c30876dfa	518	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
Kojto	107:4f6c30876dfa	519	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
Kojto	107:4f6c30876dfa	520	#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	107:4f6c30876dfa	521	#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	107:4f6c30876dfa	522
Kojto	107:4f6c30876dfa	523	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	107:4f6c30876dfa	524	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	107:4f6c30876dfa	525	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
Kojto	107:4f6c30876dfa	526	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
Kojto	107:4f6c30876dfa	527	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	107:4f6c30876dfa	528	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	107:4f6c30876dfa	529	#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
Kojto	107:4f6c30876dfa	530	#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
Kojto	107:4f6c30876dfa	531
Kojto	107:4f6c30876dfa	532	#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
Kojto	107:4f6c30876dfa	533
Kojto	107:4f6c30876dfa	534	#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
Kojto	107:4f6c30876dfa	535	#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1
Kojto	107:4f6c30876dfa	536	#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1
Kojto	107:4f6c30876dfa	537
Kojto	107:4f6c30876dfa	538	/**
Kojto	107:4f6c30876dfa	539	* @}
Kojto	107:4f6c30876dfa	540	*/
Kojto	107:4f6c30876dfa	541
Kojto	107:4f6c30876dfa	542
Kojto	107:4f6c30876dfa	543	/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	544	* @{
Kojto	107:4f6c30876dfa	545	*/
Kojto	107:4f6c30876dfa	546	#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
Kojto	107:4f6c30876dfa	547	#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
Kojto	107:4f6c30876dfa	548
Kojto	107:4f6c30876dfa	549	#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
Kojto	107:4f6c30876dfa	550	#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
Kojto	107:4f6c30876dfa	551	#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
Kojto	107:4f6c30876dfa	552	#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
Kojto	107:4f6c30876dfa	553
Kojto	107:4f6c30876dfa	554	#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
Kojto	107:4f6c30876dfa	555	#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
Kojto	107:4f6c30876dfa	556
Kojto	107:4f6c30876dfa	557	#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
Kojto	107:4f6c30876dfa	558	#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
Kojto	107:4f6c30876dfa	559	/**
Kojto	107:4f6c30876dfa	560	* @}
Kojto	107:4f6c30876dfa	561	*/
Kojto	107:4f6c30876dfa	562
Kojto	107:4f6c30876dfa	563
Kojto	107:4f6c30876dfa	564	/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	565	* @{
Kojto	107:4f6c30876dfa	566	*/
Kojto	107:4f6c30876dfa	567	#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
Kojto	107:4f6c30876dfa	568	#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
Kojto	107:4f6c30876dfa	569	#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
Kojto	107:4f6c30876dfa	570	#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
Kojto	107:4f6c30876dfa	571	#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
Kojto	107:4f6c30876dfa	572	#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
Kojto	107:4f6c30876dfa	573	#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
Kojto	107:4f6c30876dfa	574	#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
Kojto	107:4f6c30876dfa	575	#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE
Kojto	107:4f6c30876dfa	576	#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE
Kojto	107:4f6c30876dfa	577	#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
Kojto	107:4f6c30876dfa	578	/**
Kojto	107:4f6c30876dfa	579	* @}
Kojto	107:4f6c30876dfa	580	*/
Kojto	107:4f6c30876dfa	581
Kojto	107:4f6c30876dfa	582	/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	583	* @{
Kojto	107:4f6c30876dfa	584	*/
Kojto	107:4f6c30876dfa	585	#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
Kojto	107:4f6c30876dfa	586	#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
Kojto	107:4f6c30876dfa	587
Kojto	107:4f6c30876dfa	588	#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
Kojto	107:4f6c30876dfa	589	#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
Kojto	107:4f6c30876dfa	590
Kojto	107:4f6c30876dfa	591	#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
Kojto	107:4f6c30876dfa	592	#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
Kojto	107:4f6c30876dfa	593
Kojto	107:4f6c30876dfa	594	/**
Kojto	107:4f6c30876dfa	595	* @}
Kojto	107:4f6c30876dfa	596	*/
Kojto	107:4f6c30876dfa	597
Kojto	107:4f6c30876dfa	598	/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	599	* @{
Kojto	107:4f6c30876dfa	600	*/
Kojto	107:4f6c30876dfa	601	#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
Kojto	107:4f6c30876dfa	602	#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
Kojto	107:4f6c30876dfa	603
Kojto	107:4f6c30876dfa	604	#define TIM_DMABase_CR1 TIM_DMABASE_CR1
Kojto	107:4f6c30876dfa	605	#define TIM_DMABase_CR2 TIM_DMABASE_CR2
Kojto	107:4f6c30876dfa	606	#define TIM_DMABase_SMCR TIM_DMABASE_SMCR
Kojto	107:4f6c30876dfa	607	#define TIM_DMABase_DIER TIM_DMABASE_DIER
Kojto	107:4f6c30876dfa	608	#define TIM_DMABase_SR TIM_DMABASE_SR
Kojto	107:4f6c30876dfa	609	#define TIM_DMABase_EGR TIM_DMABASE_EGR
Kojto	107:4f6c30876dfa	610	#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
Kojto	107:4f6c30876dfa	611	#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
Kojto	107:4f6c30876dfa	612	#define TIM_DMABase_CCER TIM_DMABASE_CCER
Kojto	107:4f6c30876dfa	613	#define TIM_DMABase_CNT TIM_DMABASE_CNT
Kojto	107:4f6c30876dfa	614	#define TIM_DMABase_PSC TIM_DMABASE_PSC
Kojto	107:4f6c30876dfa	615	#define TIM_DMABase_ARR TIM_DMABASE_ARR
Kojto	107:4f6c30876dfa	616	#define TIM_DMABase_RCR TIM_DMABASE_RCR
Kojto	107:4f6c30876dfa	617	#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
Kojto	107:4f6c30876dfa	618	#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
Kojto	107:4f6c30876dfa	619	#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
Kojto	107:4f6c30876dfa	620	#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
Kojto	107:4f6c30876dfa	621	#define TIM_DMABase_BDTR TIM_DMABASE_BDTR
Kojto	107:4f6c30876dfa	622	#define TIM_DMABase_DCR TIM_DMABASE_DCR
Kojto	107:4f6c30876dfa	623	#define TIM_DMABase_DMAR TIM_DMABASE_DMAR
Kojto	107:4f6c30876dfa	624	#define TIM_DMABase_OR1 TIM_DMABASE_OR1
Kojto	107:4f6c30876dfa	625	#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
Kojto	107:4f6c30876dfa	626	#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
Kojto	107:4f6c30876dfa	627	#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
Kojto	107:4f6c30876dfa	628	#define TIM_DMABase_OR2 TIM_DMABASE_OR2
Kojto	107:4f6c30876dfa	629	#define TIM_DMABase_OR3 TIM_DMABASE_OR3
Kojto	107:4f6c30876dfa	630	#define TIM_DMABase_OR TIM_DMABASE_OR
Kojto	107:4f6c30876dfa	631
Kojto	107:4f6c30876dfa	632	#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
Kojto	107:4f6c30876dfa	633	#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
Kojto	107:4f6c30876dfa	634	#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
Kojto	107:4f6c30876dfa	635	#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
Kojto	107:4f6c30876dfa	636	#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
Kojto	107:4f6c30876dfa	637	#define TIM_EventSource_COM TIM_EVENTSOURCE_COM
Kojto	107:4f6c30876dfa	638	#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
Kojto	107:4f6c30876dfa	639	#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
Kojto	107:4f6c30876dfa	640	#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
Kojto	107:4f6c30876dfa	641
Kojto	107:4f6c30876dfa	642	#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
Kojto	107:4f6c30876dfa	643	#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
Kojto	107:4f6c30876dfa	644	#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
Kojto	107:4f6c30876dfa	645	#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
Kojto	107:4f6c30876dfa	646	#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
Kojto	107:4f6c30876dfa	647	#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
Kojto	107:4f6c30876dfa	648	#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
Kojto	107:4f6c30876dfa	649	#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
Kojto	107:4f6c30876dfa	650	#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
Kojto	107:4f6c30876dfa	651	#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
Kojto	107:4f6c30876dfa	652	#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
Kojto	107:4f6c30876dfa	653	#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
Kojto	107:4f6c30876dfa	654	#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
Kojto	107:4f6c30876dfa	655	#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
Kojto	107:4f6c30876dfa	656	#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
Kojto	107:4f6c30876dfa	657	#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
Kojto	107:4f6c30876dfa	658	#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
Kojto	107:4f6c30876dfa	659	#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
Kojto	107:4f6c30876dfa	660
Kojto	107:4f6c30876dfa	661	/**
Kojto	107:4f6c30876dfa	662	* @}
Kojto	107:4f6c30876dfa	663	*/
Kojto	107:4f6c30876dfa	664
Kojto	107:4f6c30876dfa	665	/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	666	* @{
Kojto	107:4f6c30876dfa	667	*/
Kojto	107:4f6c30876dfa	668	#define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING
Kojto	107:4f6c30876dfa	669	#define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING
Kojto	107:4f6c30876dfa	670	/**
Kojto	107:4f6c30876dfa	671	* @}
Kojto	107:4f6c30876dfa	672	*/
Kojto	107:4f6c30876dfa	673
Kojto	107:4f6c30876dfa	674	/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	675	* @{
Kojto	107:4f6c30876dfa	676	*/
Kojto	107:4f6c30876dfa	677	#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
Kojto	107:4f6c30876dfa	678	#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
Kojto	107:4f6c30876dfa	679	#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
Kojto	107:4f6c30876dfa	680	#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
Kojto	107:4f6c30876dfa	681
Kojto	107:4f6c30876dfa	682	#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
Kojto	107:4f6c30876dfa	683	#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
Kojto	107:4f6c30876dfa	684
Kojto	107:4f6c30876dfa	685	#define __DIV_SAMPLING16 UART_DIV_SAMPLING16
Kojto	107:4f6c30876dfa	686	#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
Kojto	107:4f6c30876dfa	687	#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
Kojto	107:4f6c30876dfa	688	#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
Kojto	107:4f6c30876dfa	689
Kojto	107:4f6c30876dfa	690	#define __DIV_SAMPLING8 UART_DIV_SAMPLING8
Kojto	107:4f6c30876dfa	691	#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
Kojto	107:4f6c30876dfa	692	#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
Kojto	107:4f6c30876dfa	693	#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
Kojto	107:4f6c30876dfa	694
Kojto	107:4f6c30876dfa	695	#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
Kojto	107:4f6c30876dfa	696	#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
Kojto	107:4f6c30876dfa	697
Kojto	107:4f6c30876dfa	698	/**
Kojto	107:4f6c30876dfa	699	* @}
Kojto	107:4f6c30876dfa	700	*/
Kojto	107:4f6c30876dfa	701
Kojto	107:4f6c30876dfa	702
Kojto	107:4f6c30876dfa	703	/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	704	* @{
Kojto	107:4f6c30876dfa	705	*/
Kojto	107:4f6c30876dfa	706
Kojto	107:4f6c30876dfa	707	#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
Kojto	107:4f6c30876dfa	708	#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
Kojto	107:4f6c30876dfa	709
Kojto	107:4f6c30876dfa	710	#define USARTNACK_ENABLED USART_NACK_ENABLE
Kojto	107:4f6c30876dfa	711	#define USARTNACK_DISABLED USART_NACK_DISABLE
Kojto	107:4f6c30876dfa	712	/**
Kojto	107:4f6c30876dfa	713	* @}
Kojto	107:4f6c30876dfa	714	*/
Kojto	107:4f6c30876dfa	715
Kojto	107:4f6c30876dfa	716	/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	717	* @{
Kojto	107:4f6c30876dfa	718	*/
Kojto	107:4f6c30876dfa	719	#define CFR_BASE WWDG_CFR_BASE
Kojto	107:4f6c30876dfa	720
Kojto	107:4f6c30876dfa	721	/**
Kojto	107:4f6c30876dfa	722	* @}
Kojto	107:4f6c30876dfa	723	*/
Kojto	107:4f6c30876dfa	724
Kojto	107:4f6c30876dfa	725	/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	726	* @{
Kojto	107:4f6c30876dfa	727	*/
Kojto	107:4f6c30876dfa	728	#define CAN_FilterFIFO0 CAN_FILTER_FIFO0
Kojto	107:4f6c30876dfa	729	#define CAN_FilterFIFO1 CAN_FILTER_FIFO1
Kojto	107:4f6c30876dfa	730	#define CAN_IT_RQCP0 CAN_IT_TME
Kojto	107:4f6c30876dfa	731	#define CAN_IT_RQCP1 CAN_IT_TME
Kojto	107:4f6c30876dfa	732	#define CAN_IT_RQCP2 CAN_IT_TME
Kojto	107:4f6c30876dfa	733	#define INAK_TIMEOUT CAN_TIMEOUT_VALUE
Kojto	107:4f6c30876dfa	734	#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
Kojto	107:4f6c30876dfa	735	#define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
Kojto	107:4f6c30876dfa	736	#define CAN_TXSTATUS_OK ((uint8_t)0x01)
Kojto	107:4f6c30876dfa	737	#define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
Kojto	107:4f6c30876dfa	738
Kojto	107:4f6c30876dfa	739	/**
Kojto	107:4f6c30876dfa	740	* @}
Kojto	107:4f6c30876dfa	741	*/
Kojto	107:4f6c30876dfa	742
Kojto	107:4f6c30876dfa	743	/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	744	* @{
Kojto	107:4f6c30876dfa	745	*/
Kojto	107:4f6c30876dfa	746
Kojto	107:4f6c30876dfa	747	#define VLAN_TAG ETH_VLAN_TAG
Kojto	107:4f6c30876dfa	748	#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
Kojto	107:4f6c30876dfa	749	#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
Kojto	107:4f6c30876dfa	750	#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
Kojto	107:4f6c30876dfa	751	#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
Kojto	107:4f6c30876dfa	752	#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
Kojto	107:4f6c30876dfa	753	#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
Kojto	107:4f6c30876dfa	754	#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
Kojto	107:4f6c30876dfa	755
Kojto	107:4f6c30876dfa	756	#define ETH_MMCCR ((uint32_t)0x00000100)
Kojto	107:4f6c30876dfa	757	#define ETH_MMCRIR ((uint32_t)0x00000104)
Kojto	107:4f6c30876dfa	758	#define ETH_MMCTIR ((uint32_t)0x00000108)
Kojto	107:4f6c30876dfa	759	#define ETH_MMCRIMR ((uint32_t)0x0000010C)
Kojto	107:4f6c30876dfa	760	#define ETH_MMCTIMR ((uint32_t)0x00000110)
Kojto	107:4f6c30876dfa	761	#define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
Kojto	107:4f6c30876dfa	762	#define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
Kojto	107:4f6c30876dfa	763	#define ETH_MMCTGFCR ((uint32_t)0x00000168)
Kojto	107:4f6c30876dfa	764	#define ETH_MMCRFCECR ((uint32_t)0x00000194)
Kojto	107:4f6c30876dfa	765	#define ETH_MMCRFAECR ((uint32_t)0x00000198)
Kojto	107:4f6c30876dfa	766	#define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
Kojto	107:4f6c30876dfa	767
Kojto	107:4f6c30876dfa	768	/**
Kojto	107:4f6c30876dfa	769	* @}
Kojto	107:4f6c30876dfa	770	*/
Kojto	107:4f6c30876dfa	771
Kojto	107:4f6c30876dfa	772	/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
Kojto	107:4f6c30876dfa	773	* @{
Kojto	107:4f6c30876dfa	774	*/
Kojto	107:4f6c30876dfa	775
Kojto	107:4f6c30876dfa	776	/**
Kojto	107:4f6c30876dfa	777	* @}
Kojto	107:4f6c30876dfa	778	*/
Kojto	107:4f6c30876dfa	779
Kojto	107:4f6c30876dfa	780	/* Exported functions --------------------------------------------------------*/
Kojto	107:4f6c30876dfa	781
Kojto	107:4f6c30876dfa	782	/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	783	* @{
Kojto	107:4f6c30876dfa	784	*/
Kojto	107:4f6c30876dfa	785	#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
Kojto	107:4f6c30876dfa	786	/**
Kojto	107:4f6c30876dfa	787	* @}
Kojto	107:4f6c30876dfa	788	*/
Kojto	107:4f6c30876dfa	789
Kojto	107:4f6c30876dfa	790	/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	791	* @{
Kojto	107:4f6c30876dfa	792	*/
Kojto	107:4f6c30876dfa	793
Kojto	107:4f6c30876dfa	794	#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
Kojto	107:4f6c30876dfa	795	#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
Kojto	107:4f6c30876dfa	796	#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
Kojto	107:4f6c30876dfa	797	#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
Kojto	107:4f6c30876dfa	798
Kojto	107:4f6c30876dfa	799	/HASH Algorithm Selection/
Kojto	107:4f6c30876dfa	800
Kojto	107:4f6c30876dfa	801	#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
Kojto	107:4f6c30876dfa	802	#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
Kojto	107:4f6c30876dfa	803	#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
Kojto	107:4f6c30876dfa	804	#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
Kojto	107:4f6c30876dfa	805
Kojto	107:4f6c30876dfa	806	#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
Kojto	107:4f6c30876dfa	807	#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
Kojto	107:4f6c30876dfa	808
Kojto	107:4f6c30876dfa	809	#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
Kojto	107:4f6c30876dfa	810	#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
Kojto	107:4f6c30876dfa	811	/**
Kojto	107:4f6c30876dfa	812	* @}
Kojto	107:4f6c30876dfa	813	*/
Kojto	107:4f6c30876dfa	814
Kojto	107:4f6c30876dfa	815	/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	816	* @{
Kojto	107:4f6c30876dfa	817	*/
Kojto	107:4f6c30876dfa	818	#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
Kojto	107:4f6c30876dfa	819	#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
Kojto	107:4f6c30876dfa	820	#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
Kojto	107:4f6c30876dfa	821	#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
Kojto	107:4f6c30876dfa	822	#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
Kojto	107:4f6c30876dfa	823	#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
Kojto	107:4f6c30876dfa	824	#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
Kojto	107:4f6c30876dfa	825	#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
Kojto	107:4f6c30876dfa	826	#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
Kojto	107:4f6c30876dfa	827	#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
Kojto	107:4f6c30876dfa	828	#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
Kojto	107:4f6c30876dfa	829	#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
Kojto	107:4f6c30876dfa	830	/**
Kojto	107:4f6c30876dfa	831	* @}
Kojto	107:4f6c30876dfa	832	*/
Kojto	107:4f6c30876dfa	833
Kojto	107:4f6c30876dfa	834	/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	835	* @{
Kojto	107:4f6c30876dfa	836	*/
Kojto	107:4f6c30876dfa	837	#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
Kojto	107:4f6c30876dfa	838	#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
Kojto	107:4f6c30876dfa	839	#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
Kojto	107:4f6c30876dfa	840	#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
Kojto	107:4f6c30876dfa	841	#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
Kojto	107:4f6c30876dfa	842	#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
Kojto	107:4f6c30876dfa	843	#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
Kojto	107:4f6c30876dfa	844
Kojto	107:4f6c30876dfa	845	/**
Kojto	107:4f6c30876dfa	846	* @}
Kojto	107:4f6c30876dfa	847	*/
Kojto	107:4f6c30876dfa	848
Kojto	107:4f6c30876dfa	849	/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	850	* @{
Kojto	107:4f6c30876dfa	851	*/
Kojto	107:4f6c30876dfa	852	#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
Kojto	107:4f6c30876dfa	853	#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
Kojto	107:4f6c30876dfa	854
Kojto	107:4f6c30876dfa	855	#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
Kojto	107:4f6c30876dfa	856	/**
Kojto	107:4f6c30876dfa	857	* @}
Kojto	107:4f6c30876dfa	858	*/
Kojto	107:4f6c30876dfa	859
Kojto	107:4f6c30876dfa	860	/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
Kojto	107:4f6c30876dfa	861	* @{
Kojto	107:4f6c30876dfa	862	*/
Kojto	107:4f6c30876dfa	863	#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
Kojto	107:4f6c30876dfa	864	#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
Kojto	107:4f6c30876dfa	865	#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
Kojto	107:4f6c30876dfa	866	#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
Kojto	107:4f6c30876dfa	867	#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
Kojto	107:4f6c30876dfa	868	#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
Kojto	107:4f6c30876dfa	869	#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
Kojto	107:4f6c30876dfa	870	#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
Kojto	107:4f6c30876dfa	871	#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
Kojto	107:4f6c30876dfa	872	#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
Kojto	107:4f6c30876dfa	873	#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
Kojto	107:4f6c30876dfa	874	#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
Kojto	107:4f6c30876dfa	875	#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
Kojto	107:4f6c30876dfa	876	#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
Kojto	107:4f6c30876dfa	877	#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
Kojto	107:4f6c30876dfa	878	#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
Kojto	107:4f6c30876dfa	879
Kojto	107:4f6c30876dfa	880	#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
Kojto	107:4f6c30876dfa	881	#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
Kojto	107:4f6c30876dfa	882	#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
Kojto	107:4f6c30876dfa	883	#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
Kojto	107:4f6c30876dfa	884	#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
Kojto	107:4f6c30876dfa	885	#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
Kojto	107:4f6c30876dfa	886	#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
Kojto	107:4f6c30876dfa	887
Kojto	107:4f6c30876dfa	888	#define CR_OFFSET_BB PWR_CR_OFFSET_BB
Kojto	107:4f6c30876dfa	889	#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
Kojto	107:4f6c30876dfa	890
Kojto	107:4f6c30876dfa	891	#define DBP_BitNumber DBP_BIT_NUMBER
Kojto	107:4f6c30876dfa	892	#define PVDE_BitNumber PVDE_BIT_NUMBER
Kojto	107:4f6c30876dfa	893	#define PMODE_BitNumber PMODE_BIT_NUMBER
Kojto	107:4f6c30876dfa	894	#define EWUP_BitNumber EWUP_BIT_NUMBER
Kojto	107:4f6c30876dfa	895	#define FPDS_BitNumber FPDS_BIT_NUMBER
Kojto	107:4f6c30876dfa	896	#define ODEN_BitNumber ODEN_BIT_NUMBER
Kojto	107:4f6c30876dfa	897	#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
Kojto	107:4f6c30876dfa	898	#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
Kojto	107:4f6c30876dfa	899	#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
Kojto	107:4f6c30876dfa	900	#define BRE_BitNumber BRE_BIT_NUMBER
Kojto	107:4f6c30876dfa	901
Kojto	107:4f6c30876dfa	902	#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
Kojto	107:4f6c30876dfa	903
Kojto	107:4f6c30876dfa	904	/**
Kojto	107:4f6c30876dfa	905	* @}
Kojto	107:4f6c30876dfa	906	*/
Kojto	107:4f6c30876dfa	907
Kojto	107:4f6c30876dfa	908	/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	909	* @{
Kojto	107:4f6c30876dfa	910	*/
Kojto	107:4f6c30876dfa	911	#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
Kojto	107:4f6c30876dfa	912	#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
Kojto	107:4f6c30876dfa	913	#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
Kojto	107:4f6c30876dfa	914	/**
Kojto	107:4f6c30876dfa	915	* @}
Kojto	107:4f6c30876dfa	916	*/
Kojto	107:4f6c30876dfa	917
Kojto	107:4f6c30876dfa	918	/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	919	* @{
Kojto	107:4f6c30876dfa	920	*/
Kojto	107:4f6c30876dfa	921	#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
Kojto	107:4f6c30876dfa	922	/**
Kojto	107:4f6c30876dfa	923	* @}
Kojto	107:4f6c30876dfa	924	*/
Kojto	107:4f6c30876dfa	925
Kojto	107:4f6c30876dfa	926	/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	927	* @{
Kojto	107:4f6c30876dfa	928	*/
Kojto	107:4f6c30876dfa	929	#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
Kojto	107:4f6c30876dfa	930	#define HAL_TIM_DMAError TIM_DMAError
Kojto	107:4f6c30876dfa	931	#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
Kojto	107:4f6c30876dfa	932	#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
Kojto	107:4f6c30876dfa	933	/**
Kojto	107:4f6c30876dfa	934	* @}
Kojto	107:4f6c30876dfa	935	*/
Kojto	107:4f6c30876dfa	936
Kojto	107:4f6c30876dfa	937	/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	938	* @{
Kojto	107:4f6c30876dfa	939	*/
Kojto	107:4f6c30876dfa	940	#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
Kojto	107:4f6c30876dfa	941	/**
Kojto	107:4f6c30876dfa	942	* @}
Kojto	107:4f6c30876dfa	943	*/
Kojto	107:4f6c30876dfa	944
Kojto	107:4f6c30876dfa	945	/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	946	* @{
Kojto	107:4f6c30876dfa	947	*/
Kojto	107:4f6c30876dfa	948	#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
Kojto	107:4f6c30876dfa	949	/**
Kojto	107:4f6c30876dfa	950	* @}
Kojto	107:4f6c30876dfa	951	*/
Kojto	107:4f6c30876dfa	952
Kojto	107:4f6c30876dfa	953
Kojto	107:4f6c30876dfa	954	/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
Kojto	107:4f6c30876dfa	955	* @{
Kojto	107:4f6c30876dfa	956	*/
Kojto	107:4f6c30876dfa	957
Kojto	107:4f6c30876dfa	958	/**
Kojto	107:4f6c30876dfa	959	* @}
Kojto	107:4f6c30876dfa	960	*/
Kojto	107:4f6c30876dfa	961
Kojto	107:4f6c30876dfa	962	/* Exported macros ------------------------------------------------------------*/
Kojto	107:4f6c30876dfa	963
Kojto	107:4f6c30876dfa	964	/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	965	* @{
Kojto	107:4f6c30876dfa	966	*/
Kojto	107:4f6c30876dfa	967	#define AES_IT_CC CRYP_IT_CC
Kojto	107:4f6c30876dfa	968	#define AES_IT_ERR CRYP_IT_ERR
Kojto	107:4f6c30876dfa	969	#define AES_FLAG_CCF CRYP_FLAG_CCF
Kojto	107:4f6c30876dfa	970	/**
Kojto	107:4f6c30876dfa	971	* @}
Kojto	107:4f6c30876dfa	972	*/
Kojto	107:4f6c30876dfa	973
Kojto	107:4f6c30876dfa	974	/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	975	* @{
Kojto	107:4f6c30876dfa	976	*/
Kojto	107:4f6c30876dfa	977	#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
Kojto	107:4f6c30876dfa	978	#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
Kojto	107:4f6c30876dfa	979	#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
Kojto	107:4f6c30876dfa	980	#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
Kojto	107:4f6c30876dfa	981	#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
Kojto	107:4f6c30876dfa	982	#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
Kojto	107:4f6c30876dfa	983	#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
Kojto	107:4f6c30876dfa	984	#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
Kojto	107:4f6c30876dfa	985	#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
Kojto	107:4f6c30876dfa	986	#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
Kojto	107:4f6c30876dfa	987	#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
Kojto	107:4f6c30876dfa	988	#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
Kojto	107:4f6c30876dfa	989	#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
Kojto	107:4f6c30876dfa	990
Kojto	107:4f6c30876dfa	991	#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
Kojto	107:4f6c30876dfa	992	#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
Kojto	107:4f6c30876dfa	993	#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
Kojto	107:4f6c30876dfa	994	#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
Kojto	107:4f6c30876dfa	995	#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
Kojto	107:4f6c30876dfa	996
Kojto	107:4f6c30876dfa	997	/**
Kojto	107:4f6c30876dfa	998	* @}
Kojto	107:4f6c30876dfa	999	*/
Kojto	107:4f6c30876dfa	1000
Kojto	107:4f6c30876dfa	1001
Kojto	107:4f6c30876dfa	1002	/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1003	* @{
Kojto	107:4f6c30876dfa	1004	*/
Kojto	107:4f6c30876dfa	1005	#define __ADC_ENABLE __HAL_ADC_ENABLE
Kojto	107:4f6c30876dfa	1006	#define __ADC_DISABLE __HAL_ADC_DISABLE
Kojto	107:4f6c30876dfa	1007	#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
Kojto	107:4f6c30876dfa	1008	#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
Kojto	107:4f6c30876dfa	1009	#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
Kojto	107:4f6c30876dfa	1010	#define __ADC_IS_ENABLED ADC_IS_ENABLE
Kojto	107:4f6c30876dfa	1011	#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
Kojto	107:4f6c30876dfa	1012	#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
Kojto	107:4f6c30876dfa	1013	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
Kojto	107:4f6c30876dfa	1014	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
Kojto	107:4f6c30876dfa	1015	#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
Kojto	107:4f6c30876dfa	1016	#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
Kojto	107:4f6c30876dfa	1017	#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
Kojto	107:4f6c30876dfa	1018
Kojto	107:4f6c30876dfa	1019	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
Kojto	107:4f6c30876dfa	1020	#define __HAL_ADC_JSQR_RK ADC_JSQR_RK
Kojto	107:4f6c30876dfa	1021	#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
Kojto	107:4f6c30876dfa	1022	#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
Kojto	107:4f6c30876dfa	1023	#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
Kojto	107:4f6c30876dfa	1024	#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
Kojto	107:4f6c30876dfa	1025	#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
Kojto	107:4f6c30876dfa	1026	#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
Kojto	107:4f6c30876dfa	1027	#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
Kojto	107:4f6c30876dfa	1028	#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
Kojto	107:4f6c30876dfa	1029	#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
Kojto	107:4f6c30876dfa	1030	#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
Kojto	107:4f6c30876dfa	1031	#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
Kojto	107:4f6c30876dfa	1032	#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
Kojto	107:4f6c30876dfa	1033	#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
Kojto	107:4f6c30876dfa	1034	#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
Kojto	107:4f6c30876dfa	1035	#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
Kojto	107:4f6c30876dfa	1036	#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
Kojto	107:4f6c30876dfa	1037	#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
Kojto	107:4f6c30876dfa	1038	#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
Kojto	107:4f6c30876dfa	1039
Kojto	107:4f6c30876dfa	1040	#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
Kojto	107:4f6c30876dfa	1041	#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
Kojto	107:4f6c30876dfa	1042	#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
Kojto	107:4f6c30876dfa	1043	#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
Kojto	107:4f6c30876dfa	1044	#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
Kojto	107:4f6c30876dfa	1045	#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
Kojto	107:4f6c30876dfa	1046	#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
Kojto	107:4f6c30876dfa	1047	#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
Kojto	107:4f6c30876dfa	1048	#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
Kojto	107:4f6c30876dfa	1049	#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
Kojto	107:4f6c30876dfa	1050
Kojto	107:4f6c30876dfa	1051	#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
Kojto	107:4f6c30876dfa	1052	#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
Kojto	107:4f6c30876dfa	1053	#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
Kojto	107:4f6c30876dfa	1054	#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
Kojto	107:4f6c30876dfa	1055	#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
Kojto	107:4f6c30876dfa	1056	#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
Kojto	107:4f6c30876dfa	1057	#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
Kojto	107:4f6c30876dfa	1058	#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
Kojto	107:4f6c30876dfa	1059
Kojto	107:4f6c30876dfa	1060	#define __HAL_ADC_SQR1 ADC_SQR1
Kojto	107:4f6c30876dfa	1061	#define __HAL_ADC_SMPR1 ADC_SMPR1
Kojto	107:4f6c30876dfa	1062	#define __HAL_ADC_SMPR2 ADC_SMPR2
Kojto	107:4f6c30876dfa	1063	#define __HAL_ADC_SQR3_RK ADC_SQR3_RK
Kojto	107:4f6c30876dfa	1064	#define __HAL_ADC_SQR2_RK ADC_SQR2_RK
Kojto	107:4f6c30876dfa	1065	#define __HAL_ADC_SQR1_RK ADC_SQR1_RK
Kojto	107:4f6c30876dfa	1066	#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
Kojto	107:4f6c30876dfa	1067	#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
Kojto	107:4f6c30876dfa	1068	#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
Kojto	107:4f6c30876dfa	1069	#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
Kojto	107:4f6c30876dfa	1070	#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
Kojto	107:4f6c30876dfa	1071	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
Kojto	107:4f6c30876dfa	1072	#define __HAL_ADC_JSQR ADC_JSQR
Kojto	107:4f6c30876dfa	1073
Kojto	107:4f6c30876dfa	1074	#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
Kojto	107:4f6c30876dfa	1075	#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
Kojto	107:4f6c30876dfa	1076	#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
Kojto	107:4f6c30876dfa	1077	#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
Kojto	107:4f6c30876dfa	1078	#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
Kojto	107:4f6c30876dfa	1079	#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
Kojto	107:4f6c30876dfa	1080	#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
Kojto	107:4f6c30876dfa	1081	#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
Kojto	107:4f6c30876dfa	1082
Kojto	107:4f6c30876dfa	1083	/**
Kojto	107:4f6c30876dfa	1084	* @}
Kojto	107:4f6c30876dfa	1085	*/
Kojto	107:4f6c30876dfa	1086
Kojto	107:4f6c30876dfa	1087	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1088	* @{
Kojto	107:4f6c30876dfa	1089	*/
Kojto	107:4f6c30876dfa	1090	#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
Kojto	107:4f6c30876dfa	1091	#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
Kojto	107:4f6c30876dfa	1092	#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
Kojto	107:4f6c30876dfa	1093	#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
Kojto	107:4f6c30876dfa	1094
Kojto	107:4f6c30876dfa	1095	/**
Kojto	107:4f6c30876dfa	1096	* @}
Kojto	107:4f6c30876dfa	1097	*/
Kojto	107:4f6c30876dfa	1098
Kojto	107:4f6c30876dfa	1099	/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1100	* @{
Kojto	107:4f6c30876dfa	1101	*/
Kojto	107:4f6c30876dfa	1102	#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
Kojto	107:4f6c30876dfa	1103	#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
Kojto	107:4f6c30876dfa	1104	#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
Kojto	107:4f6c30876dfa	1105	#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
Kojto	107:4f6c30876dfa	1106	#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
Kojto	107:4f6c30876dfa	1107	#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
Kojto	107:4f6c30876dfa	1108	#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
Kojto	107:4f6c30876dfa	1109	#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
Kojto	107:4f6c30876dfa	1110	#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
Kojto	107:4f6c30876dfa	1111	#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
Kojto	107:4f6c30876dfa	1112	#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
Kojto	107:4f6c30876dfa	1113	#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
Kojto	107:4f6c30876dfa	1114	#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
Kojto	107:4f6c30876dfa	1115	#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
Kojto	107:4f6c30876dfa	1116	#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
Kojto	107:4f6c30876dfa	1117	#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
Kojto	107:4f6c30876dfa	1118
Kojto	107:4f6c30876dfa	1119	#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
Kojto	107:4f6c30876dfa	1120	#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
Kojto	107:4f6c30876dfa	1121	#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
Kojto	107:4f6c30876dfa	1122	#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
Kojto	107:4f6c30876dfa	1123	#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
Kojto	107:4f6c30876dfa	1124	#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
Kojto	107:4f6c30876dfa	1125	#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
Kojto	107:4f6c30876dfa	1126	#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
Kojto	107:4f6c30876dfa	1127	#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
Kojto	107:4f6c30876dfa	1128	#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
Kojto	107:4f6c30876dfa	1129	#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
Kojto	107:4f6c30876dfa	1130	#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
Kojto	107:4f6c30876dfa	1131	#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
Kojto	107:4f6c30876dfa	1132	#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
Kojto	107:4f6c30876dfa	1133
Kojto	107:4f6c30876dfa	1134
Kojto	107:4f6c30876dfa	1135	#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
Kojto	107:4f6c30876dfa	1136	#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
Kojto	107:4f6c30876dfa	1137	#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
Kojto	107:4f6c30876dfa	1138	#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
Kojto	107:4f6c30876dfa	1139	#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
Kojto	107:4f6c30876dfa	1140	#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
Kojto	107:4f6c30876dfa	1141	#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
Kojto	107:4f6c30876dfa	1142	#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
Kojto	107:4f6c30876dfa	1143	#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
Kojto	107:4f6c30876dfa	1144	#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
Kojto	107:4f6c30876dfa	1145	#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
Kojto	107:4f6c30876dfa	1146	#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
Kojto	107:4f6c30876dfa	1147	#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
Kojto	107:4f6c30876dfa	1148	#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
Kojto	107:4f6c30876dfa	1149	#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
Kojto	107:4f6c30876dfa	1150	#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
Kojto	107:4f6c30876dfa	1151	#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
Kojto	107:4f6c30876dfa	1152	#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
Kojto	107:4f6c30876dfa	1153	#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
Kojto	107:4f6c30876dfa	1154	#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
Kojto	107:4f6c30876dfa	1155	#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
Kojto	107:4f6c30876dfa	1156	#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
Kojto	107:4f6c30876dfa	1157	#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
Kojto	107:4f6c30876dfa	1158	#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
Kojto	107:4f6c30876dfa	1159
Kojto	107:4f6c30876dfa	1160	/**
Kojto	107:4f6c30876dfa	1161	* @}
Kojto	107:4f6c30876dfa	1162	*/
Kojto	107:4f6c30876dfa	1163
Kojto	107:4f6c30876dfa	1164	/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1165	* @{
Kojto	107:4f6c30876dfa	1166	*/
Kojto	107:4f6c30876dfa	1167
Kojto	107:4f6c30876dfa	1168	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
Kojto	107:4f6c30876dfa	1169	__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
Kojto	107:4f6c30876dfa	1170	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
Kojto	107:4f6c30876dfa	1171	__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
Kojto	107:4f6c30876dfa	1172	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
Kojto	107:4f6c30876dfa	1173	__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
Kojto	107:4f6c30876dfa	1174	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
Kojto	107:4f6c30876dfa	1175	__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
Kojto	107:4f6c30876dfa	1176	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
Kojto	107:4f6c30876dfa	1177	__HAL_COMP_COMP2_EXTI_ENABLE_IT())
Kojto	107:4f6c30876dfa	1178	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
Kojto	107:4f6c30876dfa	1179	__HAL_COMP_COMP2_EXTI_DISABLE_IT())
Kojto	107:4f6c30876dfa	1180	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
Kojto	107:4f6c30876dfa	1181	__HAL_COMP_COMP2_EXTI_GET_FLAG())
Kojto	107:4f6c30876dfa	1182	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
Kojto	107:4f6c30876dfa	1183	__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
Kojto	107:4f6c30876dfa	1184	#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
Kojto	107:4f6c30876dfa	1185
Kojto	107:4f6c30876dfa	1186	/**
Kojto	107:4f6c30876dfa	1187	* @}
Kojto	107:4f6c30876dfa	1188	*/
Kojto	107:4f6c30876dfa	1189
Kojto	107:4f6c30876dfa	1190	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1191	* @{
Kojto	107:4f6c30876dfa	1192	*/
Kojto	107:4f6c30876dfa	1193
Kojto	107:4f6c30876dfa	1194	#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) \|\| \
Kojto	107:4f6c30876dfa	1195	((WAVE) == DAC_WAVE_NOISE)\|\| \
Kojto	107:4f6c30876dfa	1196	((WAVE) == DAC_WAVE_TRIANGLE))
Kojto	107:4f6c30876dfa	1197
Kojto	107:4f6c30876dfa	1198	/**
Kojto	107:4f6c30876dfa	1199	* @}
Kojto	107:4f6c30876dfa	1200	*/
Kojto	107:4f6c30876dfa	1201
Kojto	107:4f6c30876dfa	1202	/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1203	* @{
Kojto	107:4f6c30876dfa	1204	*/
Kojto	107:4f6c30876dfa	1205
Kojto	107:4f6c30876dfa	1206	#define IS_WRPAREA IS_OB_WRPAREA
Kojto	107:4f6c30876dfa	1207	#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
Kojto	107:4f6c30876dfa	1208	#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
Kojto	107:4f6c30876dfa	1209	#define IS_TYPEERASE IS_FLASH_TYPEERASE
Kojto	107:4f6c30876dfa	1210	#define IS_NBSECTORS IS_FLASH_NBSECTORS
Kojto	107:4f6c30876dfa	1211	#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE
Kojto	107:4f6c30876dfa	1212
Kojto	107:4f6c30876dfa	1213	/**
Kojto	107:4f6c30876dfa	1214	* @}
Kojto	107:4f6c30876dfa	1215	*/
Kojto	107:4f6c30876dfa	1216
Kojto	107:4f6c30876dfa	1217	/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1218	* @{
Kojto	107:4f6c30876dfa	1219	*/
Kojto	107:4f6c30876dfa	1220
Kojto	107:4f6c30876dfa	1221	#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
Kojto	107:4f6c30876dfa	1222	#define __HAL_I2C_GENERATE_START I2C_GENERATE_START
Kojto	107:4f6c30876dfa	1223	#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
Kojto	107:4f6c30876dfa	1224	#define __HAL_I2C_RISE_TIME I2C_RISE_TIME
Kojto	107:4f6c30876dfa	1225	#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
Kojto	107:4f6c30876dfa	1226	#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
Kojto	107:4f6c30876dfa	1227	#define __HAL_I2C_SPEED I2C_SPEED
Kojto	107:4f6c30876dfa	1228	#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
Kojto	107:4f6c30876dfa	1229	#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
Kojto	107:4f6c30876dfa	1230	#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
Kojto	107:4f6c30876dfa	1231	#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
Kojto	107:4f6c30876dfa	1232	#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
Kojto	107:4f6c30876dfa	1233	#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
Kojto	107:4f6c30876dfa	1234	#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
Kojto	107:4f6c30876dfa	1235	#define __HAL_I2C_FREQRANGE I2C_FREQRANGE
Kojto	107:4f6c30876dfa	1236	/**
Kojto	107:4f6c30876dfa	1237	* @}
Kojto	107:4f6c30876dfa	1238	*/
Kojto	107:4f6c30876dfa	1239
Kojto	107:4f6c30876dfa	1240	/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1241	* @{
Kojto	107:4f6c30876dfa	1242	*/
Kojto	107:4f6c30876dfa	1243
Kojto	107:4f6c30876dfa	1244	#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
Kojto	107:4f6c30876dfa	1245	#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
Kojto	107:4f6c30876dfa	1246
Kojto	107:4f6c30876dfa	1247	/**
Kojto	107:4f6c30876dfa	1248	* @}
Kojto	107:4f6c30876dfa	1249	*/
Kojto	107:4f6c30876dfa	1250
Kojto	107:4f6c30876dfa	1251	/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1252	* @{
Kojto	107:4f6c30876dfa	1253	*/
Kojto	107:4f6c30876dfa	1254
Kojto	107:4f6c30876dfa	1255	#define __IRDA_DISABLE __HAL_IRDA_DISABLE
Kojto	107:4f6c30876dfa	1256	#define __IRDA_ENABLE __HAL_IRDA_ENABLE
Kojto	107:4f6c30876dfa	1257
Kojto	107:4f6c30876dfa	1258	#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	1259	#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
Kojto	107:4f6c30876dfa	1260	#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	1261	#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
Kojto	107:4f6c30876dfa	1262
Kojto	107:4f6c30876dfa	1263	#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
Kojto	107:4f6c30876dfa	1264
Kojto	107:4f6c30876dfa	1265
Kojto	107:4f6c30876dfa	1266	/**
Kojto	107:4f6c30876dfa	1267	* @}
Kojto	107:4f6c30876dfa	1268	*/
Kojto	107:4f6c30876dfa	1269
Kojto	107:4f6c30876dfa	1270
Kojto	107:4f6c30876dfa	1271	/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1272	* @{
Kojto	107:4f6c30876dfa	1273	*/
Kojto	107:4f6c30876dfa	1274	#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
Kojto	107:4f6c30876dfa	1275	#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
Kojto	107:4f6c30876dfa	1276	/**
Kojto	107:4f6c30876dfa	1277	* @}
Kojto	107:4f6c30876dfa	1278	*/
Kojto	107:4f6c30876dfa	1279
Kojto	107:4f6c30876dfa	1280
Kojto	107:4f6c30876dfa	1281	/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1282	* @{
Kojto	107:4f6c30876dfa	1283	*/
Kojto	107:4f6c30876dfa	1284
Kojto	107:4f6c30876dfa	1285	#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
Kojto	107:4f6c30876dfa	1286	#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
Kojto	107:4f6c30876dfa	1287	#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
Kojto	107:4f6c30876dfa	1288
Kojto	107:4f6c30876dfa	1289	/**
Kojto	107:4f6c30876dfa	1290	* @}
Kojto	107:4f6c30876dfa	1291	*/
Kojto	107:4f6c30876dfa	1292
Kojto	107:4f6c30876dfa	1293
Kojto	107:4f6c30876dfa	1294	/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1295	* @{
Kojto	107:4f6c30876dfa	1296	*/
Kojto	107:4f6c30876dfa	1297	#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
Kojto	107:4f6c30876dfa	1298	#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
Kojto	107:4f6c30876dfa	1299	#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
Kojto	107:4f6c30876dfa	1300	#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
Kojto	107:4f6c30876dfa	1301	#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
Kojto	107:4f6c30876dfa	1302	#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
Kojto	107:4f6c30876dfa	1303	#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
Kojto	107:4f6c30876dfa	1304	#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
Kojto	107:4f6c30876dfa	1305	#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
Kojto	107:4f6c30876dfa	1306	#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
Kojto	107:4f6c30876dfa	1307	#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
Kojto	107:4f6c30876dfa	1308	#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
Kojto	107:4f6c30876dfa	1309	#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
Kojto	107:4f6c30876dfa	1310
Kojto	107:4f6c30876dfa	1311	/**
Kojto	107:4f6c30876dfa	1312	* @}
Kojto	107:4f6c30876dfa	1313	*/
Kojto	107:4f6c30876dfa	1314
Kojto	107:4f6c30876dfa	1315
Kojto	107:4f6c30876dfa	1316	/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	1317	* @{
Kojto	107:4f6c30876dfa	1318	*/
Kojto	107:4f6c30876dfa	1319	#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
Kojto	107:4f6c30876dfa	1320	#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
Kojto	107:4f6c30876dfa	1321	#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1322	#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1323	#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	1324	#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	1325	#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
Kojto	107:4f6c30876dfa	1326	#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
Kojto	107:4f6c30876dfa	1327	#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
Kojto	107:4f6c30876dfa	1328	#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
Kojto	107:4f6c30876dfa	1329	#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
Kojto	107:4f6c30876dfa	1330	#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
Kojto	107:4f6c30876dfa	1331	#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
Kojto	107:4f6c30876dfa	1332	#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
Kojto	107:4f6c30876dfa	1333	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
Kojto	107:4f6c30876dfa	1334	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
Kojto	107:4f6c30876dfa	1335	#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
Kojto	107:4f6c30876dfa	1336	#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
Kojto	107:4f6c30876dfa	1337	#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
Kojto	107:4f6c30876dfa	1338	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1339	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1340	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	1341	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	1342	#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1343	#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	1344	#define __HAL_PWR_PVM_DISABLE() HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4()
Kojto	107:4f6c30876dfa	1345	#define __HAL_PWR_PVM_ENABLE() HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4()
Kojto	107:4f6c30876dfa	1346	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
Kojto	107:4f6c30876dfa	1347	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
Kojto	107:4f6c30876dfa	1348	#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
Kojto	107:4f6c30876dfa	1349	#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
Kojto	107:4f6c30876dfa	1350	#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1351	#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	1352	#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
Kojto	107:4f6c30876dfa	1353	#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
Kojto	107:4f6c30876dfa	1354
Kojto	107:4f6c30876dfa	1355	#if defined (STM32F4)
Kojto	107:4f6c30876dfa	1356	#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
Kojto	107:4f6c30876dfa	1357	#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
Kojto	107:4f6c30876dfa	1358	#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
Kojto	107:4f6c30876dfa	1359	#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
Kojto	107:4f6c30876dfa	1360	#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
Kojto	107:4f6c30876dfa	1361	#else
Kojto	107:4f6c30876dfa	1362	#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
Kojto	107:4f6c30876dfa	1363	#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
Kojto	107:4f6c30876dfa	1364	#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
Kojto	107:4f6c30876dfa	1365	#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
Kojto	107:4f6c30876dfa	1366	#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
Kojto	107:4f6c30876dfa	1367	#endif /* STM32F4 */
Kojto	107:4f6c30876dfa	1368	/**
Kojto	107:4f6c30876dfa	1369	* @}
Kojto	107:4f6c30876dfa	1370	*/
Kojto	107:4f6c30876dfa	1371
Kojto	107:4f6c30876dfa	1372
Kojto	107:4f6c30876dfa	1373	/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
Kojto	107:4f6c30876dfa	1374	* @{
Kojto	107:4f6c30876dfa	1375	*/
Kojto	107:4f6c30876dfa	1376
Kojto	107:4f6c30876dfa	1377	#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
Kojto	107:4f6c30876dfa	1378	#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
Kojto	107:4f6c30876dfa	1379
Kojto	107:4f6c30876dfa	1380	#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
Kojto	107:4f6c30876dfa	1381	#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
Kojto	107:4f6c30876dfa	1382
Kojto	107:4f6c30876dfa	1383	#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1384	#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1385	#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1386	#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1387	#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
Kojto	107:4f6c30876dfa	1388	#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1389	#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1390	#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1391	#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
Kojto	107:4f6c30876dfa	1392	#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1393	#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1394	#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1395	#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1396	#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1397	#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
Kojto	107:4f6c30876dfa	1398	#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1399	#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
Kojto	107:4f6c30876dfa	1400	#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
Kojto	107:4f6c30876dfa	1401	#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
Kojto	107:4f6c30876dfa	1402	#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
Kojto	107:4f6c30876dfa	1403	#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
Kojto	107:4f6c30876dfa	1404	#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
Kojto	107:4f6c30876dfa	1405	#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1406	#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1407	#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
Kojto	107:4f6c30876dfa	1408	#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
Kojto	107:4f6c30876dfa	1409	#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1410	#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1411	#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
Kojto	107:4f6c30876dfa	1412	#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
Kojto	107:4f6c30876dfa	1413	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
Kojto	107:4f6c30876dfa	1414	#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
Kojto	107:4f6c30876dfa	1415	#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
Kojto	107:4f6c30876dfa	1416	#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
Kojto	107:4f6c30876dfa	1417	#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
Kojto	107:4f6c30876dfa	1418	#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
Kojto	107:4f6c30876dfa	1419	#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
Kojto	107:4f6c30876dfa	1420	#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
Kojto	107:4f6c30876dfa	1421	#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
Kojto	107:4f6c30876dfa	1422	#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1423	#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
Kojto	107:4f6c30876dfa	1424	#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1425	#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
Kojto	107:4f6c30876dfa	1426	#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
Kojto	107:4f6c30876dfa	1427	#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
Kojto	107:4f6c30876dfa	1428	#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1429	#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
Kojto	107:4f6c30876dfa	1430	#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1431	#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
Kojto	107:4f6c30876dfa	1432	#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
Kojto	107:4f6c30876dfa	1433	#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
Kojto	107:4f6c30876dfa	1434	#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
Kojto	107:4f6c30876dfa	1435	#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1436	#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1437	#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1438	#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1439	#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
Kojto	107:4f6c30876dfa	1440	#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1441	#define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1442	#define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1443	#define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
Kojto	107:4f6c30876dfa	1444	#define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1445	#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1446	#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1447	#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
Kojto	107:4f6c30876dfa	1448	#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1449	#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1450	#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1451	#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
Kojto	107:4f6c30876dfa	1452	#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
Kojto	107:4f6c30876dfa	1453	#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
Kojto	107:4f6c30876dfa	1454	#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
Kojto	107:4f6c30876dfa	1455	#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1456	#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1457	#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
Kojto	107:4f6c30876dfa	1458	#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1459	#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1460	#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1461	#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1462	#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1463	#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
Kojto	107:4f6c30876dfa	1464	#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1465	#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1466	#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1467	#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
Kojto	107:4f6c30876dfa	1468	#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1469	#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1470	#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1471	#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1472	#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1473	#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
Kojto	107:4f6c30876dfa	1474	#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1475	#define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE
Kojto	107:4f6c30876dfa	1476	#define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE
Kojto	107:4f6c30876dfa	1477	#define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET
Kojto	107:4f6c30876dfa	1478	#define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET
Kojto	107:4f6c30876dfa	1479	#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
Kojto	107:4f6c30876dfa	1480	#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
Kojto	107:4f6c30876dfa	1481	#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1482	#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1483	#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
Kojto	107:4f6c30876dfa	1484	#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
Kojto	107:4f6c30876dfa	1485	#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1486	#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1487	#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1488	#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1489	#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
Kojto	107:4f6c30876dfa	1490	#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1491	#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1492	#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1493	#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1494	#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1495	#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
Kojto	107:4f6c30876dfa	1496	#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1497	#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1498	#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1499	#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
Kojto	107:4f6c30876dfa	1500	#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1501	#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
Kojto	107:4f6c30876dfa	1502	#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
Kojto	107:4f6c30876dfa	1503	#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
Kojto	107:4f6c30876dfa	1504	#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
Kojto	107:4f6c30876dfa	1505	#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
Kojto	107:4f6c30876dfa	1506	#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
Kojto	107:4f6c30876dfa	1507	#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
Kojto	107:4f6c30876dfa	1508	#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
Kojto	107:4f6c30876dfa	1509	#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1510	#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1511	#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
Kojto	107:4f6c30876dfa	1512	#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
Kojto	107:4f6c30876dfa	1513	#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
Kojto	107:4f6c30876dfa	1514	#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
Kojto	107:4f6c30876dfa	1515	#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
Kojto	107:4f6c30876dfa	1516	#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
Kojto	107:4f6c30876dfa	1517	#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1518	#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1519	#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1520	#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1521	#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1522	#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1523	#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
Kojto	107:4f6c30876dfa	1524	#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1525	#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1526	#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1527	#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
Kojto	107:4f6c30876dfa	1528	#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
Kojto	107:4f6c30876dfa	1529	#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1530	#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1531	#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
Kojto	107:4f6c30876dfa	1532	#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
Kojto	107:4f6c30876dfa	1533	#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
Kojto	107:4f6c30876dfa	1534	#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
Kojto	107:4f6c30876dfa	1535	#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1536	#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1537	#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
Kojto	107:4f6c30876dfa	1538	#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
Kojto	107:4f6c30876dfa	1539	#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1540	#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1541	#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1542	#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1543	#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
Kojto	107:4f6c30876dfa	1544	#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1545	#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
Kojto	107:4f6c30876dfa	1546	#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
Kojto	107:4f6c30876dfa	1547	#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1548	#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1549	#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
Kojto	107:4f6c30876dfa	1550	#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
Kojto	107:4f6c30876dfa	1551	#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
Kojto	107:4f6c30876dfa	1552	#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
Kojto	107:4f6c30876dfa	1553	#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1554	#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1555	#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
Kojto	107:4f6c30876dfa	1556	#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
Kojto	107:4f6c30876dfa	1557	#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
Kojto	107:4f6c30876dfa	1558	#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
Kojto	107:4f6c30876dfa	1559	#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1560	#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1561	#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
Kojto	107:4f6c30876dfa	1562	#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
Kojto	107:4f6c30876dfa	1563	#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
Kojto	107:4f6c30876dfa	1564	#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
Kojto	107:4f6c30876dfa	1565	#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1566	#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1567	#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
Kojto	107:4f6c30876dfa	1568	#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
Kojto	107:4f6c30876dfa	1569	#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
Kojto	107:4f6c30876dfa	1570	#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
Kojto	107:4f6c30876dfa	1571	#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1572	#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1573	#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
Kojto	107:4f6c30876dfa	1574	#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
Kojto	107:4f6c30876dfa	1575	#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1576	#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1577	#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1578	#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1579	#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
Kojto	107:4f6c30876dfa	1580	#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1581	#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1582	#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1583	#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1584	#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1585	#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
Kojto	107:4f6c30876dfa	1586	#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1587	#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
Kojto	107:4f6c30876dfa	1588	#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
Kojto	107:4f6c30876dfa	1589	#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1590	#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1591	#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
Kojto	107:4f6c30876dfa	1592	#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
Kojto	107:4f6c30876dfa	1593	#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
Kojto	107:4f6c30876dfa	1594	#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
Kojto	107:4f6c30876dfa	1595	#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1596	#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1597	#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
Kojto	107:4f6c30876dfa	1598	#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
Kojto	107:4f6c30876dfa	1599	#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1600	#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1601	#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1602	#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1603	#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
Kojto	107:4f6c30876dfa	1604	#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1605	#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1606	#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1607	#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1608	#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1609	#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
Kojto	107:4f6c30876dfa	1610	#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1611	#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1612	#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1613	#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1614	#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1615	#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
Kojto	107:4f6c30876dfa	1616	#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1617	#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
Kojto	107:4f6c30876dfa	1618	#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
Kojto	107:4f6c30876dfa	1619	#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1620	#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1621	#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
Kojto	107:4f6c30876dfa	1622	#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
Kojto	107:4f6c30876dfa	1623	#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
Kojto	107:4f6c30876dfa	1624	#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
Kojto	107:4f6c30876dfa	1625	#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1626	#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1627	#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
Kojto	107:4f6c30876dfa	1628	#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
Kojto	107:4f6c30876dfa	1629	#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
Kojto	107:4f6c30876dfa	1630	#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
Kojto	107:4f6c30876dfa	1631	#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1632	#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1633	#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
Kojto	107:4f6c30876dfa	1634	#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
Kojto	107:4f6c30876dfa	1635	#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
Kojto	107:4f6c30876dfa	1636	#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
Kojto	107:4f6c30876dfa	1637	#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1638	#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1639	#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
Kojto	107:4f6c30876dfa	1640	#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
Kojto	107:4f6c30876dfa	1641	#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
Kojto	107:4f6c30876dfa	1642	#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
Kojto	107:4f6c30876dfa	1643	#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1644	#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1645	#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
Kojto	107:4f6c30876dfa	1646	#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
Kojto	107:4f6c30876dfa	1647	#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1648	#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1649	#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1650	#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1651	#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
Kojto	107:4f6c30876dfa	1652	#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1653	#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1654	#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1655	#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1656	#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1657	#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
Kojto	107:4f6c30876dfa	1658	#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1659	#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
Kojto	107:4f6c30876dfa	1660	#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	107:4f6c30876dfa	1661	#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1662	#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1663	#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1664	#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1665	#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
Kojto	107:4f6c30876dfa	1666	#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1667	#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1668	#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1669	#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1670	#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1671	#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
Kojto	107:4f6c30876dfa	1672	#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1673	#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1674	#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1675	#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1676	#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1677	#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
Kojto	107:4f6c30876dfa	1678	#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1679	#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
Kojto	107:4f6c30876dfa	1680	#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
Kojto	107:4f6c30876dfa	1681	#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1682	#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1683	#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
Kojto	107:4f6c30876dfa	1684	#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
Kojto	107:4f6c30876dfa	1685	#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
Kojto	107:4f6c30876dfa	1686	#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
Kojto	107:4f6c30876dfa	1687	#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1688	#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1689	#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1690	#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1691	#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1692	#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1693	#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1694	#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1695	#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
Kojto	107:4f6c30876dfa	1696	#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1697	#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
Kojto	107:4f6c30876dfa	1698	#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
Kojto	107:4f6c30876dfa	1699	#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1700	#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1701	#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
Kojto	107:4f6c30876dfa	1702	#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
Kojto	107:4f6c30876dfa	1703	#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1704	#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1705	#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1706	#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1707	#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
Kojto	107:4f6c30876dfa	1708	#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1709	#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
Kojto	107:4f6c30876dfa	1710	#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
Kojto	107:4f6c30876dfa	1711	#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
Kojto	107:4f6c30876dfa	1712	#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
Kojto	107:4f6c30876dfa	1713	#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
Kojto	107:4f6c30876dfa	1714	#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
Kojto	107:4f6c30876dfa	1715	#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
Kojto	107:4f6c30876dfa	1716	#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
Kojto	107:4f6c30876dfa	1717	#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
Kojto	107:4f6c30876dfa	1718	#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
Kojto	107:4f6c30876dfa	1719	#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
Kojto	107:4f6c30876dfa	1720	#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
Kojto	107:4f6c30876dfa	1721	#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
Kojto	107:4f6c30876dfa	1722	#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
Kojto	107:4f6c30876dfa	1723	#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
Kojto	107:4f6c30876dfa	1724	#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
Kojto	107:4f6c30876dfa	1725	#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
Kojto	107:4f6c30876dfa	1726	#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
Kojto	107:4f6c30876dfa	1727	#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
Kojto	107:4f6c30876dfa	1728	#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
Kojto	107:4f6c30876dfa	1729	#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
Kojto	107:4f6c30876dfa	1730	#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
Kojto	107:4f6c30876dfa	1731	#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1732	#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1733	#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
Kojto	107:4f6c30876dfa	1734	#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
Kojto	107:4f6c30876dfa	1735	#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
Kojto	107:4f6c30876dfa	1736	#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
Kojto	107:4f6c30876dfa	1737	#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1738	#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1739	#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
Kojto	107:4f6c30876dfa	1740	#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
Kojto	107:4f6c30876dfa	1741	#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
Kojto	107:4f6c30876dfa	1742	#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
Kojto	107:4f6c30876dfa	1743	#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1744	#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1745	#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
Kojto	107:4f6c30876dfa	1746	#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
Kojto	107:4f6c30876dfa	1747	#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1748	#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1749	#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1750	#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1751	#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
Kojto	107:4f6c30876dfa	1752	#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1753	#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
Kojto	107:4f6c30876dfa	1754	#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
Kojto	107:4f6c30876dfa	1755	#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1756	#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1757	#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
Kojto	107:4f6c30876dfa	1758	#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
Kojto	107:4f6c30876dfa	1759	#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
Kojto	107:4f6c30876dfa	1760	#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
Kojto	107:4f6c30876dfa	1761	#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1762	#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1763	#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
Kojto	107:4f6c30876dfa	1764	#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
Kojto	107:4f6c30876dfa	1765	#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
Kojto	107:4f6c30876dfa	1766	#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
Kojto	107:4f6c30876dfa	1767	#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1768	#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1769	#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
Kojto	107:4f6c30876dfa	1770	#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
Kojto	107:4f6c30876dfa	1771	#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
Kojto	107:4f6c30876dfa	1772	#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
Kojto	107:4f6c30876dfa	1773	#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1774	#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1775	#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
Kojto	107:4f6c30876dfa	1776	#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
Kojto	107:4f6c30876dfa	1777	#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
Kojto	107:4f6c30876dfa	1778	#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
Kojto	107:4f6c30876dfa	1779	#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1780	#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1781	#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
Kojto	107:4f6c30876dfa	1782	#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
Kojto	107:4f6c30876dfa	1783	#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
Kojto	107:4f6c30876dfa	1784	#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
Kojto	107:4f6c30876dfa	1785	#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1786	#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1787	#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
Kojto	107:4f6c30876dfa	1788	#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
Kojto	107:4f6c30876dfa	1789	#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
Kojto	107:4f6c30876dfa	1790	#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
Kojto	107:4f6c30876dfa	1791	#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
Kojto	107:4f6c30876dfa	1792	#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
Kojto	107:4f6c30876dfa	1793	#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1794	#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1795	#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1796	#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1797	#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
Kojto	107:4f6c30876dfa	1798	#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1799	#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
Kojto	107:4f6c30876dfa	1800	#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
Kojto	107:4f6c30876dfa	1801	#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1802	#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1803	#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
Kojto	107:4f6c30876dfa	1804	#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
Kojto	107:4f6c30876dfa	1805	#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
Kojto	107:4f6c30876dfa	1806	#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
Kojto	107:4f6c30876dfa	1807	#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1808	#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1809	#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
Kojto	107:4f6c30876dfa	1810	#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
Kojto	107:4f6c30876dfa	1811	#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
Kojto	107:4f6c30876dfa	1812	#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
Kojto	107:4f6c30876dfa	1813	#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1814	#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1815	#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
Kojto	107:4f6c30876dfa	1816	#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
Kojto	107:4f6c30876dfa	1817	#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
Kojto	107:4f6c30876dfa	1818	#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
Kojto	107:4f6c30876dfa	1819	#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1820	#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1821	#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
Kojto	107:4f6c30876dfa	1822	#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
Kojto	107:4f6c30876dfa	1823	#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
Kojto	107:4f6c30876dfa	1824	#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
Kojto	107:4f6c30876dfa	1825	#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1826	#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1827	#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
Kojto	107:4f6c30876dfa	1828	#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
Kojto	107:4f6c30876dfa	1829	#define __USART4_CLK_DISABLE __HAL_RCC_USART4_CLK_DISABLE
Kojto	107:4f6c30876dfa	1830	#define __USART4_CLK_ENABLE __HAL_RCC_USART4_CLK_ENABLE
Kojto	107:4f6c30876dfa	1831	#define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_USART4_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1832	#define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_USART4_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1833	#define __USART4_FORCE_RESET __HAL_RCC_USART4_FORCE_RESET
Kojto	107:4f6c30876dfa	1834	#define __USART4_RELEASE_RESET __HAL_RCC_USART4_RELEASE_RESET
Kojto	107:4f6c30876dfa	1835	#define __USART5_CLK_DISABLE __HAL_RCC_USART5_CLK_DISABLE
Kojto	107:4f6c30876dfa	1836	#define __USART5_CLK_ENABLE __HAL_RCC_USART5_CLK_ENABLE
Kojto	107:4f6c30876dfa	1837	#define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_USART5_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1838	#define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_USART5_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1839	#define __USART5_FORCE_RESET __HAL_RCC_USART5_FORCE_RESET
Kojto	107:4f6c30876dfa	1840	#define __USART5_RELEASE_RESET __HAL_RCC_USART5_RELEASE_RESET
Kojto	107:4f6c30876dfa	1841	#define __USART7_CLK_DISABLE __HAL_RCC_USART7_CLK_DISABLE
Kojto	107:4f6c30876dfa	1842	#define __USART7_CLK_ENABLE __HAL_RCC_USART7_CLK_ENABLE
Kojto	107:4f6c30876dfa	1843	#define __USART7_FORCE_RESET __HAL_RCC_USART7_FORCE_RESET
Kojto	107:4f6c30876dfa	1844	#define __USART7_RELEASE_RESET __HAL_RCC_USART7_RELEASE_RESET
Kojto	107:4f6c30876dfa	1845	#define __USART8_CLK_DISABLE __HAL_RCC_USART8_CLK_DISABLE
Kojto	107:4f6c30876dfa	1846	#define __USART8_CLK_ENABLE __HAL_RCC_USART8_CLK_ENABLE
Kojto	107:4f6c30876dfa	1847	#define __USART8_FORCE_RESET __HAL_RCC_USART8_FORCE_RESET
Kojto	107:4f6c30876dfa	1848	#define __USART8_RELEASE_RESET __HAL_RCC_USART8_RELEASE_RESET
Kojto	107:4f6c30876dfa	1849	#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
Kojto	107:4f6c30876dfa	1850	#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
Kojto	107:4f6c30876dfa	1851	#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
Kojto	107:4f6c30876dfa	1852	#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1853	#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1854	#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
Kojto	107:4f6c30876dfa	1855	#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
Kojto	107:4f6c30876dfa	1856	#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
Kojto	107:4f6c30876dfa	1857	#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
Kojto	107:4f6c30876dfa	1858	#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
Kojto	107:4f6c30876dfa	1859	#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1860	#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1861	#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
Kojto	107:4f6c30876dfa	1862	#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
Kojto	107:4f6c30876dfa	1863	#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
Kojto	107:4f6c30876dfa	1864	#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
Kojto	107:4f6c30876dfa	1865	#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
Kojto	107:4f6c30876dfa	1866	#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
Kojto	107:4f6c30876dfa	1867	#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1868	#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1869	#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
Kojto	107:4f6c30876dfa	1870	#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
Kojto	107:4f6c30876dfa	1871	#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
Kojto	107:4f6c30876dfa	1872	#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
Kojto	107:4f6c30876dfa	1873	#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1874	#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1875	#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
Kojto	107:4f6c30876dfa	1876	#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
Kojto	107:4f6c30876dfa	1877	#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1878	#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1879	#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
Kojto	107:4f6c30876dfa	1880	#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
Kojto	107:4f6c30876dfa	1881	#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
Kojto	107:4f6c30876dfa	1882	#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
Kojto	107:4f6c30876dfa	1883
Kojto	107:4f6c30876dfa	1884	#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
Kojto	107:4f6c30876dfa	1885	#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
Kojto	107:4f6c30876dfa	1886	#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1887	#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1888	#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
Kojto	107:4f6c30876dfa	1889	#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
Kojto	107:4f6c30876dfa	1890	#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
Kojto	107:4f6c30876dfa	1891	#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
Kojto	107:4f6c30876dfa	1892	#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1893	#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1894	#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1895	#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1896	#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1897	#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1898	#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1899	#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1900	#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
Kojto	107:4f6c30876dfa	1901	#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
Kojto	107:4f6c30876dfa	1902	#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
Kojto	107:4f6c30876dfa	1903	#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
Kojto	107:4f6c30876dfa	1904	#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
Kojto	107:4f6c30876dfa	1905	#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1906	#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1907	#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
Kojto	107:4f6c30876dfa	1908	#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
Kojto	107:4f6c30876dfa	1909	#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
Kojto	107:4f6c30876dfa	1910	#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
Kojto	107:4f6c30876dfa	1911	#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
Kojto	107:4f6c30876dfa	1912	#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1913	#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1914	#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
Kojto	107:4f6c30876dfa	1915	#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
Kojto	107:4f6c30876dfa	1916	#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
Kojto	107:4f6c30876dfa	1917	#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
Kojto	107:4f6c30876dfa	1918	#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1919	#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1920	#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
Kojto	107:4f6c30876dfa	1921	#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
Kojto	107:4f6c30876dfa	1922	#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
Kojto	107:4f6c30876dfa	1923	#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
Kojto	107:4f6c30876dfa	1924	#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1925	#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1926	#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1927	#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1928	#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1929	#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1930	#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1931	#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1932	#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1933	#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1934	#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1935	#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1936	#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1937	#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
Kojto	107:4f6c30876dfa	1938	#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
Kojto	107:4f6c30876dfa	1939	#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1940	#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1941	#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
Kojto	107:4f6c30876dfa	1942	#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
Kojto	107:4f6c30876dfa	1943	#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
Kojto	107:4f6c30876dfa	1944	#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
Kojto	107:4f6c30876dfa	1945	#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
Kojto	107:4f6c30876dfa	1946	#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
Kojto	107:4f6c30876dfa	1947	#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1948	#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1949	#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
Kojto	107:4f6c30876dfa	1950	#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
Kojto	107:4f6c30876dfa	1951	#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
Kojto	107:4f6c30876dfa	1952	#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
Kojto	107:4f6c30876dfa	1953	#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1954	#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1955	#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
Kojto	107:4f6c30876dfa	1956	#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
Kojto	107:4f6c30876dfa	1957	#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
Kojto	107:4f6c30876dfa	1958	#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
Kojto	107:4f6c30876dfa	1959	#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1960	#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1961	#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
Kojto	107:4f6c30876dfa	1962	#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
Kojto	107:4f6c30876dfa	1963	#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
Kojto	107:4f6c30876dfa	1964	#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
Kojto	107:4f6c30876dfa	1965	#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1966	#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1967	#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
Kojto	107:4f6c30876dfa	1968	#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
Kojto	107:4f6c30876dfa	1969	#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
Kojto	107:4f6c30876dfa	1970	#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1971	#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1972	#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
Kojto	107:4f6c30876dfa	1973	#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
Kojto	107:4f6c30876dfa	1974	#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
Kojto	107:4f6c30876dfa	1975	#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
Kojto	107:4f6c30876dfa	1976	#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
Kojto	107:4f6c30876dfa	1977	#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
Kojto	107:4f6c30876dfa	1978	#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1979	#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1980	#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
Kojto	107:4f6c30876dfa	1981	#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
Kojto	107:4f6c30876dfa	1982	#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
Kojto	107:4f6c30876dfa	1983	#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
Kojto	107:4f6c30876dfa	1984	#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1985	#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1986	#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
Kojto	107:4f6c30876dfa	1987	#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
Kojto	107:4f6c30876dfa	1988	#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
Kojto	107:4f6c30876dfa	1989	#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
Kojto	107:4f6c30876dfa	1990	#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1991	#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1992	#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1993	#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1994	#define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
Kojto	107:4f6c30876dfa	1995	#define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
Kojto	107:4f6c30876dfa	1996	#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1997	#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	1998	#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	1999	#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2000	#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
Kojto	107:4f6c30876dfa	2001	#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
Kojto	107:4f6c30876dfa	2002	#define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
Kojto	107:4f6c30876dfa	2003	#define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
Kojto	107:4f6c30876dfa	2004	#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2005	#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2006	#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
Kojto	107:4f6c30876dfa	2007	#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
Kojto	107:4f6c30876dfa	2008	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
Kojto	107:4f6c30876dfa	2009	#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2010	#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2011	#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2012	#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2013	#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2014	#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2015	#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2016	#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2017	#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2018	#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
Kojto	107:4f6c30876dfa	2019	#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
Kojto	107:4f6c30876dfa	2020	#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2021	#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2022	#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
Kojto	107:4f6c30876dfa	2023	#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
Kojto	107:4f6c30876dfa	2024	#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2025	#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2026	#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
Kojto	107:4f6c30876dfa	2027	#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
Kojto	107:4f6c30876dfa	2028	#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
Kojto	107:4f6c30876dfa	2029	#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
Kojto	107:4f6c30876dfa	2030	#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2031	#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2032
Kojto	107:4f6c30876dfa	2033	/* alias define maintained for legacy */
Kojto	107:4f6c30876dfa	2034	#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
Kojto	107:4f6c30876dfa	2035	#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
Kojto	107:4f6c30876dfa	2036
Kojto	107:4f6c30876dfa	2037	#if defined(STM32F4)
Kojto	107:4f6c30876dfa	2038	#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	107:4f6c30876dfa	2039	#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
Kojto	107:4f6c30876dfa	2040	#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
Kojto	107:4f6c30876dfa	2041	#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2042	#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2043	#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	107:4f6c30876dfa	2044	#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
Kojto	107:4f6c30876dfa	2045	#define Sdmmc1ClockSelection SdioClockSelection
Kojto	107:4f6c30876dfa	2046	#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO
Kojto	107:4f6c30876dfa	2047	#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48
Kojto	107:4f6c30876dfa	2048	#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK
Kojto	107:4f6c30876dfa	2049	#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG
Kojto	107:4f6c30876dfa	2050	#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE
Kojto	107:4f6c30876dfa	2051	#endif
Kojto	107:4f6c30876dfa	2052
Kojto	107:4f6c30876dfa	2053	#if defined(STM32F7) \|\| defined(STM32L4)
Kojto	107:4f6c30876dfa	2054	#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
Kojto	107:4f6c30876dfa	2055	#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
Kojto	107:4f6c30876dfa	2056	#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
Kojto	107:4f6c30876dfa	2057	#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
Kojto	107:4f6c30876dfa	2058	#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
Kojto	107:4f6c30876dfa	2059	#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
Kojto	107:4f6c30876dfa	2060	#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
Kojto	107:4f6c30876dfa	2061	#define SdioClockSelection Sdmmc1ClockSelection
Kojto	107:4f6c30876dfa	2062	#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1
Kojto	107:4f6c30876dfa	2063	#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG
Kojto	107:4f6c30876dfa	2064	#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE
Kojto	107:4f6c30876dfa	2065	#endif
Kojto	107:4f6c30876dfa	2066
Kojto	107:4f6c30876dfa	2067	#if defined(STM32F7)
Kojto	107:4f6c30876dfa	2068	#define RCC_SDIOCLKSOURCE_CK48 RCC_SDMMC1CLKSOURCE_CLK48
Kojto	107:4f6c30876dfa	2069	#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
Kojto	107:4f6c30876dfa	2070	#endif
Kojto	107:4f6c30876dfa	2071
Kojto	107:4f6c30876dfa	2072	#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
Kojto	107:4f6c30876dfa	2073	#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
Kojto	107:4f6c30876dfa	2074
Kojto	107:4f6c30876dfa	2075	#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
Kojto	107:4f6c30876dfa	2076
Kojto	107:4f6c30876dfa	2077	#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
Kojto	107:4f6c30876dfa	2078	#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
Kojto	107:4f6c30876dfa	2079	#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
Kojto	107:4f6c30876dfa	2080	#define IS_RCC_HCLK_DIV IS_RCC_PCLK
Kojto	107:4f6c30876dfa	2081
Kojto	107:4f6c30876dfa	2082	#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
Kojto	107:4f6c30876dfa	2083	#define RCC_MCO_NODIV RCC_MCODIV_1
Kojto	107:4f6c30876dfa	2084	#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
Kojto	107:4f6c30876dfa	2085
Kojto	107:4f6c30876dfa	2086	#define HSION_BitNumber RCC_HSION_BIT_NUMBER
Kojto	107:4f6c30876dfa	2087	#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
Kojto	107:4f6c30876dfa	2088	#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
Kojto	107:4f6c30876dfa	2089	#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
Kojto	107:4f6c30876dfa	2090	#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
Kojto	107:4f6c30876dfa	2091	#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
Kojto	107:4f6c30876dfa	2092	#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
Kojto	107:4f6c30876dfa	2093	#define LSION_BitNumber RCC_LSION_BIT_NUMBER
Kojto	107:4f6c30876dfa	2094	#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
Kojto	107:4f6c30876dfa	2095	#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
Kojto	107:4f6c30876dfa	2096
Kojto	107:4f6c30876dfa	2097	#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
Kojto	107:4f6c30876dfa	2098	#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
Kojto	107:4f6c30876dfa	2099	#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
Kojto	107:4f6c30876dfa	2100	#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
Kojto	107:4f6c30876dfa	2101	#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
Kojto	107:4f6c30876dfa	2102	#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
Kojto	107:4f6c30876dfa	2103
Kojto	107:4f6c30876dfa	2104	#define CR_HSION_BB RCC_CR_HSION_BB
Kojto	107:4f6c30876dfa	2105	#define CR_CSSON_BB RCC_CR_CSSON_BB
Kojto	107:4f6c30876dfa	2106	#define CR_PLLON_BB RCC_CR_PLLON_BB
Kojto	107:4f6c30876dfa	2107	#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
Kojto	107:4f6c30876dfa	2108	#define CR_MSION_BB RCC_CR_MSION_BB
Kojto	107:4f6c30876dfa	2109	#define CSR_LSION_BB RCC_CSR_LSION_BB
Kojto	107:4f6c30876dfa	2110	#define CSR_LSEON_BB RCC_CSR_LSEON_BB
Kojto	107:4f6c30876dfa	2111	#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
Kojto	107:4f6c30876dfa	2112	#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
Kojto	107:4f6c30876dfa	2113	#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
Kojto	107:4f6c30876dfa	2114	#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
Kojto	107:4f6c30876dfa	2115	#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
Kojto	107:4f6c30876dfa	2116	#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
Kojto	107:4f6c30876dfa	2117	#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
Kojto	107:4f6c30876dfa	2118	#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
Kojto	107:4f6c30876dfa	2119
Kojto	107:4f6c30876dfa	2120	/**
Kojto	107:4f6c30876dfa	2121	* @}
Kojto	107:4f6c30876dfa	2122	*/
Kojto	107:4f6c30876dfa	2123
Kojto	107:4f6c30876dfa	2124	/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2125	* @{
Kojto	107:4f6c30876dfa	2126	*/
Kojto	107:4f6c30876dfa	2127	#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
Kojto	107:4f6c30876dfa	2128
Kojto	107:4f6c30876dfa	2129	/**
Kojto	107:4f6c30876dfa	2130	* @}
Kojto	107:4f6c30876dfa	2131	*/
Kojto	107:4f6c30876dfa	2132
Kojto	107:4f6c30876dfa	2133	/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2134	* @{
Kojto	107:4f6c30876dfa	2135	*/
Kojto	107:4f6c30876dfa	2136
Kojto	107:4f6c30876dfa	2137	#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2138	#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
Kojto	107:4f6c30876dfa	2139	#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
Kojto	107:4f6c30876dfa	2140
Kojto	107:4f6c30876dfa	2141	#if defined (STM32F1)
Kojto	107:4f6c30876dfa	2142	#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
Kojto	107:4f6c30876dfa	2143
Kojto	107:4f6c30876dfa	2144	#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
Kojto	107:4f6c30876dfa	2145
Kojto	107:4f6c30876dfa	2146	#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
Kojto	107:4f6c30876dfa	2147
Kojto	107:4f6c30876dfa	2148	#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
Kojto	107:4f6c30876dfa	2149
Kojto	107:4f6c30876dfa	2150	#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
Kojto	107:4f6c30876dfa	2151	#else
Kojto	107:4f6c30876dfa	2152	#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
Kojto	107:4f6c30876dfa	2153	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
Kojto	107:4f6c30876dfa	2154	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
Kojto	107:4f6c30876dfa	2155	#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
Kojto	107:4f6c30876dfa	2156	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
Kojto	107:4f6c30876dfa	2157	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
Kojto	107:4f6c30876dfa	2158	#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
Kojto	107:4f6c30876dfa	2159	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
Kojto	107:4f6c30876dfa	2160	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
Kojto	107:4f6c30876dfa	2161	#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
Kojto	107:4f6c30876dfa	2162	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
Kojto	107:4f6c30876dfa	2163	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
Kojto	107:4f6c30876dfa	2164	#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
Kojto	107:4f6c30876dfa	2165	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
Kojto	107:4f6c30876dfa	2166	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
Kojto	107:4f6c30876dfa	2167	#endif /* STM32F1 */
Kojto	107:4f6c30876dfa	2168
Kojto	107:4f6c30876dfa	2169	#define IS_ALARM IS_RTC_ALARM
Kojto	107:4f6c30876dfa	2170	#define IS_ALARM_MASK IS_RTC_ALARM_MASK
Kojto	107:4f6c30876dfa	2171	#define IS_TAMPER IS_RTC_TAMPER
Kojto	107:4f6c30876dfa	2172	#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
Kojto	107:4f6c30876dfa	2173	#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
Kojto	107:4f6c30876dfa	2174	#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
Kojto	107:4f6c30876dfa	2175	#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
Kojto	107:4f6c30876dfa	2176	#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
Kojto	107:4f6c30876dfa	2177	#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
Kojto	107:4f6c30876dfa	2178	#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
Kojto	107:4f6c30876dfa	2179	#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
Kojto	107:4f6c30876dfa	2180	#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
Kojto	107:4f6c30876dfa	2181	#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
Kojto	107:4f6c30876dfa	2182	#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
Kojto	107:4f6c30876dfa	2183
Kojto	107:4f6c30876dfa	2184	#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
Kojto	107:4f6c30876dfa	2185	#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
Kojto	107:4f6c30876dfa	2186
Kojto	107:4f6c30876dfa	2187	/**
Kojto	107:4f6c30876dfa	2188	* @}
Kojto	107:4f6c30876dfa	2189	*/
Kojto	107:4f6c30876dfa	2190
Kojto	107:4f6c30876dfa	2191	/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2192	* @{
Kojto	107:4f6c30876dfa	2193	*/
Kojto	107:4f6c30876dfa	2194
Kojto	107:4f6c30876dfa	2195	#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
Kojto	107:4f6c30876dfa	2196	#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
Kojto	107:4f6c30876dfa	2197
Kojto	107:4f6c30876dfa	2198	#if defined(STM32F4)
Kojto	107:4f6c30876dfa	2199	#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
Kojto	107:4f6c30876dfa	2200	#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
Kojto	107:4f6c30876dfa	2201	#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
Kojto	107:4f6c30876dfa	2202	#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION
Kojto	107:4f6c30876dfa	2203	#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND
Kojto	107:4f6c30876dfa	2204	#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT
Kojto	107:4f6c30876dfa	2205	#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED
Kojto	107:4f6c30876dfa	2206	#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE
Kojto	107:4f6c30876dfa	2207	#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE
Kojto	107:4f6c30876dfa	2208	#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE
Kojto	107:4f6c30876dfa	2209	#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
Kojto	107:4f6c30876dfa	2210	#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT
Kojto	107:4f6c30876dfa	2211	#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT
Kojto	107:4f6c30876dfa	2212	#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG
Kojto	107:4f6c30876dfa	2213	#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2214	#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT
Kojto	107:4f6c30876dfa	2215	#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT
Kojto	107:4f6c30876dfa	2216	#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS
Kojto	107:4f6c30876dfa	2217	#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT
Kojto	107:4f6c30876dfa	2218	#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND
Kojto	107:4f6c30876dfa	2219	/* alias CMSIS */
Kojto	107:4f6c30876dfa	2220	#define SDMMC1_IRQn SDIO_IRQn
Kojto	107:4f6c30876dfa	2221	#define SDMMC1_IRQHandler SDIO_IRQHandler
Kojto	107:4f6c30876dfa	2222	#endif
Kojto	107:4f6c30876dfa	2223
Kojto	107:4f6c30876dfa	2224	#if defined(STM32F7) \|\| defined(STM32L4)
Kojto	107:4f6c30876dfa	2225	#define SD_SDIO_DISABLED SD_SDMMC_DISABLED
Kojto	107:4f6c30876dfa	2226	#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY
Kojto	107:4f6c30876dfa	2227	#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED
Kojto	107:4f6c30876dfa	2228	#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION
Kojto	107:4f6c30876dfa	2229	#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND
Kojto	107:4f6c30876dfa	2230	#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT
Kojto	107:4f6c30876dfa	2231	#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED
Kojto	107:4f6c30876dfa	2232	#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE
Kojto	107:4f6c30876dfa	2233	#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE
Kojto	107:4f6c30876dfa	2234	#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE
Kojto	107:4f6c30876dfa	2235	#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE
Kojto	107:4f6c30876dfa	2236	#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT
Kojto	107:4f6c30876dfa	2237	#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT
Kojto	107:4f6c30876dfa	2238	#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG
Kojto	107:4f6c30876dfa	2239	#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2240	#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
Kojto	107:4f6c30876dfa	2241	#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
Kojto	107:4f6c30876dfa	2242	#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS
Kojto	107:4f6c30876dfa	2243	#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT
Kojto	107:4f6c30876dfa	2244	#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND
Kojto	107:4f6c30876dfa	2245	/* alias CMSIS for compatibilities */
Kojto	107:4f6c30876dfa	2246	#define SDIO_IRQn SDMMC1_IRQn
Kojto	107:4f6c30876dfa	2247	#define SDIO_IRQHandler SDMMC1_IRQHandler
Kojto	107:4f6c30876dfa	2248	#endif
Kojto	107:4f6c30876dfa	2249	/**
Kojto	107:4f6c30876dfa	2250	* @}
Kojto	107:4f6c30876dfa	2251	*/
Kojto	107:4f6c30876dfa	2252
Kojto	107:4f6c30876dfa	2253	/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2254	* @{
Kojto	107:4f6c30876dfa	2255	*/
Kojto	107:4f6c30876dfa	2256
Kojto	107:4f6c30876dfa	2257	#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
Kojto	107:4f6c30876dfa	2258	#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
Kojto	107:4f6c30876dfa	2259	#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
Kojto	107:4f6c30876dfa	2260	#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
Kojto	107:4f6c30876dfa	2261	#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
Kojto	107:4f6c30876dfa	2262	#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
Kojto	107:4f6c30876dfa	2263
Kojto	107:4f6c30876dfa	2264	#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	2265	#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	2266
Kojto	107:4f6c30876dfa	2267	#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
Kojto	107:4f6c30876dfa	2268
Kojto	107:4f6c30876dfa	2269	/**
Kojto	107:4f6c30876dfa	2270	* @}
Kojto	107:4f6c30876dfa	2271	*/
Kojto	107:4f6c30876dfa	2272
Kojto	107:4f6c30876dfa	2273	/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2274	* @{
Kojto	107:4f6c30876dfa	2275	*/
Kojto	107:4f6c30876dfa	2276	#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
Kojto	107:4f6c30876dfa	2277	#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
Kojto	107:4f6c30876dfa	2278	#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
Kojto	107:4f6c30876dfa	2279	#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
Kojto	107:4f6c30876dfa	2280	#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
Kojto	107:4f6c30876dfa	2281	#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
Kojto	107:4f6c30876dfa	2282	#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
Kojto	107:4f6c30876dfa	2283	#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
Kojto	107:4f6c30876dfa	2284	/**
Kojto	107:4f6c30876dfa	2285	* @}
Kojto	107:4f6c30876dfa	2286	*/
Kojto	107:4f6c30876dfa	2287
Kojto	107:4f6c30876dfa	2288	/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2289	* @{
Kojto	107:4f6c30876dfa	2290	*/
Kojto	107:4f6c30876dfa	2291
Kojto	107:4f6c30876dfa	2292	#define __HAL_SPI_1LINE_TX SPI_1LINE_TX
Kojto	107:4f6c30876dfa	2293	#define __HAL_SPI_1LINE_RX SPI_1LINE_RX
Kojto	107:4f6c30876dfa	2294	#define __HAL_SPI_RESET_CRC SPI_RESET_CRC
Kojto	107:4f6c30876dfa	2295
Kojto	107:4f6c30876dfa	2296	/**
Kojto	107:4f6c30876dfa	2297	* @}
Kojto	107:4f6c30876dfa	2298	*/
Kojto	107:4f6c30876dfa	2299
Kojto	107:4f6c30876dfa	2300	/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2301	* @{
Kojto	107:4f6c30876dfa	2302	*/
Kojto	107:4f6c30876dfa	2303
Kojto	107:4f6c30876dfa	2304	#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	2305	#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
Kojto	107:4f6c30876dfa	2306	#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	2307	#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
Kojto	107:4f6c30876dfa	2308
Kojto	107:4f6c30876dfa	2309	#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
Kojto	107:4f6c30876dfa	2310
Kojto	107:4f6c30876dfa	2311	#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
Kojto	107:4f6c30876dfa	2312	#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
Kojto	107:4f6c30876dfa	2313
Kojto	107:4f6c30876dfa	2314	/**
Kojto	107:4f6c30876dfa	2315	* @}
Kojto	107:4f6c30876dfa	2316	*/
Kojto	107:4f6c30876dfa	2317
Kojto	107:4f6c30876dfa	2318
Kojto	107:4f6c30876dfa	2319	/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2320	* @{
Kojto	107:4f6c30876dfa	2321	*/
Kojto	107:4f6c30876dfa	2322
Kojto	107:4f6c30876dfa	2323	#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
Kojto	107:4f6c30876dfa	2324	#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
Kojto	107:4f6c30876dfa	2325	#define __USART_ENABLE __HAL_USART_ENABLE
Kojto	107:4f6c30876dfa	2326	#define __USART_DISABLE __HAL_USART_DISABLE
Kojto	107:4f6c30876dfa	2327
Kojto	107:4f6c30876dfa	2328	#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	2329	#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
Kojto	107:4f6c30876dfa	2330
Kojto	107:4f6c30876dfa	2331	/**
Kojto	107:4f6c30876dfa	2332	* @}
Kojto	107:4f6c30876dfa	2333	*/
Kojto	107:4f6c30876dfa	2334
Kojto	107:4f6c30876dfa	2335	/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2336	* @{
Kojto	107:4f6c30876dfa	2337	*/
Kojto	107:4f6c30876dfa	2338	#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
Kojto	107:4f6c30876dfa	2339
Kojto	107:4f6c30876dfa	2340	#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
Kojto	107:4f6c30876dfa	2341	#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
Kojto	107:4f6c30876dfa	2342	#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
Kojto	107:4f6c30876dfa	2343	#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
Kojto	107:4f6c30876dfa	2344
Kojto	107:4f6c30876dfa	2345	#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
Kojto	107:4f6c30876dfa	2346	#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
Kojto	107:4f6c30876dfa	2347	#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
Kojto	107:4f6c30876dfa	2348	#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
Kojto	107:4f6c30876dfa	2349
Kojto	107:4f6c30876dfa	2350	#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
Kojto	107:4f6c30876dfa	2351	#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
Kojto	107:4f6c30876dfa	2352	#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
Kojto	107:4f6c30876dfa	2353	#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2354	#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	2355	#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	2356	#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	107:4f6c30876dfa	2357
Kojto	107:4f6c30876dfa	2358	#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
Kojto	107:4f6c30876dfa	2359	#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
Kojto	107:4f6c30876dfa	2360	#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
Kojto	107:4f6c30876dfa	2361	#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2362	#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	2363	#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	2364	#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	107:4f6c30876dfa	2365	#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
Kojto	107:4f6c30876dfa	2366
Kojto	107:4f6c30876dfa	2367	#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
Kojto	107:4f6c30876dfa	2368	#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
Kojto	107:4f6c30876dfa	2369	#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
Kojto	107:4f6c30876dfa	2370	#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2371	#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	107:4f6c30876dfa	2372	#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	107:4f6c30876dfa	2373	#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	107:4f6c30876dfa	2374	#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
Kojto	107:4f6c30876dfa	2375
Kojto	107:4f6c30876dfa	2376	#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
Kojto	107:4f6c30876dfa	2377	#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
Kojto	107:4f6c30876dfa	2378
Kojto	107:4f6c30876dfa	2379	#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
Kojto	107:4f6c30876dfa	2380	#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
Kojto	107:4f6c30876dfa	2381	/**
Kojto	107:4f6c30876dfa	2382	* @}
Kojto	107:4f6c30876dfa	2383	*/
Kojto	107:4f6c30876dfa	2384
Kojto	107:4f6c30876dfa	2385	/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2386	* @{
Kojto	107:4f6c30876dfa	2387	*/
Kojto	107:4f6c30876dfa	2388	#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
Kojto	107:4f6c30876dfa	2389	#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
Kojto	107:4f6c30876dfa	2390
Kojto	107:4f6c30876dfa	2391	#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
Kojto	107:4f6c30876dfa	2392	#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
Kojto	107:4f6c30876dfa	2393
Kojto	107:4f6c30876dfa	2394	#define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
Kojto	107:4f6c30876dfa	2395
Kojto	107:4f6c30876dfa	2396	#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
Kojto	107:4f6c30876dfa	2397	#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
Kojto	107:4f6c30876dfa	2398	#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
Kojto	107:4f6c30876dfa	2399	#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
Kojto	107:4f6c30876dfa	2400	#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
Kojto	107:4f6c30876dfa	2401	#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
Kojto	107:4f6c30876dfa	2402	#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
Kojto	107:4f6c30876dfa	2403	#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
Kojto	107:4f6c30876dfa	2404	#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
Kojto	107:4f6c30876dfa	2405	#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
Kojto	107:4f6c30876dfa	2406	#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
Kojto	107:4f6c30876dfa	2407	#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
Kojto	107:4f6c30876dfa	2408
Kojto	107:4f6c30876dfa	2409	#define TIM_TS_ITR0 ((uint32_t)0x0000)
Kojto	107:4f6c30876dfa	2410	#define TIM_TS_ITR1 ((uint32_t)0x0010)
Kojto	107:4f6c30876dfa	2411	#define TIM_TS_ITR2 ((uint32_t)0x0020)
Kojto	107:4f6c30876dfa	2412	#define TIM_TS_ITR3 ((uint32_t)0x0030)
Kojto	107:4f6c30876dfa	2413	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	107:4f6c30876dfa	2414	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	107:4f6c30876dfa	2415	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	107:4f6c30876dfa	2416	((SELECTION) == TIM_TS_ITR3))
Kojto	107:4f6c30876dfa	2417
Kojto	107:4f6c30876dfa	2418	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto	107:4f6c30876dfa	2419	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto	107:4f6c30876dfa	2420	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
Kojto	107:4f6c30876dfa	2421	((CHANNEL) == TIM_CHANNEL_2))
Kojto	107:4f6c30876dfa	2422
Kojto	107:4f6c30876dfa	2423	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
Kojto	107:4f6c30876dfa	2424	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
Kojto	107:4f6c30876dfa	2425
Kojto	107:4f6c30876dfa	2426	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
Kojto	107:4f6c30876dfa	2427	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
Kojto	107:4f6c30876dfa	2428
Kojto	107:4f6c30876dfa	2429	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
Kojto	107:4f6c30876dfa	2430	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
Kojto	107:4f6c30876dfa	2431
Kojto	107:4f6c30876dfa	2432	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
Kojto	107:4f6c30876dfa	2433	((STATE) == TIM_OUTPUTSTATE_ENABLE))
Kojto	107:4f6c30876dfa	2434	/**
Kojto	107:4f6c30876dfa	2435	* @}
Kojto	107:4f6c30876dfa	2436	*/
Kojto	107:4f6c30876dfa	2437
Kojto	107:4f6c30876dfa	2438	/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2439	* @{
Kojto	107:4f6c30876dfa	2440	*/
Kojto	107:4f6c30876dfa	2441
Kojto	107:4f6c30876dfa	2442	#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
Kojto	107:4f6c30876dfa	2443	#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
Kojto	107:4f6c30876dfa	2444	#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
Kojto	107:4f6c30876dfa	2445	#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
Kojto	107:4f6c30876dfa	2446	#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
Kojto	107:4f6c30876dfa	2447	#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
Kojto	107:4f6c30876dfa	2448	#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
Kojto	107:4f6c30876dfa	2449
Kojto	107:4f6c30876dfa	2450	#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
Kojto	107:4f6c30876dfa	2451	#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
Kojto	107:4f6c30876dfa	2452	#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
Kojto	107:4f6c30876dfa	2453	/**
Kojto	107:4f6c30876dfa	2454	* @}
Kojto	107:4f6c30876dfa	2455	*/
Kojto	107:4f6c30876dfa	2456
Kojto	107:4f6c30876dfa	2457	/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2458	* @{
Kojto	107:4f6c30876dfa	2459	*/
Kojto	107:4f6c30876dfa	2460	#define __HAL_LTDC_LAYER LTDC_LAYER
Kojto	107:4f6c30876dfa	2461	/**
Kojto	107:4f6c30876dfa	2462	* @}
Kojto	107:4f6c30876dfa	2463	*/
Kojto	107:4f6c30876dfa	2464
Kojto	107:4f6c30876dfa	2465	/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2466	* @{
Kojto	107:4f6c30876dfa	2467	*/
Kojto	107:4f6c30876dfa	2468	#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
Kojto	107:4f6c30876dfa	2469	#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
Kojto	107:4f6c30876dfa	2470	#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
Kojto	107:4f6c30876dfa	2471	#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
Kojto	107:4f6c30876dfa	2472	#define SAI_STREOMODE SAI_STEREOMODE
Kojto	107:4f6c30876dfa	2473	#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
Kojto	107:4f6c30876dfa	2474	#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
Kojto	107:4f6c30876dfa	2475	#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
Kojto	107:4f6c30876dfa	2476	#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
Kojto	107:4f6c30876dfa	2477	#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
Kojto	107:4f6c30876dfa	2478	#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
Kojto	107:4f6c30876dfa	2479	#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
Kojto	107:4f6c30876dfa	2480
Kojto	107:4f6c30876dfa	2481	/**
Kojto	107:4f6c30876dfa	2482	* @}
Kojto	107:4f6c30876dfa	2483	*/
Kojto	107:4f6c30876dfa	2484
Kojto	107:4f6c30876dfa	2485
Kojto	107:4f6c30876dfa	2486	/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
Kojto	107:4f6c30876dfa	2487	* @{
Kojto	107:4f6c30876dfa	2488	*/
Kojto	107:4f6c30876dfa	2489
Kojto	107:4f6c30876dfa	2490	/**
Kojto	107:4f6c30876dfa	2491	* @}
Kojto	107:4f6c30876dfa	2492	*/
Kojto	107:4f6c30876dfa	2493
Kojto	107:4f6c30876dfa	2494	#ifdef __cplusplus
Kojto	107:4f6c30876dfa	2495	}
Kojto	107:4f6c30876dfa	2496	#endif
Kojto	107:4f6c30876dfa	2497
Kojto	107:4f6c30876dfa	2498	#endif /* ___STM32_HAL_LEGACY */
Kojto	107:4f6c30876dfa	2499
Kojto	107:4f6c30876dfa	2500	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
Kojto	107:4f6c30876dfa	2501

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Type:	Library
Created:	04 Apr 2016
Imports:	4
Forks:	0
Commits:	122
Dependents:	4
Dependencies:	0
Followers:	1

The code in this repository is Apache licensed.

TARGET_DISCO_L476VG/stm32_hal_legacy.h@107:4f6c30876dfa, 2015-09-16 (annotated)

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