Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_SAMD21G18A/comp_mtb.h@111:4336505e4b1c, 2015-12-15 (annotated)

Committer:
Kojto
Date:
Tue Dec 15 14:39:38 2015 +0000
Revision:
111:4336505e4b1c
Release 111 of the mbed library



Changes:

- new platforms - Atmel targets (SAMR21G18A, SAMD21J18A, SAMD21G18A)

- Streams - add var argument (vprintf, vscanf)

- MAXWSNENV - BLE stack library additio

- LPC1768 - fix slave read

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 111:4336505e4b1c 1 /**
Kojto 111:4336505e4b1c 2 * \file
Kojto 111:4336505e4b1c 3 *
Kojto 111:4336505e4b1c 4 * \brief Component description for MTB
Kojto 111:4336505e4b1c 5 *
Kojto 111:4336505e4b1c 6 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
Kojto 111:4336505e4b1c 7 *
Kojto 111:4336505e4b1c 8 * \asf_license_start
Kojto 111:4336505e4b1c 9 *
Kojto 111:4336505e4b1c 10 * \page License
Kojto 111:4336505e4b1c 11 *
Kojto 111:4336505e4b1c 12 * Redistribution and use in source and binary forms, with or without
Kojto 111:4336505e4b1c 13 * modification, are permitted provided that the following conditions are met:
Kojto 111:4336505e4b1c 14 *
Kojto 111:4336505e4b1c 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 111:4336505e4b1c 16 * this list of conditions and the following disclaimer.
Kojto 111:4336505e4b1c 17 *
Kojto 111:4336505e4b1c 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 111:4336505e4b1c 19 * this list of conditions and the following disclaimer in the documentation
Kojto 111:4336505e4b1c 20 * and/or other materials provided with the distribution.
Kojto 111:4336505e4b1c 21 *
Kojto 111:4336505e4b1c 22 * 3. The name of Atmel may not be used to endorse or promote products derived
Kojto 111:4336505e4b1c 23 * from this software without specific prior written permission.
Kojto 111:4336505e4b1c 24 *
Kojto 111:4336505e4b1c 25 * 4. This software may only be redistributed and used in connection with an
Kojto 111:4336505e4b1c 26 * Atmel microcontroller product.
Kojto 111:4336505e4b1c 27 *
Kojto 111:4336505e4b1c 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
Kojto 111:4336505e4b1c 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
Kojto 111:4336505e4b1c 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
Kojto 111:4336505e4b1c 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
Kojto 111:4336505e4b1c 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 111:4336505e4b1c 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
Kojto 111:4336505e4b1c 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
Kojto 111:4336505e4b1c 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
Kojto 111:4336505e4b1c 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
Kojto 111:4336505e4b1c 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 111:4336505e4b1c 38 * POSSIBILITY OF SUCH DAMAGE.
Kojto 111:4336505e4b1c 39 *
Kojto 111:4336505e4b1c 40 * \asf_license_stop
Kojto 111:4336505e4b1c 41 *
Kojto 111:4336505e4b1c 42 */
Kojto 111:4336505e4b1c 43 /*
Kojto 111:4336505e4b1c 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
Kojto 111:4336505e4b1c 45 */
Kojto 111:4336505e4b1c 46
Kojto 111:4336505e4b1c 47 #ifndef _SAMD21_MTB_COMPONENT_
Kojto 111:4336505e4b1c 48 #define _SAMD21_MTB_COMPONENT_
Kojto 111:4336505e4b1c 49
Kojto 111:4336505e4b1c 50 /* ========================================================================== */
Kojto 111:4336505e4b1c 51 /** SOFTWARE API DEFINITION FOR MTB */
Kojto 111:4336505e4b1c 52 /* ========================================================================== */
Kojto 111:4336505e4b1c 53 /** \addtogroup SAMD21_MTB Cortex-M0+ Micro-Trace Buffer */
Kojto 111:4336505e4b1c 54 /*@{*/
Kojto 111:4336505e4b1c 55
Kojto 111:4336505e4b1c 56 #define MTB_U2002
Kojto 111:4336505e4b1c 57 #define REV_MTB 0x100
Kojto 111:4336505e4b1c 58
Kojto 111:4336505e4b1c 59 /* -------- MTB_POSITION : (MTB Offset: 0x000) (R/W 32) MTB Position -------- */
Kojto 111:4336505e4b1c 60 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 61 typedef union {
Kojto 111:4336505e4b1c 62 struct {
Kojto 111:4336505e4b1c 63 uint32_t :2; /*!< bit: 0.. 1 Reserved */
Kojto 111:4336505e4b1c 64 uint32_t WRAP:1; /*!< bit: 2 Pointer Value Wraps */
Kojto 111:4336505e4b1c 65 uint32_t POINTER:29; /*!< bit: 3..31 Trace Packet Location Pointer */
Kojto 111:4336505e4b1c 66 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 67 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 68 } MTB_POSITION_Type;
Kojto 111:4336505e4b1c 69 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 70
Kojto 111:4336505e4b1c 71 #define MTB_POSITION_OFFSET 0x000 /**< \brief (MTB_POSITION offset) MTB Position */
Kojto 111:4336505e4b1c 72
Kojto 111:4336505e4b1c 73 #define MTB_POSITION_WRAP_Pos 2 /**< \brief (MTB_POSITION) Pointer Value Wraps */
Kojto 111:4336505e4b1c 74 #define MTB_POSITION_WRAP (0x1ul << MTB_POSITION_WRAP_Pos)
Kojto 111:4336505e4b1c 75 #define MTB_POSITION_POINTER_Pos 3 /**< \brief (MTB_POSITION) Trace Packet Location Pointer */
Kojto 111:4336505e4b1c 76 #define MTB_POSITION_POINTER_Msk (0x1FFFFFFFul << MTB_POSITION_POINTER_Pos)
Kojto 111:4336505e4b1c 77 #define MTB_POSITION_POINTER(value) ((MTB_POSITION_POINTER_Msk & ((value) << MTB_POSITION_POINTER_Pos)))
Kojto 111:4336505e4b1c 78 #define MTB_POSITION_MASK 0xFFFFFFFCul /**< \brief (MTB_POSITION) MASK Register */
Kojto 111:4336505e4b1c 79
Kojto 111:4336505e4b1c 80 /* -------- MTB_MASTER : (MTB Offset: 0x004) (R/W 32) MTB Master -------- */
Kojto 111:4336505e4b1c 81 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 82 typedef union {
Kojto 111:4336505e4b1c 83 struct {
Kojto 111:4336505e4b1c 84 uint32_t MASK:5; /*!< bit: 0.. 4 Maximum Value of the Trace Buffer in SRAM */
Kojto 111:4336505e4b1c 85 uint32_t TSTARTEN:1; /*!< bit: 5 Trace Start Input Enable */
Kojto 111:4336505e4b1c 86 uint32_t TSTOPEN:1; /*!< bit: 6 Trace Stop Input Enable */
Kojto 111:4336505e4b1c 87 uint32_t SFRWPRIV:1; /*!< bit: 7 Special Function Register Write Privilege */
Kojto 111:4336505e4b1c 88 uint32_t RAMPRIV:1; /*!< bit: 8 SRAM Privilege */
Kojto 111:4336505e4b1c 89 uint32_t HALTREQ:1; /*!< bit: 9 Halt Request */
Kojto 111:4336505e4b1c 90 uint32_t :21; /*!< bit: 10..30 Reserved */
Kojto 111:4336505e4b1c 91 uint32_t EN:1; /*!< bit: 31 Main Trace Enable */
Kojto 111:4336505e4b1c 92 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 93 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 94 } MTB_MASTER_Type;
Kojto 111:4336505e4b1c 95 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 96
Kojto 111:4336505e4b1c 97 #define MTB_MASTER_OFFSET 0x004 /**< \brief (MTB_MASTER offset) MTB Master */
Kojto 111:4336505e4b1c 98 #define MTB_MASTER_RESETVALUE 0x00000000ul /**< \brief (MTB_MASTER reset_value) MTB Master */
Kojto 111:4336505e4b1c 99
Kojto 111:4336505e4b1c 100 #define MTB_MASTER_MASK_Pos 0 /**< \brief (MTB_MASTER) Maximum Value of the Trace Buffer in SRAM */
Kojto 111:4336505e4b1c 101 #define MTB_MASTER_MASK_Msk (0x1Ful << MTB_MASTER_MASK_Pos)
Kojto 111:4336505e4b1c 102 #define MTB_MASTER_MASK(value) ((MTB_MASTER_MASK_Msk & ((value) << MTB_MASTER_MASK_Pos)))
Kojto 111:4336505e4b1c 103 #define MTB_MASTER_TSTARTEN_Pos 5 /**< \brief (MTB_MASTER) Trace Start Input Enable */
Kojto 111:4336505e4b1c 104 #define MTB_MASTER_TSTARTEN (0x1ul << MTB_MASTER_TSTARTEN_Pos)
Kojto 111:4336505e4b1c 105 #define MTB_MASTER_TSTOPEN_Pos 6 /**< \brief (MTB_MASTER) Trace Stop Input Enable */
Kojto 111:4336505e4b1c 106 #define MTB_MASTER_TSTOPEN (0x1ul << MTB_MASTER_TSTOPEN_Pos)
Kojto 111:4336505e4b1c 107 #define MTB_MASTER_SFRWPRIV_Pos 7 /**< \brief (MTB_MASTER) Special Function Register Write Privilege */
Kojto 111:4336505e4b1c 108 #define MTB_MASTER_SFRWPRIV (0x1ul << MTB_MASTER_SFRWPRIV_Pos)
Kojto 111:4336505e4b1c 109 #define MTB_MASTER_RAMPRIV_Pos 8 /**< \brief (MTB_MASTER) SRAM Privilege */
Kojto 111:4336505e4b1c 110 #define MTB_MASTER_RAMPRIV (0x1ul << MTB_MASTER_RAMPRIV_Pos)
Kojto 111:4336505e4b1c 111 #define MTB_MASTER_HALTREQ_Pos 9 /**< \brief (MTB_MASTER) Halt Request */
Kojto 111:4336505e4b1c 112 #define MTB_MASTER_HALTREQ (0x1ul << MTB_MASTER_HALTREQ_Pos)
Kojto 111:4336505e4b1c 113 #define MTB_MASTER_EN_Pos 31 /**< \brief (MTB_MASTER) Main Trace Enable */
Kojto 111:4336505e4b1c 114 #define MTB_MASTER_EN (0x1ul << MTB_MASTER_EN_Pos)
Kojto 111:4336505e4b1c 115 #define MTB_MASTER_MASK_ 0x800003FFul /**< \brief (MTB_MASTER) MASK Register */
Kojto 111:4336505e4b1c 116
Kojto 111:4336505e4b1c 117 /* -------- MTB_FLOW : (MTB Offset: 0x008) (R/W 32) MTB Flow -------- */
Kojto 111:4336505e4b1c 118 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 119 typedef union {
Kojto 111:4336505e4b1c 120 struct {
Kojto 111:4336505e4b1c 121 uint32_t AUTOSTOP:1; /*!< bit: 0 Auto Stop Tracing */
Kojto 111:4336505e4b1c 122 uint32_t AUTOHALT:1; /*!< bit: 1 Auto Halt Request */
Kojto 111:4336505e4b1c 123 uint32_t :1; /*!< bit: 2 Reserved */
Kojto 111:4336505e4b1c 124 uint32_t WATERMARK:29; /*!< bit: 3..31 Watermark value */
Kojto 111:4336505e4b1c 125 } bit; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 126 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 127 } MTB_FLOW_Type;
Kojto 111:4336505e4b1c 128 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 129
Kojto 111:4336505e4b1c 130 #define MTB_FLOW_OFFSET 0x008 /**< \brief (MTB_FLOW offset) MTB Flow */
Kojto 111:4336505e4b1c 131 #define MTB_FLOW_RESETVALUE 0x00000000ul /**< \brief (MTB_FLOW reset_value) MTB Flow */
Kojto 111:4336505e4b1c 132
Kojto 111:4336505e4b1c 133 #define MTB_FLOW_AUTOSTOP_Pos 0 /**< \brief (MTB_FLOW) Auto Stop Tracing */
Kojto 111:4336505e4b1c 134 #define MTB_FLOW_AUTOSTOP (0x1ul << MTB_FLOW_AUTOSTOP_Pos)
Kojto 111:4336505e4b1c 135 #define MTB_FLOW_AUTOHALT_Pos 1 /**< \brief (MTB_FLOW) Auto Halt Request */
Kojto 111:4336505e4b1c 136 #define MTB_FLOW_AUTOHALT (0x1ul << MTB_FLOW_AUTOHALT_Pos)
Kojto 111:4336505e4b1c 137 #define MTB_FLOW_WATERMARK_Pos 3 /**< \brief (MTB_FLOW) Watermark value */
Kojto 111:4336505e4b1c 138 #define MTB_FLOW_WATERMARK_Msk (0x1FFFFFFFul << MTB_FLOW_WATERMARK_Pos)
Kojto 111:4336505e4b1c 139 #define MTB_FLOW_WATERMARK(value) ((MTB_FLOW_WATERMARK_Msk & ((value) << MTB_FLOW_WATERMARK_Pos)))
Kojto 111:4336505e4b1c 140 #define MTB_FLOW_MASK 0xFFFFFFFBul /**< \brief (MTB_FLOW) MASK Register */
Kojto 111:4336505e4b1c 141
Kojto 111:4336505e4b1c 142 /* -------- MTB_BASE : (MTB Offset: 0x00C) (R/ 32) MTB Base -------- */
Kojto 111:4336505e4b1c 143 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 144 typedef union {
Kojto 111:4336505e4b1c 145 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 146 } MTB_BASE_Type;
Kojto 111:4336505e4b1c 147 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 148
Kojto 111:4336505e4b1c 149 #define MTB_BASE_OFFSET 0x00C /**< \brief (MTB_BASE offset) MTB Base */
Kojto 111:4336505e4b1c 150 #define MTB_BASE_MASK 0xFFFFFFFFul /**< \brief (MTB_BASE) MASK Register */
Kojto 111:4336505e4b1c 151
Kojto 111:4336505e4b1c 152 /* -------- MTB_ITCTRL : (MTB Offset: 0xF00) (R/W 32) MTB Integration Mode Control -------- */
Kojto 111:4336505e4b1c 153 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 154 typedef union {
Kojto 111:4336505e4b1c 155 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 156 } MTB_ITCTRL_Type;
Kojto 111:4336505e4b1c 157 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 158
Kojto 111:4336505e4b1c 159 #define MTB_ITCTRL_OFFSET 0xF00 /**< \brief (MTB_ITCTRL offset) MTB Integration Mode Control */
Kojto 111:4336505e4b1c 160 #define MTB_ITCTRL_MASK 0xFFFFFFFFul /**< \brief (MTB_ITCTRL) MASK Register */
Kojto 111:4336505e4b1c 161
Kojto 111:4336505e4b1c 162 /* -------- MTB_CLAIMSET : (MTB Offset: 0xFA0) (R/W 32) MTB Claim Set -------- */
Kojto 111:4336505e4b1c 163 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 164 typedef union {
Kojto 111:4336505e4b1c 165 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 166 } MTB_CLAIMSET_Type;
Kojto 111:4336505e4b1c 167 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 168
Kojto 111:4336505e4b1c 169 #define MTB_CLAIMSET_OFFSET 0xFA0 /**< \brief (MTB_CLAIMSET offset) MTB Claim Set */
Kojto 111:4336505e4b1c 170 #define MTB_CLAIMSET_MASK 0xFFFFFFFFul /**< \brief (MTB_CLAIMSET) MASK Register */
Kojto 111:4336505e4b1c 171
Kojto 111:4336505e4b1c 172 /* -------- MTB_CLAIMCLR : (MTB Offset: 0xFA4) (R/W 32) MTB Claim Clear -------- */
Kojto 111:4336505e4b1c 173 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 174 typedef union {
Kojto 111:4336505e4b1c 175 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 176 } MTB_CLAIMCLR_Type;
Kojto 111:4336505e4b1c 177 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 178
Kojto 111:4336505e4b1c 179 #define MTB_CLAIMCLR_OFFSET 0xFA4 /**< \brief (MTB_CLAIMCLR offset) MTB Claim Clear */
Kojto 111:4336505e4b1c 180 #define MTB_CLAIMCLR_MASK 0xFFFFFFFFul /**< \brief (MTB_CLAIMCLR) MASK Register */
Kojto 111:4336505e4b1c 181
Kojto 111:4336505e4b1c 182 /* -------- MTB_LOCKACCESS : (MTB Offset: 0xFB0) (R/W 32) MTB Lock Access -------- */
Kojto 111:4336505e4b1c 183 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 184 typedef union {
Kojto 111:4336505e4b1c 185 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 186 } MTB_LOCKACCESS_Type;
Kojto 111:4336505e4b1c 187 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 188
Kojto 111:4336505e4b1c 189 #define MTB_LOCKACCESS_OFFSET 0xFB0 /**< \brief (MTB_LOCKACCESS offset) MTB Lock Access */
Kojto 111:4336505e4b1c 190 #define MTB_LOCKACCESS_MASK 0xFFFFFFFFul /**< \brief (MTB_LOCKACCESS) MASK Register */
Kojto 111:4336505e4b1c 191
Kojto 111:4336505e4b1c 192 /* -------- MTB_LOCKSTATUS : (MTB Offset: 0xFB4) (R/ 32) MTB Lock Status -------- */
Kojto 111:4336505e4b1c 193 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 194 typedef union {
Kojto 111:4336505e4b1c 195 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 196 } MTB_LOCKSTATUS_Type;
Kojto 111:4336505e4b1c 197 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 198
Kojto 111:4336505e4b1c 199 #define MTB_LOCKSTATUS_OFFSET 0xFB4 /**< \brief (MTB_LOCKSTATUS offset) MTB Lock Status */
Kojto 111:4336505e4b1c 200 #define MTB_LOCKSTATUS_MASK 0xFFFFFFFFul /**< \brief (MTB_LOCKSTATUS) MASK Register */
Kojto 111:4336505e4b1c 201
Kojto 111:4336505e4b1c 202 /* -------- MTB_AUTHSTATUS : (MTB Offset: 0xFB8) (R/ 32) MTB Authentication Status -------- */
Kojto 111:4336505e4b1c 203 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 204 typedef union {
Kojto 111:4336505e4b1c 205 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 206 } MTB_AUTHSTATUS_Type;
Kojto 111:4336505e4b1c 207 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 208
Kojto 111:4336505e4b1c 209 #define MTB_AUTHSTATUS_OFFSET 0xFB8 /**< \brief (MTB_AUTHSTATUS offset) MTB Authentication Status */
Kojto 111:4336505e4b1c 210 #define MTB_AUTHSTATUS_MASK 0xFFFFFFFFul /**< \brief (MTB_AUTHSTATUS) MASK Register */
Kojto 111:4336505e4b1c 211
Kojto 111:4336505e4b1c 212 /* -------- MTB_DEVARCH : (MTB Offset: 0xFBC) (R/ 32) MTB Device Architecture -------- */
Kojto 111:4336505e4b1c 213 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 214 typedef union {
Kojto 111:4336505e4b1c 215 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 216 } MTB_DEVARCH_Type;
Kojto 111:4336505e4b1c 217 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 218
Kojto 111:4336505e4b1c 219 #define MTB_DEVARCH_OFFSET 0xFBC /**< \brief (MTB_DEVARCH offset) MTB Device Architecture */
Kojto 111:4336505e4b1c 220 #define MTB_DEVARCH_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVARCH) MASK Register */
Kojto 111:4336505e4b1c 221
Kojto 111:4336505e4b1c 222 /* -------- MTB_DEVID : (MTB Offset: 0xFC8) (R/ 32) MTB Device Configuration -------- */
Kojto 111:4336505e4b1c 223 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 224 typedef union {
Kojto 111:4336505e4b1c 225 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 226 } MTB_DEVID_Type;
Kojto 111:4336505e4b1c 227 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 228
Kojto 111:4336505e4b1c 229 #define MTB_DEVID_OFFSET 0xFC8 /**< \brief (MTB_DEVID offset) MTB Device Configuration */
Kojto 111:4336505e4b1c 230 #define MTB_DEVID_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVID) MASK Register */
Kojto 111:4336505e4b1c 231
Kojto 111:4336505e4b1c 232 /* -------- MTB_DEVTYPE : (MTB Offset: 0xFCC) (R/ 32) MTB Device Type -------- */
Kojto 111:4336505e4b1c 233 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 234 typedef union {
Kojto 111:4336505e4b1c 235 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 236 } MTB_DEVTYPE_Type;
Kojto 111:4336505e4b1c 237 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 238
Kojto 111:4336505e4b1c 239 #define MTB_DEVTYPE_OFFSET 0xFCC /**< \brief (MTB_DEVTYPE offset) MTB Device Type */
Kojto 111:4336505e4b1c 240 #define MTB_DEVTYPE_MASK 0xFFFFFFFFul /**< \brief (MTB_DEVTYPE) MASK Register */
Kojto 111:4336505e4b1c 241
Kojto 111:4336505e4b1c 242 /* -------- MTB_PID4 : (MTB Offset: 0xFD0) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 243 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 244 typedef union {
Kojto 111:4336505e4b1c 245 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 246 } MTB_PID4_Type;
Kojto 111:4336505e4b1c 247 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 248
Kojto 111:4336505e4b1c 249 #define MTB_PID4_OFFSET 0xFD0 /**< \brief (MTB_PID4 offset) CoreSight */
Kojto 111:4336505e4b1c 250 #define MTB_PID4_MASK 0xFFFFFFFFul /**< \brief (MTB_PID4) MASK Register */
Kojto 111:4336505e4b1c 251
Kojto 111:4336505e4b1c 252 /* -------- MTB_PID5 : (MTB Offset: 0xFD4) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 253 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 254 typedef union {
Kojto 111:4336505e4b1c 255 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 256 } MTB_PID5_Type;
Kojto 111:4336505e4b1c 257 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 258
Kojto 111:4336505e4b1c 259 #define MTB_PID5_OFFSET 0xFD4 /**< \brief (MTB_PID5 offset) CoreSight */
Kojto 111:4336505e4b1c 260 #define MTB_PID5_MASK 0xFFFFFFFFul /**< \brief (MTB_PID5) MASK Register */
Kojto 111:4336505e4b1c 261
Kojto 111:4336505e4b1c 262 /* -------- MTB_PID6 : (MTB Offset: 0xFD8) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 263 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 264 typedef union {
Kojto 111:4336505e4b1c 265 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 266 } MTB_PID6_Type;
Kojto 111:4336505e4b1c 267 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 268
Kojto 111:4336505e4b1c 269 #define MTB_PID6_OFFSET 0xFD8 /**< \brief (MTB_PID6 offset) CoreSight */
Kojto 111:4336505e4b1c 270 #define MTB_PID6_MASK 0xFFFFFFFFul /**< \brief (MTB_PID6) MASK Register */
Kojto 111:4336505e4b1c 271
Kojto 111:4336505e4b1c 272 /* -------- MTB_PID7 : (MTB Offset: 0xFDC) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 273 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 274 typedef union {
Kojto 111:4336505e4b1c 275 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 276 } MTB_PID7_Type;
Kojto 111:4336505e4b1c 277 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 278
Kojto 111:4336505e4b1c 279 #define MTB_PID7_OFFSET 0xFDC /**< \brief (MTB_PID7 offset) CoreSight */
Kojto 111:4336505e4b1c 280 #define MTB_PID7_MASK 0xFFFFFFFFul /**< \brief (MTB_PID7) MASK Register */
Kojto 111:4336505e4b1c 281
Kojto 111:4336505e4b1c 282 /* -------- MTB_PID0 : (MTB Offset: 0xFE0) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 283 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 284 typedef union {
Kojto 111:4336505e4b1c 285 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 286 } MTB_PID0_Type;
Kojto 111:4336505e4b1c 287 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 288
Kojto 111:4336505e4b1c 289 #define MTB_PID0_OFFSET 0xFE0 /**< \brief (MTB_PID0 offset) CoreSight */
Kojto 111:4336505e4b1c 290 #define MTB_PID0_MASK 0xFFFFFFFFul /**< \brief (MTB_PID0) MASK Register */
Kojto 111:4336505e4b1c 291
Kojto 111:4336505e4b1c 292 /* -------- MTB_PID1 : (MTB Offset: 0xFE4) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 293 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 294 typedef union {
Kojto 111:4336505e4b1c 295 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 296 } MTB_PID1_Type;
Kojto 111:4336505e4b1c 297 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 298
Kojto 111:4336505e4b1c 299 #define MTB_PID1_OFFSET 0xFE4 /**< \brief (MTB_PID1 offset) CoreSight */
Kojto 111:4336505e4b1c 300 #define MTB_PID1_MASK 0xFFFFFFFFul /**< \brief (MTB_PID1) MASK Register */
Kojto 111:4336505e4b1c 301
Kojto 111:4336505e4b1c 302 /* -------- MTB_PID2 : (MTB Offset: 0xFE8) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 303 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 304 typedef union {
Kojto 111:4336505e4b1c 305 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 306 } MTB_PID2_Type;
Kojto 111:4336505e4b1c 307 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 308
Kojto 111:4336505e4b1c 309 #define MTB_PID2_OFFSET 0xFE8 /**< \brief (MTB_PID2 offset) CoreSight */
Kojto 111:4336505e4b1c 310 #define MTB_PID2_MASK 0xFFFFFFFFul /**< \brief (MTB_PID2) MASK Register */
Kojto 111:4336505e4b1c 311
Kojto 111:4336505e4b1c 312 /* -------- MTB_PID3 : (MTB Offset: 0xFEC) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 313 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 314 typedef union {
Kojto 111:4336505e4b1c 315 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 316 } MTB_PID3_Type;
Kojto 111:4336505e4b1c 317 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 318
Kojto 111:4336505e4b1c 319 #define MTB_PID3_OFFSET 0xFEC /**< \brief (MTB_PID3 offset) CoreSight */
Kojto 111:4336505e4b1c 320 #define MTB_PID3_MASK 0xFFFFFFFFul /**< \brief (MTB_PID3) MASK Register */
Kojto 111:4336505e4b1c 321
Kojto 111:4336505e4b1c 322 /* -------- MTB_CID0 : (MTB Offset: 0xFF0) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 323 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 324 typedef union {
Kojto 111:4336505e4b1c 325 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 326 } MTB_CID0_Type;
Kojto 111:4336505e4b1c 327 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 328
Kojto 111:4336505e4b1c 329 #define MTB_CID0_OFFSET 0xFF0 /**< \brief (MTB_CID0 offset) CoreSight */
Kojto 111:4336505e4b1c 330 #define MTB_CID0_MASK 0xFFFFFFFFul /**< \brief (MTB_CID0) MASK Register */
Kojto 111:4336505e4b1c 331
Kojto 111:4336505e4b1c 332 /* -------- MTB_CID1 : (MTB Offset: 0xFF4) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 333 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 334 typedef union {
Kojto 111:4336505e4b1c 335 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 336 } MTB_CID1_Type;
Kojto 111:4336505e4b1c 337 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 338
Kojto 111:4336505e4b1c 339 #define MTB_CID1_OFFSET 0xFF4 /**< \brief (MTB_CID1 offset) CoreSight */
Kojto 111:4336505e4b1c 340 #define MTB_CID1_MASK 0xFFFFFFFFul /**< \brief (MTB_CID1) MASK Register */
Kojto 111:4336505e4b1c 341
Kojto 111:4336505e4b1c 342 /* -------- MTB_CID2 : (MTB Offset: 0xFF8) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 343 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 344 typedef union {
Kojto 111:4336505e4b1c 345 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 346 } MTB_CID2_Type;
Kojto 111:4336505e4b1c 347 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 348
Kojto 111:4336505e4b1c 349 #define MTB_CID2_OFFSET 0xFF8 /**< \brief (MTB_CID2 offset) CoreSight */
Kojto 111:4336505e4b1c 350 #define MTB_CID2_MASK 0xFFFFFFFFul /**< \brief (MTB_CID2) MASK Register */
Kojto 111:4336505e4b1c 351
Kojto 111:4336505e4b1c 352 /* -------- MTB_CID3 : (MTB Offset: 0xFFC) (R/ 32) CoreSight -------- */
Kojto 111:4336505e4b1c 353 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 354 typedef union {
Kojto 111:4336505e4b1c 355 uint32_t reg; /*!< Type used for register access */
Kojto 111:4336505e4b1c 356 } MTB_CID3_Type;
Kojto 111:4336505e4b1c 357 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 358
Kojto 111:4336505e4b1c 359 #define MTB_CID3_OFFSET 0xFFC /**< \brief (MTB_CID3 offset) CoreSight */
Kojto 111:4336505e4b1c 360 #define MTB_CID3_MASK 0xFFFFFFFFul /**< \brief (MTB_CID3) MASK Register */
Kojto 111:4336505e4b1c 361
Kojto 111:4336505e4b1c 362 /** \brief MTB hardware registers */
Kojto 111:4336505e4b1c 363 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
Kojto 111:4336505e4b1c 364 typedef struct {
Kojto 111:4336505e4b1c 365 __IO MTB_POSITION_Type POSITION; /**< \brief Offset: 0x000 (R/W 32) MTB Position */
Kojto 111:4336505e4b1c 366 __IO MTB_MASTER_Type MASTER; /**< \brief Offset: 0x004 (R/W 32) MTB Master */
Kojto 111:4336505e4b1c 367 __IO MTB_FLOW_Type FLOW; /**< \brief Offset: 0x008 (R/W 32) MTB Flow */
Kojto 111:4336505e4b1c 368 __I MTB_BASE_Type BASE; /**< \brief Offset: 0x00C (R/ 32) MTB Base */
Kojto 111:4336505e4b1c 369 RoReg8 Reserved1[0xEF0];
Kojto 111:4336505e4b1c 370 __IO MTB_ITCTRL_Type ITCTRL; /**< \brief Offset: 0xF00 (R/W 32) MTB Integration Mode Control */
Kojto 111:4336505e4b1c 371 RoReg8 Reserved2[0x9C];
Kojto 111:4336505e4b1c 372 __IO MTB_CLAIMSET_Type CLAIMSET; /**< \brief Offset: 0xFA0 (R/W 32) MTB Claim Set */
Kojto 111:4336505e4b1c 373 __IO MTB_CLAIMCLR_Type CLAIMCLR; /**< \brief Offset: 0xFA4 (R/W 32) MTB Claim Clear */
Kojto 111:4336505e4b1c 374 RoReg8 Reserved3[0x8];
Kojto 111:4336505e4b1c 375 __IO MTB_LOCKACCESS_Type LOCKACCESS; /**< \brief Offset: 0xFB0 (R/W 32) MTB Lock Access */
Kojto 111:4336505e4b1c 376 __I MTB_LOCKSTATUS_Type LOCKSTATUS; /**< \brief Offset: 0xFB4 (R/ 32) MTB Lock Status */
Kojto 111:4336505e4b1c 377 __I MTB_AUTHSTATUS_Type AUTHSTATUS; /**< \brief Offset: 0xFB8 (R/ 32) MTB Authentication Status */
Kojto 111:4336505e4b1c 378 __I MTB_DEVARCH_Type DEVARCH; /**< \brief Offset: 0xFBC (R/ 32) MTB Device Architecture */
Kojto 111:4336505e4b1c 379 RoReg8 Reserved4[0x8];
Kojto 111:4336505e4b1c 380 __I MTB_DEVID_Type DEVID; /**< \brief Offset: 0xFC8 (R/ 32) MTB Device Configuration */
Kojto 111:4336505e4b1c 381 __I MTB_DEVTYPE_Type DEVTYPE; /**< \brief Offset: 0xFCC (R/ 32) MTB Device Type */
Kojto 111:4336505e4b1c 382 __I MTB_PID4_Type PID4; /**< \brief Offset: 0xFD0 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 383 __I MTB_PID5_Type PID5; /**< \brief Offset: 0xFD4 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 384 __I MTB_PID6_Type PID6; /**< \brief Offset: 0xFD8 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 385 __I MTB_PID7_Type PID7; /**< \brief Offset: 0xFDC (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 386 __I MTB_PID0_Type PID0; /**< \brief Offset: 0xFE0 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 387 __I MTB_PID1_Type PID1; /**< \brief Offset: 0xFE4 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 388 __I MTB_PID2_Type PID2; /**< \brief Offset: 0xFE8 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 389 __I MTB_PID3_Type PID3; /**< \brief Offset: 0xFEC (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 390 __I MTB_CID0_Type CID0; /**< \brief Offset: 0xFF0 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 391 __I MTB_CID1_Type CID1; /**< \brief Offset: 0xFF4 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 392 __I MTB_CID2_Type CID2; /**< \brief Offset: 0xFF8 (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 393 __I MTB_CID3_Type CID3; /**< \brief Offset: 0xFFC (R/ 32) CoreSight */
Kojto 111:4336505e4b1c 394 } Mtb;
Kojto 111:4336505e4b1c 395 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
Kojto 111:4336505e4b1c 396
Kojto 111:4336505e4b1c 397 /*@}*/
Kojto 111:4336505e4b1c 398
Kojto 111:4336505e4b1c 399 #endif /* _SAMD21_MTB_COMPONENT_ */