Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

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Fork of mbed by mbed official

Committer:
Kojto
Date:
Fri Oct 02 07:35:07 2015 +0200
Revision:
108:34e6b704fe68
Parent:
93:e188a91d3eaa
Release 108  of the mbed library

Changes:
- new platforms - ELMO_F411RE, WIZNET_7500P, ARM_MPS2_BEID
- EFM32 - bugfixes in rtc, serial
- Cortex A cmsis - update files
- STML4 - RAM fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_spi.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
Kojto 108:34e6b704fe68 5 * @version V1.3.0
Kojto 108:34e6b704fe68 6 * @date 26-June-2015
bogdanm 85:024bf7f99721 7 * @brief Header file of SPI HAL module.
bogdanm 85:024bf7f99721 8 ******************************************************************************
bogdanm 85:024bf7f99721 9 * @attention
bogdanm 85:024bf7f99721 10 *
Kojto 108:34e6b704fe68 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 12 *
bogdanm 85:024bf7f99721 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 14 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 16 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 19 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 21 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 22 * without specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 34 *
Kojto 108:34e6b704fe68 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 39 #ifndef __STM32F0xx_HAL_SPI_H
bogdanm 85:024bf7f99721 40 #define __STM32F0xx_HAL_SPI_H
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifdef __cplusplus
bogdanm 85:024bf7f99721 43 extern "C" {
bogdanm 85:024bf7f99721 44 #endif
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 47 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 48
bogdanm 85:024bf7f99721 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 50 * @{
bogdanm 85:024bf7f99721 51 */
bogdanm 85:024bf7f99721 52
bogdanm 85:024bf7f99721 53 /** @addtogroup SPI
bogdanm 85:024bf7f99721 54 * @{
Kojto 108:34e6b704fe68 55 */
bogdanm 85:024bf7f99721 56
Kojto 108:34e6b704fe68 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58 /** @defgroup SPI_Exported_Types SPI Exported Types
bogdanm 92:4fc01daae5a5 59 * @{
bogdanm 92:4fc01daae5a5 60 */
bogdanm 85:024bf7f99721 61
Kojto 108:34e6b704fe68 62 /**
Kojto 108:34e6b704fe68 63 * @brief SPI Configuration Structure definition
bogdanm 85:024bf7f99721 64 */
bogdanm 85:024bf7f99721 65 typedef struct
bogdanm 85:024bf7f99721 66 {
bogdanm 85:024bf7f99721 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
Kojto 108:34e6b704fe68 68 This parameter can be a value of @ref SPI_Mode */
bogdanm 85:024bf7f99721 69
bogdanm 85:024bf7f99721 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
bogdanm 85:024bf7f99721 71 This parameter can be a value of @ref SPI_Direction */
bogdanm 85:024bf7f99721 72
bogdanm 85:024bf7f99721 73 uint32_t DataSize; /*!< Specifies the SPI data size.
Kojto 108:34e6b704fe68 74 This parameter can be a value of @ref SPI_Data_Size */
bogdanm 85:024bf7f99721 75
bogdanm 85:024bf7f99721 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
bogdanm 85:024bf7f99721 77 This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm 85:024bf7f99721 78
bogdanm 85:024bf7f99721 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
bogdanm 85:024bf7f99721 80 This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm 85:024bf7f99721 81
bogdanm 85:024bf7f99721 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm 85:024bf7f99721 83 hardware (NSS pin) or by software using the SSI bit.
bogdanm 85:024bf7f99721 84 This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm 85:024bf7f99721 85
bogdanm 85:024bf7f99721 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm 85:024bf7f99721 87 used to configure the transmit and receive SCK clock.
bogdanm 85:024bf7f99721 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
bogdanm 85:024bf7f99721 89 @note The communication clock is derived from the master
bogdanm 85:024bf7f99721 90 clock. The slave clock does not need to be set. */
bogdanm 85:024bf7f99721 91
bogdanm 85:024bf7f99721 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 85:024bf7f99721 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
Kojto 108:34e6b704fe68 94
bogdanm 85:024bf7f99721 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
bogdanm 85:024bf7f99721 96 This parameter can be a value of @ref SPI_TI_mode */
bogdanm 85:024bf7f99721 97
bogdanm 85:024bf7f99721 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
bogdanm 85:024bf7f99721 99 This parameter can be a value of @ref SPI_CRC_Calculation */
bogdanm 85:024bf7f99721 100
bogdanm 85:024bf7f99721 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
bogdanm 85:024bf7f99721 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
bogdanm 85:024bf7f99721 103
Kojto 108:34e6b704fe68 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
Kojto 108:34e6b704fe68 105 CRC Length is only used with Data8 and Data16, not other data size
Kojto 108:34e6b704fe68 106 This parameter can be a value of @ref SPI_CRC_length */
bogdanm 85:024bf7f99721 107
bogdanm 85:024bf7f99721 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
Kojto 93:e188a91d3eaa 109 This parameter can be a value of @ref SPI_NSSP_Mode
Kojto 108:34e6b704fe68 110 This mode is activated by the NSSP bit in the SPIx_CR2 register and
Kojto 108:34e6b704fe68 111 it takes effect only if the SPI interface is configured as Motorola SPI
Kojto 108:34e6b704fe68 112 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
bogdanm 85:024bf7f99721 113 CPOL setting is ignored).. */
bogdanm 85:024bf7f99721 114 } SPI_InitTypeDef;
bogdanm 85:024bf7f99721 115
Kojto 108:34e6b704fe68 116 /**
Kojto 108:34e6b704fe68 117 * @brief HAL State structures definition
Kojto 108:34e6b704fe68 118 */
bogdanm 85:024bf7f99721 119 typedef enum
bogdanm 85:024bf7f99721 120 {
Kojto 93:e188a91d3eaa 121 HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
bogdanm 85:024bf7f99721 122 HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
Kojto 108:34e6b704fe68 123 HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
Kojto 93:e188a91d3eaa 124 HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
bogdanm 85:024bf7f99721 125 HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
Kojto 93:e188a91d3eaa 126 HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
Kojto 93:e188a91d3eaa 127 HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */
bogdanm 85:024bf7f99721 128 }HAL_SPI_StateTypeDef;
bogdanm 85:024bf7f99721 129
Kojto 108:34e6b704fe68 130 /**
Kojto 108:34e6b704fe68 131 * @brief SPI handle Structure definition
Kojto 108:34e6b704fe68 132 */
bogdanm 85:024bf7f99721 133 typedef struct __SPI_HandleTypeDef
bogdanm 85:024bf7f99721 134 {
Kojto 108:34e6b704fe68 135 SPI_TypeDef *Instance; /* SPI registers base address */
Kojto 108:34e6b704fe68 136
Kojto 108:34e6b704fe68 137 SPI_InitTypeDef Init; /* SPI communication parameters */
Kojto 108:34e6b704fe68 138
Kojto 108:34e6b704fe68 139 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
Kojto 108:34e6b704fe68 140
Kojto 108:34e6b704fe68 141 uint16_t TxXferSize; /* SPI Tx Transfer size */
Kojto 108:34e6b704fe68 142
Kojto 108:34e6b704fe68 143 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
Kojto 108:34e6b704fe68 144
Kojto 108:34e6b704fe68 145 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
Kojto 108:34e6b704fe68 146
Kojto 108:34e6b704fe68 147 uint16_t RxXferSize; /* SPI Rx Transfer size */
Kojto 108:34e6b704fe68 148
Kojto 108:34e6b704fe68 149 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
bogdanm 85:024bf7f99721 150
Kojto 108:34e6b704fe68 151 uint32_t CRCSize; /* SPI CRC size used for the transfer */
Kojto 108:34e6b704fe68 152
Kojto 108:34e6b704fe68 153 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
Kojto 108:34e6b704fe68 154
Kojto 108:34e6b704fe68 155 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
Kojto 108:34e6b704fe68 156
Kojto 108:34e6b704fe68 157 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
bogdanm 85:024bf7f99721 158
Kojto 108:34e6b704fe68 159 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
bogdanm 85:024bf7f99721 160
Kojto 108:34e6b704fe68 161 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 85:024bf7f99721 162
Kojto 108:34e6b704fe68 163 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
bogdanm 85:024bf7f99721 164
Kojto 108:34e6b704fe68 165 uint32_t ErrorCode; /* SPI Error code */
bogdanm 85:024bf7f99721 166
bogdanm 85:024bf7f99721 167 }SPI_HandleTypeDef;
bogdanm 85:024bf7f99721 168
bogdanm 92:4fc01daae5a5 169 /**
bogdanm 92:4fc01daae5a5 170 * @}
Kojto 108:34e6b704fe68 171 */
bogdanm 92:4fc01daae5a5 172
bogdanm 85:024bf7f99721 173 /* Exported constants --------------------------------------------------------*/
bogdanm 85:024bf7f99721 174
bogdanm 92:4fc01daae5a5 175 /** @defgroup SPI_Exported_Constants SPI Exported Constants
bogdanm 85:024bf7f99721 176 * @{
bogdanm 85:024bf7f99721 177 */
bogdanm 85:024bf7f99721 178
Kojto 108:34e6b704fe68 179 /** @defgroup SPI_Error_Code SPI Error Code
Kojto 93:e188a91d3eaa 180 * @{
Kojto 108:34e6b704fe68 181 */
Kojto 108:34e6b704fe68 182 #define HAL_SPI_ERROR_NONE (uint32_t)0x00000000 /*!< No error */
Kojto 108:34e6b704fe68 183 #define HAL_SPI_ERROR_MODF (uint32_t)0x00000001 /*!< MODF error */
Kojto 108:34e6b704fe68 184 #define HAL_SPI_ERROR_CRC (uint32_t)0x00000002 /*!< CRC error */
Kojto 108:34e6b704fe68 185 #define HAL_SPI_ERROR_OVR (uint32_t)0x00000004 /*!< OVR error */
Kojto 108:34e6b704fe68 186 #define HAL_SPI_ERROR_FRE (uint32_t)0x00000008 /*!< FRE error */
Kojto 108:34e6b704fe68 187 #define HAL_SPI_ERROR_DMA (uint32_t)0x00000010 /*!< DMA transfer error */
Kojto 108:34e6b704fe68 188 #define HAL_SPI_ERROR_FLAG (uint32_t)0x00000020 /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
Kojto 108:34e6b704fe68 189 #define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040 /*!< Unknown error */
Kojto 93:e188a91d3eaa 190 /**
Kojto 93:e188a91d3eaa 191 * @}
Kojto 93:e188a91d3eaa 192 */
Kojto 93:e188a91d3eaa 193
Kojto 108:34e6b704fe68 194
Kojto 108:34e6b704fe68 195 /** @defgroup SPI_Mode SPI Mode
bogdanm 85:024bf7f99721 196 * @{
Kojto 108:34e6b704fe68 197 */
bogdanm 85:024bf7f99721 198 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 199 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
bogdanm 85:024bf7f99721 200 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
bogdanm 85:024bf7f99721 201 ((MODE) == SPI_MODE_MASTER))
bogdanm 85:024bf7f99721 202 /**
bogdanm 85:024bf7f99721 203 * @}
bogdanm 85:024bf7f99721 204 */
bogdanm 85:024bf7f99721 205
Kojto 108:34e6b704fe68 206 /** @defgroup SPI_Direction SPI Direction Mode
bogdanm 85:024bf7f99721 207 * @{
bogdanm 85:024bf7f99721 208 */
Kojto 108:34e6b704fe68 209 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 210 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
Kojto 108:34e6b704fe68 211 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
bogdanm 85:024bf7f99721 212
bogdanm 85:024bf7f99721 213 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
bogdanm 85:024bf7f99721 214 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
bogdanm 85:024bf7f99721 215 ((MODE) == SPI_DIRECTION_1LINE))
bogdanm 85:024bf7f99721 216
bogdanm 85:024bf7f99721 217 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
bogdanm 85:024bf7f99721 218
bogdanm 85:024bf7f99721 219 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
bogdanm 85:024bf7f99721 220 ((MODE) == SPI_DIRECTION_1LINE))
bogdanm 85:024bf7f99721 221 /**
bogdanm 85:024bf7f99721 222 * @}
bogdanm 85:024bf7f99721 223 */
Kojto 108:34e6b704fe68 224
Kojto 108:34e6b704fe68 225 /** @defgroup SPI_Data_Size SPI Data Size
bogdanm 85:024bf7f99721 226 * @{
bogdanm 85:024bf7f99721 227 */
Kojto 108:34e6b704fe68 228 #define SPI_DATASIZE_4BIT ((uint32_t)0x0300) /*!< SPI Datasize = 4bits */
Kojto 108:34e6b704fe68 229 #define SPI_DATASIZE_5BIT ((uint32_t)0x0400) /*!< SPI Datasize = 5bits */
Kojto 108:34e6b704fe68 230 #define SPI_DATASIZE_6BIT ((uint32_t)0x0500) /*!< SPI Datasize = 6bits */
Kojto 108:34e6b704fe68 231 #define SPI_DATASIZE_7BIT ((uint32_t)0x0600) /*!< SPI Datasize = 7bits */
Kojto 108:34e6b704fe68 232 #define SPI_DATASIZE_8BIT ((uint32_t)0x0700) /*!< SPI Datasize = 8bits */
Kojto 108:34e6b704fe68 233 #define SPI_DATASIZE_9BIT ((uint32_t)0x0800) /*!< SPI Datasize = 9bits */
Kojto 108:34e6b704fe68 234 #define SPI_DATASIZE_10BIT ((uint32_t)0x0900) /*!< SPI Datasize = 10bits */
Kojto 108:34e6b704fe68 235 #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) /*!< SPI Datasize = 11bits */
Kojto 108:34e6b704fe68 236 #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) /*!< SPI Datasize = 12bits */
Kojto 108:34e6b704fe68 237 #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) /*!< SPI Datasize = 13bits */
Kojto 108:34e6b704fe68 238 #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) /*!< SPI Datasize = 14bits */
Kojto 108:34e6b704fe68 239 #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) /*!< SPI Datasize = 15bits */
Kojto 108:34e6b704fe68 240 #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) /*!< SPI Datasize = 16bits */
bogdanm 85:024bf7f99721 241 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
bogdanm 85:024bf7f99721 242 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
bogdanm 85:024bf7f99721 243 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
bogdanm 85:024bf7f99721 244 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
bogdanm 85:024bf7f99721 245 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
bogdanm 85:024bf7f99721 246 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
bogdanm 85:024bf7f99721 247 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
bogdanm 85:024bf7f99721 248 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
bogdanm 85:024bf7f99721 249 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
bogdanm 85:024bf7f99721 250 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
bogdanm 85:024bf7f99721 251 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
bogdanm 85:024bf7f99721 252 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
bogdanm 85:024bf7f99721 253 ((DATASIZE) == SPI_DATASIZE_4BIT))
bogdanm 85:024bf7f99721 254 /**
bogdanm 85:024bf7f99721 255 * @}
Kojto 108:34e6b704fe68 256 */
bogdanm 85:024bf7f99721 257
bogdanm 92:4fc01daae5a5 258 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
bogdanm 85:024bf7f99721 259 * @{
Kojto 108:34e6b704fe68 260 */
Kojto 93:e188a91d3eaa 261 #define SPI_POLARITY_LOW ((uint32_t)0x00000000) /*!< SPI polarity Low */
Kojto 93:e188a91d3eaa 262 #define SPI_POLARITY_HIGH SPI_CR1_CPOL /*!< SPI polarity High */
bogdanm 85:024bf7f99721 263 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
bogdanm 85:024bf7f99721 264 ((CPOL) == SPI_POLARITY_HIGH))
bogdanm 85:024bf7f99721 265 /**
bogdanm 85:024bf7f99721 266 * @}
bogdanm 85:024bf7f99721 267 */
bogdanm 85:024bf7f99721 268
bogdanm 92:4fc01daae5a5 269 /** @defgroup SPI_Clock_Phase SPI Clock Phase
bogdanm 85:024bf7f99721 270 * @{
bogdanm 85:024bf7f99721 271 */
Kojto 93:e188a91d3eaa 272 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) /*!< SPI Phase 1EDGE */
Kojto 93:e188a91d3eaa 273 #define SPI_PHASE_2EDGE SPI_CR1_CPHA /*!< SPI Phase 2EDGE */
bogdanm 85:024bf7f99721 274 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
bogdanm 85:024bf7f99721 275 ((CPHA) == SPI_PHASE_2EDGE))
bogdanm 85:024bf7f99721 276 /**
bogdanm 85:024bf7f99721 277 * @}
bogdanm 85:024bf7f99721 278 */
bogdanm 85:024bf7f99721 279
bogdanm 92:4fc01daae5a5 280 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
bogdanm 85:024bf7f99721 281 * @{
Kojto 108:34e6b704fe68 282 */
bogdanm 85:024bf7f99721 283 #define SPI_NSS_SOFT SPI_CR1_SSM
bogdanm 85:024bf7f99721 284 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 285 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
bogdanm 85:024bf7f99721 286 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
bogdanm 85:024bf7f99721 287 ((NSS) == SPI_NSS_HARD_INPUT) || \
bogdanm 85:024bf7f99721 288 ((NSS) == SPI_NSS_HARD_OUTPUT))
bogdanm 92:4fc01daae5a5 289 /**
bogdanm 85:024bf7f99721 290 * @}
bogdanm 85:024bf7f99721 291 */
Kojto 108:34e6b704fe68 292
Kojto 108:34e6b704fe68 293 /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
bogdanm 85:024bf7f99721 294 * @{
Kojto 108:34e6b704fe68 295 */
Kojto 108:34e6b704fe68 296 #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
Kojto 108:34e6b704fe68 297 #define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 298
Kojto 108:34e6b704fe68 299 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
Kojto 108:34e6b704fe68 300 ((NSSP) == SPI_NSS_PULSE_DISABLE))
bogdanm 85:024bf7f99721 301 /**
bogdanm 85:024bf7f99721 302 * @}
bogdanm 85:024bf7f99721 303 */
Kojto 108:34e6b704fe68 304
bogdanm 92:4fc01daae5a5 305 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
bogdanm 85:024bf7f99721 306 * @{
bogdanm 85:024bf7f99721 307 */
bogdanm 85:024bf7f99721 308 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 309 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
bogdanm 85:024bf7f99721 310 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
bogdanm 85:024bf7f99721 311 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
bogdanm 85:024bf7f99721 312 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
bogdanm 85:024bf7f99721 313 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
bogdanm 85:024bf7f99721 314 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
bogdanm 85:024bf7f99721 315 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
bogdanm 85:024bf7f99721 316 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
bogdanm 85:024bf7f99721 317 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
bogdanm 85:024bf7f99721 318 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
bogdanm 85:024bf7f99721 319 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
bogdanm 85:024bf7f99721 320 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
bogdanm 85:024bf7f99721 321 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
bogdanm 85:024bf7f99721 322 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
bogdanm 85:024bf7f99721 323 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
bogdanm 85:024bf7f99721 324 /**
bogdanm 85:024bf7f99721 325 * @}
Kojto 108:34e6b704fe68 326 */
bogdanm 85:024bf7f99721 327
bogdanm 92:4fc01daae5a5 328 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
bogdanm 85:024bf7f99721 329 * @{
Kojto 108:34e6b704fe68 330 */
bogdanm 85:024bf7f99721 331 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 332 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
bogdanm 85:024bf7f99721 333 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
bogdanm 85:024bf7f99721 334 ((BIT) == SPI_FIRSTBIT_LSB))
bogdanm 85:024bf7f99721 335 /**
bogdanm 85:024bf7f99721 336 * @}
bogdanm 85:024bf7f99721 337 */
bogdanm 85:024bf7f99721 338
bogdanm 92:4fc01daae5a5 339 /** @defgroup SPI_TI_mode SPI TI mode
bogdanm 85:024bf7f99721 340 * @{
bogdanm 85:024bf7f99721 341 */
Kojto 108:34e6b704fe68 342 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 343 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
Kojto 108:34e6b704fe68 344 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
Kojto 108:34e6b704fe68 345 ((MODE) == SPI_TIMODE_ENABLE))
bogdanm 85:024bf7f99721 346 /**
bogdanm 85:024bf7f99721 347 * @}
bogdanm 85:024bf7f99721 348 */
bogdanm 85:024bf7f99721 349
Kojto 108:34e6b704fe68 350 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
Kojto 108:34e6b704fe68 351 * @{
Kojto 108:34e6b704fe68 352 */
Kojto 108:34e6b704fe68 353 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 354 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
Kojto 108:34e6b704fe68 355 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
Kojto 108:34e6b704fe68 356 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
Kojto 108:34e6b704fe68 357 /**
Kojto 108:34e6b704fe68 358 * @}
Kojto 108:34e6b704fe68 359 */
Kojto 108:34e6b704fe68 360
Kojto 108:34e6b704fe68 361 /** @defgroup SPI_CRC_length SPI CRC Length
bogdanm 85:024bf7f99721 362 * @{
bogdanm 85:024bf7f99721 363 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 364 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
bogdanm 85:024bf7f99721 365 * SPI_CRC_LENGTH_8BIT : CRC 8bit
Kojto 108:34e6b704fe68 366 * SPI_CRC_LENGTH_16BIT : CRC 16bit
bogdanm 85:024bf7f99721 367 */
Kojto 108:34e6b704fe68 368 #define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 369 #define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001)
Kojto 108:34e6b704fe68 370 #define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002)
bogdanm 85:024bf7f99721 371 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
bogdanm 85:024bf7f99721 372 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
bogdanm 85:024bf7f99721 373 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
bogdanm 85:024bf7f99721 374 /**
bogdanm 85:024bf7f99721 375 * @}
bogdanm 85:024bf7f99721 376 */
Kojto 108:34e6b704fe68 377
Kojto 108:34e6b704fe68 378 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
bogdanm 85:024bf7f99721 379 * @{
bogdanm 85:024bf7f99721 380 * This parameter can be one of the following values:
Kojto 93:e188a91d3eaa 381 * SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
Kojto 108:34e6b704fe68 382 * RXNE event is generated if the FIFO
Kojto 108:34e6b704fe68 383 * level is greater or equal to 1/2(16-bits).
Kojto 108:34e6b704fe68 384 * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
Kojto 93:e188a91d3eaa 385 * level is greater or equal to 1/4(8 bits). */
Kojto 108:34e6b704fe68 386 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
Kojto 108:34e6b704fe68 387 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
Kojto 108:34e6b704fe68 388 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 389
bogdanm 85:024bf7f99721 390 /**
bogdanm 85:024bf7f99721 391 * @}
bogdanm 85:024bf7f99721 392 */
bogdanm 85:024bf7f99721 393
bogdanm 92:4fc01daae5a5 394 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
bogdanm 85:024bf7f99721 395 * @brief SPI Interrupt definition
bogdanm 85:024bf7f99721 396 * Elements values convention: 0xXXXXXXXX
bogdanm 85:024bf7f99721 397 * - XXXXXXXX : Interrupt control mask
Kojto 93:e188a91d3eaa 398 * @{
Kojto 93:e188a91d3eaa 399 */
bogdanm 85:024bf7f99721 400 #define SPI_IT_TXE SPI_CR2_TXEIE
bogdanm 85:024bf7f99721 401 #define SPI_IT_RXNE SPI_CR2_RXNEIE
bogdanm 85:024bf7f99721 402 #define SPI_IT_ERR SPI_CR2_ERRIE
bogdanm 85:024bf7f99721 403 /**
bogdanm 85:024bf7f99721 404 * @}
bogdanm 85:024bf7f99721 405 */
bogdanm 85:024bf7f99721 406
bogdanm 85:024bf7f99721 407
bogdanm 92:4fc01daae5a5 408 /** @defgroup SPI_Flag_definition SPI Flag definition
bogdanm 85:024bf7f99721 409 * @brief Flag definition
bogdanm 85:024bf7f99721 410 * Elements values convention: 0xXXXXYYYY
bogdanm 85:024bf7f99721 411 * - XXXX : Flag register Index
bogdanm 85:024bf7f99721 412 * - YYYY : Flag mask
Kojto 108:34e6b704fe68 413 * @{
Kojto 108:34e6b704fe68 414 */
bogdanm 92:4fc01daae5a5 415 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
bogdanm 92:4fc01daae5a5 416 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
bogdanm 92:4fc01daae5a5 417 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
bogdanm 92:4fc01daae5a5 418 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
bogdanm 92:4fc01daae5a5 419 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
bogdanm 92:4fc01daae5a5 420 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
bogdanm 92:4fc01daae5a5 421 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
bogdanm 92:4fc01daae5a5 422 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
bogdanm 92:4fc01daae5a5 423 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
bogdanm 92:4fc01daae5a5 424 /**
bogdanm 92:4fc01daae5a5 425 * @}
bogdanm 92:4fc01daae5a5 426 */
bogdanm 85:024bf7f99721 427
Kojto 108:34e6b704fe68 428 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
bogdanm 85:024bf7f99721 429 * @{
Kojto 108:34e6b704fe68 430 */
Kojto 93:e188a91d3eaa 431 #define SPI_FTLVL_EMPTY ((uint32_t)0x0000)
Kojto 108:34e6b704fe68 432 #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800)
Kojto 108:34e6b704fe68 433 #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000)
Kojto 93:e188a91d3eaa 434 #define SPI_FTLVL_FULL ((uint32_t)0x1800)
bogdanm 85:024bf7f99721 435
bogdanm 85:024bf7f99721 436 /**
bogdanm 85:024bf7f99721 437 * @}
Kojto 108:34e6b704fe68 438 */
bogdanm 85:024bf7f99721 439
Kojto 108:34e6b704fe68 440 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
bogdanm 85:024bf7f99721 441 * @{
Kojto 108:34e6b704fe68 442 */
Kojto 93:e188a91d3eaa 443 #define SPI_FRLVL_EMPTY ((uint32_t)0x0000)
Kojto 108:34e6b704fe68 444 #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200)
Kojto 108:34e6b704fe68 445 #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400)
Kojto 108:34e6b704fe68 446 #define SPI_FRLVL_FULL ((uint32_t)0x0600)
bogdanm 85:024bf7f99721 447 /**
bogdanm 85:024bf7f99721 448 * @}
bogdanm 85:024bf7f99721 449 */
bogdanm 85:024bf7f99721 450
bogdanm 85:024bf7f99721 451 /**
bogdanm 85:024bf7f99721 452 * @}
bogdanm 85:024bf7f99721 453 */
bogdanm 85:024bf7f99721 454
bogdanm 85:024bf7f99721 455 /* Exported macros ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 456 /** @defgroup SPI_Exported_Macros SPI Exported Macros
bogdanm 92:4fc01daae5a5 457 * @{
bogdanm 92:4fc01daae5a5 458 */
Kojto 108:34e6b704fe68 459
Kojto 108:34e6b704fe68 460 /** @brief Reset SPI handle state.
bogdanm 85:024bf7f99721 461 * @param __HANDLE__: SPI handle.
bogdanm 85:024bf7f99721 462 * @retval None
bogdanm 85:024bf7f99721 463 */
bogdanm 85:024bf7f99721 464 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
bogdanm 85:024bf7f99721 465
Kojto 108:34e6b704fe68 466 /** @brief Enable or disable the specified SPI interrupts.
Kojto 108:34e6b704fe68 467 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 468 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 108:34e6b704fe68 469 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 85:024bf7f99721 470 * This parameter can be one of the following values:
bogdanm 85:024bf7f99721 471 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 85:024bf7f99721 472 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 85:024bf7f99721 473 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 85:024bf7f99721 474 * @retval None
bogdanm 85:024bf7f99721 475 */
bogdanm 85:024bf7f99721 476 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
Kojto 93:e188a91d3eaa 477 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
Kojto 108:34e6b704fe68 478
Kojto 108:34e6b704fe68 479 /** @brief Check whether the specified SPI interrupt source is enabled or not.
Kojto 108:34e6b704fe68 480 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 481 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 108:34e6b704fe68 482 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
bogdanm 85:024bf7f99721 483 * This parameter can be one of the following values:
bogdanm 85:024bf7f99721 484 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 85:024bf7f99721 485 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 85:024bf7f99721 486 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 85:024bf7f99721 487 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 85:024bf7f99721 488 */
bogdanm 85:024bf7f99721 489 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 85:024bf7f99721 490
Kojto 108:34e6b704fe68 491 /** @brief Check whether the specified SPI flag is set or not.
Kojto 108:34e6b704fe68 492 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 493 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 108:34e6b704fe68 494 * @param __FLAG__: specifies the flag to check.
bogdanm 85:024bf7f99721 495 * This parameter can be one of the following values:
bogdanm 85:024bf7f99721 496 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
bogdanm 85:024bf7f99721 497 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
bogdanm 85:024bf7f99721 498 * @arg SPI_FLAG_CRCERR: CRC error flag
bogdanm 85:024bf7f99721 499 * @arg SPI_FLAG_MODF: Mode fault flag
bogdanm 85:024bf7f99721 500 * @arg SPI_FLAG_OVR: Overrun flag
bogdanm 85:024bf7f99721 501 * @arg SPI_FLAG_BSY: Busy flag
Kojto 108:34e6b704fe68 502 * @arg SPI_FLAG_FRE: Frame format error flag
Kojto 93:e188a91d3eaa 503 * @arg SPI_FLAG_FTLVL: SPI fifo transmission level
Kojto 108:34e6b704fe68 504 * @arg SPI_FLAG_FRLVL: SPI fifo reception level
bogdanm 85:024bf7f99721 505 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 85:024bf7f99721 506 */
bogdanm 85:024bf7f99721 507 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 85:024bf7f99721 508
Kojto 108:34e6b704fe68 509 /** @brief Clear the SPI CRCERR pending flag.
Kojto 108:34e6b704fe68 510 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 511 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 85:024bf7f99721 512 * @retval None
bogdanm 85:024bf7f99721 513 */
bogdanm 92:4fc01daae5a5 514 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
Kojto 108:34e6b704fe68 515
Kojto 108:34e6b704fe68 516 /** @brief Clear the SPI MODF pending flag.
Kojto 108:34e6b704fe68 517 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 518 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 108:34e6b704fe68 519 *
bogdanm 85:024bf7f99721 520 * @retval None
Kojto 108:34e6b704fe68 521 */
Kojto 108:34e6b704fe68 522 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
Kojto 108:34e6b704fe68 523 do{ \
Kojto 108:34e6b704fe68 524 __IO uint32_t tmpreg; \
Kojto 108:34e6b704fe68 525 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 108:34e6b704fe68 526 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
Kojto 108:34e6b704fe68 527 UNUSED(tmpreg); \
Kojto 108:34e6b704fe68 528 } while(0)
bogdanm 85:024bf7f99721 529
Kojto 108:34e6b704fe68 530 /** @brief Clear the SPI OVR pending flag.
Kojto 108:34e6b704fe68 531 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 532 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 108:34e6b704fe68 533 *
bogdanm 85:024bf7f99721 534 * @retval None
Kojto 108:34e6b704fe68 535 */
Kojto 108:34e6b704fe68 536 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 108:34e6b704fe68 537 do{ \
Kojto 108:34e6b704fe68 538 __IO uint32_t tmpreg; \
Kojto 108:34e6b704fe68 539 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 108:34e6b704fe68 540 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 108:34e6b704fe68 541 UNUSED(tmpreg); \
Kojto 108:34e6b704fe68 542 } while(0)
Kojto 108:34e6b704fe68 543
Kojto 108:34e6b704fe68 544 /** @brief Clear the SPI FRE pending flag.
Kojto 108:34e6b704fe68 545 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 546 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 108:34e6b704fe68 547 *
bogdanm 85:024bf7f99721 548 * @retval None
Kojto 108:34e6b704fe68 549 */
Kojto 108:34e6b704fe68 550 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
Kojto 108:34e6b704fe68 551 do{ \
Kojto 108:34e6b704fe68 552 __IO uint32_t tmpreg; \
Kojto 108:34e6b704fe68 553 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 108:34e6b704fe68 554 UNUSED(tmpreg); \
Kojto 108:34e6b704fe68 555 } while(0)
Kojto 108:34e6b704fe68 556
Kojto 108:34e6b704fe68 557 /** @brief Enable the SPI peripheral.
Kojto 108:34e6b704fe68 558 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 559 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 85:024bf7f99721 560 * @retval None
bogdanm 85:024bf7f99721 561 */
bogdanm 85:024bf7f99721 562 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
bogdanm 85:024bf7f99721 563
Kojto 108:34e6b704fe68 564 /** @brief Disable the SPI peripheral.
Kojto 108:34e6b704fe68 565 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 566 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 85:024bf7f99721 567 * @retval None
bogdanm 85:024bf7f99721 568 */
Kojto 93:e188a91d3eaa 569 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
bogdanm 85:024bf7f99721 570
Kojto 108:34e6b704fe68 571 /**
Kojto 108:34e6b704fe68 572 * @}
Kojto 108:34e6b704fe68 573 */
Kojto 108:34e6b704fe68 574
Kojto 108:34e6b704fe68 575 /* Private macros --------------------------------------------------------*/
Kojto 108:34e6b704fe68 576 /** @defgroup SPI_Private_Macros SPI Private Macros
Kojto 108:34e6b704fe68 577 * @{
Kojto 108:34e6b704fe68 578 */
Kojto 108:34e6b704fe68 579
Kojto 108:34e6b704fe68 580 /** @brief Set the SPI transmit-only mode.
Kojto 108:34e6b704fe68 581 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 582 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 85:024bf7f99721 583 * @retval None
bogdanm 85:024bf7f99721 584 */
Kojto 108:34e6b704fe68 585 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 108:34e6b704fe68 586
Kojto 108:34e6b704fe68 587 /** @brief Set the SPI receive-only mode.
Kojto 108:34e6b704fe68 588 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 589 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 85:024bf7f99721 590 * @retval None
bogdanm 85:024bf7f99721 591 */
Kojto 108:34e6b704fe68 592 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
Kojto 108:34e6b704fe68 593
Kojto 108:34e6b704fe68 594 /** @brief Reset the CRC calculation of the SPI.
Kojto 108:34e6b704fe68 595 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 85:024bf7f99721 596 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 85:024bf7f99721 597 * @retval None
bogdanm 85:024bf7f99721 598 */
Kojto 108:34e6b704fe68 599 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
Kojto 108:34e6b704fe68 600 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
bogdanm 85:024bf7f99721 601
bogdanm 85:024bf7f99721 602
bogdanm 85:024bf7f99721 603 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
Kojto 108:34e6b704fe68 604
Kojto 108:34e6b704fe68 605
bogdanm 92:4fc01daae5a5 606 /**
bogdanm 92:4fc01daae5a5 607 * @}
bogdanm 92:4fc01daae5a5 608 */
Kojto 108:34e6b704fe68 609
Kojto 108:34e6b704fe68 610 /* Include SPI HAL Extended module */
Kojto 108:34e6b704fe68 611 #include "stm32f0xx_hal_spi_ex.h"
Kojto 108:34e6b704fe68 612
bogdanm 85:024bf7f99721 613 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 614 /** @addtogroup SPI_Exported_Functions
bogdanm 92:4fc01daae5a5 615 * @{
bogdanm 92:4fc01daae5a5 616 */
bogdanm 85:024bf7f99721 617
Kojto 108:34e6b704fe68 618 /* Initialization and de-initialization functions ****************************/
Kojto 108:34e6b704fe68 619 /** @addtogroup SPI_Exported_Functions_Group1
bogdanm 92:4fc01daae5a5 620 * @{
bogdanm 92:4fc01daae5a5 621 */
bogdanm 85:024bf7f99721 622 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 623 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 624 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 625 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 626 /**
bogdanm 92:4fc01daae5a5 627 * @}
bogdanm 92:4fc01daae5a5 628 */
bogdanm 85:024bf7f99721 629
Kojto 108:34e6b704fe68 630 /* IO operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 631 /** @addtogroup SPI_Exported_Functions_Group2
bogdanm 92:4fc01daae5a5 632 * @{
bogdanm 92:4fc01daae5a5 633 */
bogdanm 85:024bf7f99721 634 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 85:024bf7f99721 635 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 85:024bf7f99721 636 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 85:024bf7f99721 637 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 638 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 639 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 85:024bf7f99721 640 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 641 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 85:024bf7f99721 642 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 93:e188a91d3eaa 643 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
Kojto 93:e188a91d3eaa 644 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
Kojto 93:e188a91d3eaa 645 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
Kojto 93:e188a91d3eaa 646
bogdanm 85:024bf7f99721 647 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 648 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 649 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 650 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 93:e188a91d3eaa 651 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 93:e188a91d3eaa 652 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 93:e188a91d3eaa 653 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 85:024bf7f99721 654 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 655 /**
bogdanm 92:4fc01daae5a5 656 * @}
bogdanm 92:4fc01daae5a5 657 */
bogdanm 85:024bf7f99721 658
Kojto 108:34e6b704fe68 659 /* Peripheral State and Error functions ***************************************/
bogdanm 92:4fc01daae5a5 660 /** @addtogroup SPI_Exported_Functions_Group3
bogdanm 92:4fc01daae5a5 661 * @{
bogdanm 92:4fc01daae5a5 662 */
bogdanm 85:024bf7f99721 663 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 108:34e6b704fe68 664 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 665 /**
bogdanm 92:4fc01daae5a5 666 * @}
bogdanm 92:4fc01daae5a5 667 */
bogdanm 85:024bf7f99721 668
bogdanm 85:024bf7f99721 669 /**
bogdanm 85:024bf7f99721 670 * @}
bogdanm 92:4fc01daae5a5 671 */
bogdanm 85:024bf7f99721 672
bogdanm 85:024bf7f99721 673 /**
bogdanm 85:024bf7f99721 674 * @}
Kojto 108:34e6b704fe68 675 */
Kojto 108:34e6b704fe68 676
Kojto 108:34e6b704fe68 677 /**
Kojto 108:34e6b704fe68 678 * @}
Kojto 108:34e6b704fe68 679 */
bogdanm 85:024bf7f99721 680
bogdanm 85:024bf7f99721 681 #ifdef __cplusplus
bogdanm 85:024bf7f99721 682 }
bogdanm 85:024bf7f99721 683 #endif
bogdanm 85:024bf7f99721 684
bogdanm 85:024bf7f99721 685 #endif /* __STM32F0xx_HAL_SPI_H */
bogdanm 85:024bf7f99721 686
bogdanm 85:024bf7f99721 687 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/