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TARGET_NUCLEO_L073RZ/stm32l0xx_hal_adc.h@120:2eb10e18b8d7, 2016-04-13 (annotated)

Committer:
elijahorr
Date:
Wed Apr 13 12:29:27 2016 +0000
Revision:
120:2eb10e18b8d7
Parent:
116:c0f6e94411f5 
V1.1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 116:c0f6e94411f5 1 /**
Kojto 116:c0f6e94411f5 2 ******************************************************************************
Kojto 116:c0f6e94411f5 3 * @file stm32l0xx_hal_adc.h
Kojto 116:c0f6e94411f5 4 * @author MCD Application Team
Kojto 116:c0f6e94411f5 5 * @version V1.2.0
Kojto 116:c0f6e94411f5 6 * @date 06-February-2015
Kojto 116:c0f6e94411f5 7 * @brief This file contains all the functions prototypes for the ADC firmware
Kojto 116:c0f6e94411f5 8 * library.
Kojto 116:c0f6e94411f5 9 ******************************************************************************
Kojto 116:c0f6e94411f5 10 * @attention
Kojto 116:c0f6e94411f5 11 *
Kojto 116:c0f6e94411f5 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 116:c0f6e94411f5 13 *
Kojto 116:c0f6e94411f5 14 * Redistribution and use in source and binary forms, with or without modification,
Kojto 116:c0f6e94411f5 15 * are permitted provided that the following conditions are met:
Kojto 116:c0f6e94411f5 16 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 116:c0f6e94411f5 17 * this list of conditions and the following disclaimer.
Kojto 116:c0f6e94411f5 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 116:c0f6e94411f5 19 * this list of conditions and the following disclaimer in the documentation
Kojto 116:c0f6e94411f5 20 * and/or other materials provided with the distribution.
Kojto 116:c0f6e94411f5 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 116:c0f6e94411f5 22 * may be used to endorse or promote products derived from this software
Kojto 116:c0f6e94411f5 23 * without specific prior written permission.
Kojto 116:c0f6e94411f5 24 *
Kojto 116:c0f6e94411f5 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 116:c0f6e94411f5 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 116:c0f6e94411f5 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 116:c0f6e94411f5 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 116:c0f6e94411f5 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 116:c0f6e94411f5 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 116:c0f6e94411f5 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 116:c0f6e94411f5 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 116:c0f6e94411f5 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 116:c0f6e94411f5 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 116:c0f6e94411f5 35 *
Kojto 116:c0f6e94411f5 36 ******************************************************************************
Kojto 116:c0f6e94411f5 37 */
Kojto 116:c0f6e94411f5 38
Kojto 116:c0f6e94411f5 39 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 116:c0f6e94411f5 40 #ifndef __STM32L0xx_ADC_H
Kojto 116:c0f6e94411f5 41 #define __STM32L0xx_ADC_H
Kojto 116:c0f6e94411f5 42
Kojto 116:c0f6e94411f5 43 #ifdef __cplusplus
Kojto 116:c0f6e94411f5 44 extern "C" {
Kojto 116:c0f6e94411f5 45 #endif
Kojto 116:c0f6e94411f5 46
Kojto 116:c0f6e94411f5 47 /* Includes ------------------------------------------------------------------*/
Kojto 116:c0f6e94411f5 48 #include "stm32l0xx_hal_def.h"
Kojto 116:c0f6e94411f5 49
Kojto 116:c0f6e94411f5 50 /** @addtogroup STM32L0xx_HAL_Driver
Kojto 116:c0f6e94411f5 51 * @{
Kojto 116:c0f6e94411f5 52 */
Kojto 116:c0f6e94411f5 53
Kojto 116:c0f6e94411f5 54 /** @addtogroup ADC
Kojto 116:c0f6e94411f5 55 * @{
Kojto 116:c0f6e94411f5 56 */
Kojto 116:c0f6e94411f5 57
Kojto 116:c0f6e94411f5 58 /* Exported types ------------------------------------------------------------*/
Kojto 116:c0f6e94411f5 59 /**
Kojto 116:c0f6e94411f5 60 * @brief HAL State structures definition
Kojto 116:c0f6e94411f5 61 */
Kojto 116:c0f6e94411f5 62 typedef enum
Kojto 116:c0f6e94411f5 63 {
Kojto 116:c0f6e94411f5 64 HAL_ADC_STATE_RESET = 0x00, /*!< ADC not yet initialized or disabled */
Kojto 116:c0f6e94411f5 65 HAL_ADC_STATE_READY = 0x01, /*!< ADC peripheral ready for use */
Kojto 116:c0f6e94411f5 66 HAL_ADC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
Kojto 116:c0f6e94411f5 67 HAL_ADC_STATE_BUSY_REG = 0x12, /*!< Regular conversion is ongoing */
Kojto 116:c0f6e94411f5 68 HAL_ADC_STATE_TIMEOUT = 0x03, /*!< Timeout state */
Kojto 116:c0f6e94411f5 69 HAL_ADC_STATE_ERROR = 0x04, /*!< ADC state error */
Kojto 116:c0f6e94411f5 70 HAL_ADC_STATE_EOC = 0x05, /*!< Conversion is completed */
Kojto 116:c0f6e94411f5 71 HAL_ADC_STATE_AWD = 0x06, /*!< ADC state analog watchdog */
Kojto 116:c0f6e94411f5 72 }HAL_ADC_StateTypeDef;
Kojto 116:c0f6e94411f5 73
Kojto 116:c0f6e94411f5 74
Kojto 116:c0f6e94411f5 75 /**
Kojto 116:c0f6e94411f5 76 * @brief ADC Oversampler structure definition
Kojto 116:c0f6e94411f5 77 */
Kojto 116:c0f6e94411f5 78 typedef struct
Kojto 116:c0f6e94411f5 79 {
Kojto 116:c0f6e94411f5 80 uint32_t Ratio; /*!< Configures the oversampling ratio.
Kojto 116:c0f6e94411f5 81 This parameter can be a value of @ref ADC_Oversampling_Ratio */
Kojto 116:c0f6e94411f5 82 uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
Kojto 116:c0f6e94411f5 83 This parameter can be a value of @ref ADC_Right_Bit_Shift */
Kojto 116:c0f6e94411f5 84 uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode
Kojto 116:c0f6e94411f5 85 This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
Kojto 116:c0f6e94411f5 86
Kojto 116:c0f6e94411f5 87 }ADC_OversamplingTypeDef;
Kojto 116:c0f6e94411f5 88
Kojto 116:c0f6e94411f5 89 /**
Kojto 116:c0f6e94411f5 90 * @brief ADC Init structure definition
Kojto 116:c0f6e94411f5 91 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned by the ADC state.
Kojto 116:c0f6e94411f5 92 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
Kojto 116:c0f6e94411f5 93 * without error reporting (as it can be the expected behaviour in case of intended action to update antother parameter (which fullfills the ADC state condition) on the fly).
Kojto 116:c0f6e94411f5 94 */
Kojto 116:c0f6e94411f5 95 typedef struct
Kojto 116:c0f6e94411f5 96 {
Kojto 116:c0f6e94411f5 97 uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled
Kojto 116:c0f6e94411f5 98 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 99 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 100 ADC_OversamplingTypeDef Oversample; /*!< Specifies the Oversampling parameters
Kojto 116:c0f6e94411f5 101 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 102 uint32_t ClockPrescaler; /*!< Selects the ADC clock frequency.
Kojto 116:c0f6e94411f5 103 This parameter can be a value of @ref ADC_ClockPrescaler
Kojto 116:c0f6e94411f5 104 Note: This parameter can be modified only if ADC is disabled. */
Kojto 116:c0f6e94411f5 105 uint32_t Resolution; /*!< Configures the ADC resolution mode.
Kojto 116:c0f6e94411f5 106 This parameter can be a value of @ref ADC_Resolution
Kojto 116:c0f6e94411f5 107 Note: This parameter can be modified only if ADC is disabled. */
Kojto 116:c0f6e94411f5 108 uint32_t SamplingTime; /*!< The sample time value to be set for all channels.
Kojto 116:c0f6e94411f5 109 This parameter can be a value of @ref ADC_sampling_times
Kojto 116:c0f6e94411f5 110 Note: This parameter can be modified only if there is no conversion ongoing. */
Kojto 116:c0f6e94411f5 111 uint32_t ScanConvMode; /*!< The scan sequence direction.
Kojto 116:c0f6e94411f5 112 This parameter can be a value of @ref ADC_Scan_mode
Kojto 116:c0f6e94411f5 113 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 114 uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
Kojto 116:c0f6e94411f5 115 This parameter can be a value of @ref ADC_data_align
Kojto 116:c0f6e94411f5 116 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 117 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in Continuous or Single mode.
Kojto 116:c0f6e94411f5 118 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 119 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 120 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversion is performed
Kojto 116:c0f6e94411f5 121 in Complete-sequence/Discontinuous-sequence.
Kojto 116:c0f6e94411f5 122 Discontinuous mode can be enabled only if continuous mode is disabled.
Kojto 116:c0f6e94411f5 123 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 124 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 125 uint32_t ExternalTrigConvEdge; /*!< Select the external trigger edge and enable the trigger.
Kojto 116:c0f6e94411f5 126 This parameter can be a value of @ref ADC_Regular_External_Trigger_Source_Edge
Kojto 116:c0f6e94411f5 127 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 128 uint32_t ExternalTrigConv; /*!< Select the external event used to trigger the start of conversion.
Kojto 116:c0f6e94411f5 129 This parameter can be a value of @ref ADC_External_trigger_Source
Kojto 116:c0f6e94411f5 130 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 131 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
Kojto 116:c0f6e94411f5 132 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
Kojto 116:c0f6e94411f5 133 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer max pointer is reached.
Kojto 116:c0f6e94411f5 134 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 135 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 136 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion polling and interruption:
Kojto 116:c0f6e94411f5 137 end of single channel conversion or end of channels conversions sequence.
Kojto 116:c0f6e94411f5 138 This parameter can be a value of @ref ADC_EOCSelection */
Kojto 116:c0f6e94411f5 139 uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
Kojto 116:c0f6e94411f5 140 This parameter has an effect on regular channels only, including in DMA mode.
Kojto 116:c0f6e94411f5 141 This parameter can be a value of @ref ADC_Overrun
Kojto 116:c0f6e94411f5 142 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 143 uint32_t LowPowerAutoWait; /*!< Specifies the usage of dynamic low power Auto Delay: new conversion start only
Kojto 116:c0f6e94411f5 144 when the previous conversion (for regular channel) is completed.
Kojto 116:c0f6e94411f5 145 This avoids risk of overrun for low frequency application.
Kojto 116:c0f6e94411f5 146 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 147 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 148 uint32_t LowPowerFrequencyMode; /*!< When selecting an analog ADC clock frequency lower than 2.8MHz,
Kojto 116:c0f6e94411f5 149 it is mandatory to first enable the Low Frequency Mode.
Kojto 116:c0f6e94411f5 150 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 151 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 152 uint32_t LowPowerAutoPowerOff; /*!< When setting the AutoOff feature, the ADC is always powered off when not converting and automatically
Kojto 116:c0f6e94411f5 153 wakes-up when a conversion is started (by software or hardware trigger).
Kojto 116:c0f6e94411f5 154 This parameter can be set to ENABLE or DISABLE.
Kojto 116:c0f6e94411f5 155 Note: This parameter can be modified only if there is no conversion is ongoing. */
Kojto 116:c0f6e94411f5 156 }ADC_InitTypeDef;
Kojto 116:c0f6e94411f5 157
Kojto 116:c0f6e94411f5 158 /**
Kojto 116:c0f6e94411f5 159 * @brief ADC handle Structure definition
Kojto 116:c0f6e94411f5 160 */
Kojto 116:c0f6e94411f5 161 typedef struct __ADC_HandleTypeDef
Kojto 116:c0f6e94411f5 162 {
Kojto 116:c0f6e94411f5 163 ADC_TypeDef *Instance; /*!< Register base address */
Kojto 116:c0f6e94411f5 164
Kojto 116:c0f6e94411f5 165 ADC_InitTypeDef Init; /*!< ADC required parameters */
Kojto 116:c0f6e94411f5 166
Kojto 116:c0f6e94411f5 167 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
Kojto 116:c0f6e94411f5 168
Kojto 116:c0f6e94411f5 169 HAL_LockTypeDef Lock; /*!< ADC locking object */
Kojto 116:c0f6e94411f5 170
Kojto 116:c0f6e94411f5 171 __IO HAL_ADC_StateTypeDef State; /*!< ADC communication state */
Kojto 116:c0f6e94411f5 172
Kojto 116:c0f6e94411f5 173 __IO uint32_t ErrorCode; /*!< ADC Error code */
Kojto 116:c0f6e94411f5 174 }ADC_HandleTypeDef;
Kojto 116:c0f6e94411f5 175
Kojto 116:c0f6e94411f5 176 /**
Kojto 116:c0f6e94411f5 177 * @brief ADC Configuration regular Channel structure definition
Kojto 116:c0f6e94411f5 178 */
Kojto 116:c0f6e94411f5 179 typedef struct
Kojto 116:c0f6e94411f5 180 {
Kojto 116:c0f6e94411f5 181 uint32_t Channel; /*!< the ADC channel to configure
Kojto 116:c0f6e94411f5 182 This parameter can be a value of @ref ADC_channels */
Kojto 116:c0f6e94411f5 183 }ADC_ChannelConfTypeDef;
Kojto 116:c0f6e94411f5 184
Kojto 116:c0f6e94411f5 185
Kojto 116:c0f6e94411f5 186 /**
Kojto 116:c0f6e94411f5 187 * @brief ADC Configuration analog watchdog definition
Kojto 116:c0f6e94411f5 188 */
Kojto 116:c0f6e94411f5 189 typedef struct
Kojto 116:c0f6e94411f5 190 {
Kojto 116:c0f6e94411f5 191 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels.
Kojto 116:c0f6e94411f5 192 This parameter can be a value of @ref ADC_analog_watchdog_mode */
Kojto 116:c0f6e94411f5 193 uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
Kojto 116:c0f6e94411f5 194 This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
Kojto 116:c0f6e94411f5 195 This parameter can be a value of @ref ADC_channels */
Kojto 116:c0f6e94411f5 196 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
Kojto 116:c0f6e94411f5 197 This parameter can be set to ENABLE or DISABLE */
Kojto 116:c0f6e94411f5 198 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Kojto 116:c0f6e94411f5 199 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
Kojto 116:c0f6e94411f5 200 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
Kojto 116:c0f6e94411f5 201 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Kojto 116:c0f6e94411f5 202 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
Kojto 116:c0f6e94411f5 203 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
Kojto 116:c0f6e94411f5 204 }ADC_AnalogWDGConfTypeDef;
Kojto 116:c0f6e94411f5 205
Kojto 116:c0f6e94411f5 206
Kojto 116:c0f6e94411f5 207 /* Exported constants --------------------------------------------------------*/
Kojto 116:c0f6e94411f5 208
Kojto 116:c0f6e94411f5 209 /** @defgroup ADC_Exported_Constants
Kojto 116:c0f6e94411f5 210 * @{
Kojto 116:c0f6e94411f5 211 */
Kojto 116:c0f6e94411f5 212
Kojto 116:c0f6e94411f5 213 /** @defgroup ADC_Error_Code
Kojto 116:c0f6e94411f5 214 * @{
Kojto 116:c0f6e94411f5 215 */
Kojto 116:c0f6e94411f5 216 #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */
Kojto 116:c0f6e94411f5 217 #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
Kojto 116:c0f6e94411f5 218 enable/disable, erroneous state */
Kojto 116:c0f6e94411f5 219 #define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< OVR error */
Kojto 116:c0f6e94411f5 220 #define HAL_ADC_ERROR_DMA ((uint32_t)0x03) /*!< DMA transfer error */
Kojto 116:c0f6e94411f5 221 /**
Kojto 116:c0f6e94411f5 222 * @}
Kojto 116:c0f6e94411f5 223 */
Kojto 116:c0f6e94411f5 224
Kojto 116:c0f6e94411f5 225 /** @defgroup ADC_TimeOut_Values
Kojto 116:c0f6e94411f5 226 * @{
Kojto 116:c0f6e94411f5 227 */
Kojto 116:c0f6e94411f5 228
Kojto 116:c0f6e94411f5 229 /* Fixed timeout values for ADC calibration, enable settling time, disable */
Kojto 116:c0f6e94411f5 230 /* settling time. */
Kojto 116:c0f6e94411f5 231 /* Values defined to be higher than worst cases: low clocks freq, */
Kojto 116:c0f6e94411f5 232 /* maximum prescalers. */
Kojto 116:c0f6e94411f5 233 /* Unit: ms */
Kojto 116:c0f6e94411f5 234 #define ADC_ENABLE_TIMEOUT 10
Kojto 116:c0f6e94411f5 235 #define ADC_DISABLE_TIMEOUT 10
Kojto 116:c0f6e94411f5 236 #define ADC_STOP_CONVERSION_TIMEOUT 10
Kojto 116:c0f6e94411f5 237
Kojto 116:c0f6e94411f5 238 /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
Kojto 116:c0f6e94411f5 239 /* the minimum number of CPU cycles to fulfill this delay */
Kojto 116:c0f6e94411f5 240 #define ADC_DELAY_10US_MIN_CPU_CYCLES 1800
Kojto 116:c0f6e94411f5 241 /**
Kojto 116:c0f6e94411f5 242 * @}
Kojto 116:c0f6e94411f5 243 */
Kojto 116:c0f6e94411f5 244
Kojto 116:c0f6e94411f5 245 /** @defgroup ADC_ClockPrescaler
Kojto 116:c0f6e94411f5 246 * @{
Kojto 116:c0f6e94411f5 247 */
Kojto 116:c0f6e94411f5 248 #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode divided by 1 */
Kojto 116:c0f6e94411f5 249 #define ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 250 #define ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 251 #define ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 252 #define ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 253 #define ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 254 #define ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 255 #define ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 256 #define ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 257 #define ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 258 #define ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 259 #define ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 260
Kojto 116:c0f6e94411f5 261 #define ADC_CLOCK_SYNC_PCLK_DIV1 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< Synchronous clock mode divided by 1
Kojto 116:c0f6e94411f5 262 This configuration must be enabled only if PCLK has a 50%
Kojto 116:c0f6e94411f5 263 duty clock cycle (APB prescaler configured inside the RCC must be bypassed and the system clock
Kojto 116:c0f6e94411f5 264 must by 50% duty cycle)*/
Kojto 116:c0f6e94411f5 265 #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< Synchronous clock mode divided by 2 */
Kojto 116:c0f6e94411f5 266 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE) /*!< Synchronous clock mode divided by 4 */
Kojto 116:c0f6e94411f5 267
Kojto 116:c0f6e94411f5 268 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) ||\
Kojto 116:c0f6e94411f5 269 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV1) ||\
Kojto 116:c0f6e94411f5 270 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) ||\
Kojto 116:c0f6e94411f5 271 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) ||\
Kojto 116:c0f6e94411f5 272 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1 ) ||\
Kojto 116:c0f6e94411f5 273 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2 ) ||\
Kojto 116:c0f6e94411f5 274 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4 ) ||\
Kojto 116:c0f6e94411f5 275 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV6 ) ||\
Kojto 116:c0f6e94411f5 276 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV8 ) ||\
Kojto 116:c0f6e94411f5 277 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV10 ) ||\
Kojto 116:c0f6e94411f5 278 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV12 ) ||\
Kojto 116:c0f6e94411f5 279 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV16 ) ||\
Kojto 116:c0f6e94411f5 280 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV32 ) ||\
Kojto 116:c0f6e94411f5 281 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV64 ) ||\
Kojto 116:c0f6e94411f5 282 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV128 ) ||\
Kojto 116:c0f6e94411f5 283 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV256))
Kojto 116:c0f6e94411f5 284 /**
Kojto 116:c0f6e94411f5 285 * @}
Kojto 116:c0f6e94411f5 286 */
Kojto 116:c0f6e94411f5 287
Kojto 116:c0f6e94411f5 288 /** @defgroup ADC_Resolution
Kojto 116:c0f6e94411f5 289 * @{
Kojto 116:c0f6e94411f5 290 */
Kojto 116:c0f6e94411f5 291 #define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
Kojto 116:c0f6e94411f5 292 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
Kojto 116:c0f6e94411f5 293 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
Kojto 116:c0f6e94411f5 294 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
Kojto 116:c0f6e94411f5 295
Kojto 116:c0f6e94411f5 296 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
Kojto 116:c0f6e94411f5 297 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
Kojto 116:c0f6e94411f5 298 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
Kojto 116:c0f6e94411f5 299 ((RESOLUTION) == ADC_RESOLUTION_6B))
Kojto 116:c0f6e94411f5 300
Kojto 116:c0f6e94411f5 301 #define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_8B) || \
Kojto 116:c0f6e94411f5 302 ((RESOLUTION) == ADC_RESOLUTION_6B))
Kojto 116:c0f6e94411f5 303 /**
Kojto 116:c0f6e94411f5 304 * @}
Kojto 116:c0f6e94411f5 305 */
Kojto 116:c0f6e94411f5 306
Kojto 116:c0f6e94411f5 307 /** @defgroup ADC_data_align
Kojto 116:c0f6e94411f5 308 * @{
Kojto 116:c0f6e94411f5 309 */
Kojto 116:c0f6e94411f5 310 #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
Kojto 116:c0f6e94411f5 311 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
Kojto 116:c0f6e94411f5 312
Kojto 116:c0f6e94411f5 313 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
Kojto 116:c0f6e94411f5 314 ((ALIGN) == ADC_DATAALIGN_LEFT))
Kojto 116:c0f6e94411f5 315 /**
Kojto 116:c0f6e94411f5 316 * @}
Kojto 116:c0f6e94411f5 317 */
Kojto 116:c0f6e94411f5 318
Kojto 116:c0f6e94411f5 319 /** @defgroup ADC_Regular_External_Trigger_Source_Edge ADC External Trigger Source Edge for Regular Group
Kojto 116:c0f6e94411f5 320 * @{
Kojto 116:c0f6e94411f5 321 */
Kojto 116:c0f6e94411f5 322 #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000)
Kojto 116:c0f6e94411f5 323 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
Kojto 116:c0f6e94411f5 324 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
Kojto 116:c0f6e94411f5 325 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
Kojto 116:c0f6e94411f5 326
Kojto 116:c0f6e94411f5 327 #define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
Kojto 116:c0f6e94411f5 328 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
Kojto 116:c0f6e94411f5 329 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
Kojto 116:c0f6e94411f5 330 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
Kojto 116:c0f6e94411f5 331 /**
Kojto 116:c0f6e94411f5 332 * @}
Kojto 116:c0f6e94411f5 333 */
Kojto 116:c0f6e94411f5 334
Kojto 116:c0f6e94411f5 335 /** @defgroup ADC_External_trigger_Source
Kojto 116:c0f6e94411f5 336 * @{
Kojto 116:c0f6e94411f5 337 */
Kojto 116:c0f6e94411f5 338 #define ADC_EXTERNALTRIGCONV_T6_TRGO ((uint32_t)0x00000000)
Kojto 116:c0f6e94411f5 339 #define ADC_EXTERNALTRIGCONV_T21_CC2 ADC_CFGR1_EXTSEL_0
Kojto 116:c0f6e94411f5 340 #define ADC_EXTERNALTRIGCONV_T2_TRGO ADC_CFGR1_EXTSEL_1
Kojto 116:c0f6e94411f5 341 #define ADC_EXTERNALTRIGCONV_T2_CC4 ((uint32_t)0x000000C0)
Kojto 116:c0f6e94411f5 342 #define ADC_EXTERNALTRIGCONV_T22_TRGO ADC_CFGR1_EXTSEL_2
Kojto 116:c0f6e94411f5 343 #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC_CFGR1_EXTSEL
Kojto 116:c0f6e94411f5 344
Kojto 116:c0f6e94411f5 345 #define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \
Kojto 116:c0f6e94411f5 346 ((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
Kojto 116:c0f6e94411f5 347 ((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
Kojto 116:c0f6e94411f5 348 ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
Kojto 116:c0f6e94411f5 349 ((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
Kojto 116:c0f6e94411f5 350 ((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ))
Kojto 116:c0f6e94411f5 351
Kojto 116:c0f6e94411f5 352 /**
Kojto 116:c0f6e94411f5 353 * @}
Kojto 116:c0f6e94411f5 354 */
Kojto 116:c0f6e94411f5 355
Kojto 116:c0f6e94411f5 356 /** @defgroup ADC_EOCSelection
Kojto 116:c0f6e94411f5 357 * @{
Kojto 116:c0f6e94411f5 358 */
Kojto 116:c0f6e94411f5 359 #define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
Kojto 116:c0f6e94411f5 360 #define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
Kojto 116:c0f6e94411f5 361 #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */
Kojto 116:c0f6e94411f5 362
Kojto 116:c0f6e94411f5 363 #define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \
Kojto 116:c0f6e94411f5 364 ((EOC_SELECTION) == ADC_EOC_SEQ_CONV) || \
Kojto 116:c0f6e94411f5 365 ((EOC_SELECTION) == ADC_EOC_SINGLE_SEQ_CONV))
Kojto 116:c0f6e94411f5 366 /**
Kojto 116:c0f6e94411f5 367 * @}
Kojto 116:c0f6e94411f5 368 */
Kojto 116:c0f6e94411f5 369
Kojto 116:c0f6e94411f5 370 /** @defgroup ADC_Overrun
Kojto 116:c0f6e94411f5 371 * @{
Kojto 116:c0f6e94411f5 372 */
Kojto 116:c0f6e94411f5 373 #define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000000)
Kojto 116:c0f6e94411f5 374 #define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR1_OVRMOD)
Kojto 116:c0f6e94411f5 375
Kojto 116:c0f6e94411f5 376 #define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \
Kojto 116:c0f6e94411f5 377 ((OVR) == ADC_OVR_DATA_OVERWRITTEN))
Kojto 116:c0f6e94411f5 378 /**
Kojto 116:c0f6e94411f5 379 * @}
Kojto 116:c0f6e94411f5 380 */
Kojto 116:c0f6e94411f5 381
Kojto 116:c0f6e94411f5 382 /** @defgroup ADC_channels
Kojto 116:c0f6e94411f5 383 * @{
Kojto 116:c0f6e94411f5 384 */
Kojto 116:c0f6e94411f5 385 #define ADC_CHANNEL_0 ((uint32_t)(ADC_CHSELR_CHSEL0))
Kojto 116:c0f6e94411f5 386 #define ADC_CHANNEL_1 ((uint32_t)(ADC_CHSELR_CHSEL1) | ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 387 #define ADC_CHANNEL_2 ((uint32_t)(ADC_CHSELR_CHSEL2) | ADC_CFGR1_AWDCH_1)
Kojto 116:c0f6e94411f5 388 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CHSELR_CHSEL3)| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 389 #define ADC_CHANNEL_4 ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
Kojto 116:c0f6e94411f5 390 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 391 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
Kojto 116:c0f6e94411f5 392 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 393 #define ADC_CHANNEL_8 ((uint32_t)(ADC_CHSELR_CHSEL8)| ADC_CFGR1_AWDCH_3)
Kojto 116:c0f6e94411f5 394 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CHSELR_CHSEL9)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 395 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CHSELR_CHSEL10)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1)
Kojto 116:c0f6e94411f5 396 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CHSELR_CHSEL11)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 397 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
Kojto 116:c0f6e94411f5 398 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 399 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
Kojto 116:c0f6e94411f5 400 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 401 #define ADC_CHANNEL_16 ((uint32_t)(ADC_CHSELR_CHSEL16)| ADC_CFGR1_AWDCH_4)
Kojto 116:c0f6e94411f5 402 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CHSELR_CHSEL17)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_0)
Kojto 116:c0f6e94411f5 403 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CHSELR_CHSEL18)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_1)
Kojto 116:c0f6e94411f5 404
Kojto 116:c0f6e94411f5 405 /* Internal channels */
Kojto 116:c0f6e94411f5 406 #define ADC_CHANNEL_VLCD ADC_CHANNEL_16
Kojto 116:c0f6e94411f5 407 #define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
Kojto 116:c0f6e94411f5 408 #define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_18
Kojto 116:c0f6e94411f5 409
Kojto 116:c0f6e94411f5 410
Kojto 116:c0f6e94411f5 411 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
Kojto 116:c0f6e94411f5 412 ((CHANNEL) == ADC_CHANNEL_1) || \
Kojto 116:c0f6e94411f5 413 ((CHANNEL) == ADC_CHANNEL_2) || \
Kojto 116:c0f6e94411f5 414 ((CHANNEL) == ADC_CHANNEL_3) || \
Kojto 116:c0f6e94411f5 415 ((CHANNEL) == ADC_CHANNEL_4) || \
Kojto 116:c0f6e94411f5 416 ((CHANNEL) == ADC_CHANNEL_5) || \
Kojto 116:c0f6e94411f5 417 ((CHANNEL) == ADC_CHANNEL_6) || \
Kojto 116:c0f6e94411f5 418 ((CHANNEL) == ADC_CHANNEL_7) || \
Kojto 116:c0f6e94411f5 419 ((CHANNEL) == ADC_CHANNEL_8) || \
Kojto 116:c0f6e94411f5 420 ((CHANNEL) == ADC_CHANNEL_9) || \
Kojto 116:c0f6e94411f5 421 ((CHANNEL) == ADC_CHANNEL_10) || \
Kojto 116:c0f6e94411f5 422 ((CHANNEL) == ADC_CHANNEL_11) || \
Kojto 116:c0f6e94411f5 423 ((CHANNEL) == ADC_CHANNEL_12) || \
Kojto 116:c0f6e94411f5 424 ((CHANNEL) == ADC_CHANNEL_13) || \
Kojto 116:c0f6e94411f5 425 ((CHANNEL) == ADC_CHANNEL_14) || \
Kojto 116:c0f6e94411f5 426 ((CHANNEL) == ADC_CHANNEL_15) || \
Kojto 116:c0f6e94411f5 427 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
Kojto 116:c0f6e94411f5 428 ((CHANNEL) == ADC_CHANNEL_VREFINT) || \
Kojto 116:c0f6e94411f5 429 ((CHANNEL) == ADC_CHANNEL_VLCD))
Kojto 116:c0f6e94411f5 430
Kojto 116:c0f6e94411f5 431 /**
Kojto 116:c0f6e94411f5 432 * @}
Kojto 116:c0f6e94411f5 433 */
Kojto 116:c0f6e94411f5 434
Kojto 116:c0f6e94411f5 435 /** @defgroup ADC_Channel_AWD_Masks
Kojto 116:c0f6e94411f5 436 * @{
Kojto 116:c0f6e94411f5 437 */
Kojto 116:c0f6e94411f5 438 #define ADC_CHANNEL_MASK ((uint32_t)0x0007FFFF)
Kojto 116:c0f6e94411f5 439 #define ADC_CHANNEL_AWD_MASK ((uint32_t)0x7C000000)
Kojto 116:c0f6e94411f5 440 /**
Kojto 116:c0f6e94411f5 441 * @}
Kojto 116:c0f6e94411f5 442 */
Kojto 116:c0f6e94411f5 443
Kojto 116:c0f6e94411f5 444
Kojto 116:c0f6e94411f5 445 /** @defgroup ADC_sampling_times
Kojto 116:c0f6e94411f5 446 * @{
Kojto 116:c0f6e94411f5 447 */
Kojto 116:c0f6e94411f5 448
Kojto 116:c0f6e94411f5 449 #define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x00000000) /*!< ADC sampling time 1.5 cycle */
Kojto 116:c0f6e94411f5 450 #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_0) /*!< ADC sampling time 7.5 CYCLES */
Kojto 116:c0f6e94411f5 451 #define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_1) /*!< ADC sampling time 13.5 CYCLES */
Kojto 116:c0f6e94411f5 452 #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_1 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 28.5 CYCLES */
Kojto 116:c0f6e94411f5 453 #define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_2) /*!< ADC sampling time 41.5 CYCLES */
Kojto 116:c0f6e94411f5 454 #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 55.5 CYCLES */
Kojto 116:c0f6e94411f5 455 #define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_1)) /*!< ADC sampling time 71.5 CYCLES */
Kojto 116:c0f6e94411f5 456 #define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t)ADC_SMPR_SMPR) /*!< ADC sampling time 239.5 CYCLES */
Kojto 116:c0f6e94411f5 457
Kojto 116:c0f6e94411f5 458 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5 ) || \
Kojto 116:c0f6e94411f5 459 ((TIME) == ADC_SAMPLETIME_7CYCLES_5 ) || \
Kojto 116:c0f6e94411f5 460 ((TIME) == ADC_SAMPLETIME_13CYCLES_5 ) || \
Kojto 116:c0f6e94411f5 461 ((TIME) == ADC_SAMPLETIME_28CYCLES_5 ) || \
Kojto 116:c0f6e94411f5 462 ((TIME) == ADC_SAMPLETIME_41CYCLES_5 ) || \
Kojto 116:c0f6e94411f5 463 ((TIME) == ADC_SAMPLETIME_55CYCLES_5 ) || \
Kojto 116:c0f6e94411f5 464 ((TIME) == ADC_SAMPLETIME_71CYCLES_5 ) || \
Kojto 116:c0f6e94411f5 465 ((TIME) == ADC_SAMPLETIME_239CYCLES_5))
Kojto 116:c0f6e94411f5 466 /**
Kojto 116:c0f6e94411f5 467 * @}
Kojto 116:c0f6e94411f5 468 */
Kojto 116:c0f6e94411f5 469
Kojto 116:c0f6e94411f5 470
Kojto 116:c0f6e94411f5 471 /** @defgroup ADC_Scan_mode ADC Scan mode
Kojto 116:c0f6e94411f5 472 * @{
Kojto 116:c0f6e94411f5 473 */
Kojto 116:c0f6e94411f5 474 /* Note: Scan mode values must be compatible with other STM32 devices having */
Kojto 116:c0f6e94411f5 475 /* a configurable sequencer. */
Kojto 116:c0f6e94411f5 476 /* Scan direction setting values are defined by taking in account */
Kojto 116:c0f6e94411f5 477 /* already defined values for other STM32 devices: */
Kojto 116:c0f6e94411f5 478 /* ADC_SCAN_DISABLE ((uint32_t)0x00000000) */
Kojto 116:c0f6e94411f5 479 /* ADC_SCAN_ENABLE ((uint32_t)0x00000001) */
Kojto 116:c0f6e94411f5 480 /* Scan direction forward is considered as default setting equivalent */
Kojto 116:c0f6e94411f5 481 /* to scan enable. */
Kojto 116:c0f6e94411f5 482 /* Scan direction backward is considered as additional setting. */
Kojto 116:c0f6e94411f5 483 /* In case of migration from another STM32 device, the user will be */
Kojto 116:c0f6e94411f5 484 /* warned of change of setting choices with assert check. */
Kojto 116:c0f6e94411f5 485 #define ADC_SCAN_DIRECTION_FORWARD ((uint32_t)0x00000001) /*!< Scan direction forward: from channel 0 to channel 18 */
Kojto 116:c0f6e94411f5 486 #define ADC_SCAN_DIRECTION_BACKWARD ((uint32_t)0x00000002) /*!< Scan direction backward: from channel 18 to channel 0 */
Kojto 116:c0f6e94411f5 487
Kojto 116:c0f6e94411f5 488 #define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */
Kojto 116:c0f6e94411f5 489
Kojto 116:c0f6e94411f5 490 #define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \
Kojto 116:c0f6e94411f5 491 ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD))
Kojto 116:c0f6e94411f5 492
Kojto 116:c0f6e94411f5 493 /**
Kojto 116:c0f6e94411f5 494 * @}
Kojto 116:c0f6e94411f5 495 */
Kojto 116:c0f6e94411f5 496
Kojto 116:c0f6e94411f5 497 /** @defgroup ADC_Oversampling_Ratio
Kojto 116:c0f6e94411f5 498 * @{
Kojto 116:c0f6e94411f5 499 */
Kojto 116:c0f6e94411f5 500
Kojto 116:c0f6e94411f5 501 #define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /*!< ADC Oversampling ratio 2x */
Kojto 116:c0f6e94411f5 502 #define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)0x00000004) /*!< ADC Oversampling ratio 4x */
Kojto 116:c0f6e94411f5 503 #define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)0x00000008) /*!< ADC Oversampling ratio 8x */
Kojto 116:c0f6e94411f5 504 #define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)0x0000000C) /*!< ADC Oversampling ratio 16x */
Kojto 116:c0f6e94411f5 505 #define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)0x00000010) /*!< ADC Oversampling ratio 32x */
Kojto 116:c0f6e94411f5 506 #define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)0x00000014) /*!< ADC Oversampling ratio 64x */
Kojto 116:c0f6e94411f5 507 #define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)0x00000018) /*!< ADC Oversampling ratio 128x */
Kojto 116:c0f6e94411f5 508 #define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)0x0000001C) /*!< ADC Oversampling ratio 256x */
Kojto 116:c0f6e94411f5 509 #define IS_ADC_OVERSAMPLING_RATIO(RATIO) (((RATIO) == ADC_OVERSAMPLING_RATIO_2 ) || \
Kojto 116:c0f6e94411f5 510 ((RATIO) == ADC_OVERSAMPLING_RATIO_4 ) || \
Kojto 116:c0f6e94411f5 511 ((RATIO) == ADC_OVERSAMPLING_RATIO_8 ) || \
Kojto 116:c0f6e94411f5 512 ((RATIO) == ADC_OVERSAMPLING_RATIO_16 ) || \
Kojto 116:c0f6e94411f5 513 ((RATIO) == ADC_OVERSAMPLING_RATIO_32 ) || \
Kojto 116:c0f6e94411f5 514 ((RATIO) == ADC_OVERSAMPLING_RATIO_64 ) || \
Kojto 116:c0f6e94411f5 515 ((RATIO) == ADC_OVERSAMPLING_RATIO_128 ) || \
Kojto 116:c0f6e94411f5 516 ((RATIO) == ADC_OVERSAMPLING_RATIO_256 ))
Kojto 116:c0f6e94411f5 517 /**
Kojto 116:c0f6e94411f5 518 * @}
Kojto 116:c0f6e94411f5 519 */
Kojto 116:c0f6e94411f5 520
Kojto 116:c0f6e94411f5 521 /** @defgroup ADC_Right_Bit_Shift
Kojto 116:c0f6e94411f5 522 * @{
Kojto 116:c0f6e94411f5 523 */
Kojto 116:c0f6e94411f5 524 #define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
Kojto 116:c0f6e94411f5 525 #define ADC_RIGHTBITSHIFT_1 ((uint32_t)0x00000020) /*!< ADC 1 bit shift for oversampling */
Kojto 116:c0f6e94411f5 526 #define ADC_RIGHTBITSHIFT_2 ((uint32_t)0x00000040) /*!< ADC 2 bits shift for oversampling */
Kojto 116:c0f6e94411f5 527 #define ADC_RIGHTBITSHIFT_3 ((uint32_t)0x00000060) /*!< ADC 3 bits shift for oversampling */
Kojto 116:c0f6e94411f5 528 #define ADC_RIGHTBITSHIFT_4 ((uint32_t)0x00000080) /*!< ADC 4 bits shift for oversampling */
Kojto 116:c0f6e94411f5 529 #define ADC_RIGHTBITSHIFT_5 ((uint32_t)0x000000A0) /*!< ADC 5 bits shift for oversampling */
Kojto 116:c0f6e94411f5 530 #define ADC_RIGHTBITSHIFT_6 ((uint32_t)0x000000C0) /*!< ADC 6 bits shift for oversampling */
Kojto 116:c0f6e94411f5 531 #define ADC_RIGHTBITSHIFT_7 ((uint32_t)0x000000E0) /*!< ADC 7 bits shift for oversampling */
Kojto 116:c0f6e94411f5 532 #define ADC_RIGHTBITSHIFT_8 ((uint32_t)0x00000100) /*!< ADC 8 bits shift for oversampling */
Kojto 116:c0f6e94411f5 533 #define IS_ADC_RIGHT_BIT_SHIFT(SHIFT) (((SHIFT) == ADC_RIGHTBITSHIFT_NONE) || \
Kojto 116:c0f6e94411f5 534 ((SHIFT) == ADC_RIGHTBITSHIFT_1 ) || \
Kojto 116:c0f6e94411f5 535 ((SHIFT) == ADC_RIGHTBITSHIFT_2 ) || \
Kojto 116:c0f6e94411f5 536 ((SHIFT) == ADC_RIGHTBITSHIFT_3 ) || \
Kojto 116:c0f6e94411f5 537 ((SHIFT) == ADC_RIGHTBITSHIFT_4 ) || \
Kojto 116:c0f6e94411f5 538 ((SHIFT) == ADC_RIGHTBITSHIFT_5 ) || \
Kojto 116:c0f6e94411f5 539 ((SHIFT) == ADC_RIGHTBITSHIFT_6 ) || \
Kojto 116:c0f6e94411f5 540 ((SHIFT) == ADC_RIGHTBITSHIFT_7 ) || \
Kojto 116:c0f6e94411f5 541 ((SHIFT) == ADC_RIGHTBITSHIFT_8 ))
Kojto 116:c0f6e94411f5 542 /**
Kojto 116:c0f6e94411f5 543 * @}
Kojto 116:c0f6e94411f5 544 */
Kojto 116:c0f6e94411f5 545
Kojto 116:c0f6e94411f5 546 /** @defgroup ADC_Triggered_Oversampling_Mode
Kojto 116:c0f6e94411f5 547 * @{
Kojto 116:c0f6e94411f5 548 */
Kojto 116:c0f6e94411f5 549 #define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
Kojto 116:c0f6e94411f5 550 #define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)0x00000200) /*!< ADC No bit shift for oversampling */
Kojto 116:c0f6e94411f5 551 #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(MODE) (((MODE) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
Kojto 116:c0f6e94411f5 552 ((MODE) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
Kojto 116:c0f6e94411f5 553 /**
Kojto 116:c0f6e94411f5 554 * @}
Kojto 116:c0f6e94411f5 555 */
Kojto 116:c0f6e94411f5 556
Kojto 116:c0f6e94411f5 557 /** @defgroup ADC_analog_watchdog_mode
Kojto 116:c0f6e94411f5 558 * @{
Kojto 116:c0f6e94411f5 559 */
Kojto 116:c0f6e94411f5 560 #define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000)
Kojto 116:c0f6e94411f5 561 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
Kojto 116:c0f6e94411f5 562 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
Kojto 116:c0f6e94411f5 563
Kojto 116:c0f6e94411f5 564
Kojto 116:c0f6e94411f5 565 #define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE ) || \
Kojto 116:c0f6e94411f5 566 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
Kojto 116:c0f6e94411f5 567 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG ))
Kojto 116:c0f6e94411f5 568 /**
Kojto 116:c0f6e94411f5 569 * @}
Kojto 116:c0f6e94411f5 570 */
Kojto 116:c0f6e94411f5 571
Kojto 116:c0f6e94411f5 572 /** @defgroup ADC_conversion_type
Kojto 116:c0f6e94411f5 573 * @{
Kojto 116:c0f6e94411f5 574 */
Kojto 116:c0f6e94411f5 575 #define ADC_REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS))
Kojto 116:c0f6e94411f5 576 #define IS_ADC_CONVERSION_GROUP(CONVERSION) ((CONVERSION) == ADC_REGULAR_GROUP)
Kojto 116:c0f6e94411f5 577 /**
Kojto 116:c0f6e94411f5 578 * @}
Kojto 116:c0f6e94411f5 579 */
Kojto 116:c0f6e94411f5 580
Kojto 116:c0f6e94411f5 581 /** @defgroup ADC_Event_type
Kojto 116:c0f6e94411f5 582 * @{
Kojto 116:c0f6e94411f5 583 */
Kojto 116:c0f6e94411f5 584 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
Kojto 116:c0f6e94411f5 585 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
Kojto 116:c0f6e94411f5 586
Kojto 116:c0f6e94411f5 587 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
Kojto 116:c0f6e94411f5 588 ((EVENT) == ADC_OVR_EVENT))
Kojto 116:c0f6e94411f5 589 /**
Kojto 116:c0f6e94411f5 590 * @}
Kojto 116:c0f6e94411f5 591 */
Kojto 116:c0f6e94411f5 592
Kojto 116:c0f6e94411f5 593 /** @defgroup ADC_interrupts_definition
Kojto 116:c0f6e94411f5 594 * @{
Kojto 116:c0f6e94411f5 595 */
Kojto 116:c0f6e94411f5 596 #define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready (ADRDY) interrupt source */
Kojto 116:c0f6e94411f5 597 #define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
Kojto 116:c0f6e94411f5 598 #define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
Kojto 116:c0f6e94411f5 599 #define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
Kojto 116:c0f6e94411f5 600 #define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
Kojto 116:c0f6e94411f5 601 #define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog 1 interrupt source */
Kojto 116:c0f6e94411f5 602 #define ADC_IT_EOCAL ADC_IER_EOCALIE /*!< ADC End of Calibration interrupt source */
Kojto 116:c0f6e94411f5 603
Kojto 116:c0f6e94411f5 604 /* Check of single flag */
Kojto 116:c0f6e94411f5 605 #define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_RDY) || \
Kojto 116:c0f6e94411f5 606 ((IT) == ADC_IT_EOSMP) || ((IT) == ADC_IT_EOC) || \
Kojto 116:c0f6e94411f5 607 ((IT) == ADC_IT_EOS) || ((IT) == ADC_IT_OVR))
Kojto 116:c0f6e94411f5 608 /**
Kojto 116:c0f6e94411f5 609 * @}
Kojto 116:c0f6e94411f5 610 */
Kojto 116:c0f6e94411f5 611
Kojto 116:c0f6e94411f5 612
Kojto 116:c0f6e94411f5 613
Kojto 116:c0f6e94411f5 614 /** @defgroup ADC_flags_definition
Kojto 116:c0f6e94411f5 615 * @{
Kojto 116:c0f6e94411f5 616 */
Kojto 116:c0f6e94411f5 617 #define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready (ADRDY) flag */
Kojto 116:c0f6e94411f5 618 #define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
Kojto 116:c0f6e94411f5 619 #define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
Kojto 116:c0f6e94411f5 620 #define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
Kojto 116:c0f6e94411f5 621 #define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
Kojto 116:c0f6e94411f5 622 #define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
Kojto 116:c0f6e94411f5 623 #define ADC_FLAG_EOCAL ADC_ISR_EOCAL /*!< ADC Enf Of Calibration flag */
Kojto 116:c0f6e94411f5 624
Kojto 116:c0f6e94411f5 625
Kojto 116:c0f6e94411f5 626 #define ADC_FLAG_ALL (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS | \
Kojto 116:c0f6e94411f5 627 ADC_FLAG_OVR | ADC_FLAG_AWD | ADC_FLAG_EOCAL)
Kojto 116:c0f6e94411f5 628
Kojto 116:c0f6e94411f5 629 /* Check of single flag */
Kojto 116:c0f6e94411f5 630 #define IS_ADC_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
Kojto 116:c0f6e94411f5 631 ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
Kojto 116:c0f6e94411f5 632 ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_AWD) || \
Kojto 116:c0f6e94411f5 633 ((FLAG) == ADC_FLAG_EOCAL))
Kojto 116:c0f6e94411f5 634 /**
Kojto 116:c0f6e94411f5 635 * @}
Kojto 116:c0f6e94411f5 636 */
Kojto 116:c0f6e94411f5 637
Kojto 116:c0f6e94411f5 638
Kojto 116:c0f6e94411f5 639 /** @defgroup ADC_range_verification
Kojto 116:c0f6e94411f5 640 * in function of ADC resolution selected (12, 10, 8 or 6 bits)
Kojto 116:c0f6e94411f5 641 * @{
Kojto 116:c0f6e94411f5 642 */
Kojto 116:c0f6e94411f5 643 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
Kojto 116:c0f6e94411f5 644 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \
Kojto 116:c0f6e94411f5 645 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \
Kojto 116:c0f6e94411f5 646 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \
Kojto 116:c0f6e94411f5 647 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003F))))
Kojto 116:c0f6e94411f5 648 /**
Kojto 116:c0f6e94411f5 649 * @}
Kojto 116:c0f6e94411f5 650 */
Kojto 116:c0f6e94411f5 651
Kojto 116:c0f6e94411f5 652 /** @defgroup ADC_regular_nb_conv_verification
Kojto 116:c0f6e94411f5 653 * @{
Kojto 116:c0f6e94411f5 654 */
Kojto 116:c0f6e94411f5 655 #define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)16)))
Kojto 116:c0f6e94411f5 656 /**
Kojto 116:c0f6e94411f5 657 * @}
Kojto 116:c0f6e94411f5 658 */
Kojto 116:c0f6e94411f5 659
Kojto 116:c0f6e94411f5 660 /**
Kojto 116:c0f6e94411f5 661 * @}
Kojto 116:c0f6e94411f5 662 */
Kojto 116:c0f6e94411f5 663 /* Exported macro ------------------------------------------------------------*/
Kojto 116:c0f6e94411f5 664
Kojto 116:c0f6e94411f5 665 /** @defgroup ADC_Exported_Macro
Kojto 116:c0f6e94411f5 666 * @{
Kojto 116:c0f6e94411f5 667 */
Kojto 116:c0f6e94411f5 668 /** @brief Reset ADC handle state
Kojto 116:c0f6e94411f5 669 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 670 * @retval None
Kojto 116:c0f6e94411f5 671 */
Kojto 116:c0f6e94411f5 672 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
Kojto 116:c0f6e94411f5 673
Kojto 116:c0f6e94411f5 674 /**
Kojto 116:c0f6e94411f5 675 * @brief Enable the ADC peripheral
Kojto 116:c0f6e94411f5 676 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 677 * @retval None
Kojto 116:c0f6e94411f5 678 */
Kojto 116:c0f6e94411f5 679 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
Kojto 116:c0f6e94411f5 680
Kojto 116:c0f6e94411f5 681 /**
Kojto 116:c0f6e94411f5 682 * @brief Verification of hardware constraints before ADC can be enabled
Kojto 116:c0f6e94411f5 683 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 684 * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
Kojto 116:c0f6e94411f5 685 */
Kojto 116:c0f6e94411f5 686 #define ADC_ENABLING_CONDITIONS(__HANDLE__) \
Kojto 116:c0f6e94411f5 687 (( ( ((__HANDLE__)->Instance->CR) & \
Kojto 116:c0f6e94411f5 688 (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | \
Kojto 116:c0f6e94411f5 689 ADC_CR_ADDIS | ADC_CR_ADEN ) \
Kojto 116:c0f6e94411f5 690 ) == RESET \
Kojto 116:c0f6e94411f5 691 ) ? SET : RESET)
Kojto 116:c0f6e94411f5 692
Kojto 116:c0f6e94411f5 693 /**
Kojto 116:c0f6e94411f5 694 * @brief Disable the ADC peripheral
Kojto 116:c0f6e94411f5 695 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 696 * @retval None
Kojto 116:c0f6e94411f5 697 */
Kojto 116:c0f6e94411f5 698 #define __HAL_ADC_DISABLE(__HANDLE__) \
Kojto 116:c0f6e94411f5 699 do{ \
Kojto 116:c0f6e94411f5 700 (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
Kojto 116:c0f6e94411f5 701 __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
Kojto 116:c0f6e94411f5 702 } while(0)
Kojto 116:c0f6e94411f5 703
Kojto 116:c0f6e94411f5 704 /**
Kojto 116:c0f6e94411f5 705 * @brief Verification of hardware constraints before ADC can be disabled
Kojto 116:c0f6e94411f5 706 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 707 * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
Kojto 116:c0f6e94411f5 708 */
Kojto 116:c0f6e94411f5 709 #define ADC_DISABLING_CONDITIONS(__HANDLE__) \
Kojto 116:c0f6e94411f5 710 (( ( ((__HANDLE__)->Instance->CR) & \
Kojto 116:c0f6e94411f5 711 (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
Kojto 116:c0f6e94411f5 712 ) ? SET : RESET)
Kojto 116:c0f6e94411f5 713
Kojto 116:c0f6e94411f5 714 /**
Kojto 116:c0f6e94411f5 715 * @brief Verification of ADC state: enabled or disabled
Kojto 116:c0f6e94411f5 716 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 717 * @retval SET (ADC enabled) or RESET (ADC disabled)
Kojto 116:c0f6e94411f5 718 */
Kojto 116:c0f6e94411f5 719 #define ADC_IS_ENABLE(__HANDLE__) \
Kojto 116:c0f6e94411f5 720 (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
Kojto 116:c0f6e94411f5 721 ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
Kojto 116:c0f6e94411f5 722 ) ? SET : RESET)
Kojto 116:c0f6e94411f5 723
Kojto 116:c0f6e94411f5 724 /**
Kojto 116:c0f6e94411f5 725 * @brief Returns resolution bits in CFGR register: RES[1:0]. Return value among parameter to @ref ADC_Resolution.
Kojto 116:c0f6e94411f5 726 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 727 * @retval None
Kojto 116:c0f6e94411f5 728 */
Kojto 116:c0f6e94411f5 729 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
Kojto 116:c0f6e94411f5 730
Kojto 116:c0f6e94411f5 731 /**
Kojto 116:c0f6e94411f5 732 * @brief Check if no conversion is ongoing on regular groups
Kojto 116:c0f6e94411f5 733 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 734 * @retval SET (conversion is on going) or RESET (no conversion is on going)
Kojto 116:c0f6e94411f5 735 */
Kojto 116:c0f6e94411f5 736 #define ADC_IS_CONVERSION_ONGOING(__HANDLE__) \
Kojto 116:c0f6e94411f5 737 (( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART)) == RESET ) ? RESET : SET)
Kojto 116:c0f6e94411f5 738
Kojto 116:c0f6e94411f5 739 /**
Kojto 116:c0f6e94411f5 740 * @brief Enable ADC continuous conversion mode.
Kojto 116:c0f6e94411f5 741 * @param _CONTINUOUS_MODE_: Continuous mode.
Kojto 116:c0f6e94411f5 742 * @retval None
Kojto 116:c0f6e94411f5 743 */
Kojto 116:c0f6e94411f5 744 #define ADC_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 13)
Kojto 116:c0f6e94411f5 745
Kojto 116:c0f6e94411f5 746 /**
Kojto 116:c0f6e94411f5 747 * @brief Enable ADC scan mode to convert multiple ranks with sequencer.
Kojto 116:c0f6e94411f5 748 * @param _SCAN_MODE_: Scan conversion mode.
Kojto 116:c0f6e94411f5 749 * @retval None
Kojto 116:c0f6e94411f5 750 */
Kojto 116:c0f6e94411f5 751 #define ADC_SCANDIR(_SCAN_MODE_) \
Kojto 116:c0f6e94411f5 752 ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \
Kojto 116:c0f6e94411f5 753 )? (ADC_CFGR1_SCANDIR) : (0x00000000) \
Kojto 116:c0f6e94411f5 754 )
Kojto 116:c0f6e94411f5 755
Kojto 116:c0f6e94411f5 756 /**
Kojto 116:c0f6e94411f5 757 * @brief Configures the number of discontinuous conversions for the regular group channels.
Kojto 116:c0f6e94411f5 758 * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
Kojto 116:c0f6e94411f5 759 * @retval None
Kojto 116:c0f6e94411f5 760 */
Kojto 116:c0f6e94411f5 761 #define __HAL_ADC_CFGR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1) << 17)
Kojto 116:c0f6e94411f5 762
Kojto 116:c0f6e94411f5 763 /**
Kojto 116:c0f6e94411f5 764 * @brief Enable the ADC DMA continuous request.
Kojto 116:c0f6e94411f5 765 * @param _DMAContReq_MODE_: DMA continuous request mode.
Kojto 116:c0f6e94411f5 766 * @retval None
Kojto 116:c0f6e94411f5 767 */
Kojto 116:c0f6e94411f5 768 #define ADC_DMACONTREQ(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 1)
Kojto 116:c0f6e94411f5 769
Kojto 116:c0f6e94411f5 770 /**
Kojto 116:c0f6e94411f5 771 * @brief Enable the ADC Auto Delay.
Kojto 116:c0f6e94411f5 772 * @param _AutoDelay_: Auto delay bit enable or disable.
Kojto 116:c0f6e94411f5 773 * @retval None
Kojto 116:c0f6e94411f5 774 */
Kojto 116:c0f6e94411f5 775 #define __HAL_ADC_CFGR1_AutoDelay(_AutoDelay_) ((_AutoDelay_) << 14)
Kojto 116:c0f6e94411f5 776
Kojto 116:c0f6e94411f5 777 /**
Kojto 116:c0f6e94411f5 778 * @brief Enable the ADC LowPowerAutoPowerOff.
Kojto 116:c0f6e94411f5 779 * @param _AUTOFF_: AutoOff bit enable or disable.
Kojto 116:c0f6e94411f5 780 * @retval None
Kojto 116:c0f6e94411f5 781 */
Kojto 116:c0f6e94411f5 782 #define __HAL_ADC_CFGR1_AUTOFF(_AUTOFF_) ((_AUTOFF_) << 15)
Kojto 116:c0f6e94411f5 783
Kojto 116:c0f6e94411f5 784 /**
Kojto 116:c0f6e94411f5 785 * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
Kojto 116:c0f6e94411f5 786 * @param _Threshold_: Threshold value
Kojto 116:c0f6e94411f5 787 * @retval None
Kojto 116:c0f6e94411f5 788 */
Kojto 116:c0f6e94411f5 789 #define ADC_TRX_HIGHTHRESHOLD(_Threshold_) ((_Threshold_) << 16)
Kojto 116:c0f6e94411f5 790
Kojto 116:c0f6e94411f5 791 /**
Kojto 116:c0f6e94411f5 792 * @brief Enable the ADC Low Frequency mode.
Kojto 116:c0f6e94411f5 793 * @param _LOW_FREQUENCY_MODE_: Low Frequency mode.
Kojto 116:c0f6e94411f5 794 * @retval None
Kojto 116:c0f6e94411f5 795 */
Kojto 116:c0f6e94411f5 796 #define __HAL_ADC_CCR_LOWFREQUENCY(_LOW_FREQUENCY_MODE_) ((_LOW_FREQUENCY_MODE_) << 25)
Kojto 116:c0f6e94411f5 797
Kojto 116:c0f6e94411f5 798 /**
Kojto 116:c0f6e94411f5 799 * @brief Shift the offset in function of the selected ADC resolution.
Kojto 116:c0f6e94411f5 800 * Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0
Kojto 116:c0f6e94411f5 801 * If resolution 12 bits, no shift.
Kojto 116:c0f6e94411f5 802 * If resolution 10 bits, shift of 2 ranks on the right.
Kojto 116:c0f6e94411f5 803 * If resolution 8 bits, shift of 4 ranks on the right.
Kojto 116:c0f6e94411f5 804 * If resolution 6 bits, shift of 6 ranks on the right.
Kojto 116:c0f6e94411f5 805 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
Kojto 116:c0f6e94411f5 806 * @param __HANDLE__: ADC handle.
Kojto 116:c0f6e94411f5 807 * @param _Offset_: Value to be shifted
Kojto 116:c0f6e94411f5 808 * @retval None
Kojto 116:c0f6e94411f5 809 */
Kojto 116:c0f6e94411f5 810 #define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, _Offset_) \
Kojto 116:c0f6e94411f5 811 ((_Offset_) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR1_RES) >> 3)*2))
Kojto 116:c0f6e94411f5 812
Kojto 116:c0f6e94411f5 813 /**
Kojto 116:c0f6e94411f5 814 * @brief Shift the AWD1 threshold in function of the selected ADC resolution.
Kojto 116:c0f6e94411f5 815 * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0
Kojto 116:c0f6e94411f5 816 * If resolution 12 bits, no shift.
Kojto 116:c0f6e94411f5 817 * If resolution 10 bits, shift of 2 ranks on the right.
Kojto 116:c0f6e94411f5 818 * If resolution 8 bits, shift of 4 ranks on the right.
Kojto 116:c0f6e94411f5 819 * If resolution 6 bits, shift of 6 ranks on the right.
Kojto 116:c0f6e94411f5 820 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
Kojto 116:c0f6e94411f5 821 * @param __HANDLE__: ADC handle.
Kojto 116:c0f6e94411f5 822 * @param _Threshold_: Value to be shifted
Kojto 116:c0f6e94411f5 823 * @retval None
Kojto 116:c0f6e94411f5 824 */
Kojto 116:c0f6e94411f5 825 #define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \
Kojto 116:c0f6e94411f5 826 ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2))
Kojto 116:c0f6e94411f5 827
Kojto 116:c0f6e94411f5 828 /**
Kojto 116:c0f6e94411f5 829 * @brief Shift the value on the left, less significant are set to 0.
Kojto 116:c0f6e94411f5 830 * @param _Value_: Value to be shifted
Kojto 116:c0f6e94411f5 831 * @param _Shift_: Number of shift to be done
Kojto 116:c0f6e94411f5 832 * @retval None
Kojto 116:c0f6e94411f5 833 */
Kojto 116:c0f6e94411f5 834 #define __HAL_ADC_Value_Shift_left(_Value_, _Shift_) ((_Value_) << (_Shift_))
Kojto 116:c0f6e94411f5 835
Kojto 116:c0f6e94411f5 836
Kojto 116:c0f6e94411f5 837 /**
Kojto 116:c0f6e94411f5 838 * @brief Enable the ADC end of conversion interrupt.
Kojto 116:c0f6e94411f5 839 * @param __HANDLE__: ADC handle.
Kojto 116:c0f6e94411f5 840 * @param __INTERRUPT__: ADC Interrupt.
Kojto 116:c0f6e94411f5 841 * @retval None
Kojto 116:c0f6e94411f5 842 */
Kojto 116:c0f6e94411f5 843 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
Kojto 116:c0f6e94411f5 844
Kojto 116:c0f6e94411f5 845 /**
Kojto 116:c0f6e94411f5 846 * @brief Disable the ADC end of conversion interrupt.
Kojto 116:c0f6e94411f5 847 * @param __HANDLE__: ADC handle.
Kojto 116:c0f6e94411f5 848 * @param __INTERRUPT__: ADC interrupt.
Kojto 116:c0f6e94411f5 849 * @retval None
Kojto 116:c0f6e94411f5 850 */
Kojto 116:c0f6e94411f5 851 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
Kojto 116:c0f6e94411f5 852
Kojto 116:c0f6e94411f5 853 /** @brief Checks if the specified ADC interrupt source is enabled or disabled.
Kojto 116:c0f6e94411f5 854 * @param __HANDLE__: specifies the ADC Handle.
Kojto 116:c0f6e94411f5 855 * @param __INTERRUPT__: specifies the ADC interrupt source to check.
Kojto 116:c0f6e94411f5 856 * @retval The new state of __IT__ (TRUE or FALSE).
Kojto 116:c0f6e94411f5 857 */
Kojto 116:c0f6e94411f5 858 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 116:c0f6e94411f5 859
Kojto 116:c0f6e94411f5 860 /**
Kojto 116:c0f6e94411f5 861 * @brief Clear the ADC's pending flags
Kojto 116:c0f6e94411f5 862 * @param __HANDLE__: ADC handle.
Kojto 116:c0f6e94411f5 863 * @param __FLAG__: ADC flag.
Kojto 116:c0f6e94411f5 864 * @retval None
Kojto 116:c0f6e94411f5 865 */
Kojto 116:c0f6e94411f5 866 /* Note: bit cleared bit by writing 1 */
Kojto 116:c0f6e94411f5 867 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) = (__FLAG__))
Kojto 116:c0f6e94411f5 868
Kojto 116:c0f6e94411f5 869 /**
Kojto 116:c0f6e94411f5 870 * @brief Get the selected ADC's flag status.
Kojto 116:c0f6e94411f5 871 * @param __HANDLE__: ADC handle.
Kojto 116:c0f6e94411f5 872 * @param __FLAG__: ADC flag.
Kojto 116:c0f6e94411f5 873 * @retval None
Kojto 116:c0f6e94411f5 874 */
Kojto 116:c0f6e94411f5 875 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
Kojto 116:c0f6e94411f5 876
Kojto 116:c0f6e94411f5 877
Kojto 116:c0f6e94411f5 878
Kojto 116:c0f6e94411f5 879 /**
Kojto 116:c0f6e94411f5 880 * @brief Configuration of ADC clock & prescaler: clock source PCLK or Asynchronous with selectable prescaler
Kojto 116:c0f6e94411f5 881 * @param __HANDLE__: ADC handle
Kojto 116:c0f6e94411f5 882 * @retval None
Kojto 116:c0f6e94411f5 883 */
Kojto 116:c0f6e94411f5 884
Kojto 116:c0f6e94411f5 885 #define __HAL_ADC_CLOCK_PRESCALER(__HANDLE__) \
Kojto 116:c0f6e94411f5 886 do{ \
Kojto 116:c0f6e94411f5 887 if ((((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV1) || \
Kojto 116:c0f6e94411f5 888 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
Kojto 116:c0f6e94411f5 889 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV4)) \
Kojto 116:c0f6e94411f5 890 { \
Kojto 116:c0f6e94411f5 891 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
Kojto 116:c0f6e94411f5 892 (__HANDLE__)->Instance->CFGR2 |= (__HANDLE__)->Init.ClockPrescaler; \
Kojto 116:c0f6e94411f5 893 } \
Kojto 116:c0f6e94411f5 894 else \
Kojto 116:c0f6e94411f5 895 { \
Kojto 116:c0f6e94411f5 896 /* CKMOD bits must be reset */ \
Kojto 116:c0f6e94411f5 897 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
Kojto 116:c0f6e94411f5 898 ADC->CCR &= ~(ADC_CCR_PRESC); \
Kojto 116:c0f6e94411f5 899 ADC->CCR |= (__HANDLE__)->Init.ClockPrescaler; \
Kojto 116:c0f6e94411f5 900 } \
Kojto 116:c0f6e94411f5 901 } while(0)
Kojto 116:c0f6e94411f5 902
Kojto 116:c0f6e94411f5 903 /**
Kojto 116:c0f6e94411f5 904 * @}
Kojto 116:c0f6e94411f5 905 */
Kojto 116:c0f6e94411f5 906
Kojto 116:c0f6e94411f5 907 /* Include ADC HAL Extension module */
Kojto 116:c0f6e94411f5 908 #include "stm32l0xx_hal_adc_ex.h"
Kojto 116:c0f6e94411f5 909
Kojto 116:c0f6e94411f5 910 /* Exported functions --------------------------------------------------------*/
Kojto 116:c0f6e94411f5 911 /* Initialization and de-initialization functions **********************************/
Kojto 116:c0f6e94411f5 912 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 913 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
Kojto 116:c0f6e94411f5 914 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 915 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 916
Kojto 116:c0f6e94411f5 917 /* IO operation functions *****************************************************/
Kojto 116:c0f6e94411f5 918 /* Blocking mode: Polling */
Kojto 116:c0f6e94411f5 919 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 920 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 921 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
Kojto 116:c0f6e94411f5 922 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
Kojto 116:c0f6e94411f5 923
Kojto 116:c0f6e94411f5 924 /* Non-blocking mode: Interruption */
Kojto 116:c0f6e94411f5 925 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 926 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 927
Kojto 116:c0f6e94411f5 928 /* Non-blocking mode: DMA */
Kojto 116:c0f6e94411f5 929 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
Kojto 116:c0f6e94411f5 930 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 931
Kojto 116:c0f6e94411f5 932 /* ADC retrieve conversion value intended to be used with polling or interruption */
Kojto 116:c0f6e94411f5 933 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 934
Kojto 116:c0f6e94411f5 935 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
Kojto 116:c0f6e94411f5 936 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 937 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 938 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 939 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 940 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
Kojto 116:c0f6e94411f5 941
Kojto 116:c0f6e94411f5 942 /* Peripheral Control functions ***********************************************/
Kojto 116:c0f6e94411f5 943 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
Kojto 116:c0f6e94411f5 944 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
Kojto 116:c0f6e94411f5 945
Kojto 116:c0f6e94411f5 946 /* Peripheral State functions *************************************************/
Kojto 116:c0f6e94411f5 947 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
Kojto 116:c0f6e94411f5 948 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
Kojto 116:c0f6e94411f5 949
Kojto 116:c0f6e94411f5 950
Kojto 116:c0f6e94411f5 951 /**
Kojto 116:c0f6e94411f5 952 * @}
Kojto 116:c0f6e94411f5 953 */
Kojto 116:c0f6e94411f5 954
Kojto 116:c0f6e94411f5 955 /**
Kojto 116:c0f6e94411f5 956 * @}
Kojto 116:c0f6e94411f5 957 */
Kojto 116:c0f6e94411f5 958
Kojto 116:c0f6e94411f5 959 #ifdef __cplusplus
Kojto 116:c0f6e94411f5 960 }
Kojto 116:c0f6e94411f5 961 #endif
Kojto 116:c0f6e94411f5 962
Kojto 116:c0f6e94411f5 963 #endif /*__STM32L0xx_ADC_H */
Kojto 116:c0f6e94411f5 964
Kojto 116:c0f6e94411f5 965
Kojto 116:c0f6e94411f5 966 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/