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TARGET_NUCLEO_L073RZ/stm32_hal_legacy.h@120:2eb10e18b8d7, 2016-04-13 (annotated)

Committer:: elijahorr
Date:: Wed Apr 13 12:29:27 2016 +0000
Revision:: 120:2eb10e18b8d7
Parent:: 116:c0f6e94411f5

V1.1

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	116:c0f6e94411f5	1	/**
Kojto	116:c0f6e94411f5	2	******************************************************************************
Kojto	116:c0f6e94411f5	3	* @file stm32_hal_legacy.h
Kojto	116:c0f6e94411f5	4	* @author MCD Application Team
Kojto	116:c0f6e94411f5	5	* @version V1.2.0RC4
Kojto	116:c0f6e94411f5	6	* @date 23-January-2015
Kojto	116:c0f6e94411f5	7	* @brief This file contains aliases definition for the STM32Cube HAL constants
Kojto	116:c0f6e94411f5	8	* macros and functions maintained for legacy purpose.
Kojto	116:c0f6e94411f5	9	******************************************************************************
Kojto	116:c0f6e94411f5	10	* @attention
Kojto	116:c0f6e94411f5	11	*
Kojto	116:c0f6e94411f5	12	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto	116:c0f6e94411f5	13	*
Kojto	116:c0f6e94411f5	14	* Redistribution and use in source and binary forms, with or without modification,
Kojto	116:c0f6e94411f5	15	* are permitted provided that the following conditions are met:
Kojto	116:c0f6e94411f5	16	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	116:c0f6e94411f5	17	* this list of conditions and the following disclaimer.
Kojto	116:c0f6e94411f5	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	116:c0f6e94411f5	19	* this list of conditions and the following disclaimer in the documentation
Kojto	116:c0f6e94411f5	20	* and/or other materials provided with the distribution.
Kojto	116:c0f6e94411f5	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	116:c0f6e94411f5	22	* may be used to endorse or promote products derived from this software
Kojto	116:c0f6e94411f5	23	* without specific prior written permission.
Kojto	116:c0f6e94411f5	24	*
Kojto	116:c0f6e94411f5	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	116:c0f6e94411f5	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	116:c0f6e94411f5	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	116:c0f6e94411f5	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	116:c0f6e94411f5	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	116:c0f6e94411f5	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	116:c0f6e94411f5	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	116:c0f6e94411f5	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	116:c0f6e94411f5	33	UART * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	116:c0f6e94411f5	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	116:c0f6e94411f5	35	*
Kojto	116:c0f6e94411f5	36	******************************************************************************
Kojto	116:c0f6e94411f5	37	*/
Kojto	116:c0f6e94411f5	38
Kojto	116:c0f6e94411f5	39	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	116:c0f6e94411f5	40	#ifndef __STM32_HAL_LEGACY
Kojto	116:c0f6e94411f5	41	#define __STM32_HAL_LEGACY
Kojto	116:c0f6e94411f5	42
Kojto	116:c0f6e94411f5	43	#ifdef __cplusplus
Kojto	116:c0f6e94411f5	44	extern "C" {
Kojto	116:c0f6e94411f5	45	#endif
Kojto	116:c0f6e94411f5	46
Kojto	116:c0f6e94411f5	47	/* Includes ------------------------------------------------------------------*/
Kojto	116:c0f6e94411f5	48	/* Exported types ------------------------------------------------------------*/
Kojto	116:c0f6e94411f5	49	/* Exported constants --------------------------------------------------------*/
Kojto	116:c0f6e94411f5	50
Kojto	116:c0f6e94411f5	51	/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	52	* @{
Kojto	116:c0f6e94411f5	53	*/
Kojto	116:c0f6e94411f5	54	#define AES_FLAG_RDERR CRYP_FLAG_RDERR
Kojto	116:c0f6e94411f5	55	#define AES_FLAG_WRERR CRYP_FLAG_WRERR
Kojto	116:c0f6e94411f5	56	#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
Kojto	116:c0f6e94411f5	57	#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
Kojto	116:c0f6e94411f5	58	#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
Kojto	116:c0f6e94411f5	59
Kojto	116:c0f6e94411f5	60	/**
Kojto	116:c0f6e94411f5	61	* @}
Kojto	116:c0f6e94411f5	62	*/
Kojto	116:c0f6e94411f5	63
Kojto	116:c0f6e94411f5	64	/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	65	* @{
Kojto	116:c0f6e94411f5	66	*/
Kojto	116:c0f6e94411f5	67	#define ADC_RESOLUTION12b ADC_RESOLUTION_12B
Kojto	116:c0f6e94411f5	68	#define ADC_RESOLUTION10b ADC_RESOLUTION_10B
Kojto	116:c0f6e94411f5	69	#define ADC_RESOLUTION8b ADC_RESOLUTION_8B
Kojto	116:c0f6e94411f5	70	#define ADC_RESOLUTION6b ADC_RESOLUTION_6B
Kojto	116:c0f6e94411f5	71	#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
Kojto	116:c0f6e94411f5	72	#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
Kojto	116:c0f6e94411f5	73	#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
Kojto	116:c0f6e94411f5	74	#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
Kojto	116:c0f6e94411f5	75	#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
Kojto	116:c0f6e94411f5	76	#define REGULAR_GROUP ADC_REGULAR_GROUP
Kojto	116:c0f6e94411f5	77	#define INJECTED_GROUP ADC_INJECTED_GROUP
Kojto	116:c0f6e94411f5	78	#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
Kojto	116:c0f6e94411f5	79	#define AWD_EVENT ADC_AWD_EVENT
Kojto	116:c0f6e94411f5	80	#define AWD1_EVENT ADC_AWD1_EVENT
Kojto	116:c0f6e94411f5	81	#define AWD2_EVENT ADC_AWD2_EVENT
Kojto	116:c0f6e94411f5	82	#define AWD3_EVENT ADC_AWD3_EVENT
Kojto	116:c0f6e94411f5	83	#define OVR_EVENT ADC_OVR_EVENT
Kojto	116:c0f6e94411f5	84	#define JQOVF_EVENT ADC_JQOVF_EVENT
Kojto	116:c0f6e94411f5	85	#define ALL_CHANNELS ADC_ALL_CHANNELS
Kojto	116:c0f6e94411f5	86	#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
Kojto	116:c0f6e94411f5	87	#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
Kojto	116:c0f6e94411f5	88	#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
Kojto	116:c0f6e94411f5	89	#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
Kojto	116:c0f6e94411f5	90	#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
Kojto	116:c0f6e94411f5	91	#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
Kojto	116:c0f6e94411f5	92	#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
Kojto	116:c0f6e94411f5	93	#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
Kojto	116:c0f6e94411f5	94	#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
Kojto	116:c0f6e94411f5	95	#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
Kojto	116:c0f6e94411f5	96	#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
Kojto	116:c0f6e94411f5	97	#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
Kojto	116:c0f6e94411f5	98	#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
Kojto	116:c0f6e94411f5	99	#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
Kojto	116:c0f6e94411f5	100	#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
Kojto	116:c0f6e94411f5	101	#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
Kojto	116:c0f6e94411f5	102	#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
Kojto	116:c0f6e94411f5	103	#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
Kojto	116:c0f6e94411f5	104	/**
Kojto	116:c0f6e94411f5	105	* @}
Kojto	116:c0f6e94411f5	106	*/
Kojto	116:c0f6e94411f5	107
Kojto	116:c0f6e94411f5	108	/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	109	* @{
Kojto	116:c0f6e94411f5	110	*/
Kojto	116:c0f6e94411f5	111
Kojto	116:c0f6e94411f5	112	#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
Kojto	116:c0f6e94411f5	113
Kojto	116:c0f6e94411f5	114	/**
Kojto	116:c0f6e94411f5	115	* @}
Kojto	116:c0f6e94411f5	116	*/
Kojto	116:c0f6e94411f5	117
Kojto	116:c0f6e94411f5	118	/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	119	* @{
Kojto	116:c0f6e94411f5	120	*/
Kojto	116:c0f6e94411f5	121
Kojto	116:c0f6e94411f5	122	#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
Kojto	116:c0f6e94411f5	123	#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
Kojto	116:c0f6e94411f5	124	#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
Kojto	116:c0f6e94411f5	125	#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
Kojto	116:c0f6e94411f5	126
Kojto	116:c0f6e94411f5	127	/**
Kojto	116:c0f6e94411f5	128	* @}
Kojto	116:c0f6e94411f5	129	*/
Kojto	116:c0f6e94411f5	130
Kojto	116:c0f6e94411f5	131	/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	132	* @{
Kojto	116:c0f6e94411f5	133	*/
Kojto	116:c0f6e94411f5	134
Kojto	116:c0f6e94411f5	135	#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
Kojto	116:c0f6e94411f5	136	#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
Kojto	116:c0f6e94411f5	137
Kojto	116:c0f6e94411f5	138	/**
Kojto	116:c0f6e94411f5	139	* @}
Kojto	116:c0f6e94411f5	140	*/
Kojto	116:c0f6e94411f5	141
Kojto	116:c0f6e94411f5	142	/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	143	* @{
Kojto	116:c0f6e94411f5	144	*/
Kojto	116:c0f6e94411f5	145
Kojto	116:c0f6e94411f5	146	#define DAC1_CHANNEL_1 DAC_CHANNEL_1
Kojto	116:c0f6e94411f5	147	#define DAC1_CHANNEL_2 DAC_CHANNEL_2
Kojto	116:c0f6e94411f5	148	#define DAC2_CHANNEL_1 DAC_CHANNEL_1
Kojto	116:c0f6e94411f5	149	#define DAC_WAVE_NONE ((uint32_t)0x00000000)
Kojto	116:c0f6e94411f5	150	#define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0)
Kojto	116:c0f6e94411f5	151	#define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1)
Kojto	116:c0f6e94411f5	152	#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
Kojto	116:c0f6e94411f5	153	#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
Kojto	116:c0f6e94411f5	154	#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
Kojto	116:c0f6e94411f5	155
Kojto	116:c0f6e94411f5	156	/**
Kojto	116:c0f6e94411f5	157	* @}
Kojto	116:c0f6e94411f5	158	*/
Kojto	116:c0f6e94411f5	159
Kojto	116:c0f6e94411f5	160
Kojto	116:c0f6e94411f5	161	/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	162	* @{
Kojto	116:c0f6e94411f5	163	*/
Kojto	116:c0f6e94411f5	164
Kojto	116:c0f6e94411f5	165	#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
Kojto	116:c0f6e94411f5	166	#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
Kojto	116:c0f6e94411f5	167	#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
Kojto	116:c0f6e94411f5	168	#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
Kojto	116:c0f6e94411f5	169	#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
Kojto	116:c0f6e94411f5	170	#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
Kojto	116:c0f6e94411f5	171	#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
Kojto	116:c0f6e94411f5	172	#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
Kojto	116:c0f6e94411f5	173	#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
Kojto	116:c0f6e94411f5	174	#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
Kojto	116:c0f6e94411f5	175	#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
Kojto	116:c0f6e94411f5	176	#define OBEX_PCROP OPTIONBYTE_PCROP
Kojto	116:c0f6e94411f5	177	#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
Kojto	116:c0f6e94411f5	178	#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
Kojto	116:c0f6e94411f5	179	#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
Kojto	116:c0f6e94411f5	180	#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
Kojto	116:c0f6e94411f5	181	#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
Kojto	116:c0f6e94411f5	182	#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
Kojto	116:c0f6e94411f5	183	#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
Kojto	116:c0f6e94411f5	184	#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
Kojto	116:c0f6e94411f5	185	#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
Kojto	116:c0f6e94411f5	186	#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
Kojto	116:c0f6e94411f5	187	#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
Kojto	116:c0f6e94411f5	188	#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
Kojto	116:c0f6e94411f5	189	#define PAGESIZE FLASH_PAGE_SIZE
Kojto	116:c0f6e94411f5	190	#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
Kojto	116:c0f6e94411f5	191	#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
Kojto	116:c0f6e94411f5	192	#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
Kojto	116:c0f6e94411f5	193	#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
Kojto	116:c0f6e94411f5	194	#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
Kojto	116:c0f6e94411f5	195	#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
Kojto	116:c0f6e94411f5	196	#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
Kojto	116:c0f6e94411f5	197	#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
Kojto	116:c0f6e94411f5	198	#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
Kojto	116:c0f6e94411f5	199	#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
Kojto	116:c0f6e94411f5	200	#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
Kojto	116:c0f6e94411f5	201	#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
Kojto	116:c0f6e94411f5	202	#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
Kojto	116:c0f6e94411f5	203	#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
Kojto	116:c0f6e94411f5	204	#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
Kojto	116:c0f6e94411f5	205	#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
Kojto	116:c0f6e94411f5	206	#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
Kojto	116:c0f6e94411f5	207	#define IS_NBSECTORS IS_FLASH_NBSECTORS
Kojto	116:c0f6e94411f5	208	#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
Kojto	116:c0f6e94411f5	209	#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
Kojto	116:c0f6e94411f5	210	#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
Kojto	116:c0f6e94411f5	211	#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
Kojto	116:c0f6e94411f5	212	#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
Kojto	116:c0f6e94411f5	213	#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
Kojto	116:c0f6e94411f5	214	#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
Kojto	116:c0f6e94411f5	215	#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
Kojto	116:c0f6e94411f5	216	#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
Kojto	116:c0f6e94411f5	217	#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
Kojto	116:c0f6e94411f5	218	#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
Kojto	116:c0f6e94411f5	219	#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
Kojto	116:c0f6e94411f5	220	#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
Kojto	116:c0f6e94411f5	221	#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
Kojto	116:c0f6e94411f5	222	#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
Kojto	116:c0f6e94411f5	223	#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
Kojto	116:c0f6e94411f5	224	#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
Kojto	116:c0f6e94411f5	225	#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
Kojto	116:c0f6e94411f5	226	#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
Kojto	116:c0f6e94411f5	227
Kojto	116:c0f6e94411f5	228	/**
Kojto	116:c0f6e94411f5	229	* @}
Kojto	116:c0f6e94411f5	230	*/
Kojto	116:c0f6e94411f5	231
Kojto	116:c0f6e94411f5	232	/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	233	* @{
Kojto	116:c0f6e94411f5	234	*/
Kojto	116:c0f6e94411f5	235
Kojto	116:c0f6e94411f5	236	#define SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
Kojto	116:c0f6e94411f5	237	#define SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
Kojto	116:c0f6e94411f5	238	#define SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
Kojto	116:c0f6e94411f5	239	#define SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
Kojto	116:c0f6e94411f5	240	#define SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
Kojto	116:c0f6e94411f5	241	#define SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
Kojto	116:c0f6e94411f5	242	#define SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
Kojto	116:c0f6e94411f5	243
Kojto	116:c0f6e94411f5	244	/**
Kojto	116:c0f6e94411f5	245	* @}
Kojto	116:c0f6e94411f5	246	*/
Kojto	116:c0f6e94411f5	247
Kojto	116:c0f6e94411f5	248
Kojto	116:c0f6e94411f5	249	/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	250	* @{
Kojto	116:c0f6e94411f5	251	*/
Kojto	116:c0f6e94411f5	252
Kojto	116:c0f6e94411f5	253	#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
Kojto	116:c0f6e94411f5	254	#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
Kojto	116:c0f6e94411f5	255	/**
Kojto	116:c0f6e94411f5	256	* @}
Kojto	116:c0f6e94411f5	257	*/
Kojto	116:c0f6e94411f5	258
Kojto	116:c0f6e94411f5	259	/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	260	* @{
Kojto	116:c0f6e94411f5	261	*/
Kojto	116:c0f6e94411f5	262	#define GET_GPIO_SOURCE GPIO_GET_INDEX
Kojto	116:c0f6e94411f5	263	#define GET_GPIO_INDEX GPIO_GET_INDEX
Kojto	116:c0f6e94411f5	264	/**
Kojto	116:c0f6e94411f5	265	* @}
Kojto	116:c0f6e94411f5	266	*/
Kojto	116:c0f6e94411f5	267
Kojto	116:c0f6e94411f5	268
Kojto	116:c0f6e94411f5	269	/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	270	* @{
Kojto	116:c0f6e94411f5	271	*/
Kojto	116:c0f6e94411f5	272	#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
Kojto	116:c0f6e94411f5	273	#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
Kojto	116:c0f6e94411f5	274	#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
Kojto	116:c0f6e94411f5	275	#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
Kojto	116:c0f6e94411f5	276	#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
Kojto	116:c0f6e94411f5	277	#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
Kojto	116:c0f6e94411f5	278	#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
Kojto	116:c0f6e94411f5	279	#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
Kojto	116:c0f6e94411f5	280	/**
Kojto	116:c0f6e94411f5	281	* @}
Kojto	116:c0f6e94411f5	282	*/
Kojto	116:c0f6e94411f5	283
Kojto	116:c0f6e94411f5	284	/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	285	* @{
Kojto	116:c0f6e94411f5	286	*/
Kojto	116:c0f6e94411f5	287	#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
Kojto	116:c0f6e94411f5	288	#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
Kojto	116:c0f6e94411f5	289
Kojto	116:c0f6e94411f5	290	/**
Kojto	116:c0f6e94411f5	291	* @}
Kojto	116:c0f6e94411f5	292	*/
Kojto	116:c0f6e94411f5	293
Kojto	116:c0f6e94411f5	294	/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	295	* @{
Kojto	116:c0f6e94411f5	296	*/
Kojto	116:c0f6e94411f5	297	#define KR_KEY_RELOAD IWDG_KEY_RELOAD
Kojto	116:c0f6e94411f5	298	#define KR_KEY_ENABLE IWDG_KEY_ENABLE
Kojto	116:c0f6e94411f5	299	#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
Kojto	116:c0f6e94411f5	300	#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
Kojto	116:c0f6e94411f5	301	/**
Kojto	116:c0f6e94411f5	302	* @}
Kojto	116:c0f6e94411f5	303	*/
Kojto	116:c0f6e94411f5	304
Kojto	116:c0f6e94411f5	305	/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	306	* @{
Kojto	116:c0f6e94411f5	307	*/
Kojto	116:c0f6e94411f5	308
Kojto	116:c0f6e94411f5	309	#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
Kojto	116:c0f6e94411f5	310	#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
Kojto	116:c0f6e94411f5	311	#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
Kojto	116:c0f6e94411f5	312	#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
Kojto	116:c0f6e94411f5	313
Kojto	116:c0f6e94411f5	314	#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
Kojto	116:c0f6e94411f5	315	#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
Kojto	116:c0f6e94411f5	316	#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
Kojto	116:c0f6e94411f5	317	/**
Kojto	116:c0f6e94411f5	318	* @}
Kojto	116:c0f6e94411f5	319	*/
Kojto	116:c0f6e94411f5	320
Kojto	116:c0f6e94411f5	321	/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	322	* @{
Kojto	116:c0f6e94411f5	323	*/
Kojto	116:c0f6e94411f5	324	#define NAND_AddressTypedef NAND_AddressTypeDef
Kojto	116:c0f6e94411f5	325
Kojto	116:c0f6e94411f5	326	/**
Kojto	116:c0f6e94411f5	327	* @}
Kojto	116:c0f6e94411f5	328	*/
Kojto	116:c0f6e94411f5	329
Kojto	116:c0f6e94411f5	330	/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	331	* @{
Kojto	116:c0f6e94411f5	332	*/
Kojto	116:c0f6e94411f5	333	#define NOR_StatusTypedef HAL_NOR_StatusTypeDef
Kojto	116:c0f6e94411f5	334	#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
Kojto	116:c0f6e94411f5	335	#define NOR_ONGOING HAL_NOR_STATUS_ONGOING
Kojto	116:c0f6e94411f5	336	#define NOR_ERROR HAL_NOR_STATUS_ERROR
Kojto	116:c0f6e94411f5	337	#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
Kojto	116:c0f6e94411f5	338
Kojto	116:c0f6e94411f5	339	/**
Kojto	116:c0f6e94411f5	340	* @}
Kojto	116:c0f6e94411f5	341	*/
Kojto	116:c0f6e94411f5	342
Kojto	116:c0f6e94411f5	343	/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	344	* @{
Kojto	116:c0f6e94411f5	345	*/
Kojto	116:c0f6e94411f5	346
Kojto	116:c0f6e94411f5	347	#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
Kojto	116:c0f6e94411f5	348	#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	349	#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
Kojto	116:c0f6e94411f5	350	#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
Kojto	116:c0f6e94411f5	351
Kojto	116:c0f6e94411f5	352	#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
Kojto	116:c0f6e94411f5	353	#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	354	#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
Kojto	116:c0f6e94411f5	355	#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
Kojto	116:c0f6e94411f5	356
Kojto	116:c0f6e94411f5	357	#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
Kojto	116:c0f6e94411f5	358	#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	359
Kojto	116:c0f6e94411f5	360	#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
Kojto	116:c0f6e94411f5	361	#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	362
Kojto	116:c0f6e94411f5	363	#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
Kojto	116:c0f6e94411f5	364	#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	365
Kojto	116:c0f6e94411f5	366	#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	367
Kojto	116:c0f6e94411f5	368	#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
Kojto	116:c0f6e94411f5	369	#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
Kojto	116:c0f6e94411f5	370	#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
Kojto	116:c0f6e94411f5	371
Kojto	116:c0f6e94411f5	372	/**
Kojto	116:c0f6e94411f5	373	* @}
Kojto	116:c0f6e94411f5	374	*/
Kojto	116:c0f6e94411f5	375
Kojto	116:c0f6e94411f5	376	/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	377	* @{
Kojto	116:c0f6e94411f5	378	*/
Kojto	116:c0f6e94411f5	379	#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
Kojto	116:c0f6e94411f5	380	/**
Kojto	116:c0f6e94411f5	381	* @}
Kojto	116:c0f6e94411f5	382	*/
Kojto	116:c0f6e94411f5	383
Kojto	116:c0f6e94411f5	384	/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	385	* @{
Kojto	116:c0f6e94411f5	386	*/
Kojto	116:c0f6e94411f5	387
Kojto	116:c0f6e94411f5	388	/* Compact Flash-ATA registers description */
Kojto	116:c0f6e94411f5	389	#define CF_DATA ATA_DATA
Kojto	116:c0f6e94411f5	390	#define CF_SECTOR_COUNT ATA_SECTOR_COUNT
Kojto	116:c0f6e94411f5	391	#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
Kojto	116:c0f6e94411f5	392	#define CF_CYLINDER_LOW ATA_CYLINDER_LOW
Kojto	116:c0f6e94411f5	393	#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
Kojto	116:c0f6e94411f5	394	#define CF_CARD_HEAD ATA_CARD_HEAD
Kojto	116:c0f6e94411f5	395	#define CF_STATUS_CMD ATA_STATUS_CMD
Kojto	116:c0f6e94411f5	396	#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
Kojto	116:c0f6e94411f5	397	#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
Kojto	116:c0f6e94411f5	398
Kojto	116:c0f6e94411f5	399	/* Compact Flash-ATA commands */
Kojto	116:c0f6e94411f5	400	#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
Kojto	116:c0f6e94411f5	401	#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
Kojto	116:c0f6e94411f5	402	#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
Kojto	116:c0f6e94411f5	403	#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
Kojto	116:c0f6e94411f5	404
Kojto	116:c0f6e94411f5	405	#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
Kojto	116:c0f6e94411f5	406	#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
Kojto	116:c0f6e94411f5	407	#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
Kojto	116:c0f6e94411f5	408	#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
Kojto	116:c0f6e94411f5	409	#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
Kojto	116:c0f6e94411f5	410	/**
Kojto	116:c0f6e94411f5	411	* @}
Kojto	116:c0f6e94411f5	412	*/
Kojto	116:c0f6e94411f5	413
Kojto	116:c0f6e94411f5	414	/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	415	* @{
Kojto	116:c0f6e94411f5	416	*/
Kojto	116:c0f6e94411f5	417
Kojto	116:c0f6e94411f5	418	#define FORMAT_BIN RTC_FORMAT_BIN
Kojto	116:c0f6e94411f5	419	#define FORMAT_BCD RTC_FORMAT_BCD
Kojto	116:c0f6e94411f5	420
Kojto	116:c0f6e94411f5	421	#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
Kojto	116:c0f6e94411f5	422	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
Kojto	116:c0f6e94411f5	423	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
Kojto	116:c0f6e94411f5	424	#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	116:c0f6e94411f5	425	#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	116:c0f6e94411f5	426
Kojto	116:c0f6e94411f5	427	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	116:c0f6e94411f5	428	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	116:c0f6e94411f5	429	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
Kojto	116:c0f6e94411f5	430	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
Kojto	116:c0f6e94411f5	431	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
Kojto	116:c0f6e94411f5	432	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
Kojto	116:c0f6e94411f5	433	#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
Kojto	116:c0f6e94411f5	434	#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
Kojto	116:c0f6e94411f5	435
Kojto	116:c0f6e94411f5	436	/**
Kojto	116:c0f6e94411f5	437	* @}
Kojto	116:c0f6e94411f5	438	*/
Kojto	116:c0f6e94411f5	439
Kojto	116:c0f6e94411f5	440
Kojto	116:c0f6e94411f5	441	/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	442	* @{
Kojto	116:c0f6e94411f5	443	*/
Kojto	116:c0f6e94411f5	444	#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
Kojto	116:c0f6e94411f5	445	#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
Kojto	116:c0f6e94411f5	446
Kojto	116:c0f6e94411f5	447	#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
Kojto	116:c0f6e94411f5	448	#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
Kojto	116:c0f6e94411f5	449	#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
Kojto	116:c0f6e94411f5	450	#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
Kojto	116:c0f6e94411f5	451
Kojto	116:c0f6e94411f5	452	#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
Kojto	116:c0f6e94411f5	453	#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
Kojto	116:c0f6e94411f5	454
Kojto	116:c0f6e94411f5	455	#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
Kojto	116:c0f6e94411f5	456	#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
Kojto	116:c0f6e94411f5	457	/**
Kojto	116:c0f6e94411f5	458	* @}
Kojto	116:c0f6e94411f5	459	*/
Kojto	116:c0f6e94411f5	460
Kojto	116:c0f6e94411f5	461
Kojto	116:c0f6e94411f5	462	/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	463	* @{
Kojto	116:c0f6e94411f5	464	*/
Kojto	116:c0f6e94411f5	465	#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
Kojto	116:c0f6e94411f5	466	#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
Kojto	116:c0f6e94411f5	467	#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
Kojto	116:c0f6e94411f5	468	#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
Kojto	116:c0f6e94411f5	469	#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
Kojto	116:c0f6e94411f5	470	#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
Kojto	116:c0f6e94411f5	471	#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
Kojto	116:c0f6e94411f5	472	#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
Kojto	116:c0f6e94411f5	473	#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
Kojto	116:c0f6e94411f5	474	/**
Kojto	116:c0f6e94411f5	475	* @}
Kojto	116:c0f6e94411f5	476	*/
Kojto	116:c0f6e94411f5	477
Kojto	116:c0f6e94411f5	478	/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	479	* @{
Kojto	116:c0f6e94411f5	480	*/
Kojto	116:c0f6e94411f5	481	#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
Kojto	116:c0f6e94411f5	482	#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
Kojto	116:c0f6e94411f5	483
Kojto	116:c0f6e94411f5	484	#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
Kojto	116:c0f6e94411f5	485	#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
Kojto	116:c0f6e94411f5	486
Kojto	116:c0f6e94411f5	487	#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
Kojto	116:c0f6e94411f5	488	#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
Kojto	116:c0f6e94411f5	489
Kojto	116:c0f6e94411f5	490	/**
Kojto	116:c0f6e94411f5	491	* @}
Kojto	116:c0f6e94411f5	492	*/
Kojto	116:c0f6e94411f5	493
Kojto	116:c0f6e94411f5	494	/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	495	* @{
Kojto	116:c0f6e94411f5	496	*/
Kojto	116:c0f6e94411f5	497	#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
Kojto	116:c0f6e94411f5	498	#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
Kojto	116:c0f6e94411f5	499
Kojto	116:c0f6e94411f5	500	#define TIM_DMABase_CR1 TIM_DMABASE_CR1
Kojto	116:c0f6e94411f5	501	#define TIM_DMABase_CR2 TIM_DMABASE_CR2
Kojto	116:c0f6e94411f5	502	#define TIM_DMABase_SMCR TIM_DMABASE_SMCR
Kojto	116:c0f6e94411f5	503	#define TIM_DMABase_DIER TIM_DMABASE_DIER
Kojto	116:c0f6e94411f5	504	#define TIM_DMABase_SR TIM_DMABASE_SR
Kojto	116:c0f6e94411f5	505	#define TIM_DMABase_EGR TIM_DMABASE_EGR
Kojto	116:c0f6e94411f5	506	#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
Kojto	116:c0f6e94411f5	507	#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
Kojto	116:c0f6e94411f5	508	#define TIM_DMABase_CCER TIM_DMABASE_CCER
Kojto	116:c0f6e94411f5	509	#define TIM_DMABase_CNT TIM_DMABASE_CNT
Kojto	116:c0f6e94411f5	510	#define TIM_DMABase_PSC TIM_DMABASE_PSC
Kojto	116:c0f6e94411f5	511	#define TIM_DMABase_ARR TIM_DMABASE_ARR
Kojto	116:c0f6e94411f5	512	#define TIM_DMABase_RCR TIM_DMABASE_RCR
Kojto	116:c0f6e94411f5	513	#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
Kojto	116:c0f6e94411f5	514	#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
Kojto	116:c0f6e94411f5	515	#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
Kojto	116:c0f6e94411f5	516	#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
Kojto	116:c0f6e94411f5	517	#define TIM_DMABase_BDTR TIM_DMABASE_BDTR
Kojto	116:c0f6e94411f5	518	#define TIM_DMABase_DCR TIM_DMABASE_DCR
Kojto	116:c0f6e94411f5	519	#define TIM_DMABase_DMAR TIM_DMABASE_DMAR
Kojto	116:c0f6e94411f5	520	#define TIM_DMABase_OR1 TIM_DMABASE_OR1
Kojto	116:c0f6e94411f5	521	#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
Kojto	116:c0f6e94411f5	522	#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
Kojto	116:c0f6e94411f5	523	#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
Kojto	116:c0f6e94411f5	524	#define TIM_DMABase_OR2 TIM_DMABASE_OR2
Kojto	116:c0f6e94411f5	525	#define TIM_DMABase_OR3 TIM_DMABASE_OR3
Kojto	116:c0f6e94411f5	526
Kojto	116:c0f6e94411f5	527	#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
Kojto	116:c0f6e94411f5	528	#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
Kojto	116:c0f6e94411f5	529	#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
Kojto	116:c0f6e94411f5	530	#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
Kojto	116:c0f6e94411f5	531	#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
Kojto	116:c0f6e94411f5	532	#define TIM_EventSource_COM TIM_EVENTSOURCE_COM
Kojto	116:c0f6e94411f5	533	#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
Kojto	116:c0f6e94411f5	534	#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
Kojto	116:c0f6e94411f5	535	#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
Kojto	116:c0f6e94411f5	536
Kojto	116:c0f6e94411f5	537	#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
Kojto	116:c0f6e94411f5	538	#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
Kojto	116:c0f6e94411f5	539	#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
Kojto	116:c0f6e94411f5	540	#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
Kojto	116:c0f6e94411f5	541	#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
Kojto	116:c0f6e94411f5	542	#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
Kojto	116:c0f6e94411f5	543	#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
Kojto	116:c0f6e94411f5	544	#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
Kojto	116:c0f6e94411f5	545	#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
Kojto	116:c0f6e94411f5	546	#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
Kojto	116:c0f6e94411f5	547	#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
Kojto	116:c0f6e94411f5	548	#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
Kojto	116:c0f6e94411f5	549	#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
Kojto	116:c0f6e94411f5	550	#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
Kojto	116:c0f6e94411f5	551	#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
Kojto	116:c0f6e94411f5	552	#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
Kojto	116:c0f6e94411f5	553	#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
Kojto	116:c0f6e94411f5	554	#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
Kojto	116:c0f6e94411f5	555
Kojto	116:c0f6e94411f5	556	/**
Kojto	116:c0f6e94411f5	557	* @}
Kojto	116:c0f6e94411f5	558	*/
Kojto	116:c0f6e94411f5	559
Kojto	116:c0f6e94411f5	560	/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	561	* @{
Kojto	116:c0f6e94411f5	562	*/
Kojto	116:c0f6e94411f5	563	#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
Kojto	116:c0f6e94411f5	564	#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
Kojto	116:c0f6e94411f5	565	#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
Kojto	116:c0f6e94411f5	566	#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
Kojto	116:c0f6e94411f5	567
Kojto	116:c0f6e94411f5	568	#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
Kojto	116:c0f6e94411f5	569	#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
Kojto	116:c0f6e94411f5	570
Kojto	116:c0f6e94411f5	571	#define __DIV_SAMPLING16 UART_DIV_SAMPLING16
Kojto	116:c0f6e94411f5	572	#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
Kojto	116:c0f6e94411f5	573	#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
Kojto	116:c0f6e94411f5	574	#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
Kojto	116:c0f6e94411f5	575
Kojto	116:c0f6e94411f5	576	#define __DIV_SAMPLING8 UART_DIV_SAMPLING8
Kojto	116:c0f6e94411f5	577	#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
Kojto	116:c0f6e94411f5	578	#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
Kojto	116:c0f6e94411f5	579	#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
Kojto	116:c0f6e94411f5	580
Kojto	116:c0f6e94411f5	581	#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
Kojto	116:c0f6e94411f5	582	#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
Kojto	116:c0f6e94411f5	583
Kojto	116:c0f6e94411f5	584	/**
Kojto	116:c0f6e94411f5	585	* @}
Kojto	116:c0f6e94411f5	586	*/
Kojto	116:c0f6e94411f5	587
Kojto	116:c0f6e94411f5	588
Kojto	116:c0f6e94411f5	589	/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	590	* @{
Kojto	116:c0f6e94411f5	591	*/
Kojto	116:c0f6e94411f5	592
Kojto	116:c0f6e94411f5	593	#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
Kojto	116:c0f6e94411f5	594	#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
Kojto	116:c0f6e94411f5	595
Kojto	116:c0f6e94411f5	596	#define USARTNACK_ENABLED USART_NACK_ENABLE
Kojto	116:c0f6e94411f5	597	#define USARTNACK_DISABLED USART_NACK_DISABLE
Kojto	116:c0f6e94411f5	598	/**
Kojto	116:c0f6e94411f5	599	* @}
Kojto	116:c0f6e94411f5	600	*/
Kojto	116:c0f6e94411f5	601
Kojto	116:c0f6e94411f5	602	/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	603	* @{
Kojto	116:c0f6e94411f5	604	*/
Kojto	116:c0f6e94411f5	605	#define CFR_BASE WWDG_CFR_BASE
Kojto	116:c0f6e94411f5	606
Kojto	116:c0f6e94411f5	607	/**
Kojto	116:c0f6e94411f5	608	* @}
Kojto	116:c0f6e94411f5	609	*/
Kojto	116:c0f6e94411f5	610
Kojto	116:c0f6e94411f5	611	/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	612	* @{
Kojto	116:c0f6e94411f5	613	*/
Kojto	116:c0f6e94411f5	614	#define CAN_FilterFIFO0 CAN_FILTER_FIFO0
Kojto	116:c0f6e94411f5	615	#define CAN_FilterFIFO1 CAN_FILTER_FIFO1
Kojto	116:c0f6e94411f5	616	#define CAN_IT_RQCP0 CAN_IT_TME
Kojto	116:c0f6e94411f5	617	#define CAN_IT_RQCP1 CAN_IT_TME
Kojto	116:c0f6e94411f5	618	#define CAN_IT_RQCP2 CAN_IT_TME
Kojto	116:c0f6e94411f5	619	#define INAK_TIMEOUT CAN_TIMEOUT_VALUE
Kojto	116:c0f6e94411f5	620	#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
Kojto	116:c0f6e94411f5	621	#define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
Kojto	116:c0f6e94411f5	622	#define CAN_TXSTATUS_OK ((uint8_t)0x01)
Kojto	116:c0f6e94411f5	623	#define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
Kojto	116:c0f6e94411f5	624
Kojto	116:c0f6e94411f5	625	/**
Kojto	116:c0f6e94411f5	626	* @}
Kojto	116:c0f6e94411f5	627	*/
Kojto	116:c0f6e94411f5	628
Kojto	116:c0f6e94411f5	629	/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	630	* @{
Kojto	116:c0f6e94411f5	631	*/
Kojto	116:c0f6e94411f5	632
Kojto	116:c0f6e94411f5	633	#define VLAN_TAG ETH_VLAN_TAG
Kojto	116:c0f6e94411f5	634	#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
Kojto	116:c0f6e94411f5	635	#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
Kojto	116:c0f6e94411f5	636	#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
Kojto	116:c0f6e94411f5	637	#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
Kojto	116:c0f6e94411f5	638	#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
Kojto	116:c0f6e94411f5	639	#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
Kojto	116:c0f6e94411f5	640	#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
Kojto	116:c0f6e94411f5	641
Kojto	116:c0f6e94411f5	642	#define ETH_MMCCR ((uint32_t)0x00000100)
Kojto	116:c0f6e94411f5	643	#define ETH_MMCRIR ((uint32_t)0x00000104)
Kojto	116:c0f6e94411f5	644	#define ETH_MMCTIR ((uint32_t)0x00000108)
Kojto	116:c0f6e94411f5	645	#define ETH_MMCRIMR ((uint32_t)0x0000010C)
Kojto	116:c0f6e94411f5	646	#define ETH_MMCTIMR ((uint32_t)0x00000110)
Kojto	116:c0f6e94411f5	647	#define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
Kojto	116:c0f6e94411f5	648	#define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
Kojto	116:c0f6e94411f5	649	#define ETH_MMCTGFCR ((uint32_t)0x00000168)
Kojto	116:c0f6e94411f5	650	#define ETH_MMCRFCECR ((uint32_t)0x00000194)
Kojto	116:c0f6e94411f5	651	#define ETH_MMCRFAECR ((uint32_t)0x00000198)
Kojto	116:c0f6e94411f5	652	#define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
Kojto	116:c0f6e94411f5	653
Kojto	116:c0f6e94411f5	654	/**
Kojto	116:c0f6e94411f5	655	* @}
Kojto	116:c0f6e94411f5	656	*/
Kojto	116:c0f6e94411f5	657
Kojto	116:c0f6e94411f5	658	/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
Kojto	116:c0f6e94411f5	659	* @{
Kojto	116:c0f6e94411f5	660	*/
Kojto	116:c0f6e94411f5	661
Kojto	116:c0f6e94411f5	662	/**
Kojto	116:c0f6e94411f5	663	* @}
Kojto	116:c0f6e94411f5	664	*/
Kojto	116:c0f6e94411f5	665
Kojto	116:c0f6e94411f5	666	/* Exported functions --------------------------------------------------------*/
Kojto	116:c0f6e94411f5	667
Kojto	116:c0f6e94411f5	668	/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	669	* @{
Kojto	116:c0f6e94411f5	670	*/
Kojto	116:c0f6e94411f5	671	#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
Kojto	116:c0f6e94411f5	672	/**
Kojto	116:c0f6e94411f5	673	* @}
Kojto	116:c0f6e94411f5	674	*/
Kojto	116:c0f6e94411f5	675
Kojto	116:c0f6e94411f5	676	/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	677	* @{
Kojto	116:c0f6e94411f5	678	*/
Kojto	116:c0f6e94411f5	679
Kojto	116:c0f6e94411f5	680	#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
Kojto	116:c0f6e94411f5	681	#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
Kojto	116:c0f6e94411f5	682	#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
Kojto	116:c0f6e94411f5	683	#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
Kojto	116:c0f6e94411f5	684
Kojto	116:c0f6e94411f5	685	/HASH Algorithm Selection/
Kojto	116:c0f6e94411f5	686
Kojto	116:c0f6e94411f5	687	#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
Kojto	116:c0f6e94411f5	688	#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
Kojto	116:c0f6e94411f5	689	#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
Kojto	116:c0f6e94411f5	690	#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
Kojto	116:c0f6e94411f5	691
Kojto	116:c0f6e94411f5	692	#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
Kojto	116:c0f6e94411f5	693	#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
Kojto	116:c0f6e94411f5	694
Kojto	116:c0f6e94411f5	695	#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
Kojto	116:c0f6e94411f5	696	#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
Kojto	116:c0f6e94411f5	697	/**
Kojto	116:c0f6e94411f5	698	* @}
Kojto	116:c0f6e94411f5	699	*/
Kojto	116:c0f6e94411f5	700
Kojto	116:c0f6e94411f5	701	/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	702	* @{
Kojto	116:c0f6e94411f5	703	*/
Kojto	116:c0f6e94411f5	704	#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
Kojto	116:c0f6e94411f5	705	#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
Kojto	116:c0f6e94411f5	706	#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
Kojto	116:c0f6e94411f5	707	#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
Kojto	116:c0f6e94411f5	708	#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
Kojto	116:c0f6e94411f5	709	#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
Kojto	116:c0f6e94411f5	710	#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
Kojto	116:c0f6e94411f5	711	#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
Kojto	116:c0f6e94411f5	712	#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
Kojto	116:c0f6e94411f5	713	#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
Kojto	116:c0f6e94411f5	714	#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
Kojto	116:c0f6e94411f5	715	#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
Kojto	116:c0f6e94411f5	716	/**
Kojto	116:c0f6e94411f5	717	* @}
Kojto	116:c0f6e94411f5	718	*/
Kojto	116:c0f6e94411f5	719
Kojto	116:c0f6e94411f5	720	/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	721	* @{
Kojto	116:c0f6e94411f5	722	*/
Kojto	116:c0f6e94411f5	723	#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
Kojto	116:c0f6e94411f5	724	#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
Kojto	116:c0f6e94411f5	725	#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
Kojto	116:c0f6e94411f5	726	#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
Kojto	116:c0f6e94411f5	727	#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
Kojto	116:c0f6e94411f5	728	#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
Kojto	116:c0f6e94411f5	729	#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
Kojto	116:c0f6e94411f5	730
Kojto	116:c0f6e94411f5	731	/**
Kojto	116:c0f6e94411f5	732	* @}
Kojto	116:c0f6e94411f5	733	*/
Kojto	116:c0f6e94411f5	734
Kojto	116:c0f6e94411f5	735	/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	736	* @{
Kojto	116:c0f6e94411f5	737	*/
Kojto	116:c0f6e94411f5	738	#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
Kojto	116:c0f6e94411f5	739	#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
Kojto	116:c0f6e94411f5	740
Kojto	116:c0f6e94411f5	741	#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
Kojto	116:c0f6e94411f5	742	/**
Kojto	116:c0f6e94411f5	743	* @}
Kojto	116:c0f6e94411f5	744	*/
Kojto	116:c0f6e94411f5	745
Kojto	116:c0f6e94411f5	746	/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
Kojto	116:c0f6e94411f5	747	* @{
Kojto	116:c0f6e94411f5	748	*/
Kojto	116:c0f6e94411f5	749	#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
Kojto	116:c0f6e94411f5	750	#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
Kojto	116:c0f6e94411f5	751	#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
Kojto	116:c0f6e94411f5	752	#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
Kojto	116:c0f6e94411f5	753	#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
Kojto	116:c0f6e94411f5	754	#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
Kojto	116:c0f6e94411f5	755	#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
Kojto	116:c0f6e94411f5	756	#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
Kojto	116:c0f6e94411f5	757	#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
Kojto	116:c0f6e94411f5	758	#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
Kojto	116:c0f6e94411f5	759	#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
Kojto	116:c0f6e94411f5	760	#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
Kojto	116:c0f6e94411f5	761	#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
Kojto	116:c0f6e94411f5	762	#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
Kojto	116:c0f6e94411f5	763	#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
Kojto	116:c0f6e94411f5	764	#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
Kojto	116:c0f6e94411f5	765
Kojto	116:c0f6e94411f5	766	#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
Kojto	116:c0f6e94411f5	767	#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
Kojto	116:c0f6e94411f5	768	#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
Kojto	116:c0f6e94411f5	769	#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
Kojto	116:c0f6e94411f5	770	#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
Kojto	116:c0f6e94411f5	771	#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
Kojto	116:c0f6e94411f5	772	#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
Kojto	116:c0f6e94411f5	773
Kojto	116:c0f6e94411f5	774	#define CR_OFFSET_BB PWR_CR_OFFSET_BB
Kojto	116:c0f6e94411f5	775	#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
Kojto	116:c0f6e94411f5	776
Kojto	116:c0f6e94411f5	777	#define DBP_BitNumber DBP_BIT_NUMBER
Kojto	116:c0f6e94411f5	778	#define PVDE_BitNumber PVDE_BIT_NUMBER
Kojto	116:c0f6e94411f5	779	#define PMODE_BitNumber PMODE_BIT_NUMBER
Kojto	116:c0f6e94411f5	780	#define EWUP_BitNumber EWUP_BIT_NUMBER
Kojto	116:c0f6e94411f5	781	#define FPDS_BitNumber FPDS_BIT_NUMBER
Kojto	116:c0f6e94411f5	782	#define ODEN_BitNumber ODEN_BIT_NUMBER
Kojto	116:c0f6e94411f5	783	#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
Kojto	116:c0f6e94411f5	784	#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
Kojto	116:c0f6e94411f5	785	#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
Kojto	116:c0f6e94411f5	786	#define BRE_BitNumber BRE_BIT_NUMBER
Kojto	116:c0f6e94411f5	787
Kojto	116:c0f6e94411f5	788	#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
Kojto	116:c0f6e94411f5	789
Kojto	116:c0f6e94411f5	790	/**
Kojto	116:c0f6e94411f5	791	* @}
Kojto	116:c0f6e94411f5	792	*/
Kojto	116:c0f6e94411f5	793
Kojto	116:c0f6e94411f5	794	/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	795	* @{
Kojto	116:c0f6e94411f5	796	*/
Kojto	116:c0f6e94411f5	797	#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
Kojto	116:c0f6e94411f5	798	#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
Kojto	116:c0f6e94411f5	799	#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
Kojto	116:c0f6e94411f5	800	/**
Kojto	116:c0f6e94411f5	801	* @}
Kojto	116:c0f6e94411f5	802	*/
Kojto	116:c0f6e94411f5	803
Kojto	116:c0f6e94411f5	804	/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	805	* @{
Kojto	116:c0f6e94411f5	806	*/
Kojto	116:c0f6e94411f5	807	#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
Kojto	116:c0f6e94411f5	808	/**
Kojto	116:c0f6e94411f5	809	* @}
Kojto	116:c0f6e94411f5	810	*/
Kojto	116:c0f6e94411f5	811
Kojto	116:c0f6e94411f5	812	/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	813	* @{
Kojto	116:c0f6e94411f5	814	*/
Kojto	116:c0f6e94411f5	815	#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
Kojto	116:c0f6e94411f5	816	#define HAL_TIM_DMAError TIM_DMAError
Kojto	116:c0f6e94411f5	817	#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
Kojto	116:c0f6e94411f5	818	#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
Kojto	116:c0f6e94411f5	819	/**
Kojto	116:c0f6e94411f5	820	* @}
Kojto	116:c0f6e94411f5	821	*/
Kojto	116:c0f6e94411f5	822
Kojto	116:c0f6e94411f5	823	/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	824	* @{
Kojto	116:c0f6e94411f5	825	*/
Kojto	116:c0f6e94411f5	826	#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
Kojto	116:c0f6e94411f5	827	/**
Kojto	116:c0f6e94411f5	828	* @}
Kojto	116:c0f6e94411f5	829	*/
Kojto	116:c0f6e94411f5	830
Kojto	116:c0f6e94411f5	831
Kojto	116:c0f6e94411f5	832	/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
Kojto	116:c0f6e94411f5	833	* @{
Kojto	116:c0f6e94411f5	834	*/
Kojto	116:c0f6e94411f5	835
Kojto	116:c0f6e94411f5	836	/**
Kojto	116:c0f6e94411f5	837	* @}
Kojto	116:c0f6e94411f5	838	*/
Kojto	116:c0f6e94411f5	839
Kojto	116:c0f6e94411f5	840	/* Exported macros ------------------------------------------------------------*/
Kojto	116:c0f6e94411f5	841
Kojto	116:c0f6e94411f5	842	/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	843	* @{
Kojto	116:c0f6e94411f5	844	*/
Kojto	116:c0f6e94411f5	845	#define AES_IT_CC CRYP_IT_CC
Kojto	116:c0f6e94411f5	846	#define AES_IT_ERR CRYP_IT_ERR
Kojto	116:c0f6e94411f5	847	#define AES_FLAG_CCF CRYP_FLAG_CCF
Kojto	116:c0f6e94411f5	848	/**
Kojto	116:c0f6e94411f5	849	* @}
Kojto	116:c0f6e94411f5	850	*/
Kojto	116:c0f6e94411f5	851
Kojto	116:c0f6e94411f5	852	/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	853	* @{
Kojto	116:c0f6e94411f5	854	*/
Kojto	116:c0f6e94411f5	855	#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
Kojto	116:c0f6e94411f5	856	#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
Kojto	116:c0f6e94411f5	857	#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
Kojto	116:c0f6e94411f5	858	#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
Kojto	116:c0f6e94411f5	859	#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
Kojto	116:c0f6e94411f5	860	#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
Kojto	116:c0f6e94411f5	861	#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
Kojto	116:c0f6e94411f5	862	#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
Kojto	116:c0f6e94411f5	863	#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
Kojto	116:c0f6e94411f5	864	#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
Kojto	116:c0f6e94411f5	865	#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
Kojto	116:c0f6e94411f5	866	#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
Kojto	116:c0f6e94411f5	867	#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
Kojto	116:c0f6e94411f5	868
Kojto	116:c0f6e94411f5	869	#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
Kojto	116:c0f6e94411f5	870	#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
Kojto	116:c0f6e94411f5	871	#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
Kojto	116:c0f6e94411f5	872	#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
Kojto	116:c0f6e94411f5	873	#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
Kojto	116:c0f6e94411f5	874
Kojto	116:c0f6e94411f5	875	/**
Kojto	116:c0f6e94411f5	876	* @}
Kojto	116:c0f6e94411f5	877	*/
Kojto	116:c0f6e94411f5	878
Kojto	116:c0f6e94411f5	879
Kojto	116:c0f6e94411f5	880	/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	881	* @{
Kojto	116:c0f6e94411f5	882	*/
Kojto	116:c0f6e94411f5	883	#define __ADC_ENABLE __HAL_ADC_ENABLE
Kojto	116:c0f6e94411f5	884	#define __ADC_DISABLE __HAL_ADC_DISABLE
Kojto	116:c0f6e94411f5	885	#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
Kojto	116:c0f6e94411f5	886	#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
Kojto	116:c0f6e94411f5	887	#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
Kojto	116:c0f6e94411f5	888	#define __ADC_IS_ENABLED ADC_IS_ENABLE
Kojto	116:c0f6e94411f5	889	#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
Kojto	116:c0f6e94411f5	890	#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
Kojto	116:c0f6e94411f5	891	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
Kojto	116:c0f6e94411f5	892	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
Kojto	116:c0f6e94411f5	893	#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
Kojto	116:c0f6e94411f5	894	#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
Kojto	116:c0f6e94411f5	895	#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
Kojto	116:c0f6e94411f5	896
Kojto	116:c0f6e94411f5	897	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
Kojto	116:c0f6e94411f5	898	#define __HAL_ADC_JSQR_RK ADC_JSQR_RK
Kojto	116:c0f6e94411f5	899	#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
Kojto	116:c0f6e94411f5	900	#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
Kojto	116:c0f6e94411f5	901	#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
Kojto	116:c0f6e94411f5	902	#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
Kojto	116:c0f6e94411f5	903	#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
Kojto	116:c0f6e94411f5	904	#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
Kojto	116:c0f6e94411f5	905	#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
Kojto	116:c0f6e94411f5	906	#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
Kojto	116:c0f6e94411f5	907	#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
Kojto	116:c0f6e94411f5	908	#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
Kojto	116:c0f6e94411f5	909	#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
Kojto	116:c0f6e94411f5	910	#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
Kojto	116:c0f6e94411f5	911	#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
Kojto	116:c0f6e94411f5	912	#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
Kojto	116:c0f6e94411f5	913	#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
Kojto	116:c0f6e94411f5	914	#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
Kojto	116:c0f6e94411f5	915	#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
Kojto	116:c0f6e94411f5	916	#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
Kojto	116:c0f6e94411f5	917
Kojto	116:c0f6e94411f5	918	#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
Kojto	116:c0f6e94411f5	919	#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
Kojto	116:c0f6e94411f5	920	#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
Kojto	116:c0f6e94411f5	921	#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
Kojto	116:c0f6e94411f5	922	#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
Kojto	116:c0f6e94411f5	923	#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
Kojto	116:c0f6e94411f5	924	#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
Kojto	116:c0f6e94411f5	925	#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
Kojto	116:c0f6e94411f5	926	#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
Kojto	116:c0f6e94411f5	927	#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
Kojto	116:c0f6e94411f5	928
Kojto	116:c0f6e94411f5	929	#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
Kojto	116:c0f6e94411f5	930	#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
Kojto	116:c0f6e94411f5	931	#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
Kojto	116:c0f6e94411f5	932	#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
Kojto	116:c0f6e94411f5	933	#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
Kojto	116:c0f6e94411f5	934	#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
Kojto	116:c0f6e94411f5	935	#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
Kojto	116:c0f6e94411f5	936	#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
Kojto	116:c0f6e94411f5	937
Kojto	116:c0f6e94411f5	938	#define __HAL_ADC_SQR1 ADC_SQR1
Kojto	116:c0f6e94411f5	939	#define __HAL_ADC_SMPR1 ADC_SMPR1
Kojto	116:c0f6e94411f5	940	#define __HAL_ADC_SMPR2 ADC_SMPR2
Kojto	116:c0f6e94411f5	941	#define __HAL_ADC_SQR3_RK ADC_SQR3_RK
Kojto	116:c0f6e94411f5	942	#define __HAL_ADC_SQR2_RK ADC_SQR2_RK
Kojto	116:c0f6e94411f5	943	#define __HAL_ADC_SQR1_RK ADC_SQR1_RK
Kojto	116:c0f6e94411f5	944	#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
Kojto	116:c0f6e94411f5	945	#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
Kojto	116:c0f6e94411f5	946	#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
Kojto	116:c0f6e94411f5	947	#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
Kojto	116:c0f6e94411f5	948	#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
Kojto	116:c0f6e94411f5	949	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
Kojto	116:c0f6e94411f5	950	#define __HAL_ADC_JSQR ADC_JSQR
Kojto	116:c0f6e94411f5	951
Kojto	116:c0f6e94411f5	952	#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
Kojto	116:c0f6e94411f5	953	#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
Kojto	116:c0f6e94411f5	954	#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
Kojto	116:c0f6e94411f5	955	#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
Kojto	116:c0f6e94411f5	956	#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
Kojto	116:c0f6e94411f5	957	#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
Kojto	116:c0f6e94411f5	958	#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
Kojto	116:c0f6e94411f5	959	#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
Kojto	116:c0f6e94411f5	960
Kojto	116:c0f6e94411f5	961	/**
Kojto	116:c0f6e94411f5	962	* @}
Kojto	116:c0f6e94411f5	963	*/
Kojto	116:c0f6e94411f5	964
Kojto	116:c0f6e94411f5	965	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	966	* @{
Kojto	116:c0f6e94411f5	967	*/
Kojto	116:c0f6e94411f5	968	#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
Kojto	116:c0f6e94411f5	969	#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
Kojto	116:c0f6e94411f5	970	#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
Kojto	116:c0f6e94411f5	971	#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
Kojto	116:c0f6e94411f5	972
Kojto	116:c0f6e94411f5	973	/**
Kojto	116:c0f6e94411f5	974	* @}
Kojto	116:c0f6e94411f5	975	*/
Kojto	116:c0f6e94411f5	976
Kojto	116:c0f6e94411f5	977	/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	978	* @{
Kojto	116:c0f6e94411f5	979	*/
Kojto	116:c0f6e94411f5	980	#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
Kojto	116:c0f6e94411f5	981	#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
Kojto	116:c0f6e94411f5	982	#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
Kojto	116:c0f6e94411f5	983	#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
Kojto	116:c0f6e94411f5	984	#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
Kojto	116:c0f6e94411f5	985	#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
Kojto	116:c0f6e94411f5	986	#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
Kojto	116:c0f6e94411f5	987	#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
Kojto	116:c0f6e94411f5	988	#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
Kojto	116:c0f6e94411f5	989	#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
Kojto	116:c0f6e94411f5	990	#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
Kojto	116:c0f6e94411f5	991	#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
Kojto	116:c0f6e94411f5	992	#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
Kojto	116:c0f6e94411f5	993	#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
Kojto	116:c0f6e94411f5	994	#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
Kojto	116:c0f6e94411f5	995	#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
Kojto	116:c0f6e94411f5	996
Kojto	116:c0f6e94411f5	997	#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
Kojto	116:c0f6e94411f5	998	#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
Kojto	116:c0f6e94411f5	999	#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
Kojto	116:c0f6e94411f5	1000	#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
Kojto	116:c0f6e94411f5	1001	#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
Kojto	116:c0f6e94411f5	1002	#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
Kojto	116:c0f6e94411f5	1003	#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
Kojto	116:c0f6e94411f5	1004	#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
Kojto	116:c0f6e94411f5	1005	#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
Kojto	116:c0f6e94411f5	1006	#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
Kojto	116:c0f6e94411f5	1007	#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
Kojto	116:c0f6e94411f5	1008	#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
Kojto	116:c0f6e94411f5	1009	#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
Kojto	116:c0f6e94411f5	1010	#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
Kojto	116:c0f6e94411f5	1011
Kojto	116:c0f6e94411f5	1012
Kojto	116:c0f6e94411f5	1013	#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
Kojto	116:c0f6e94411f5	1014	#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
Kojto	116:c0f6e94411f5	1015	#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
Kojto	116:c0f6e94411f5	1016	#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
Kojto	116:c0f6e94411f5	1017	#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
Kojto	116:c0f6e94411f5	1018	#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
Kojto	116:c0f6e94411f5	1019	#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
Kojto	116:c0f6e94411f5	1020	#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
Kojto	116:c0f6e94411f5	1021	#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
Kojto	116:c0f6e94411f5	1022	#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
Kojto	116:c0f6e94411f5	1023	#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
Kojto	116:c0f6e94411f5	1024	#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
Kojto	116:c0f6e94411f5	1025	#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
Kojto	116:c0f6e94411f5	1026	#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
Kojto	116:c0f6e94411f5	1027	#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
Kojto	116:c0f6e94411f5	1028	#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
Kojto	116:c0f6e94411f5	1029	#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
Kojto	116:c0f6e94411f5	1030	#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
Kojto	116:c0f6e94411f5	1031	#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
Kojto	116:c0f6e94411f5	1032	#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
Kojto	116:c0f6e94411f5	1033	#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
Kojto	116:c0f6e94411f5	1034	#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
Kojto	116:c0f6e94411f5	1035	#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
Kojto	116:c0f6e94411f5	1036	#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
Kojto	116:c0f6e94411f5	1037
Kojto	116:c0f6e94411f5	1038	/**
Kojto	116:c0f6e94411f5	1039	* @}
Kojto	116:c0f6e94411f5	1040	*/
Kojto	116:c0f6e94411f5	1041
Kojto	116:c0f6e94411f5	1042	/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1043	* @{
Kojto	116:c0f6e94411f5	1044	*/
Kojto	116:c0f6e94411f5	1045
Kojto	116:c0f6e94411f5	1046	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
Kojto	116:c0f6e94411f5	1047	__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
Kojto	116:c0f6e94411f5	1048	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
Kojto	116:c0f6e94411f5	1049	__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
Kojto	116:c0f6e94411f5	1050	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
Kojto	116:c0f6e94411f5	1051	__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
Kojto	116:c0f6e94411f5	1052	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
Kojto	116:c0f6e94411f5	1053	__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
Kojto	116:c0f6e94411f5	1054	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
Kojto	116:c0f6e94411f5	1055	__HAL_COMP_COMP2_EXTI_ENABLE_IT())
Kojto	116:c0f6e94411f5	1056	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
Kojto	116:c0f6e94411f5	1057	__HAL_COMP_COMP2_EXTI_DISABLE_IT())
Kojto	116:c0f6e94411f5	1058	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
Kojto	116:c0f6e94411f5	1059	__HAL_COMP_COMP2_EXTI_GET_FLAG())
Kojto	116:c0f6e94411f5	1060	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
Kojto	116:c0f6e94411f5	1061	__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
Kojto	116:c0f6e94411f5	1062	#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
Kojto	116:c0f6e94411f5	1063
Kojto	116:c0f6e94411f5	1064	/**
Kojto	116:c0f6e94411f5	1065	* @}
Kojto	116:c0f6e94411f5	1066	*/
Kojto	116:c0f6e94411f5	1067
Kojto	116:c0f6e94411f5	1068	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1069	* @{
Kojto	116:c0f6e94411f5	1070	*/
Kojto	116:c0f6e94411f5	1071
Kojto	116:c0f6e94411f5	1072	#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) \|\| \
Kojto	116:c0f6e94411f5	1073	((WAVE) == DAC_WAVE_NOISE)\|\| \
Kojto	116:c0f6e94411f5	1074	((WAVE) == DAC_WAVE_TRIANGLE))
Kojto	116:c0f6e94411f5	1075
Kojto	116:c0f6e94411f5	1076	/**
Kojto	116:c0f6e94411f5	1077	* @}
Kojto	116:c0f6e94411f5	1078	*/
Kojto	116:c0f6e94411f5	1079
Kojto	116:c0f6e94411f5	1080	/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1081	* @{
Kojto	116:c0f6e94411f5	1082	*/
Kojto	116:c0f6e94411f5	1083
Kojto	116:c0f6e94411f5	1084	#define IS_WRPAREA IS_OB_WRPAREA
Kojto	116:c0f6e94411f5	1085	#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
Kojto	116:c0f6e94411f5	1086	#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
Kojto	116:c0f6e94411f5	1087	#define IS_TYPEERASE IS_FLASH_TYPEERASE
Kojto	116:c0f6e94411f5	1088
Kojto	116:c0f6e94411f5	1089	/**
Kojto	116:c0f6e94411f5	1090	* @}
Kojto	116:c0f6e94411f5	1091	*/
Kojto	116:c0f6e94411f5	1092
Kojto	116:c0f6e94411f5	1093	/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1094	* @{
Kojto	116:c0f6e94411f5	1095	*/
Kojto	116:c0f6e94411f5	1096
Kojto	116:c0f6e94411f5	1097	#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
Kojto	116:c0f6e94411f5	1098	#define __HAL_I2C_GENERATE_START I2C_GENERATE_START
Kojto	116:c0f6e94411f5	1099	#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
Kojto	116:c0f6e94411f5	1100	#define __HAL_I2C_RISE_TIME I2C_RISE_TIME
Kojto	116:c0f6e94411f5	1101	#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
Kojto	116:c0f6e94411f5	1102	#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
Kojto	116:c0f6e94411f5	1103	#define __HAL_I2C_SPEED I2C_SPEED
Kojto	116:c0f6e94411f5	1104	#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
Kojto	116:c0f6e94411f5	1105	#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
Kojto	116:c0f6e94411f5	1106	#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
Kojto	116:c0f6e94411f5	1107	#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
Kojto	116:c0f6e94411f5	1108	#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
Kojto	116:c0f6e94411f5	1109	#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
Kojto	116:c0f6e94411f5	1110	#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
Kojto	116:c0f6e94411f5	1111	#define __HAL_I2C_FREQRANGE I2C_FREQRANGE
Kojto	116:c0f6e94411f5	1112	/**
Kojto	116:c0f6e94411f5	1113	* @}
Kojto	116:c0f6e94411f5	1114	*/
Kojto	116:c0f6e94411f5	1115
Kojto	116:c0f6e94411f5	1116	/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1117	* @{
Kojto	116:c0f6e94411f5	1118	*/
Kojto	116:c0f6e94411f5	1119
Kojto	116:c0f6e94411f5	1120	#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
Kojto	116:c0f6e94411f5	1121	#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
Kojto	116:c0f6e94411f5	1122
Kojto	116:c0f6e94411f5	1123	/**
Kojto	116:c0f6e94411f5	1124	* @}
Kojto	116:c0f6e94411f5	1125	*/
Kojto	116:c0f6e94411f5	1126
Kojto	116:c0f6e94411f5	1127	/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1128	* @{
Kojto	116:c0f6e94411f5	1129	*/
Kojto	116:c0f6e94411f5	1130
Kojto	116:c0f6e94411f5	1131	#define __IRDA_DISABLE __HAL_IRDA_DISABLE
Kojto	116:c0f6e94411f5	1132	#define __IRDA_ENABLE __HAL_IRDA_ENABLE
Kojto	116:c0f6e94411f5	1133
Kojto	116:c0f6e94411f5	1134	#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	1135	#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
Kojto	116:c0f6e94411f5	1136	#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	1137	#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
Kojto	116:c0f6e94411f5	1138
Kojto	116:c0f6e94411f5	1139	#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
Kojto	116:c0f6e94411f5	1140
Kojto	116:c0f6e94411f5	1141
Kojto	116:c0f6e94411f5	1142	/**
Kojto	116:c0f6e94411f5	1143	* @}
Kojto	116:c0f6e94411f5	1144	*/
Kojto	116:c0f6e94411f5	1145
Kojto	116:c0f6e94411f5	1146
Kojto	116:c0f6e94411f5	1147	/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1148	* @{
Kojto	116:c0f6e94411f5	1149	*/
Kojto	116:c0f6e94411f5	1150	#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
Kojto	116:c0f6e94411f5	1151	#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
Kojto	116:c0f6e94411f5	1152	/**
Kojto	116:c0f6e94411f5	1153	* @}
Kojto	116:c0f6e94411f5	1154	*/
Kojto	116:c0f6e94411f5	1155
Kojto	116:c0f6e94411f5	1156
Kojto	116:c0f6e94411f5	1157	/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1158	* @{
Kojto	116:c0f6e94411f5	1159	*/
Kojto	116:c0f6e94411f5	1160
Kojto	116:c0f6e94411f5	1161	#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
Kojto	116:c0f6e94411f5	1162	#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
Kojto	116:c0f6e94411f5	1163	#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
Kojto	116:c0f6e94411f5	1164
Kojto	116:c0f6e94411f5	1165	/**
Kojto	116:c0f6e94411f5	1166	* @}
Kojto	116:c0f6e94411f5	1167	*/
Kojto	116:c0f6e94411f5	1168
Kojto	116:c0f6e94411f5	1169
Kojto	116:c0f6e94411f5	1170	/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1171	* @{
Kojto	116:c0f6e94411f5	1172	*/
Kojto	116:c0f6e94411f5	1173	#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
Kojto	116:c0f6e94411f5	1174	#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
Kojto	116:c0f6e94411f5	1175	#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
Kojto	116:c0f6e94411f5	1176	#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
Kojto	116:c0f6e94411f5	1177	#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
Kojto	116:c0f6e94411f5	1178	#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
Kojto	116:c0f6e94411f5	1179	#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
Kojto	116:c0f6e94411f5	1180	#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
Kojto	116:c0f6e94411f5	1181	#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
Kojto	116:c0f6e94411f5	1182	#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
Kojto	116:c0f6e94411f5	1183	#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
Kojto	116:c0f6e94411f5	1184	#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
Kojto	116:c0f6e94411f5	1185	#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
Kojto	116:c0f6e94411f5	1186
Kojto	116:c0f6e94411f5	1187	/**
Kojto	116:c0f6e94411f5	1188	* @}
Kojto	116:c0f6e94411f5	1189	*/
Kojto	116:c0f6e94411f5	1190
Kojto	116:c0f6e94411f5	1191
Kojto	116:c0f6e94411f5	1192	/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1193	* @{
Kojto	116:c0f6e94411f5	1194	*/
Kojto	116:c0f6e94411f5	1195	#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
Kojto	116:c0f6e94411f5	1196	#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
Kojto	116:c0f6e94411f5	1197	#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1198	#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1199	#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	1200	#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	1201	#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
Kojto	116:c0f6e94411f5	1202	#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
Kojto	116:c0f6e94411f5	1203	#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
Kojto	116:c0f6e94411f5	1204	#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
Kojto	116:c0f6e94411f5	1205	#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
Kojto	116:c0f6e94411f5	1206	#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
Kojto	116:c0f6e94411f5	1207	#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
Kojto	116:c0f6e94411f5	1208	#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
Kojto	116:c0f6e94411f5	1209	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
Kojto	116:c0f6e94411f5	1210	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
Kojto	116:c0f6e94411f5	1211	#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
Kojto	116:c0f6e94411f5	1212	#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
Kojto	116:c0f6e94411f5	1213	#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
Kojto	116:c0f6e94411f5	1214	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1215	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1216	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	1217	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	1218	#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1219	#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	1220	#define __HAL_PWR_PVM_DISABLE() HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4()
Kojto	116:c0f6e94411f5	1221	#define __HAL_PWR_PVM_ENABLE() HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4()
Kojto	116:c0f6e94411f5	1222	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
Kojto	116:c0f6e94411f5	1223	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
Kojto	116:c0f6e94411f5	1224	#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
Kojto	116:c0f6e94411f5	1225	#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
Kojto	116:c0f6e94411f5	1226	#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1227	#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	1228	#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
Kojto	116:c0f6e94411f5	1229	#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
Kojto	116:c0f6e94411f5	1230
Kojto	116:c0f6e94411f5	1231	#if defined (STM32F4)
Kojto	116:c0f6e94411f5	1232	#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
Kojto	116:c0f6e94411f5	1233	#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
Kojto	116:c0f6e94411f5	1234	#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
Kojto	116:c0f6e94411f5	1235	#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
Kojto	116:c0f6e94411f5	1236	#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
Kojto	116:c0f6e94411f5	1237	#else
Kojto	116:c0f6e94411f5	1238	#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
Kojto	116:c0f6e94411f5	1239	#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
Kojto	116:c0f6e94411f5	1240	#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
Kojto	116:c0f6e94411f5	1241	#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
Kojto	116:c0f6e94411f5	1242	#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
Kojto	116:c0f6e94411f5	1243	#endif /* STM32F4 */
Kojto	116:c0f6e94411f5	1244	/**
Kojto	116:c0f6e94411f5	1245	* @}
Kojto	116:c0f6e94411f5	1246	*/
Kojto	116:c0f6e94411f5	1247
Kojto	116:c0f6e94411f5	1248
Kojto	116:c0f6e94411f5	1249	/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
Kojto	116:c0f6e94411f5	1250	* @{
Kojto	116:c0f6e94411f5	1251	*/
Kojto	116:c0f6e94411f5	1252
Kojto	116:c0f6e94411f5	1253	#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
Kojto	116:c0f6e94411f5	1254	#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
Kojto	116:c0f6e94411f5	1255
Kojto	116:c0f6e94411f5	1256	#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
Kojto	116:c0f6e94411f5	1257	#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
Kojto	116:c0f6e94411f5	1258
Kojto	116:c0f6e94411f5	1259	#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1260	#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1261	#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1262	#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1263	#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
Kojto	116:c0f6e94411f5	1264	#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1265	#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1266	#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1267	#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
Kojto	116:c0f6e94411f5	1268	#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1269	#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1270	#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1271	#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1272	#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1273	#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
Kojto	116:c0f6e94411f5	1274	#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1275	#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
Kojto	116:c0f6e94411f5	1276	#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
Kojto	116:c0f6e94411f5	1277	#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
Kojto	116:c0f6e94411f5	1278	#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
Kojto	116:c0f6e94411f5	1279	#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
Kojto	116:c0f6e94411f5	1280	#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
Kojto	116:c0f6e94411f5	1281	#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1282	#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1283	#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
Kojto	116:c0f6e94411f5	1284	#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
Kojto	116:c0f6e94411f5	1285	#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1286	#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1287	#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
Kojto	116:c0f6e94411f5	1288	#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
Kojto	116:c0f6e94411f5	1289	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
Kojto	116:c0f6e94411f5	1290	#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
Kojto	116:c0f6e94411f5	1291	#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
Kojto	116:c0f6e94411f5	1292	#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
Kojto	116:c0f6e94411f5	1293	#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
Kojto	116:c0f6e94411f5	1294	#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
Kojto	116:c0f6e94411f5	1295	#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
Kojto	116:c0f6e94411f5	1296	#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
Kojto	116:c0f6e94411f5	1297	#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
Kojto	116:c0f6e94411f5	1298	#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1299	#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
Kojto	116:c0f6e94411f5	1300	#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1301	#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
Kojto	116:c0f6e94411f5	1302	#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
Kojto	116:c0f6e94411f5	1303	#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
Kojto	116:c0f6e94411f5	1304	#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1305	#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
Kojto	116:c0f6e94411f5	1306	#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1307	#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
Kojto	116:c0f6e94411f5	1308	#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
Kojto	116:c0f6e94411f5	1309	#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
Kojto	116:c0f6e94411f5	1310	#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
Kojto	116:c0f6e94411f5	1311	#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1312	#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1313	#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1314	#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1315	#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
Kojto	116:c0f6e94411f5	1316	#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1317	#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1318	#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1319	#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
Kojto	116:c0f6e94411f5	1320	#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1321	#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1322	#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1323	#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
Kojto	116:c0f6e94411f5	1324	#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
Kojto	116:c0f6e94411f5	1325	#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
Kojto	116:c0f6e94411f5	1326	#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
Kojto	116:c0f6e94411f5	1327	#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1328	#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1329	#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
Kojto	116:c0f6e94411f5	1330	#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1331	#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1332	#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1333	#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1334	#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1335	#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
Kojto	116:c0f6e94411f5	1336	#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1337	#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1338	#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1339	#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
Kojto	116:c0f6e94411f5	1340	#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1341	#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1342	#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1343	#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1344	#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1345	#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
Kojto	116:c0f6e94411f5	1346	#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1347	#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
Kojto	116:c0f6e94411f5	1348	#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
Kojto	116:c0f6e94411f5	1349	#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1350	#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1351	#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
Kojto	116:c0f6e94411f5	1352	#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
Kojto	116:c0f6e94411f5	1353	#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1354	#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1355	#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1356	#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1357	#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
Kojto	116:c0f6e94411f5	1358	#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1359	#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1360	#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1361	#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1362	#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1363	#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
Kojto	116:c0f6e94411f5	1364	#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1365	#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1366	#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1367	#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
Kojto	116:c0f6e94411f5	1368	#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1369	#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
Kojto	116:c0f6e94411f5	1370	#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
Kojto	116:c0f6e94411f5	1371	#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
Kojto	116:c0f6e94411f5	1372	#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
Kojto	116:c0f6e94411f5	1373	#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
Kojto	116:c0f6e94411f5	1374	#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
Kojto	116:c0f6e94411f5	1375	#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
Kojto	116:c0f6e94411f5	1376	#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
Kojto	116:c0f6e94411f5	1377	#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1378	#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1379	#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
Kojto	116:c0f6e94411f5	1380	#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
Kojto	116:c0f6e94411f5	1381	#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
Kojto	116:c0f6e94411f5	1382	#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
Kojto	116:c0f6e94411f5	1383	#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
Kojto	116:c0f6e94411f5	1384	#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
Kojto	116:c0f6e94411f5	1385	#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1386	#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1387	#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1388	#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1389	#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1390	#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1391	#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
Kojto	116:c0f6e94411f5	1392	#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1393	#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1394	#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1395	#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
Kojto	116:c0f6e94411f5	1396	#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
Kojto	116:c0f6e94411f5	1397	#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1398	#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1399	#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
Kojto	116:c0f6e94411f5	1400	#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
Kojto	116:c0f6e94411f5	1401	#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
Kojto	116:c0f6e94411f5	1402	#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
Kojto	116:c0f6e94411f5	1403	#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1404	#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1405	#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
Kojto	116:c0f6e94411f5	1406	#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
Kojto	116:c0f6e94411f5	1407	#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1408	#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1409	#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1410	#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1411	#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
Kojto	116:c0f6e94411f5	1412	#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1413	#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
Kojto	116:c0f6e94411f5	1414	#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
Kojto	116:c0f6e94411f5	1415	#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1416	#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1417	#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
Kojto	116:c0f6e94411f5	1418	#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
Kojto	116:c0f6e94411f5	1419	#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
Kojto	116:c0f6e94411f5	1420	#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
Kojto	116:c0f6e94411f5	1421	#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1422	#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1423	#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
Kojto	116:c0f6e94411f5	1424	#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
Kojto	116:c0f6e94411f5	1425	#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
Kojto	116:c0f6e94411f5	1426	#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
Kojto	116:c0f6e94411f5	1427	#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1428	#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1429	#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
Kojto	116:c0f6e94411f5	1430	#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
Kojto	116:c0f6e94411f5	1431	#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
Kojto	116:c0f6e94411f5	1432	#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
Kojto	116:c0f6e94411f5	1433	#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1434	#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1435	#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
Kojto	116:c0f6e94411f5	1436	#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
Kojto	116:c0f6e94411f5	1437	#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
Kojto	116:c0f6e94411f5	1438	#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
Kojto	116:c0f6e94411f5	1439	#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1440	#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1441	#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
Kojto	116:c0f6e94411f5	1442	#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
Kojto	116:c0f6e94411f5	1443	#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1444	#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1445	#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1446	#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1447	#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
Kojto	116:c0f6e94411f5	1448	#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1449	#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1450	#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1451	#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1452	#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1453	#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
Kojto	116:c0f6e94411f5	1454	#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1455	#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
Kojto	116:c0f6e94411f5	1456	#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
Kojto	116:c0f6e94411f5	1457	#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1458	#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1459	#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
Kojto	116:c0f6e94411f5	1460	#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
Kojto	116:c0f6e94411f5	1461	#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
Kojto	116:c0f6e94411f5	1462	#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
Kojto	116:c0f6e94411f5	1463	#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1464	#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1465	#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
Kojto	116:c0f6e94411f5	1466	#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
Kojto	116:c0f6e94411f5	1467	#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1468	#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1469	#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1470	#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1471	#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
Kojto	116:c0f6e94411f5	1472	#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1473	#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1474	#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1475	#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1476	#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1477	#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
Kojto	116:c0f6e94411f5	1478	#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1479	#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1480	#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1481	#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1482	#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1483	#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
Kojto	116:c0f6e94411f5	1484	#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1485	#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
Kojto	116:c0f6e94411f5	1486	#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
Kojto	116:c0f6e94411f5	1487	#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1488	#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1489	#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
Kojto	116:c0f6e94411f5	1490	#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
Kojto	116:c0f6e94411f5	1491	#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
Kojto	116:c0f6e94411f5	1492	#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
Kojto	116:c0f6e94411f5	1493	#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1494	#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1495	#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
Kojto	116:c0f6e94411f5	1496	#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
Kojto	116:c0f6e94411f5	1497	#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
Kojto	116:c0f6e94411f5	1498	#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
Kojto	116:c0f6e94411f5	1499	#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1500	#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1501	#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
Kojto	116:c0f6e94411f5	1502	#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
Kojto	116:c0f6e94411f5	1503	#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
Kojto	116:c0f6e94411f5	1504	#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
Kojto	116:c0f6e94411f5	1505	#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1506	#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1507	#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
Kojto	116:c0f6e94411f5	1508	#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
Kojto	116:c0f6e94411f5	1509	#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
Kojto	116:c0f6e94411f5	1510	#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
Kojto	116:c0f6e94411f5	1511	#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1512	#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1513	#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
Kojto	116:c0f6e94411f5	1514	#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
Kojto	116:c0f6e94411f5	1515	#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1516	#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1517	#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1518	#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1519	#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
Kojto	116:c0f6e94411f5	1520	#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1521	#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1522	#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1523	#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1524	#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1525	#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
Kojto	116:c0f6e94411f5	1526	#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1527	#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
Kojto	116:c0f6e94411f5	1528	#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
Kojto	116:c0f6e94411f5	1529	#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1530	#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1531	#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1532	#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1533	#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
Kojto	116:c0f6e94411f5	1534	#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1535	#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1536	#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1537	#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1538	#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1539	#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
Kojto	116:c0f6e94411f5	1540	#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1541	#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1542	#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1543	#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1544	#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1545	#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
Kojto	116:c0f6e94411f5	1546	#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1547	#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
Kojto	116:c0f6e94411f5	1548	#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
Kojto	116:c0f6e94411f5	1549	#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1550	#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1551	#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
Kojto	116:c0f6e94411f5	1552	#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
Kojto	116:c0f6e94411f5	1553	#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
Kojto	116:c0f6e94411f5	1554	#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
Kojto	116:c0f6e94411f5	1555	#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1556	#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1557	#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1558	#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1559	#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1560	#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1561	#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1562	#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1563	#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
Kojto	116:c0f6e94411f5	1564	#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1565	#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
Kojto	116:c0f6e94411f5	1566	#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
Kojto	116:c0f6e94411f5	1567	#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1568	#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1569	#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
Kojto	116:c0f6e94411f5	1570	#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
Kojto	116:c0f6e94411f5	1571	#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1572	#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1573	#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1574	#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1575	#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
Kojto	116:c0f6e94411f5	1576	#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1577	#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
Kojto	116:c0f6e94411f5	1578	#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
Kojto	116:c0f6e94411f5	1579	#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
Kojto	116:c0f6e94411f5	1580	#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
Kojto	116:c0f6e94411f5	1581	#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
Kojto	116:c0f6e94411f5	1582	#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
Kojto	116:c0f6e94411f5	1583	#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
Kojto	116:c0f6e94411f5	1584	#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
Kojto	116:c0f6e94411f5	1585	#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
Kojto	116:c0f6e94411f5	1586	#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
Kojto	116:c0f6e94411f5	1587	#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
Kojto	116:c0f6e94411f5	1588	#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
Kojto	116:c0f6e94411f5	1589	#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
Kojto	116:c0f6e94411f5	1590	#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
Kojto	116:c0f6e94411f5	1591	#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
Kojto	116:c0f6e94411f5	1592	#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
Kojto	116:c0f6e94411f5	1593	#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
Kojto	116:c0f6e94411f5	1594	#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
Kojto	116:c0f6e94411f5	1595	#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
Kojto	116:c0f6e94411f5	1596	#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
Kojto	116:c0f6e94411f5	1597	#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
Kojto	116:c0f6e94411f5	1598	#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
Kojto	116:c0f6e94411f5	1599	#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1600	#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1601	#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
Kojto	116:c0f6e94411f5	1602	#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
Kojto	116:c0f6e94411f5	1603	#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
Kojto	116:c0f6e94411f5	1604	#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
Kojto	116:c0f6e94411f5	1605	#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1606	#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1607	#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
Kojto	116:c0f6e94411f5	1608	#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
Kojto	116:c0f6e94411f5	1609	#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
Kojto	116:c0f6e94411f5	1610	#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
Kojto	116:c0f6e94411f5	1611	#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1612	#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1613	#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
Kojto	116:c0f6e94411f5	1614	#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
Kojto	116:c0f6e94411f5	1615	#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1616	#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1617	#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1618	#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1619	#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
Kojto	116:c0f6e94411f5	1620	#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1621	#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
Kojto	116:c0f6e94411f5	1622	#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
Kojto	116:c0f6e94411f5	1623	#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1624	#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1625	#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
Kojto	116:c0f6e94411f5	1626	#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
Kojto	116:c0f6e94411f5	1627	#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
Kojto	116:c0f6e94411f5	1628	#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
Kojto	116:c0f6e94411f5	1629	#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1630	#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1631	#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
Kojto	116:c0f6e94411f5	1632	#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
Kojto	116:c0f6e94411f5	1633	#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
Kojto	116:c0f6e94411f5	1634	#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
Kojto	116:c0f6e94411f5	1635	#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1636	#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1637	#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
Kojto	116:c0f6e94411f5	1638	#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
Kojto	116:c0f6e94411f5	1639	#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
Kojto	116:c0f6e94411f5	1640	#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
Kojto	116:c0f6e94411f5	1641	#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1642	#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1643	#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
Kojto	116:c0f6e94411f5	1644	#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
Kojto	116:c0f6e94411f5	1645	#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
Kojto	116:c0f6e94411f5	1646	#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
Kojto	116:c0f6e94411f5	1647	#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1648	#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1649	#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
Kojto	116:c0f6e94411f5	1650	#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
Kojto	116:c0f6e94411f5	1651	#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
Kojto	116:c0f6e94411f5	1652	#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
Kojto	116:c0f6e94411f5	1653	#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1654	#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1655	#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
Kojto	116:c0f6e94411f5	1656	#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
Kojto	116:c0f6e94411f5	1657	#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
Kojto	116:c0f6e94411f5	1658	#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
Kojto	116:c0f6e94411f5	1659	#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
Kojto	116:c0f6e94411f5	1660	#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
Kojto	116:c0f6e94411f5	1661	#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1662	#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1663	#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1664	#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1665	#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
Kojto	116:c0f6e94411f5	1666	#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1667	#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
Kojto	116:c0f6e94411f5	1668	#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
Kojto	116:c0f6e94411f5	1669	#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1670	#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1671	#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
Kojto	116:c0f6e94411f5	1672	#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
Kojto	116:c0f6e94411f5	1673	#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
Kojto	116:c0f6e94411f5	1674	#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
Kojto	116:c0f6e94411f5	1675	#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1676	#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1677	#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
Kojto	116:c0f6e94411f5	1678	#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
Kojto	116:c0f6e94411f5	1679	#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
Kojto	116:c0f6e94411f5	1680	#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
Kojto	116:c0f6e94411f5	1681	#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1682	#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1683	#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
Kojto	116:c0f6e94411f5	1684	#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
Kojto	116:c0f6e94411f5	1685	#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
Kojto	116:c0f6e94411f5	1686	#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
Kojto	116:c0f6e94411f5	1687	#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1688	#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1689	#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
Kojto	116:c0f6e94411f5	1690	#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
Kojto	116:c0f6e94411f5	1691	#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
Kojto	116:c0f6e94411f5	1692	#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
Kojto	116:c0f6e94411f5	1693	#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1694	#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1695	#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
Kojto	116:c0f6e94411f5	1696	#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
Kojto	116:c0f6e94411f5	1697	#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
Kojto	116:c0f6e94411f5	1698	#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
Kojto	116:c0f6e94411f5	1699	#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
Kojto	116:c0f6e94411f5	1700	#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1701	#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1702	#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
Kojto	116:c0f6e94411f5	1703	#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
Kojto	116:c0f6e94411f5	1704	#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
Kojto	116:c0f6e94411f5	1705	#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
Kojto	116:c0f6e94411f5	1706	#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
Kojto	116:c0f6e94411f5	1707	#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1708	#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1709	#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
Kojto	116:c0f6e94411f5	1710	#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
Kojto	116:c0f6e94411f5	1711	#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
Kojto	116:c0f6e94411f5	1712	#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
Kojto	116:c0f6e94411f5	1713	#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
Kojto	116:c0f6e94411f5	1714	#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
Kojto	116:c0f6e94411f5	1715	#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1716	#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1717	#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
Kojto	116:c0f6e94411f5	1718	#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
Kojto	116:c0f6e94411f5	1719	#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
Kojto	116:c0f6e94411f5	1720	#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
Kojto	116:c0f6e94411f5	1721	#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1722	#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1723	#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
Kojto	116:c0f6e94411f5	1724	#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
Kojto	116:c0f6e94411f5	1725	#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1726	#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1727	#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
Kojto	116:c0f6e94411f5	1728	#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
Kojto	116:c0f6e94411f5	1729	#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
Kojto	116:c0f6e94411f5	1730	#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
Kojto	116:c0f6e94411f5	1731
Kojto	116:c0f6e94411f5	1732	#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
Kojto	116:c0f6e94411f5	1733	#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
Kojto	116:c0f6e94411f5	1734	#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1735	#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1736	#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
Kojto	116:c0f6e94411f5	1737	#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
Kojto	116:c0f6e94411f5	1738	#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
Kojto	116:c0f6e94411f5	1739	#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
Kojto	116:c0f6e94411f5	1740	#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1741	#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1742	#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1743	#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1744	#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1745	#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1746	#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1747	#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1748	#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
Kojto	116:c0f6e94411f5	1749	#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
Kojto	116:c0f6e94411f5	1750	#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
Kojto	116:c0f6e94411f5	1751	#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
Kojto	116:c0f6e94411f5	1752	#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
Kojto	116:c0f6e94411f5	1753	#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1754	#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1755	#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
Kojto	116:c0f6e94411f5	1756	#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
Kojto	116:c0f6e94411f5	1757	#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
Kojto	116:c0f6e94411f5	1758	#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
Kojto	116:c0f6e94411f5	1759	#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
Kojto	116:c0f6e94411f5	1760	#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1761	#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1762	#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
Kojto	116:c0f6e94411f5	1763	#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
Kojto	116:c0f6e94411f5	1764	#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
Kojto	116:c0f6e94411f5	1765	#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
Kojto	116:c0f6e94411f5	1766	#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1767	#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1768	#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
Kojto	116:c0f6e94411f5	1769	#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
Kojto	116:c0f6e94411f5	1770	#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
Kojto	116:c0f6e94411f5	1771	#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1772	#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1773	#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1774	#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1775	#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1776	#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1777	#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1778	#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1779	#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1780	#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1781	#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1782	#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1783	#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1784	#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1785	#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
Kojto	116:c0f6e94411f5	1786	#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
Kojto	116:c0f6e94411f5	1787	#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1788	#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1789	#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
Kojto	116:c0f6e94411f5	1790	#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
Kojto	116:c0f6e94411f5	1791	#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
Kojto	116:c0f6e94411f5	1792	#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
Kojto	116:c0f6e94411f5	1793	#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
Kojto	116:c0f6e94411f5	1794	#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
Kojto	116:c0f6e94411f5	1795	#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1796	#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1797	#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
Kojto	116:c0f6e94411f5	1798	#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
Kojto	116:c0f6e94411f5	1799	#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
Kojto	116:c0f6e94411f5	1800	#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
Kojto	116:c0f6e94411f5	1801	#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1802	#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1803	#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
Kojto	116:c0f6e94411f5	1804	#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
Kojto	116:c0f6e94411f5	1805	#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
Kojto	116:c0f6e94411f5	1806	#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
Kojto	116:c0f6e94411f5	1807	#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1808	#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1809	#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
Kojto	116:c0f6e94411f5	1810	#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
Kojto	116:c0f6e94411f5	1811	#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
Kojto	116:c0f6e94411f5	1812	#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
Kojto	116:c0f6e94411f5	1813	#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1814	#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1815	#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
Kojto	116:c0f6e94411f5	1816	#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
Kojto	116:c0f6e94411f5	1817	#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
Kojto	116:c0f6e94411f5	1818	#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1819	#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1820	#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
Kojto	116:c0f6e94411f5	1821	#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
Kojto	116:c0f6e94411f5	1822	#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
Kojto	116:c0f6e94411f5	1823	#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
Kojto	116:c0f6e94411f5	1824	#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
Kojto	116:c0f6e94411f5	1825	#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
Kojto	116:c0f6e94411f5	1826	#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1827	#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1828	#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
Kojto	116:c0f6e94411f5	1829	#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
Kojto	116:c0f6e94411f5	1830	#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
Kojto	116:c0f6e94411f5	1831	#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
Kojto	116:c0f6e94411f5	1832	#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1833	#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1834	#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
Kojto	116:c0f6e94411f5	1835	#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
Kojto	116:c0f6e94411f5	1836	#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
Kojto	116:c0f6e94411f5	1837	#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
Kojto	116:c0f6e94411f5	1838	#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1839	#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1840	#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1841	#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1842	#define __OTGHS_FORCE_RESET __HAL_RCC_OTGHS_FORCE_RESET
Kojto	116:c0f6e94411f5	1843	#define __OTGHS_RELEASE_RESET __HAL_RCC_OTGHS_RELEASE_RESET
Kojto	116:c0f6e94411f5	1844	#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1845	#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1846	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
Kojto	116:c0f6e94411f5	1847	#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1848	#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1849	#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1850	#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1851	#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1852	#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1853	#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1854	#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1855	#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1856	#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
Kojto	116:c0f6e94411f5	1857	#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
Kojto	116:c0f6e94411f5	1858	#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1859	#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1860	#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
Kojto	116:c0f6e94411f5	1861	#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
Kojto	116:c0f6e94411f5	1862	#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1863	#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1864	#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
Kojto	116:c0f6e94411f5	1865	#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
Kojto	116:c0f6e94411f5	1866	#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
Kojto	116:c0f6e94411f5	1867	#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
Kojto	116:c0f6e94411f5	1868	#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
Kojto	116:c0f6e94411f5	1869	#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
Kojto	116:c0f6e94411f5	1870
Kojto	116:c0f6e94411f5	1871	/* alias define maintained for legacy */
Kojto	116:c0f6e94411f5	1872	#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
Kojto	116:c0f6e94411f5	1873	#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
Kojto	116:c0f6e94411f5	1874
Kojto	116:c0f6e94411f5	1875	#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
Kojto	116:c0f6e94411f5	1876	#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
Kojto	116:c0f6e94411f5	1877
Kojto	116:c0f6e94411f5	1878	#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
Kojto	116:c0f6e94411f5	1879
Kojto	116:c0f6e94411f5	1880	#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
Kojto	116:c0f6e94411f5	1881	#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
Kojto	116:c0f6e94411f5	1882	#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
Kojto	116:c0f6e94411f5	1883	#define IS_RCC_HCLK_DIV IS_RCC_PCLK
Kojto	116:c0f6e94411f5	1884
Kojto	116:c0f6e94411f5	1885	#define RCC_MCO_NODIV RCC_MCODIV_1
Kojto	116:c0f6e94411f5	1886
Kojto	116:c0f6e94411f5	1887	#define HSION_BitNumber RCC_HSION_BIT_NUMBER
Kojto	116:c0f6e94411f5	1888	#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
Kojto	116:c0f6e94411f5	1889	#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
Kojto	116:c0f6e94411f5	1890	#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
Kojto	116:c0f6e94411f5	1891	#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
Kojto	116:c0f6e94411f5	1892	#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
Kojto	116:c0f6e94411f5	1893	#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
Kojto	116:c0f6e94411f5	1894	#define LSION_BitNumber RCC_LSION_BIT_NUMBER
Kojto	116:c0f6e94411f5	1895	#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
Kojto	116:c0f6e94411f5	1896	#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
Kojto	116:c0f6e94411f5	1897
Kojto	116:c0f6e94411f5	1898	#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
Kojto	116:c0f6e94411f5	1899	#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
Kojto	116:c0f6e94411f5	1900	#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
Kojto	116:c0f6e94411f5	1901	#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
Kojto	116:c0f6e94411f5	1902	#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
Kojto	116:c0f6e94411f5	1903	#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
Kojto	116:c0f6e94411f5	1904
Kojto	116:c0f6e94411f5	1905	#define CR_HSION_BB RCC_CR_HSION_BB
Kojto	116:c0f6e94411f5	1906	#define CR_CSSON_BB RCC_CR_CSSON_BB
Kojto	116:c0f6e94411f5	1907	#define CR_PLLON_BB RCC_CR_PLLON_BB
Kojto	116:c0f6e94411f5	1908	#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
Kojto	116:c0f6e94411f5	1909	#define CR_MSION_BB RCC_CR_MSION_BB
Kojto	116:c0f6e94411f5	1910	#define CSR_LSION_BB RCC_CSR_LSION_BB
Kojto	116:c0f6e94411f5	1911	#define CSR_LSEON_BB RCC_CSR_LSEON_BB
Kojto	116:c0f6e94411f5	1912	#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
Kojto	116:c0f6e94411f5	1913	#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
Kojto	116:c0f6e94411f5	1914	#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
Kojto	116:c0f6e94411f5	1915	#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
Kojto	116:c0f6e94411f5	1916	#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
Kojto	116:c0f6e94411f5	1917	#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
Kojto	116:c0f6e94411f5	1918	#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
Kojto	116:c0f6e94411f5	1919	#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
Kojto	116:c0f6e94411f5	1920
Kojto	116:c0f6e94411f5	1921	/**
Kojto	116:c0f6e94411f5	1922	* @}
Kojto	116:c0f6e94411f5	1923	*/
Kojto	116:c0f6e94411f5	1924
Kojto	116:c0f6e94411f5	1925	/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1926	* @{
Kojto	116:c0f6e94411f5	1927	*/
Kojto	116:c0f6e94411f5	1928	#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
Kojto	116:c0f6e94411f5	1929
Kojto	116:c0f6e94411f5	1930	/**
Kojto	116:c0f6e94411f5	1931	* @}
Kojto	116:c0f6e94411f5	1932	*/
Kojto	116:c0f6e94411f5	1933
Kojto	116:c0f6e94411f5	1934	/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1935	* @{
Kojto	116:c0f6e94411f5	1936	*/
Kojto	116:c0f6e94411f5	1937
Kojto	116:c0f6e94411f5	1938	#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
Kojto	116:c0f6e94411f5	1939	#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
Kojto	116:c0f6e94411f5	1940	#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
Kojto	116:c0f6e94411f5	1941	#if defined (RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
Kojto	116:c0f6e94411f5	1942	#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
Kojto	116:c0f6e94411f5	1943	((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
Kojto	116:c0f6e94411f5	1944	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
Kojto	116:c0f6e94411f5	1945	#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
Kojto	116:c0f6e94411f5	1946	((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
Kojto	116:c0f6e94411f5	1947	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
Kojto	116:c0f6e94411f5	1948	#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
Kojto	116:c0f6e94411f5	1949	((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
Kojto	116:c0f6e94411f5	1950	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
Kojto	116:c0f6e94411f5	1951	#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
Kojto	116:c0f6e94411f5	1952	((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
Kojto	116:c0f6e94411f5	1953	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
Kojto	116:c0f6e94411f5	1954	#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
Kojto	116:c0f6e94411f5	1955	((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
Kojto	116:c0f6e94411f5	1956	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
Kojto	116:c0f6e94411f5	1957
Kojto	116:c0f6e94411f5	1958	#else
Kojto	116:c0f6e94411f5	1959	#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
Kojto	116:c0f6e94411f5	1960
Kojto	116:c0f6e94411f5	1961	#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
Kojto	116:c0f6e94411f5	1962
Kojto	116:c0f6e94411f5	1963	#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
Kojto	116:c0f6e94411f5	1964
Kojto	116:c0f6e94411f5	1965	#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
Kojto	116:c0f6e94411f5	1966
Kojto	116:c0f6e94411f5	1967	#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
Kojto	116:c0f6e94411f5	1968
Kojto	116:c0f6e94411f5	1969	#endif
Kojto	116:c0f6e94411f5	1970
Kojto	116:c0f6e94411f5	1971	#define IS_ALARM IS_RTC_ALARM
Kojto	116:c0f6e94411f5	1972	#define IS_ALARM_MASK IS_RTC_ALARM_MASK
Kojto	116:c0f6e94411f5	1973	#define IS_TAMPER IS_RTC_TAMPER
Kojto	116:c0f6e94411f5	1974	#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
Kojto	116:c0f6e94411f5	1975	#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
Kojto	116:c0f6e94411f5	1976	#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
Kojto	116:c0f6e94411f5	1977	#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
Kojto	116:c0f6e94411f5	1978	#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
Kojto	116:c0f6e94411f5	1979	#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
Kojto	116:c0f6e94411f5	1980	#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
Kojto	116:c0f6e94411f5	1981	#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
Kojto	116:c0f6e94411f5	1982	#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
Kojto	116:c0f6e94411f5	1983	#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
Kojto	116:c0f6e94411f5	1984	#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
Kojto	116:c0f6e94411f5	1985
Kojto	116:c0f6e94411f5	1986	#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
Kojto	116:c0f6e94411f5	1987	#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
Kojto	116:c0f6e94411f5	1988
Kojto	116:c0f6e94411f5	1989	/**
Kojto	116:c0f6e94411f5	1990	* @}
Kojto	116:c0f6e94411f5	1991	*/
Kojto	116:c0f6e94411f5	1992
Kojto	116:c0f6e94411f5	1993	/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	1994	* @{
Kojto	116:c0f6e94411f5	1995	*/
Kojto	116:c0f6e94411f5	1996
Kojto	116:c0f6e94411f5	1997	#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
Kojto	116:c0f6e94411f5	1998	#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
Kojto	116:c0f6e94411f5	1999
Kojto	116:c0f6e94411f5	2000	/**
Kojto	116:c0f6e94411f5	2001	* @}
Kojto	116:c0f6e94411f5	2002	*/
Kojto	116:c0f6e94411f5	2003
Kojto	116:c0f6e94411f5	2004	/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2005	* @{
Kojto	116:c0f6e94411f5	2006	*/
Kojto	116:c0f6e94411f5	2007
Kojto	116:c0f6e94411f5	2008	#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
Kojto	116:c0f6e94411f5	2009	#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
Kojto	116:c0f6e94411f5	2010	#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
Kojto	116:c0f6e94411f5	2011	#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
Kojto	116:c0f6e94411f5	2012	#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
Kojto	116:c0f6e94411f5	2013	#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
Kojto	116:c0f6e94411f5	2014
Kojto	116:c0f6e94411f5	2015	#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	2016	#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	2017
Kojto	116:c0f6e94411f5	2018	#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
Kojto	116:c0f6e94411f5	2019
Kojto	116:c0f6e94411f5	2020	/**
Kojto	116:c0f6e94411f5	2021	* @}
Kojto	116:c0f6e94411f5	2022	*/
Kojto	116:c0f6e94411f5	2023
Kojto	116:c0f6e94411f5	2024	/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2025	* @{
Kojto	116:c0f6e94411f5	2026	*/
Kojto	116:c0f6e94411f5	2027	#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
Kojto	116:c0f6e94411f5	2028	#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
Kojto	116:c0f6e94411f5	2029	#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
Kojto	116:c0f6e94411f5	2030	#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
Kojto	116:c0f6e94411f5	2031	#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
Kojto	116:c0f6e94411f5	2032	#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
Kojto	116:c0f6e94411f5	2033	#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
Kojto	116:c0f6e94411f5	2034	#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
Kojto	116:c0f6e94411f5	2035	/**
Kojto	116:c0f6e94411f5	2036	* @}
Kojto	116:c0f6e94411f5	2037	*/
Kojto	116:c0f6e94411f5	2038
Kojto	116:c0f6e94411f5	2039	/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2040	* @{
Kojto	116:c0f6e94411f5	2041	*/
Kojto	116:c0f6e94411f5	2042
Kojto	116:c0f6e94411f5	2043	#define __HAL_SPI_1LINE_TX SPI_1LINE_TX
Kojto	116:c0f6e94411f5	2044	#define __HAL_SPI_1LINE_RX SPI_1LINE_RX
Kojto	116:c0f6e94411f5	2045	#define __HAL_SPI_RESET_CRC SPI_RESET_CRC
Kojto	116:c0f6e94411f5	2046
Kojto	116:c0f6e94411f5	2047	/**
Kojto	116:c0f6e94411f5	2048	* @}
Kojto	116:c0f6e94411f5	2049	*/
Kojto	116:c0f6e94411f5	2050
Kojto	116:c0f6e94411f5	2051	/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2052	* @{
Kojto	116:c0f6e94411f5	2053	*/
Kojto	116:c0f6e94411f5	2054
Kojto	116:c0f6e94411f5	2055	#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	2056	#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
Kojto	116:c0f6e94411f5	2057	#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	2058	#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
Kojto	116:c0f6e94411f5	2059
Kojto	116:c0f6e94411f5	2060	#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
Kojto	116:c0f6e94411f5	2061
Kojto	116:c0f6e94411f5	2062	#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
Kojto	116:c0f6e94411f5	2063	#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
Kojto	116:c0f6e94411f5	2064
Kojto	116:c0f6e94411f5	2065	/**
Kojto	116:c0f6e94411f5	2066	* @}
Kojto	116:c0f6e94411f5	2067	*/
Kojto	116:c0f6e94411f5	2068
Kojto	116:c0f6e94411f5	2069
Kojto	116:c0f6e94411f5	2070	/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2071	* @{
Kojto	116:c0f6e94411f5	2072	*/
Kojto	116:c0f6e94411f5	2073
Kojto	116:c0f6e94411f5	2074	#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
Kojto	116:c0f6e94411f5	2075	#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
Kojto	116:c0f6e94411f5	2076	#define __USART_ENABLE __HAL_USART_ENABLE
Kojto	116:c0f6e94411f5	2077	#define __USART_DISABLE __HAL_USART_DISABLE
Kojto	116:c0f6e94411f5	2078
Kojto	116:c0f6e94411f5	2079	#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	2080	#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
Kojto	116:c0f6e94411f5	2081
Kojto	116:c0f6e94411f5	2082	/**
Kojto	116:c0f6e94411f5	2083	* @}
Kojto	116:c0f6e94411f5	2084	*/
Kojto	116:c0f6e94411f5	2085
Kojto	116:c0f6e94411f5	2086	/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2087	* @{
Kojto	116:c0f6e94411f5	2088	*/
Kojto	116:c0f6e94411f5	2089	#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
Kojto	116:c0f6e94411f5	2090
Kojto	116:c0f6e94411f5	2091	#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
Kojto	116:c0f6e94411f5	2092	#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
Kojto	116:c0f6e94411f5	2093	#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
Kojto	116:c0f6e94411f5	2094	#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
Kojto	116:c0f6e94411f5	2095
Kojto	116:c0f6e94411f5	2096	#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
Kojto	116:c0f6e94411f5	2097	#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
Kojto	116:c0f6e94411f5	2098	#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
Kojto	116:c0f6e94411f5	2099	#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
Kojto	116:c0f6e94411f5	2100
Kojto	116:c0f6e94411f5	2101	#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
Kojto	116:c0f6e94411f5	2102	#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
Kojto	116:c0f6e94411f5	2103	#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
Kojto	116:c0f6e94411f5	2104	#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
Kojto	116:c0f6e94411f5	2105	#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	2106	#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	2107	#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	116:c0f6e94411f5	2108
Kojto	116:c0f6e94411f5	2109	#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
Kojto	116:c0f6e94411f5	2110	#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
Kojto	116:c0f6e94411f5	2111	#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
Kojto	116:c0f6e94411f5	2112	#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
Kojto	116:c0f6e94411f5	2113	#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	2114	#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	2115	#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	116:c0f6e94411f5	2116	#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
Kojto	116:c0f6e94411f5	2117
Kojto	116:c0f6e94411f5	2118	#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
Kojto	116:c0f6e94411f5	2119	#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
Kojto	116:c0f6e94411f5	2120	#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
Kojto	116:c0f6e94411f5	2121	#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
Kojto	116:c0f6e94411f5	2122	#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
Kojto	116:c0f6e94411f5	2123	#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
Kojto	116:c0f6e94411f5	2124	#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
Kojto	116:c0f6e94411f5	2125	#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
Kojto	116:c0f6e94411f5	2126
Kojto	116:c0f6e94411f5	2127	#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
Kojto	116:c0f6e94411f5	2128	#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
Kojto	116:c0f6e94411f5	2129
Kojto	116:c0f6e94411f5	2130	#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
Kojto	116:c0f6e94411f5	2131	#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
Kojto	116:c0f6e94411f5	2132	/**
Kojto	116:c0f6e94411f5	2133	* @}
Kojto	116:c0f6e94411f5	2134	*/
Kojto	116:c0f6e94411f5	2135
Kojto	116:c0f6e94411f5	2136	/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2137	* @{
Kojto	116:c0f6e94411f5	2138	*/
Kojto	116:c0f6e94411f5	2139	#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
Kojto	116:c0f6e94411f5	2140	#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
Kojto	116:c0f6e94411f5	2141
Kojto	116:c0f6e94411f5	2142	#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
Kojto	116:c0f6e94411f5	2143	#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
Kojto	116:c0f6e94411f5	2144
Kojto	116:c0f6e94411f5	2145	#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
Kojto	116:c0f6e94411f5	2146	#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
Kojto	116:c0f6e94411f5	2147	#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
Kojto	116:c0f6e94411f5	2148	#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
Kojto	116:c0f6e94411f5	2149	#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
Kojto	116:c0f6e94411f5	2150	#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
Kojto	116:c0f6e94411f5	2151	#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
Kojto	116:c0f6e94411f5	2152	#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
Kojto	116:c0f6e94411f5	2153	#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
Kojto	116:c0f6e94411f5	2154	#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
Kojto	116:c0f6e94411f5	2155	#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
Kojto	116:c0f6e94411f5	2156	#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
Kojto	116:c0f6e94411f5	2157
Kojto	116:c0f6e94411f5	2158	#define TIM_TS_ITR0 ((uint32_t)0x0000)
Kojto	116:c0f6e94411f5	2159	#define TIM_TS_ITR1 ((uint32_t)0x0010)
Kojto	116:c0f6e94411f5	2160	#define TIM_TS_ITR2 ((uint32_t)0x0020)
Kojto	116:c0f6e94411f5	2161	#define TIM_TS_ITR3 ((uint32_t)0x0030)
Kojto	116:c0f6e94411f5	2162	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	116:c0f6e94411f5	2163	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	116:c0f6e94411f5	2164	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	116:c0f6e94411f5	2165	((SELECTION) == TIM_TS_ITR3))
Kojto	116:c0f6e94411f5	2166
Kojto	116:c0f6e94411f5	2167	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto	116:c0f6e94411f5	2168	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto	116:c0f6e94411f5	2169	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
Kojto	116:c0f6e94411f5	2170	((CHANNEL) == TIM_CHANNEL_2))
Kojto	116:c0f6e94411f5	2171
Kojto	116:c0f6e94411f5	2172	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
Kojto	116:c0f6e94411f5	2173	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
Kojto	116:c0f6e94411f5	2174
Kojto	116:c0f6e94411f5	2175	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
Kojto	116:c0f6e94411f5	2176	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
Kojto	116:c0f6e94411f5	2177
Kojto	116:c0f6e94411f5	2178	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
Kojto	116:c0f6e94411f5	2179	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
Kojto	116:c0f6e94411f5	2180
Kojto	116:c0f6e94411f5	2181	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
Kojto	116:c0f6e94411f5	2182	((STATE) == TIM_OUTPUTSTATE_ENABLE))
Kojto	116:c0f6e94411f5	2183	/**
Kojto	116:c0f6e94411f5	2184	* @}
Kojto	116:c0f6e94411f5	2185	*/
Kojto	116:c0f6e94411f5	2186
Kojto	116:c0f6e94411f5	2187	/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2188	* @{
Kojto	116:c0f6e94411f5	2189	*/
Kojto	116:c0f6e94411f5	2190
Kojto	116:c0f6e94411f5	2191	#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
Kojto	116:c0f6e94411f5	2192	#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
Kojto	116:c0f6e94411f5	2193	#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
Kojto	116:c0f6e94411f5	2194	#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
Kojto	116:c0f6e94411f5	2195	#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
Kojto	116:c0f6e94411f5	2196	#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
Kojto	116:c0f6e94411f5	2197	#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
Kojto	116:c0f6e94411f5	2198
Kojto	116:c0f6e94411f5	2199	#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
Kojto	116:c0f6e94411f5	2200	#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
Kojto	116:c0f6e94411f5	2201	#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
Kojto	116:c0f6e94411f5	2202	/**
Kojto	116:c0f6e94411f5	2203	* @}
Kojto	116:c0f6e94411f5	2204	*/
Kojto	116:c0f6e94411f5	2205
Kojto	116:c0f6e94411f5	2206	/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2207	* @{
Kojto	116:c0f6e94411f5	2208	*/
Kojto	116:c0f6e94411f5	2209	#define __HAL_LTDC_LAYER LTDC_LAYER
Kojto	116:c0f6e94411f5	2210	/**
Kojto	116:c0f6e94411f5	2211	* @}
Kojto	116:c0f6e94411f5	2212	*/
Kojto	116:c0f6e94411f5	2213
Kojto	116:c0f6e94411f5	2214	/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2215	* @{
Kojto	116:c0f6e94411f5	2216	*/
Kojto	116:c0f6e94411f5	2217	#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
Kojto	116:c0f6e94411f5	2218	#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
Kojto	116:c0f6e94411f5	2219	#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
Kojto	116:c0f6e94411f5	2220	#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
Kojto	116:c0f6e94411f5	2221	#define SAI_STREOMODE SAI_STEREOMODE
Kojto	116:c0f6e94411f5	2222	#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
Kojto	116:c0f6e94411f5	2223	#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
Kojto	116:c0f6e94411f5	2224	#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
Kojto	116:c0f6e94411f5	2225	#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
Kojto	116:c0f6e94411f5	2226	#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
Kojto	116:c0f6e94411f5	2227	#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
Kojto	116:c0f6e94411f5	2228	#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
Kojto	116:c0f6e94411f5	2229
Kojto	116:c0f6e94411f5	2230	/**
Kojto	116:c0f6e94411f5	2231	* @}
Kojto	116:c0f6e94411f5	2232	*/
Kojto	116:c0f6e94411f5	2233
Kojto	116:c0f6e94411f5	2234
Kojto	116:c0f6e94411f5	2235	/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
Kojto	116:c0f6e94411f5	2236	* @{
Kojto	116:c0f6e94411f5	2237	*/
Kojto	116:c0f6e94411f5	2238
Kojto	116:c0f6e94411f5	2239	/**
Kojto	116:c0f6e94411f5	2240	* @}
Kojto	116:c0f6e94411f5	2241	*/
Kojto	116:c0f6e94411f5	2242
Kojto	116:c0f6e94411f5	2243	#ifdef __cplusplus
Kojto	116:c0f6e94411f5	2244	}
Kojto	116:c0f6e94411f5	2245	#endif
Kojto	116:c0f6e94411f5	2246
Kojto	116:c0f6e94411f5	2247	#endif /* ___STM32_HAL_LEGACY */
Kojto	116:c0f6e94411f5	2248
Kojto	116:c0f6e94411f5	2249	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
Kojto	116:c0f6e94411f5	2250

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Type:	Library
Created:	04 Apr 2016
Imports:	4
Forks:	0
Commits:	122
Dependents:	4
Dependencies:	0
Followers:	1

The code in this repository is Apache licensed.

TARGET_NUCLEO_L073RZ/stm32_hal_legacy.h@120:2eb10e18b8d7, 2016-04-13 (annotated)

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