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Committer:
elijahorr
Date:
Wed Apr 13 12:29:27 2016 +0000
Revision:
120:2eb10e18b8d7
Parent:
110:165afa46840b
V1.1

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Kojto 108:34e6b704fe68 1 /**
Kojto 108:34e6b704fe68 2 ******************************************************************************
Kojto 108:34e6b704fe68 3 * @file stm32f4xx_hal_qspi.h
Kojto 108:34e6b704fe68 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
Kojto 108:34e6b704fe68 7 * @brief Header file of QSPI HAL module.
Kojto 108:34e6b704fe68 8 ******************************************************************************
Kojto 108:34e6b704fe68 9 * @attention
Kojto 108:34e6b704fe68 10 *
Kojto 108:34e6b704fe68 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 108:34e6b704fe68 12 *
Kojto 108:34e6b704fe68 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 108:34e6b704fe68 14 * are permitted provided that the following conditions are met:
Kojto 108:34e6b704fe68 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 108:34e6b704fe68 16 * this list of conditions and the following disclaimer.
Kojto 108:34e6b704fe68 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 108:34e6b704fe68 18 * this list of conditions and the following disclaimer in the documentation
Kojto 108:34e6b704fe68 19 * and/or other materials provided with the distribution.
Kojto 108:34e6b704fe68 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 108:34e6b704fe68 21 * may be used to endorse or promote products derived from this software
Kojto 108:34e6b704fe68 22 * without specific prior written permission.
Kojto 108:34e6b704fe68 23 *
Kojto 108:34e6b704fe68 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 108:34e6b704fe68 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 108:34e6b704fe68 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 108:34e6b704fe68 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 108:34e6b704fe68 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 108:34e6b704fe68 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 108:34e6b704fe68 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 108:34e6b704fe68 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 108:34e6b704fe68 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 108:34e6b704fe68 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 108:34e6b704fe68 34 *
Kojto 108:34e6b704fe68 35 ******************************************************************************
Kojto 108:34e6b704fe68 36 */
Kojto 108:34e6b704fe68 37
Kojto 108:34e6b704fe68 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 108:34e6b704fe68 39 #ifndef __STM32F4xx_HAL_QSPI_H
Kojto 108:34e6b704fe68 40 #define __STM32F4xx_HAL_QSPI_H
Kojto 108:34e6b704fe68 41
Kojto 108:34e6b704fe68 42 #ifdef __cplusplus
Kojto 108:34e6b704fe68 43 extern "C" {
Kojto 108:34e6b704fe68 44 #endif
Kojto 108:34e6b704fe68 45
Kojto 110:165afa46840b 46 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 108:34e6b704fe68 47 /* Includes ------------------------------------------------------------------*/
Kojto 108:34e6b704fe68 48 #include "stm32f4xx_hal_def.h"
Kojto 108:34e6b704fe68 49
Kojto 108:34e6b704fe68 50 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 108:34e6b704fe68 51 * @{
Kojto 108:34e6b704fe68 52 */
Kojto 108:34e6b704fe68 53
Kojto 108:34e6b704fe68 54 /** @addtogroup QSPI
Kojto 108:34e6b704fe68 55 * @{
Kojto 108:34e6b704fe68 56 */
Kojto 108:34e6b704fe68 57
Kojto 108:34e6b704fe68 58 /* Exported types ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 59 /** @defgroup QSPI_Exported_Types QSPI Exported Types
Kojto 108:34e6b704fe68 60 * @{
Kojto 108:34e6b704fe68 61 */
Kojto 108:34e6b704fe68 62
Kojto 108:34e6b704fe68 63 /**
Kojto 108:34e6b704fe68 64 * @brief QSPI Init structure definition
Kojto 108:34e6b704fe68 65 */
Kojto 108:34e6b704fe68 66
Kojto 108:34e6b704fe68 67 typedef struct
Kojto 108:34e6b704fe68 68 {
Kojto 108:34e6b704fe68 69 uint32_t ClockPrescaler; /* Specifies the prescaler factor for generating clock based on the AHB clock.
Kojto 108:34e6b704fe68 70 This parameter can be a number between 0 and 255 */
Kojto 108:34e6b704fe68 71
Kojto 108:34e6b704fe68 72 uint32_t FifoThreshold; /* Specifies the threshold number of bytes in the FIFO (used only in indirect mode)
Kojto 108:34e6b704fe68 73 This parameter can be a value between 1 and 32 */
Kojto 108:34e6b704fe68 74
Kojto 108:34e6b704fe68 75 uint32_t SampleShifting; /* Specifies the Sample Shift. The data is sampled 1/2 clock cycle delay later to
Kojto 108:34e6b704fe68 76 take in account external signal delays. (It should be QSPI_SAMPLE_SHIFTING_NONE in DDR mode)
Kojto 108:34e6b704fe68 77 This parameter can be a value of @ref QSPI_SampleShifting */
Kojto 108:34e6b704fe68 78
Kojto 108:34e6b704fe68 79 uint32_t FlashSize; /* Specifies the Flash Size. FlashSize+1 is effectively the number of address bits
Kojto 108:34e6b704fe68 80 required to address the flash memory. The flash capacity can be up to 4GB
Kojto 108:34e6b704fe68 81 (addressed using 32 bits) in indirect mode, but the addressable space in
Kojto 108:34e6b704fe68 82 memory-mapped mode is limited to 256MB
Kojto 108:34e6b704fe68 83 This parameter can be a number between 0 and 31 */
Kojto 108:34e6b704fe68 84
Kojto 108:34e6b704fe68 85 uint32_t ChipSelectHighTime; /* Specifies the Chip Select High Time. ChipSelectHighTime+1 defines the minimum number
Kojto 108:34e6b704fe68 86 of clock cycles which the chip select must remain high between commands.
Kojto 108:34e6b704fe68 87 This parameter can be a value of @ref QSPI_ChipSelectHighTime */
Kojto 108:34e6b704fe68 88
Kojto 108:34e6b704fe68 89 uint32_t ClockMode; /* Specifies the Clock Mode. It indicates the level that clock takes between commands.
Kojto 108:34e6b704fe68 90 This parameter can be a value of @ref QSPI_ClockMode */
Kojto 108:34e6b704fe68 91
Kojto 108:34e6b704fe68 92 uint32_t FlashID; /* Specifies the Flash which will be used,
Kojto 108:34e6b704fe68 93 This parameter can be a value of @ref QSPI_Flash_Select */
Kojto 108:34e6b704fe68 94
Kojto 108:34e6b704fe68 95 uint32_t DualFlash; /* Specifies the Dual Flash Mode State
Kojto 108:34e6b704fe68 96 This parameter can be a value of @ref QSPI_DualFlash_Mode */
Kojto 108:34e6b704fe68 97 }QSPI_InitTypeDef;
Kojto 108:34e6b704fe68 98
Kojto 108:34e6b704fe68 99 /**
Kojto 108:34e6b704fe68 100 * @brief HAL QSPI State structures definition
Kojto 108:34e6b704fe68 101 */
Kojto 108:34e6b704fe68 102 typedef enum
Kojto 108:34e6b704fe68 103 {
Kojto 108:34e6b704fe68 104 HAL_QSPI_STATE_RESET = 0x00, /*!< Peripheral not initialized */
Kojto 108:34e6b704fe68 105 HAL_QSPI_STATE_READY = 0x01, /*!< Peripheral initialized and ready for use */
Kojto 108:34e6b704fe68 106 HAL_QSPI_STATE_BUSY = 0x02, /*!< Peripheral in indirect mode and busy */
Kojto 108:34e6b704fe68 107 HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12, /*!< Peripheral in indirect mode with transmission ongoing */
Kojto 108:34e6b704fe68 108 HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22, /*!< Peripheral in indirect mode with reception ongoing */
Kojto 108:34e6b704fe68 109 HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42, /*!< Peripheral in auto polling mode ongoing */
Kojto 108:34e6b704fe68 110 HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82, /*!< Peripheral in memory mapped mode ongoing */
Kojto 108:34e6b704fe68 111 HAL_QSPI_STATE_ERROR = 0x04 /*!< Peripheral in error */
Kojto 108:34e6b704fe68 112 }HAL_QSPI_StateTypeDef;
Kojto 108:34e6b704fe68 113
Kojto 108:34e6b704fe68 114 /**
Kojto 108:34e6b704fe68 115 * @brief QSPI Handle Structure definition
Kojto 108:34e6b704fe68 116 */
Kojto 108:34e6b704fe68 117 typedef struct
Kojto 108:34e6b704fe68 118 {
Kojto 108:34e6b704fe68 119 QUADSPI_TypeDef *Instance; /* QSPI registers base address */
Kojto 108:34e6b704fe68 120 QSPI_InitTypeDef Init; /* QSPI communication parameters */
Kojto 108:34e6b704fe68 121 uint8_t *pTxBuffPtr; /* Pointer to QSPI Tx transfer Buffer */
Kojto 108:34e6b704fe68 122 __IO uint16_t TxXferSize; /* QSPI Tx Transfer size */
Kojto 108:34e6b704fe68 123 __IO uint16_t TxXferCount; /* QSPI Tx Transfer Counter */
Kojto 108:34e6b704fe68 124 uint8_t *pRxBuffPtr; /* Pointer to QSPI Rx transfer Buffer */
Kojto 108:34e6b704fe68 125 __IO uint16_t RxXferSize; /* QSPI Rx Transfer size */
Kojto 108:34e6b704fe68 126 __IO uint16_t RxXferCount; /* QSPI Rx Transfer Counter */
Kojto 108:34e6b704fe68 127 DMA_HandleTypeDef *hdma; /* QSPI Rx/Tx DMA Handle parameters */
Kojto 108:34e6b704fe68 128 __IO HAL_LockTypeDef Lock; /* Locking object */
Kojto 108:34e6b704fe68 129 __IO HAL_QSPI_StateTypeDef State; /* QSPI communication state */
Kojto 108:34e6b704fe68 130 __IO uint32_t ErrorCode; /* QSPI Error code */
Kojto 108:34e6b704fe68 131 uint32_t Timeout; /* Timeout for the QSPI memory access */
Kojto 108:34e6b704fe68 132 }QSPI_HandleTypeDef;
Kojto 108:34e6b704fe68 133
Kojto 108:34e6b704fe68 134 /**
Kojto 108:34e6b704fe68 135 * @brief QSPI Command structure definition
Kojto 108:34e6b704fe68 136 */
Kojto 108:34e6b704fe68 137 typedef struct
Kojto 108:34e6b704fe68 138 {
Kojto 108:34e6b704fe68 139 uint32_t Instruction; /* Specifies the Instruction to be sent
Kojto 108:34e6b704fe68 140 This parameter can be a value (8-bit) between 0x00 and 0xFF */
Kojto 108:34e6b704fe68 141 uint32_t Address; /* Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize)
Kojto 108:34e6b704fe68 142 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
Kojto 108:34e6b704fe68 143 uint32_t AlternateBytes; /* Specifies the Alternate Bytes to be sent (Size from 1 to 4 bytes according AlternateBytesSize)
Kojto 108:34e6b704fe68 144 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
Kojto 108:34e6b704fe68 145 uint32_t AddressSize; /* Specifies the Address Size
Kojto 108:34e6b704fe68 146 This parameter can be a value of @ref QSPI_AddressSize */
Kojto 108:34e6b704fe68 147 uint32_t AlternateBytesSize; /* Specifies the Alternate Bytes Size
Kojto 108:34e6b704fe68 148 This parameter can be a value of @ref QSPI_AlternateBytesSize */
Kojto 108:34e6b704fe68 149 uint32_t DummyCycles; /* Specifies the Number of Dummy Cycles.
Kojto 108:34e6b704fe68 150 This parameter can be a number between 0 and 31 */
Kojto 108:34e6b704fe68 151 uint32_t InstructionMode; /* Specifies the Instruction Mode
Kojto 108:34e6b704fe68 152 This parameter can be a value of @ref QSPI_InstructionMode */
Kojto 108:34e6b704fe68 153 uint32_t AddressMode; /* Specifies the Address Mode
Kojto 108:34e6b704fe68 154 This parameter can be a value of @ref QSPI_AddressMode */
Kojto 108:34e6b704fe68 155 uint32_t AlternateByteMode; /* Specifies the Alternate Bytes Mode
Kojto 108:34e6b704fe68 156 This parameter can be a value of @ref QSPI_AlternateBytesMode */
Kojto 108:34e6b704fe68 157 uint32_t DataMode; /* Specifies the Data Mode (used for dummy cycles and data phases)
Kojto 108:34e6b704fe68 158 This parameter can be a value of @ref QSPI_DataMode */
Kojto 108:34e6b704fe68 159 uint32_t NbData; /* Specifies the number of data to transfer.
Kojto 108:34e6b704fe68 160 This parameter can be any value between 0 and 0xFFFFFFFF (0 means undefined length
Kojto 108:34e6b704fe68 161 until end of memory)*/
Kojto 108:34e6b704fe68 162 uint32_t DdrMode; /* Specifies the double data rate mode for address, alternate byte and data phase
Kojto 108:34e6b704fe68 163 This parameter can be a value of @ref QSPI_DdrMode */
Kojto 108:34e6b704fe68 164 uint32_t DdrHoldHalfCycle; /* Specifies the DDR hold half cycle. It delays the data output by one half of
Kojto 108:34e6b704fe68 165 system clock in DDR mode.
Kojto 108:34e6b704fe68 166 This parameter can be a value of @ref QSPI_DdrHoldHalfCycle */
Kojto 108:34e6b704fe68 167 uint32_t SIOOMode; /* Specifies the send instruction only once mode
Kojto 108:34e6b704fe68 168 This parameter can be a value of @ref QSPI_SIOOMode */
Kojto 108:34e6b704fe68 169 }QSPI_CommandTypeDef;
Kojto 108:34e6b704fe68 170
Kojto 108:34e6b704fe68 171 /**
Kojto 108:34e6b704fe68 172 * @brief QSPI Auto Polling mode configuration structure definition
Kojto 108:34e6b704fe68 173 */
Kojto 108:34e6b704fe68 174 typedef struct
Kojto 108:34e6b704fe68 175 {
Kojto 108:34e6b704fe68 176 uint32_t Match; /* Specifies the value to be compared with the masked status register to get a match.
Kojto 108:34e6b704fe68 177 This parameter can be any value between 0 and 0xFFFFFFFF */
Kojto 108:34e6b704fe68 178 uint32_t Mask; /* Specifies the mask to be applied to the status bytes received.
Kojto 108:34e6b704fe68 179 This parameter can be any value between 0 and 0xFFFFFFFF */
Kojto 108:34e6b704fe68 180 uint32_t Interval; /* Specifies the number of clock cycles between two read during automatic polling phases.
Kojto 108:34e6b704fe68 181 This parameter can be any value between 0 and 0xFFFF */
Kojto 108:34e6b704fe68 182 uint32_t StatusBytesSize; /* Specifies the size of the status bytes received.
Kojto 108:34e6b704fe68 183 This parameter can be any value between 1 and 4 */
Kojto 108:34e6b704fe68 184 uint32_t MatchMode; /* Specifies the method used for determining a match.
Kojto 108:34e6b704fe68 185 This parameter can be a value of @ref QSPI_MatchMode */
Kojto 108:34e6b704fe68 186 uint32_t AutomaticStop; /* Specifies if automatic polling is stopped after a match.
Kojto 108:34e6b704fe68 187 This parameter can be a value of @ref QSPI_AutomaticStop */
Kojto 108:34e6b704fe68 188 }QSPI_AutoPollingTypeDef;
Kojto 108:34e6b704fe68 189
Kojto 108:34e6b704fe68 190 /**
Kojto 108:34e6b704fe68 191 * @brief QSPI Memory Mapped mode configuration structure definition
Kojto 108:34e6b704fe68 192 */
Kojto 108:34e6b704fe68 193 typedef struct
Kojto 108:34e6b704fe68 194 {
Kojto 108:34e6b704fe68 195 uint32_t TimeOutPeriod; /* Specifies the number of clock to wait when the FIFO is full before to release the chip select.
Kojto 108:34e6b704fe68 196 This parameter can be any value between 0 and 0xFFFF */
Kojto 108:34e6b704fe68 197 uint32_t TimeOutActivation; /* Specifies if the time out counter is enabled to release the chip select.
Kojto 108:34e6b704fe68 198 This parameter can be a value of @ref QSPI_TimeOutActivation */
Kojto 108:34e6b704fe68 199 }QSPI_MemoryMappedTypeDef;
Kojto 108:34e6b704fe68 200 /**
Kojto 108:34e6b704fe68 201 * @}
Kojto 108:34e6b704fe68 202 */
Kojto 108:34e6b704fe68 203
Kojto 108:34e6b704fe68 204 /* Exported constants --------------------------------------------------------*/
Kojto 108:34e6b704fe68 205 /** @defgroup QSPI_Exported_Constants QSPI Exported Constants
Kojto 108:34e6b704fe68 206 * @{
Kojto 108:34e6b704fe68 207 */
Kojto 108:34e6b704fe68 208 /** @defgroup QSPI_ErrorCode QSPI Error Code
Kojto 108:34e6b704fe68 209 * @{
Kojto 108:34e6b704fe68 210 */
Kojto 108:34e6b704fe68 211 #define HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 108:34e6b704fe68 212 #define HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */
Kojto 108:34e6b704fe68 213 #define HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /*!< Transfer error */
Kojto 108:34e6b704fe68 214 #define HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) /*!< DMA transfer error */
Kojto 108:34e6b704fe68 215 /**
Kojto 108:34e6b704fe68 216 * @}
Kojto 108:34e6b704fe68 217 */
Kojto 108:34e6b704fe68 218
Kojto 108:34e6b704fe68 219 /** @defgroup QSPI_SampleShifting QSPI Sample Shifting
Kojto 108:34e6b704fe68 220 * @{
Kojto 108:34e6b704fe68 221 */
Kojto 108:34e6b704fe68 222 #define QSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000) /*!<No clock cycle shift to sample data*/
Kojto 108:34e6b704fe68 223 #define QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT) /*!<1/2 clock cycle shift to sample data*/
Kojto 108:34e6b704fe68 224 /**
Kojto 108:34e6b704fe68 225 * @}
Kojto 108:34e6b704fe68 226 */
Kojto 108:34e6b704fe68 227
Kojto 108:34e6b704fe68 228 /** @defgroup QSPI_ChipSelectHighTime QSPI Chip Select High Time
Kojto 108:34e6b704fe68 229 * @{
Kojto 108:34e6b704fe68 230 */
Kojto 108:34e6b704fe68 231 #define QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000) /*!<nCS stay high for at least 1 clock cycle between commands*/
Kojto 108:34e6b704fe68 232 #define QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 2 clock cycles between commands*/
Kojto 108:34e6b704fe68 233 #define QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 3 clock cycles between commands*/
Kojto 108:34e6b704fe68 234 #define QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 4 clock cycles between commands*/
Kojto 108:34e6b704fe68 235 #define QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2) /*!<nCS stay high for at least 5 clock cycles between commands*/
Kojto 108:34e6b704fe68 236 #define QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 6 clock cycles between commands*/
Kojto 108:34e6b704fe68 237 #define QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 7 clock cycles between commands*/
Kojto 108:34e6b704fe68 238 #define QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT) /*!<nCS stay high for at least 8 clock cycles between commands*/
Kojto 108:34e6b704fe68 239 /**
Kojto 108:34e6b704fe68 240 * @}
Kojto 108:34e6b704fe68 241 */
Kojto 108:34e6b704fe68 242
Kojto 108:34e6b704fe68 243 /** @defgroup QSPI_ClockMode QSPI Clock Mode
Kojto 108:34e6b704fe68 244 * @{
Kojto 108:34e6b704fe68 245 */
Kojto 108:34e6b704fe68 246 #define QSPI_CLOCK_MODE_0 ((uint32_t)0x00000000) /*!<Clk stays low while nCS is released*/
Kojto 108:34e6b704fe68 247 #define QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) /*!<Clk goes high while nCS is released*/
Kojto 108:34e6b704fe68 248 /**
Kojto 108:34e6b704fe68 249 * @}
Kojto 108:34e6b704fe68 250 */
Kojto 108:34e6b704fe68 251
Kojto 108:34e6b704fe68 252 /** @defgroup QSPI_Flash_Select QSPI Flash Select
Kojto 108:34e6b704fe68 253 * @{
Kojto 108:34e6b704fe68 254 */
Kojto 108:34e6b704fe68 255 #define QSPI_FLASH_ID_1 ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 256 #define QSPI_FLASH_ID_2 ((uint32_t)QUADSPI_CR_FSEL)
Kojto 108:34e6b704fe68 257 /**
Kojto 108:34e6b704fe68 258 * @}
Kojto 108:34e6b704fe68 259 */
Kojto 108:34e6b704fe68 260
Kojto 108:34e6b704fe68 261 /** @defgroup QSPI_DualFlash_Mode QSPI Dual Flash Mode
Kojto 108:34e6b704fe68 262 * @{
Kojto 108:34e6b704fe68 263 */
Kojto 108:34e6b704fe68 264 #define QSPI_DUALFLASH_ENABLE ((uint32_t)QUADSPI_CR_DFM)
Kojto 108:34e6b704fe68 265 #define QSPI_DUALFLASH_DISABLE ((uint32_t)0x00000000)
Kojto 108:34e6b704fe68 266 /**
Kojto 108:34e6b704fe68 267 * @}
Kojto 108:34e6b704fe68 268 */
Kojto 108:34e6b704fe68 269
Kojto 108:34e6b704fe68 270 /** @defgroup QSPI_AddressSize QSPI Address Size
Kojto 108:34e6b704fe68 271 * @{
Kojto 108:34e6b704fe68 272 */
Kojto 108:34e6b704fe68 273 #define QSPI_ADDRESS_8_BITS ((uint32_t)0x00000000) /*!<8-bit address*/
Kojto 108:34e6b704fe68 274 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
Kojto 108:34e6b704fe68 275 #define QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1) /*!<24-bit address*/
Kojto 108:34e6b704fe68 276 #define QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE) /*!<32-bit address*/
Kojto 108:34e6b704fe68 277 /**
Kojto 108:34e6b704fe68 278 * @}
Kojto 108:34e6b704fe68 279 */
Kojto 108:34e6b704fe68 280
Kojto 108:34e6b704fe68 281 /** @defgroup QSPI_AlternateBytesSize QSPI Alternate Bytes Size
Kojto 108:34e6b704fe68 282 * @{
Kojto 108:34e6b704fe68 283 */
Kojto 108:34e6b704fe68 284 #define QSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000) /*!<8-bit alternate bytes*/
Kojto 108:34e6b704fe68 285 #define QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0) /*!<16-bit alternate bytes*/
Kojto 108:34e6b704fe68 286 #define QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1) /*!<24-bit alternate bytes*/
Kojto 108:34e6b704fe68 287 #define QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE) /*!<32-bit alternate bytes*/
Kojto 108:34e6b704fe68 288 /**
Kojto 108:34e6b704fe68 289 * @}
Kojto 108:34e6b704fe68 290 */
Kojto 108:34e6b704fe68 291
Kojto 108:34e6b704fe68 292 /** @defgroup QSPI_InstructionMode QSPI Instruction Mode
Kojto 108:34e6b704fe68 293 * @{
Kojto 108:34e6b704fe68 294 */
Kojto 108:34e6b704fe68 295 #define QSPI_INSTRUCTION_NONE ((uint32_t)0x00000000) /*!<No instruction*/
Kojto 108:34e6b704fe68 296 #define QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0) /*!<Instruction on a single line*/
Kojto 108:34e6b704fe68 297 #define QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1) /*!<Instruction on two lines*/
Kojto 108:34e6b704fe68 298 #define QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE) /*!<Instruction on four lines*/
Kojto 108:34e6b704fe68 299 /**
Kojto 108:34e6b704fe68 300 * @}
Kojto 108:34e6b704fe68 301 */
Kojto 108:34e6b704fe68 302
Kojto 108:34e6b704fe68 303 /** @defgroup QSPI_AddressMode QSPI Address Mode
Kojto 108:34e6b704fe68 304 * @{
Kojto 108:34e6b704fe68 305 */
Kojto 108:34e6b704fe68 306 #define QSPI_ADDRESS_NONE ((uint32_t)0x00000000) /*!<No address*/
Kojto 108:34e6b704fe68 307 #define QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0) /*!<Address on a single line*/
Kojto 108:34e6b704fe68 308 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
Kojto 108:34e6b704fe68 309 #define QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE) /*!<Address on four lines*/
Kojto 108:34e6b704fe68 310 /**
Kojto 108:34e6b704fe68 311 * @}
Kojto 108:34e6b704fe68 312 */
Kojto 108:34e6b704fe68 313
Kojto 108:34e6b704fe68 314 /** @defgroup QSPI_AlternateBytesMode QSPI Alternate Bytes Mode
Kojto 108:34e6b704fe68 315 * @{
Kojto 108:34e6b704fe68 316 */
Kojto 108:34e6b704fe68 317 #define QSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000) /*!<No alternate bytes*/
Kojto 108:34e6b704fe68 318 #define QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0) /*!<Alternate bytes on a single line*/
Kojto 108:34e6b704fe68 319 #define QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1) /*!<Alternate bytes on two lines*/
Kojto 108:34e6b704fe68 320 #define QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE) /*!<Alternate bytes on four lines*/
Kojto 108:34e6b704fe68 321 /**
Kojto 108:34e6b704fe68 322 * @}
Kojto 108:34e6b704fe68 323 */
Kojto 108:34e6b704fe68 324
Kojto 108:34e6b704fe68 325 /** @defgroup QSPI_DataMode QSPI Data Mode
Kojto 108:34e6b704fe68 326 * @{
Kojto 108:34e6b704fe68 327 */
Kojto 108:34e6b704fe68 328 #define QSPI_DATA_NONE ((uint32_t)0X00000000) /*!<No data*/
Kojto 108:34e6b704fe68 329 #define QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0) /*!<Data on a single line*/
Kojto 108:34e6b704fe68 330 #define QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1) /*!<Data on two lines*/
Kojto 108:34e6b704fe68 331 #define QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE) /*!<Data on four lines*/
Kojto 108:34e6b704fe68 332 /**
Kojto 108:34e6b704fe68 333 * @}
Kojto 108:34e6b704fe68 334 */
Kojto 108:34e6b704fe68 335
Kojto 108:34e6b704fe68 336 /** @defgroup QSPI_DdrMode QSPI Ddr Mode
Kojto 108:34e6b704fe68 337 * @{
Kojto 108:34e6b704fe68 338 */
Kojto 108:34e6b704fe68 339 #define QSPI_DDR_MODE_DISABLE ((uint32_t)0x00000000) /*!<Double data rate mode disabled*/
Kojto 108:34e6b704fe68 340 #define QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM) /*!<Double data rate mode enabled*/
Kojto 108:34e6b704fe68 341 /**
Kojto 108:34e6b704fe68 342 * @}
Kojto 108:34e6b704fe68 343 */
Kojto 108:34e6b704fe68 344
Kojto 108:34e6b704fe68 345 /** @defgroup QSPI_DdrHoldHalfCycle QSPI Ddr HoldHalfCycle
Kojto 108:34e6b704fe68 346 * @{
Kojto 108:34e6b704fe68 347 */
Kojto 108:34e6b704fe68 348 #define QSPI_DDR_HHC_ANALOG_DELAY ((uint32_t)0x00000000) /*!<Delay the data output using analog delay in DDR mode*/
Kojto 108:34e6b704fe68 349 #define QSPI_DDR_HHC_HALF_CLK_DELAY ((uint32_t)QUADSPI_CCR_DHHC) /*!<Delay the data output by 1/2 clock cycle in DDR mode*/
Kojto 108:34e6b704fe68 350 /**
Kojto 108:34e6b704fe68 351 * @}
Kojto 108:34e6b704fe68 352 */
Kojto 108:34e6b704fe68 353
Kojto 108:34e6b704fe68 354 /** @defgroup QSPI_SIOOMode QSPI SIOO Mode
Kojto 108:34e6b704fe68 355 * @{
Kojto 108:34e6b704fe68 356 */
Kojto 108:34e6b704fe68 357 #define QSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000) /*!<Send instruction on every transaction*/
Kojto 108:34e6b704fe68 358 #define QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO) /*!<Send instruction only for the first command*/
Kojto 108:34e6b704fe68 359 /**
Kojto 108:34e6b704fe68 360 * @}
Kojto 108:34e6b704fe68 361 */
Kojto 108:34e6b704fe68 362
Kojto 108:34e6b704fe68 363 /** @defgroup QSPI_MatchMode QSPI Match Mode
Kojto 108:34e6b704fe68 364 * @{
Kojto 108:34e6b704fe68 365 */
Kojto 108:34e6b704fe68 366 #define QSPI_MATCH_MODE_AND ((uint32_t)0x00000000) /*!<AND match mode between unmasked bits*/
Kojto 108:34e6b704fe68 367 #define QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM) /*!<OR match mode between unmasked bits*/
Kojto 108:34e6b704fe68 368 /**
Kojto 108:34e6b704fe68 369 * @}
Kojto 108:34e6b704fe68 370 */
Kojto 108:34e6b704fe68 371
Kojto 108:34e6b704fe68 372 /** @defgroup QSPI_AutomaticStop QSPI Automatic Stop
Kojto 108:34e6b704fe68 373 * @{
Kojto 108:34e6b704fe68 374 */
Kojto 108:34e6b704fe68 375 #define QSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000) /*!<AutoPolling stops only with abort or QSPI disabling*/
Kojto 108:34e6b704fe68 376 #define QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS) /*!<AutoPolling stops as soon as there is a match*/
Kojto 108:34e6b704fe68 377 /**
Kojto 108:34e6b704fe68 378 * @}
Kojto 108:34e6b704fe68 379 */
Kojto 108:34e6b704fe68 380
Kojto 108:34e6b704fe68 381 /** @defgroup QSPI_TimeOutActivation QSPI TimeOut Activation
Kojto 108:34e6b704fe68 382 * @{
Kojto 108:34e6b704fe68 383 */
Kojto 108:34e6b704fe68 384 #define QSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000) /*!<Timeout counter disabled, nCS remains active*/
Kojto 108:34e6b704fe68 385 #define QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN) /*!<Timeout counter enabled, nCS released when timeout expires*/
Kojto 108:34e6b704fe68 386 /**
Kojto 108:34e6b704fe68 387 * @}
Kojto 108:34e6b704fe68 388 */
Kojto 108:34e6b704fe68 389
Kojto 108:34e6b704fe68 390 /** @defgroup QSPI_Flags QSPI Flags
Kojto 108:34e6b704fe68 391 * @{
Kojto 108:34e6b704fe68 392 */
Kojto 108:34e6b704fe68 393 #define QSPI_FLAG_BUSY QUADSPI_SR_BUSY /*!<Busy flag: operation is ongoing*/
Kojto 108:34e6b704fe68 394 #define QSPI_FLAG_TO QUADSPI_SR_TOF /*!<Timeout flag: timeout occurs in memory-mapped mode*/
Kojto 108:34e6b704fe68 395 #define QSPI_FLAG_SM QUADSPI_SR_SMF /*!<Status match flag: received data matches in autopolling mode*/
Kojto 108:34e6b704fe68 396 #define QSPI_FLAG_FT QUADSPI_SR_FTF /*!<Fifo threshold flag: Fifo threshold reached or data left after read from memory is complete*/
Kojto 108:34e6b704fe68 397 #define QSPI_FLAG_TC QUADSPI_SR_TCF /*!<Transfer complete flag: programmed number of data have been transferred or the transfer has been aborted*/
Kojto 108:34e6b704fe68 398 #define QSPI_FLAG_TE QUADSPI_SR_TEF /*!<Transfer error flag: invalid address is being accessed*/
Kojto 108:34e6b704fe68 399 /**
Kojto 108:34e6b704fe68 400 * @}
Kojto 108:34e6b704fe68 401 */
Kojto 108:34e6b704fe68 402
Kojto 108:34e6b704fe68 403 /** @defgroup QSPI_Interrupts QSPI Interrupts
Kojto 108:34e6b704fe68 404 * @{
Kojto 108:34e6b704fe68 405 */
Kojto 108:34e6b704fe68 406 #define QSPI_IT_TO QUADSPI_CR_TOIE /*!<Interrupt on the timeout flag*/
Kojto 108:34e6b704fe68 407 #define QSPI_IT_SM QUADSPI_CR_SMIE /*!<Interrupt on the status match flag*/
Kojto 108:34e6b704fe68 408 #define QSPI_IT_FT QUADSPI_CR_FTIE /*!<Interrupt on the fifo threshold flag*/
Kojto 108:34e6b704fe68 409 #define QSPI_IT_TC QUADSPI_CR_TCIE /*!<Interrupt on the transfer complete flag*/
Kojto 108:34e6b704fe68 410 #define QSPI_IT_TE QUADSPI_CR_TEIE /*!<Interrupt on the transfer error flag*/
Kojto 108:34e6b704fe68 411 /**
Kojto 108:34e6b704fe68 412 * @}
Kojto 108:34e6b704fe68 413 */
Kojto 108:34e6b704fe68 414
Kojto 108:34e6b704fe68 415 /** @defgroup QSPI_Timeout_definition QSPI Timeout definition
Kojto 108:34e6b704fe68 416 * @{
Kojto 108:34e6b704fe68 417 */
Kojto 108:34e6b704fe68 418 #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)/* 5 s */
Kojto 108:34e6b704fe68 419 /**
Kojto 108:34e6b704fe68 420 * @}
Kojto 108:34e6b704fe68 421 */
Kojto 108:34e6b704fe68 422
Kojto 108:34e6b704fe68 423 /**
Kojto 108:34e6b704fe68 424 * @}
Kojto 108:34e6b704fe68 425 */
Kojto 108:34e6b704fe68 426
Kojto 108:34e6b704fe68 427 /* Exported macros -----------------------------------------------------------*/
Kojto 108:34e6b704fe68 428 /** @defgroup QSPI_Exported_Macros QSPI Exported Macros
Kojto 108:34e6b704fe68 429 * @{
Kojto 108:34e6b704fe68 430 */
Kojto 108:34e6b704fe68 431
Kojto 108:34e6b704fe68 432 /** @brief Reset QSPI handle state
Kojto 108:34e6b704fe68 433 * @param __HANDLE__: QSPI handle.
Kojto 108:34e6b704fe68 434 * @retval None
Kojto 108:34e6b704fe68 435 */
Kojto 108:34e6b704fe68 436 #define __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_QSPI_STATE_RESET)
Kojto 108:34e6b704fe68 437
Kojto 108:34e6b704fe68 438 /** @brief Enable QSPI
Kojto 108:34e6b704fe68 439 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 440 * @retval None
Kojto 108:34e6b704fe68 441 */
Kojto 108:34e6b704fe68 442 #define __HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
Kojto 108:34e6b704fe68 443
Kojto 108:34e6b704fe68 444 /** @brief Disable QSPI
Kojto 108:34e6b704fe68 445 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 446 * @retval None
Kojto 108:34e6b704fe68 447 */
Kojto 108:34e6b704fe68 448 #define __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
Kojto 108:34e6b704fe68 449
Kojto 108:34e6b704fe68 450 /** @brief Enables the specified QSPI interrupt.
Kojto 108:34e6b704fe68 451 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 452 * @param __INTERRUPT__: specifies the QSPI interrupt source to enable.
Kojto 108:34e6b704fe68 453 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 454 * @arg QSPI_IT_TO: QSPI Time out interrupt
Kojto 108:34e6b704fe68 455 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 108:34e6b704fe68 456 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 108:34e6b704fe68 457 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 108:34e6b704fe68 458 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 108:34e6b704fe68 459 * @retval None
Kojto 108:34e6b704fe68 460 */
Kojto 108:34e6b704fe68 461 #define __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
Kojto 108:34e6b704fe68 462
Kojto 108:34e6b704fe68 463
Kojto 108:34e6b704fe68 464 /** @brief Disables the specified QSPI interrupt.
Kojto 108:34e6b704fe68 465 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 466 * @param __INTERRUPT__: specifies the QSPI interrupt source to disable.
Kojto 108:34e6b704fe68 467 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 468 * @arg QSPI_IT_TO: QSPI Timeout interrupt
Kojto 108:34e6b704fe68 469 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 108:34e6b704fe68 470 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 108:34e6b704fe68 471 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 108:34e6b704fe68 472 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 108:34e6b704fe68 473 * @retval None
Kojto 108:34e6b704fe68 474 */
Kojto 108:34e6b704fe68 475 #define __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
Kojto 108:34e6b704fe68 476
Kojto 108:34e6b704fe68 477 /** @brief Checks whether the specified QSPI interrupt source is enabled.
Kojto 108:34e6b704fe68 478 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 479 * @param __INTERRUPT__: specifies the QSPI interrupt source to check.
Kojto 108:34e6b704fe68 480 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 481 * @arg QSPI_IT_TO: QSPI Time out interrupt
Kojto 108:34e6b704fe68 482 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 108:34e6b704fe68 483 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 108:34e6b704fe68 484 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 108:34e6b704fe68 485 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 108:34e6b704fe68 486 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
Kojto 108:34e6b704fe68 487 */
Kojto 108:34e6b704fe68 488 #define __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__))
Kojto 108:34e6b704fe68 489
Kojto 108:34e6b704fe68 490 /**
Kojto 108:34e6b704fe68 491 * @brief Get the selected QSPI's flag status.
Kojto 108:34e6b704fe68 492 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 493 * @param __FLAG__: specifies the QSPI flag to check.
Kojto 108:34e6b704fe68 494 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 495 * @arg QSPI_FLAG_BUSY: QSPI Busy flag
Kojto 108:34e6b704fe68 496 * @arg QSPI_FLAG_TO: QSPI Time out flag
Kojto 108:34e6b704fe68 497 * @arg QSPI_FLAG_SM: QSPI Status match flag
Kojto 108:34e6b704fe68 498 * @arg QSPI_FLAG_FT: QSPI FIFO threshold flag
Kojto 108:34e6b704fe68 499 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
Kojto 108:34e6b704fe68 500 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
Kojto 108:34e6b704fe68 501 * @retval None
Kojto 108:34e6b704fe68 502 */
Kojto 108:34e6b704fe68 503 #define __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0)
Kojto 108:34e6b704fe68 504
Kojto 108:34e6b704fe68 505 /** @brief Clears the specified QSPI's flag status.
Kojto 108:34e6b704fe68 506 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 108:34e6b704fe68 507 * @param __FLAG__: specifies the QSPI clear register flag that needs to be set
Kojto 108:34e6b704fe68 508 * This parameter can be one of the following values:
Kojto 108:34e6b704fe68 509 * @arg QSPI_FLAG_TO: QSPI Time out flag
Kojto 108:34e6b704fe68 510 * @arg QSPI_FLAG_SM: QSPI Status match flag
Kojto 108:34e6b704fe68 511 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
Kojto 108:34e6b704fe68 512 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
Kojto 108:34e6b704fe68 513 * @retval None
Kojto 108:34e6b704fe68 514 */
Kojto 108:34e6b704fe68 515 #define __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__))
Kojto 108:34e6b704fe68 516 /**
Kojto 108:34e6b704fe68 517 * @}
Kojto 108:34e6b704fe68 518 */
Kojto 108:34e6b704fe68 519
Kojto 108:34e6b704fe68 520 /* Exported functions --------------------------------------------------------*/
Kojto 108:34e6b704fe68 521 /** @addtogroup QSPI_Exported_Functions
Kojto 108:34e6b704fe68 522 * @{
Kojto 108:34e6b704fe68 523 */
Kojto 108:34e6b704fe68 524
Kojto 108:34e6b704fe68 525 /** @addtogroup QSPI_Exported_Functions_Group1
Kojto 108:34e6b704fe68 526 * @{
Kojto 108:34e6b704fe68 527 */
Kojto 108:34e6b704fe68 528 /* Initialization/de-initialization functions ********************************/
Kojto 108:34e6b704fe68 529 HAL_StatusTypeDef HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 530 HAL_StatusTypeDef HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 531 void HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 532 void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 533 /**
Kojto 108:34e6b704fe68 534 * @}
Kojto 108:34e6b704fe68 535 */
Kojto 108:34e6b704fe68 536
Kojto 108:34e6b704fe68 537 /** @addtogroup QSPI_Exported_Functions_Group2
Kojto 108:34e6b704fe68 538 * @{
Kojto 108:34e6b704fe68 539 */
Kojto 108:34e6b704fe68 540 /* IO operation functions *****************************************************/
Kojto 108:34e6b704fe68 541 /* QSPI IRQ handler method */
Kojto 108:34e6b704fe68 542 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 543
Kojto 108:34e6b704fe68 544 /* QSPI indirect mode */
Kojto 108:34e6b704fe68 545 HAL_StatusTypeDef HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout);
Kojto 108:34e6b704fe68 546 HAL_StatusTypeDef HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
Kojto 108:34e6b704fe68 547 HAL_StatusTypeDef HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
Kojto 108:34e6b704fe68 548 HAL_StatusTypeDef HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd);
Kojto 108:34e6b704fe68 549 HAL_StatusTypeDef HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 108:34e6b704fe68 550 HAL_StatusTypeDef HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 108:34e6b704fe68 551 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 108:34e6b704fe68 552 HAL_StatusTypeDef HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 108:34e6b704fe68 553
Kojto 108:34e6b704fe68 554 /* QSPI status flag polling mode */
Kojto 108:34e6b704fe68 555 HAL_StatusTypeDef HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout);
Kojto 108:34e6b704fe68 556 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg);
Kojto 108:34e6b704fe68 557
Kojto 108:34e6b704fe68 558 /* QSPI memory-mapped mode */
Kojto 108:34e6b704fe68 559 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
Kojto 108:34e6b704fe68 560 /**
Kojto 108:34e6b704fe68 561 * @}
Kojto 108:34e6b704fe68 562 */
Kojto 108:34e6b704fe68 563
Kojto 108:34e6b704fe68 564 /** @addtogroup QSPI_Exported_Functions_Group3
Kojto 108:34e6b704fe68 565 * @{
Kojto 108:34e6b704fe68 566 */
Kojto 108:34e6b704fe68 567 /* Callback functions in non-blocking modes ***********************************/
Kojto 108:34e6b704fe68 568 void HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 569 void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 570
Kojto 108:34e6b704fe68 571 /* QSPI indirect mode */
Kojto 108:34e6b704fe68 572 void HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 573 void HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 574 void HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 575 void HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 576 void HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 577
Kojto 108:34e6b704fe68 578 /* QSPI status flag polling mode */
Kojto 108:34e6b704fe68 579 void HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 580
Kojto 108:34e6b704fe68 581 /* QSPI memory-mapped mode */
Kojto 108:34e6b704fe68 582 void HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 583 /**
Kojto 108:34e6b704fe68 584 * @}
Kojto 108:34e6b704fe68 585 */
Kojto 108:34e6b704fe68 586
Kojto 108:34e6b704fe68 587 /** @addtogroup QSPI_Exported_Functions_Group4
Kojto 108:34e6b704fe68 588 * @{
Kojto 108:34e6b704fe68 589 */
Kojto 108:34e6b704fe68 590 /* Peripheral Control and State functions ************************************/
Kojto 108:34e6b704fe68 591 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 592 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 593 HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi);
Kojto 108:34e6b704fe68 594 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
Kojto 108:34e6b704fe68 595 /**
Kojto 108:34e6b704fe68 596 * @}
Kojto 108:34e6b704fe68 597 */
Kojto 108:34e6b704fe68 598
Kojto 108:34e6b704fe68 599 /**
Kojto 108:34e6b704fe68 600 * @}
Kojto 108:34e6b704fe68 601 */
Kojto 108:34e6b704fe68 602
Kojto 108:34e6b704fe68 603 /* Private types -------------------------------------------------------------*/
Kojto 108:34e6b704fe68 604 /* Private variables ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 605 /* Private constants ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 606 /** @defgroup QSPI_Private_Constants QSPI Private Constants
Kojto 108:34e6b704fe68 607 * @{
Kojto 108:34e6b704fe68 608 */
Kojto 108:34e6b704fe68 609
Kojto 108:34e6b704fe68 610 /**
Kojto 108:34e6b704fe68 611 * @}
Kojto 108:34e6b704fe68 612 */
Kojto 108:34e6b704fe68 613
Kojto 108:34e6b704fe68 614 /* Private macros ------------------------------------------------------------*/
Kojto 108:34e6b704fe68 615 /** @defgroup QSPI_Private_Macros QSPI Private Macros
Kojto 108:34e6b704fe68 616 * @{
Kojto 108:34e6b704fe68 617 */
Kojto 108:34e6b704fe68 618 /** @defgroup QSPI_ClockPrescaler QSPI Clock Prescaler
Kojto 108:34e6b704fe68 619 * @{
Kojto 108:34e6b704fe68 620 */
Kojto 108:34e6b704fe68 621 #define IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFF)
Kojto 108:34e6b704fe68 622 /**
Kojto 108:34e6b704fe68 623 * @}
Kojto 108:34e6b704fe68 624 */
Kojto 108:34e6b704fe68 625
Kojto 108:34e6b704fe68 626 /** @defgroup QSPI_FifoThreshold QSPI Fifo Threshold
Kojto 108:34e6b704fe68 627 * @{
Kojto 108:34e6b704fe68 628 */
Kojto 108:34e6b704fe68 629 #define IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0) && ((THR) <= 32))
Kojto 108:34e6b704fe68 630 /**
Kojto 108:34e6b704fe68 631 * @}
Kojto 108:34e6b704fe68 632 */
Kojto 108:34e6b704fe68 633
Kojto 108:34e6b704fe68 634 #define IS_QSPI_SSHIFT(SSHIFT) (((SSHIFT) == QSPI_SAMPLE_SHIFTING_NONE) || \
Kojto 108:34e6b704fe68 635 ((SSHIFT) == QSPI_SAMPLE_SHIFTING_HALFCYCLE))
Kojto 108:34e6b704fe68 636
Kojto 108:34e6b704fe68 637 /** @defgroup QSPI_FlashSize QSPI Flash Size
Kojto 108:34e6b704fe68 638 * @{
Kojto 108:34e6b704fe68 639 */
Kojto 108:34e6b704fe68 640 #define IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31))
Kojto 108:34e6b704fe68 641 /**
Kojto 108:34e6b704fe68 642 * @}
Kojto 108:34e6b704fe68 643 */
Kojto 108:34e6b704fe68 644
Kojto 108:34e6b704fe68 645 #define IS_QSPI_CS_HIGH_TIME(CSHTIME) (((CSHTIME) == QSPI_CS_HIGH_TIME_1_CYCLE) || \
Kojto 108:34e6b704fe68 646 ((CSHTIME) == QSPI_CS_HIGH_TIME_2_CYCLE) || \
Kojto 108:34e6b704fe68 647 ((CSHTIME) == QSPI_CS_HIGH_TIME_3_CYCLE) || \
Kojto 108:34e6b704fe68 648 ((CSHTIME) == QSPI_CS_HIGH_TIME_4_CYCLE) || \
Kojto 108:34e6b704fe68 649 ((CSHTIME) == QSPI_CS_HIGH_TIME_5_CYCLE) || \
Kojto 108:34e6b704fe68 650 ((CSHTIME) == QSPI_CS_HIGH_TIME_6_CYCLE) || \
Kojto 108:34e6b704fe68 651 ((CSHTIME) == QSPI_CS_HIGH_TIME_7_CYCLE) || \
Kojto 108:34e6b704fe68 652 ((CSHTIME) == QSPI_CS_HIGH_TIME_8_CYCLE))
Kojto 108:34e6b704fe68 653
Kojto 108:34e6b704fe68 654 #define IS_QSPI_CLOCK_MODE(CLKMODE) (((CLKMODE) == QSPI_CLOCK_MODE_0) || \
Kojto 108:34e6b704fe68 655 ((CLKMODE) == QSPI_CLOCK_MODE_3))
Kojto 108:34e6b704fe68 656
Kojto 108:34e6b704fe68 657 #define IS_QSPI_FLASH_ID(FLA) (((FLA) == QSPI_FLASH_ID_1) || \
Kojto 108:34e6b704fe68 658 ((FLA) == QSPI_FLASH_ID_2))
Kojto 108:34e6b704fe68 659
Kojto 108:34e6b704fe68 660 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \
Kojto 108:34e6b704fe68 661 ((MODE) == QSPI_DUALFLASH_DISABLE))
Kojto 108:34e6b704fe68 662
Kojto 108:34e6b704fe68 663
Kojto 108:34e6b704fe68 664 /** @defgroup QSPI_Instruction QSPI Instruction
Kojto 108:34e6b704fe68 665 * @{
Kojto 108:34e6b704fe68 666 */
Kojto 108:34e6b704fe68 667 #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF)
Kojto 108:34e6b704fe68 668 /**
Kojto 108:34e6b704fe68 669 * @}
Kojto 108:34e6b704fe68 670 */
Kojto 108:34e6b704fe68 671
Kojto 108:34e6b704fe68 672 #define IS_QSPI_ADDRESS_SIZE(ADDR_SIZE) (((ADDR_SIZE) == QSPI_ADDRESS_8_BITS) || \
Kojto 108:34e6b704fe68 673 ((ADDR_SIZE) == QSPI_ADDRESS_16_BITS) || \
Kojto 108:34e6b704fe68 674 ((ADDR_SIZE) == QSPI_ADDRESS_24_BITS) || \
Kojto 108:34e6b704fe68 675 ((ADDR_SIZE) == QSPI_ADDRESS_32_BITS))
Kojto 108:34e6b704fe68 676
Kojto 108:34e6b704fe68 677 #define IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE) (((SIZE) == QSPI_ALTERNATE_BYTES_8_BITS) || \
Kojto 108:34e6b704fe68 678 ((SIZE) == QSPI_ALTERNATE_BYTES_16_BITS) || \
Kojto 108:34e6b704fe68 679 ((SIZE) == QSPI_ALTERNATE_BYTES_24_BITS) || \
Kojto 108:34e6b704fe68 680 ((SIZE) == QSPI_ALTERNATE_BYTES_32_BITS))
Kojto 108:34e6b704fe68 681
Kojto 108:34e6b704fe68 682
Kojto 108:34e6b704fe68 683 /** @defgroup QSPI_DummyCycles QSPI Dummy Cycles
Kojto 108:34e6b704fe68 684 * @{
Kojto 108:34e6b704fe68 685 */
Kojto 108:34e6b704fe68 686 #define IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31)
Kojto 108:34e6b704fe68 687 /**
Kojto 108:34e6b704fe68 688 * @}
Kojto 108:34e6b704fe68 689 */
Kojto 108:34e6b704fe68 690
Kojto 108:34e6b704fe68 691 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \
Kojto 108:34e6b704fe68 692 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
Kojto 108:34e6b704fe68 693 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
Kojto 108:34e6b704fe68 694 ((MODE) == QSPI_INSTRUCTION_4_LINES))
Kojto 108:34e6b704fe68 695
Kojto 108:34e6b704fe68 696 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \
Kojto 108:34e6b704fe68 697 ((MODE) == QSPI_ADDRESS_1_LINE) || \
Kojto 108:34e6b704fe68 698 ((MODE) == QSPI_ADDRESS_2_LINES) || \
Kojto 108:34e6b704fe68 699 ((MODE) == QSPI_ADDRESS_4_LINES))
Kojto 108:34e6b704fe68 700
Kojto 108:34e6b704fe68 701 #define IS_QSPI_ALTERNATE_BYTES_MODE(MODE) (((MODE) == QSPI_ALTERNATE_BYTES_NONE) || \
Kojto 108:34e6b704fe68 702 ((MODE) == QSPI_ALTERNATE_BYTES_1_LINE) || \
Kojto 108:34e6b704fe68 703 ((MODE) == QSPI_ALTERNATE_BYTES_2_LINES) || \
Kojto 108:34e6b704fe68 704 ((MODE) == QSPI_ALTERNATE_BYTES_4_LINES))
Kojto 108:34e6b704fe68 705
Kojto 108:34e6b704fe68 706 #define IS_QSPI_DATA_MODE(MODE) (((MODE) == QSPI_DATA_NONE) || \
Kojto 108:34e6b704fe68 707 ((MODE) == QSPI_DATA_1_LINE) || \
Kojto 108:34e6b704fe68 708 ((MODE) == QSPI_DATA_2_LINES) || \
Kojto 108:34e6b704fe68 709 ((MODE) == QSPI_DATA_4_LINES))
Kojto 108:34e6b704fe68 710
Kojto 108:34e6b704fe68 711 #define IS_QSPI_DDR_MODE(DDR_MODE) (((DDR_MODE) == QSPI_DDR_MODE_DISABLE) || \
Kojto 108:34e6b704fe68 712 ((DDR_MODE) == QSPI_DDR_MODE_ENABLE))
Kojto 108:34e6b704fe68 713
Kojto 108:34e6b704fe68 714 #define IS_QSPI_DDR_HHC(DDR_HHC) (((DDR_HHC) == QSPI_DDR_HHC_ANALOG_DELAY) || \
Kojto 108:34e6b704fe68 715 ((DDR_HHC) == QSPI_DDR_HHC_HALF_CLK_DELAY))
Kojto 108:34e6b704fe68 716
Kojto 108:34e6b704fe68 717 #define IS_QSPI_SIOO_MODE(SIOO_MODE) (((SIOO_MODE) == QSPI_SIOO_INST_EVERY_CMD) || \
Kojto 108:34e6b704fe68 718 ((SIOO_MODE) == QSPI_SIOO_INST_ONLY_FIRST_CMD))
Kojto 108:34e6b704fe68 719
Kojto 108:34e6b704fe68 720 /** @defgroup QSPI_Interval QSPI Interval
Kojto 108:34e6b704fe68 721 * @{
Kojto 108:34e6b704fe68 722 */
Kojto 108:34e6b704fe68 723 #define IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL)
Kojto 108:34e6b704fe68 724 /**
Kojto 108:34e6b704fe68 725 * @}
Kojto 108:34e6b704fe68 726 */
Kojto 108:34e6b704fe68 727
Kojto 108:34e6b704fe68 728 /** @defgroup QSPI_StatusBytesSize QSPI Status Bytes Size
Kojto 108:34e6b704fe68 729 * @{
Kojto 108:34e6b704fe68 730 */
Kojto 108:34e6b704fe68 731 #define IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4))
Kojto 108:34e6b704fe68 732 /**
Kojto 108:34e6b704fe68 733 * @}
Kojto 108:34e6b704fe68 734 */
Kojto 108:34e6b704fe68 735 #define IS_QSPI_MATCH_MODE(MODE) (((MODE) == QSPI_MATCH_MODE_AND) || \
Kojto 108:34e6b704fe68 736 ((MODE) == QSPI_MATCH_MODE_OR))
Kojto 108:34e6b704fe68 737
Kojto 108:34e6b704fe68 738 #define IS_QSPI_AUTOMATIC_STOP(APMS) (((APMS) == QSPI_AUTOMATIC_STOP_DISABLE) || \
Kojto 108:34e6b704fe68 739 ((APMS) == QSPI_AUTOMATIC_STOP_ENABLE))
Kojto 108:34e6b704fe68 740
Kojto 108:34e6b704fe68 741 #define IS_QSPI_TIMEOUT_ACTIVATION(TCEN) (((TCEN) == QSPI_TIMEOUT_COUNTER_DISABLE) || \
Kojto 108:34e6b704fe68 742 ((TCEN) == QSPI_TIMEOUT_COUNTER_ENABLE))
Kojto 108:34e6b704fe68 743
Kojto 108:34e6b704fe68 744 /** @defgroup QSPI_TimeOutPeriod QSPI TimeOut Period
Kojto 108:34e6b704fe68 745 * @{
Kojto 108:34e6b704fe68 746 */
Kojto 108:34e6b704fe68 747 #define IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF)
Kojto 108:34e6b704fe68 748 /**
Kojto 108:34e6b704fe68 749 * @}
Kojto 108:34e6b704fe68 750 */
Kojto 108:34e6b704fe68 751
Kojto 108:34e6b704fe68 752 #define IS_QSPI_GET_FLAG(FLAG) (((FLAG) == QSPI_FLAG_BUSY) || \
Kojto 108:34e6b704fe68 753 ((FLAG) == QSPI_FLAG_TO) || \
Kojto 108:34e6b704fe68 754 ((FLAG) == QSPI_FLAG_SM) || \
Kojto 108:34e6b704fe68 755 ((FLAG) == QSPI_FLAG_FT) || \
Kojto 108:34e6b704fe68 756 ((FLAG) == QSPI_FLAG_TC) || \
Kojto 108:34e6b704fe68 757 ((FLAG) == QSPI_FLAG_TE))
Kojto 108:34e6b704fe68 758
Kojto 108:34e6b704fe68 759 #define IS_QSPI_IT(IT) ((((IT) & (uint32_t)0xFFE0FFFF) == 0x00000000) && ((IT) != 0x00000000))
Kojto 108:34e6b704fe68 760 /**
Kojto 108:34e6b704fe68 761 * @}
Kojto 108:34e6b704fe68 762 */
Kojto 108:34e6b704fe68 763
Kojto 108:34e6b704fe68 764 /* Private functions ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 765 /** @defgroup QSPI_Private_Functions QSPI Private Functions
Kojto 108:34e6b704fe68 766 * @{
Kojto 108:34e6b704fe68 767 */
Kojto 108:34e6b704fe68 768
Kojto 108:34e6b704fe68 769 /**
Kojto 108:34e6b704fe68 770 * @}
Kojto 108:34e6b704fe68 771 */
Kojto 108:34e6b704fe68 772
Kojto 108:34e6b704fe68 773 /**
Kojto 108:34e6b704fe68 774 * @}
Kojto 108:34e6b704fe68 775 */
Kojto 108:34e6b704fe68 776
Kojto 108:34e6b704fe68 777 /**
Kojto 108:34e6b704fe68 778 * @}
Kojto 108:34e6b704fe68 779 */
Kojto 110:165afa46840b 780 #endif /* STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 108:34e6b704fe68 781
Kojto 108:34e6b704fe68 782 #ifdef __cplusplus
Kojto 108:34e6b704fe68 783 }
Kojto 108:34e6b704fe68 784 #endif
Kojto 108:34e6b704fe68 785
Kojto 108:34e6b704fe68 786 #endif /* __STM32F4xx_HAL_QSPI_H */
Kojto 108:34e6b704fe68 787
Kojto 108:34e6b704fe68 788 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/