Elijah Orr
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TARGET_NUCLEO_F103RB/stm32f10x_adc.h@73:1efda918f0ba, 2013-12-09 (annotated)
- Committer:
- bogdanm
- Date:
- Mon Dec 09 18:43:03 2013 +0200
- Revision:
- 73:1efda918f0ba
- Child:
- 76:824293ae5e43
Release 73 of the mbed library
Main changes:
- added support for KL46Z and NUCLEO_F103RB
- STM32 USB device support
- various bug fixes
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 73:1efda918f0ba | 1 | /** |
| bogdanm | 73:1efda918f0ba | 2 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 3 | * @file stm32f10x_adc.h |
| bogdanm | 73:1efda918f0ba | 4 | * @author MCD Application Team |
| bogdanm | 73:1efda918f0ba | 5 | * @version V3.5.0 |
| bogdanm | 73:1efda918f0ba | 6 | * @date 11-March-2011 |
| bogdanm | 73:1efda918f0ba | 7 | * @brief This file contains all the functions prototypes for the ADC firmware |
| bogdanm | 73:1efda918f0ba | 8 | * library. |
| bogdanm | 73:1efda918f0ba | 9 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 10 | * @attention |
| bogdanm | 73:1efda918f0ba | 11 | * |
| bogdanm | 73:1efda918f0ba | 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| bogdanm | 73:1efda918f0ba | 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| bogdanm | 73:1efda918f0ba | 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| bogdanm | 73:1efda918f0ba | 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| bogdanm | 73:1efda918f0ba | 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| bogdanm | 73:1efda918f0ba | 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| bogdanm | 73:1efda918f0ba | 18 | * |
| bogdanm | 73:1efda918f0ba | 19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
| bogdanm | 73:1efda918f0ba | 20 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 21 | */ |
| bogdanm | 73:1efda918f0ba | 22 | |
| bogdanm | 73:1efda918f0ba | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 24 | #ifndef __STM32F10x_ADC_H |
| bogdanm | 73:1efda918f0ba | 25 | #define __STM32F10x_ADC_H |
| bogdanm | 73:1efda918f0ba | 26 | |
| bogdanm | 73:1efda918f0ba | 27 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 28 | extern "C" { |
| bogdanm | 73:1efda918f0ba | 29 | #endif |
| bogdanm | 73:1efda918f0ba | 30 | |
| bogdanm | 73:1efda918f0ba | 31 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 32 | #include "stm32f10x.h" |
| bogdanm | 73:1efda918f0ba | 33 | |
| bogdanm | 73:1efda918f0ba | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver |
| bogdanm | 73:1efda918f0ba | 35 | * @{ |
| bogdanm | 73:1efda918f0ba | 36 | */ |
| bogdanm | 73:1efda918f0ba | 37 | |
| bogdanm | 73:1efda918f0ba | 38 | /** @addtogroup ADC |
| bogdanm | 73:1efda918f0ba | 39 | * @{ |
| bogdanm | 73:1efda918f0ba | 40 | */ |
| bogdanm | 73:1efda918f0ba | 41 | |
| bogdanm | 73:1efda918f0ba | 42 | /** @defgroup ADC_Exported_Types |
| bogdanm | 73:1efda918f0ba | 43 | * @{ |
| bogdanm | 73:1efda918f0ba | 44 | */ |
| bogdanm | 73:1efda918f0ba | 45 | |
| bogdanm | 73:1efda918f0ba | 46 | /** |
| bogdanm | 73:1efda918f0ba | 47 | * @brief ADC Init structure definition |
| bogdanm | 73:1efda918f0ba | 48 | */ |
| bogdanm | 73:1efda918f0ba | 49 | |
| bogdanm | 73:1efda918f0ba | 50 | typedef struct |
| bogdanm | 73:1efda918f0ba | 51 | { |
| bogdanm | 73:1efda918f0ba | 52 | uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or |
| bogdanm | 73:1efda918f0ba | 53 | dual mode. |
| bogdanm | 73:1efda918f0ba | 54 | This parameter can be a value of @ref ADC_mode */ |
| bogdanm | 73:1efda918f0ba | 55 | |
| bogdanm | 73:1efda918f0ba | 56 | FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in |
| bogdanm | 73:1efda918f0ba | 57 | Scan (multichannels) or Single (one channel) mode. |
| bogdanm | 73:1efda918f0ba | 58 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 73:1efda918f0ba | 59 | |
| bogdanm | 73:1efda918f0ba | 60 | FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in |
| bogdanm | 73:1efda918f0ba | 61 | Continuous or Single mode. |
| bogdanm | 73:1efda918f0ba | 62 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 73:1efda918f0ba | 63 | |
| bogdanm | 73:1efda918f0ba | 64 | uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog |
| bogdanm | 73:1efda918f0ba | 65 | to digital conversion of regular channels. This parameter |
| bogdanm | 73:1efda918f0ba | 66 | can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ |
| bogdanm | 73:1efda918f0ba | 67 | |
| bogdanm | 73:1efda918f0ba | 68 | uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. |
| bogdanm | 73:1efda918f0ba | 69 | This parameter can be a value of @ref ADC_data_align */ |
| bogdanm | 73:1efda918f0ba | 70 | |
| bogdanm | 73:1efda918f0ba | 71 | uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted |
| bogdanm | 73:1efda918f0ba | 72 | using the sequencer for regular channel group. |
| bogdanm | 73:1efda918f0ba | 73 | This parameter must range from 1 to 16. */ |
| bogdanm | 73:1efda918f0ba | 74 | }ADC_InitTypeDef; |
| bogdanm | 73:1efda918f0ba | 75 | /** |
| bogdanm | 73:1efda918f0ba | 76 | * @} |
| bogdanm | 73:1efda918f0ba | 77 | */ |
| bogdanm | 73:1efda918f0ba | 78 | |
| bogdanm | 73:1efda918f0ba | 79 | /** @defgroup ADC_Exported_Constants |
| bogdanm | 73:1efda918f0ba | 80 | * @{ |
| bogdanm | 73:1efda918f0ba | 81 | */ |
| bogdanm | 73:1efda918f0ba | 82 | |
| bogdanm | 73:1efda918f0ba | 83 | #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ |
| bogdanm | 73:1efda918f0ba | 84 | ((PERIPH) == ADC2) || \ |
| bogdanm | 73:1efda918f0ba | 85 | ((PERIPH) == ADC3)) |
| bogdanm | 73:1efda918f0ba | 86 | |
| bogdanm | 73:1efda918f0ba | 87 | #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ |
| bogdanm | 73:1efda918f0ba | 88 | ((PERIPH) == ADC3)) |
| bogdanm | 73:1efda918f0ba | 89 | |
| bogdanm | 73:1efda918f0ba | 90 | /** @defgroup ADC_mode |
| bogdanm | 73:1efda918f0ba | 91 | * @{ |
| bogdanm | 73:1efda918f0ba | 92 | */ |
| bogdanm | 73:1efda918f0ba | 93 | |
| bogdanm | 73:1efda918f0ba | 94 | #define ADC_Mode_Independent ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 95 | #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) |
| bogdanm | 73:1efda918f0ba | 96 | #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) |
| bogdanm | 73:1efda918f0ba | 97 | #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) |
| bogdanm | 73:1efda918f0ba | 98 | #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) |
| bogdanm | 73:1efda918f0ba | 99 | #define ADC_Mode_InjecSimult ((uint32_t)0x00050000) |
| bogdanm | 73:1efda918f0ba | 100 | #define ADC_Mode_RegSimult ((uint32_t)0x00060000) |
| bogdanm | 73:1efda918f0ba | 101 | #define ADC_Mode_FastInterl ((uint32_t)0x00070000) |
| bogdanm | 73:1efda918f0ba | 102 | #define ADC_Mode_SlowInterl ((uint32_t)0x00080000) |
| bogdanm | 73:1efda918f0ba | 103 | #define ADC_Mode_AlterTrig ((uint32_t)0x00090000) |
| bogdanm | 73:1efda918f0ba | 104 | |
| bogdanm | 73:1efda918f0ba | 105 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ |
| bogdanm | 73:1efda918f0ba | 106 | ((MODE) == ADC_Mode_RegInjecSimult) || \ |
| bogdanm | 73:1efda918f0ba | 107 | ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ |
| bogdanm | 73:1efda918f0ba | 108 | ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ |
| bogdanm | 73:1efda918f0ba | 109 | ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ |
| bogdanm | 73:1efda918f0ba | 110 | ((MODE) == ADC_Mode_InjecSimult) || \ |
| bogdanm | 73:1efda918f0ba | 111 | ((MODE) == ADC_Mode_RegSimult) || \ |
| bogdanm | 73:1efda918f0ba | 112 | ((MODE) == ADC_Mode_FastInterl) || \ |
| bogdanm | 73:1efda918f0ba | 113 | ((MODE) == ADC_Mode_SlowInterl) || \ |
| bogdanm | 73:1efda918f0ba | 114 | ((MODE) == ADC_Mode_AlterTrig)) |
| bogdanm | 73:1efda918f0ba | 115 | /** |
| bogdanm | 73:1efda918f0ba | 116 | * @} |
| bogdanm | 73:1efda918f0ba | 117 | */ |
| bogdanm | 73:1efda918f0ba | 118 | |
| bogdanm | 73:1efda918f0ba | 119 | /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion |
| bogdanm | 73:1efda918f0ba | 120 | * @{ |
| bogdanm | 73:1efda918f0ba | 121 | */ |
| bogdanm | 73:1efda918f0ba | 122 | |
| bogdanm | 73:1efda918f0ba | 123 | #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 124 | #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 125 | #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 126 | #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 127 | #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 128 | #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 129 | |
| bogdanm | 73:1efda918f0ba | 130 | #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 131 | #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 132 | |
| bogdanm | 73:1efda918f0ba | 133 | #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 134 | #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 135 | #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 136 | #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 137 | #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 138 | #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 139 | |
| bogdanm | 73:1efda918f0ba | 140 | #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 141 | ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ |
| bogdanm | 73:1efda918f0ba | 142 | ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ |
| bogdanm | 73:1efda918f0ba | 143 | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ |
| bogdanm | 73:1efda918f0ba | 144 | ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 145 | ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 146 | ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 147 | ((REGTRIG) == ADC_ExternalTrigConv_None) || \ |
| bogdanm | 73:1efda918f0ba | 148 | ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 149 | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ |
| bogdanm | 73:1efda918f0ba | 150 | ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 151 | ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 152 | ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 153 | ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) |
| bogdanm | 73:1efda918f0ba | 154 | /** |
| bogdanm | 73:1efda918f0ba | 155 | * @} |
| bogdanm | 73:1efda918f0ba | 156 | */ |
| bogdanm | 73:1efda918f0ba | 157 | |
| bogdanm | 73:1efda918f0ba | 158 | /** @defgroup ADC_data_align |
| bogdanm | 73:1efda918f0ba | 159 | * @{ |
| bogdanm | 73:1efda918f0ba | 160 | */ |
| bogdanm | 73:1efda918f0ba | 161 | |
| bogdanm | 73:1efda918f0ba | 162 | #define ADC_DataAlign_Right ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 163 | #define ADC_DataAlign_Left ((uint32_t)0x00000800) |
| bogdanm | 73:1efda918f0ba | 164 | #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ |
| bogdanm | 73:1efda918f0ba | 165 | ((ALIGN) == ADC_DataAlign_Left)) |
| bogdanm | 73:1efda918f0ba | 166 | /** |
| bogdanm | 73:1efda918f0ba | 167 | * @} |
| bogdanm | 73:1efda918f0ba | 168 | */ |
| bogdanm | 73:1efda918f0ba | 169 | |
| bogdanm | 73:1efda918f0ba | 170 | /** @defgroup ADC_channels |
| bogdanm | 73:1efda918f0ba | 171 | * @{ |
| bogdanm | 73:1efda918f0ba | 172 | */ |
| bogdanm | 73:1efda918f0ba | 173 | |
| bogdanm | 73:1efda918f0ba | 174 | #define ADC_Channel_0 ((uint8_t)0x00) |
| bogdanm | 73:1efda918f0ba | 175 | #define ADC_Channel_1 ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 176 | #define ADC_Channel_2 ((uint8_t)0x02) |
| bogdanm | 73:1efda918f0ba | 177 | #define ADC_Channel_3 ((uint8_t)0x03) |
| bogdanm | 73:1efda918f0ba | 178 | #define ADC_Channel_4 ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 179 | #define ADC_Channel_5 ((uint8_t)0x05) |
| bogdanm | 73:1efda918f0ba | 180 | #define ADC_Channel_6 ((uint8_t)0x06) |
| bogdanm | 73:1efda918f0ba | 181 | #define ADC_Channel_7 ((uint8_t)0x07) |
| bogdanm | 73:1efda918f0ba | 182 | #define ADC_Channel_8 ((uint8_t)0x08) |
| bogdanm | 73:1efda918f0ba | 183 | #define ADC_Channel_9 ((uint8_t)0x09) |
| bogdanm | 73:1efda918f0ba | 184 | #define ADC_Channel_10 ((uint8_t)0x0A) |
| bogdanm | 73:1efda918f0ba | 185 | #define ADC_Channel_11 ((uint8_t)0x0B) |
| bogdanm | 73:1efda918f0ba | 186 | #define ADC_Channel_12 ((uint8_t)0x0C) |
| bogdanm | 73:1efda918f0ba | 187 | #define ADC_Channel_13 ((uint8_t)0x0D) |
| bogdanm | 73:1efda918f0ba | 188 | #define ADC_Channel_14 ((uint8_t)0x0E) |
| bogdanm | 73:1efda918f0ba | 189 | #define ADC_Channel_15 ((uint8_t)0x0F) |
| bogdanm | 73:1efda918f0ba | 190 | #define ADC_Channel_16 ((uint8_t)0x10) |
| bogdanm | 73:1efda918f0ba | 191 | #define ADC_Channel_17 ((uint8_t)0x11) |
| bogdanm | 73:1efda918f0ba | 192 | |
| bogdanm | 73:1efda918f0ba | 193 | #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) |
| bogdanm | 73:1efda918f0ba | 194 | #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) |
| bogdanm | 73:1efda918f0ba | 195 | |
| bogdanm | 73:1efda918f0ba | 196 | #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ |
| bogdanm | 73:1efda918f0ba | 197 | ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ |
| bogdanm | 73:1efda918f0ba | 198 | ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ |
| bogdanm | 73:1efda918f0ba | 199 | ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ |
| bogdanm | 73:1efda918f0ba | 200 | ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ |
| bogdanm | 73:1efda918f0ba | 201 | ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ |
| bogdanm | 73:1efda918f0ba | 202 | ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ |
| bogdanm | 73:1efda918f0ba | 203 | ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ |
| bogdanm | 73:1efda918f0ba | 204 | ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) |
| bogdanm | 73:1efda918f0ba | 205 | /** |
| bogdanm | 73:1efda918f0ba | 206 | * @} |
| bogdanm | 73:1efda918f0ba | 207 | */ |
| bogdanm | 73:1efda918f0ba | 208 | |
| bogdanm | 73:1efda918f0ba | 209 | /** @defgroup ADC_sampling_time |
| bogdanm | 73:1efda918f0ba | 210 | * @{ |
| bogdanm | 73:1efda918f0ba | 211 | */ |
| bogdanm | 73:1efda918f0ba | 212 | |
| bogdanm | 73:1efda918f0ba | 213 | #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) |
| bogdanm | 73:1efda918f0ba | 214 | #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 215 | #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) |
| bogdanm | 73:1efda918f0ba | 216 | #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) |
| bogdanm | 73:1efda918f0ba | 217 | #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 218 | #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) |
| bogdanm | 73:1efda918f0ba | 219 | #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) |
| bogdanm | 73:1efda918f0ba | 220 | #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) |
| bogdanm | 73:1efda918f0ba | 221 | #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 222 | ((TIME) == ADC_SampleTime_7Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 223 | ((TIME) == ADC_SampleTime_13Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 224 | ((TIME) == ADC_SampleTime_28Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 225 | ((TIME) == ADC_SampleTime_41Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 226 | ((TIME) == ADC_SampleTime_55Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 227 | ((TIME) == ADC_SampleTime_71Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 228 | ((TIME) == ADC_SampleTime_239Cycles5)) |
| bogdanm | 73:1efda918f0ba | 229 | /** |
| bogdanm | 73:1efda918f0ba | 230 | * @} |
| bogdanm | 73:1efda918f0ba | 231 | */ |
| bogdanm | 73:1efda918f0ba | 232 | |
| bogdanm | 73:1efda918f0ba | 233 | /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion |
| bogdanm | 73:1efda918f0ba | 234 | * @{ |
| bogdanm | 73:1efda918f0ba | 235 | */ |
| bogdanm | 73:1efda918f0ba | 236 | |
| bogdanm | 73:1efda918f0ba | 237 | #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 238 | #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 239 | #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 240 | #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 241 | #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 242 | |
| bogdanm | 73:1efda918f0ba | 243 | #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 244 | #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 245 | #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 246 | |
| bogdanm | 73:1efda918f0ba | 247 | #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 248 | #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 249 | #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 250 | #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 251 | #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 252 | |
| bogdanm | 73:1efda918f0ba | 253 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 254 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 255 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 256 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 257 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 258 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 259 | ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 260 | ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ |
| bogdanm | 73:1efda918f0ba | 261 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ |
| bogdanm | 73:1efda918f0ba | 262 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ |
| bogdanm | 73:1efda918f0ba | 263 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 264 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 265 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) |
| bogdanm | 73:1efda918f0ba | 266 | /** |
| bogdanm | 73:1efda918f0ba | 267 | * @} |
| bogdanm | 73:1efda918f0ba | 268 | */ |
| bogdanm | 73:1efda918f0ba | 269 | |
| bogdanm | 73:1efda918f0ba | 270 | /** @defgroup ADC_injected_channel_selection |
| bogdanm | 73:1efda918f0ba | 271 | * @{ |
| bogdanm | 73:1efda918f0ba | 272 | */ |
| bogdanm | 73:1efda918f0ba | 273 | |
| bogdanm | 73:1efda918f0ba | 274 | #define ADC_InjectedChannel_1 ((uint8_t)0x14) |
| bogdanm | 73:1efda918f0ba | 275 | #define ADC_InjectedChannel_2 ((uint8_t)0x18) |
| bogdanm | 73:1efda918f0ba | 276 | #define ADC_InjectedChannel_3 ((uint8_t)0x1C) |
| bogdanm | 73:1efda918f0ba | 277 | #define ADC_InjectedChannel_4 ((uint8_t)0x20) |
| bogdanm | 73:1efda918f0ba | 278 | #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ |
| bogdanm | 73:1efda918f0ba | 279 | ((CHANNEL) == ADC_InjectedChannel_2) || \ |
| bogdanm | 73:1efda918f0ba | 280 | ((CHANNEL) == ADC_InjectedChannel_3) || \ |
| bogdanm | 73:1efda918f0ba | 281 | ((CHANNEL) == ADC_InjectedChannel_4)) |
| bogdanm | 73:1efda918f0ba | 282 | /** |
| bogdanm | 73:1efda918f0ba | 283 | * @} |
| bogdanm | 73:1efda918f0ba | 284 | */ |
| bogdanm | 73:1efda918f0ba | 285 | |
| bogdanm | 73:1efda918f0ba | 286 | /** @defgroup ADC_analog_watchdog_selection |
| bogdanm | 73:1efda918f0ba | 287 | * @{ |
| bogdanm | 73:1efda918f0ba | 288 | */ |
| bogdanm | 73:1efda918f0ba | 289 | |
| bogdanm | 73:1efda918f0ba | 290 | #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) |
| bogdanm | 73:1efda918f0ba | 291 | #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) |
| bogdanm | 73:1efda918f0ba | 292 | #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) |
| bogdanm | 73:1efda918f0ba | 293 | #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) |
| bogdanm | 73:1efda918f0ba | 294 | #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) |
| bogdanm | 73:1efda918f0ba | 295 | #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) |
| bogdanm | 73:1efda918f0ba | 296 | #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 297 | |
| bogdanm | 73:1efda918f0ba | 298 | #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ |
| bogdanm | 73:1efda918f0ba | 299 | ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 300 | ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 301 | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ |
| bogdanm | 73:1efda918f0ba | 302 | ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 303 | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 304 | ((WATCHDOG) == ADC_AnalogWatchdog_None)) |
| bogdanm | 73:1efda918f0ba | 305 | /** |
| bogdanm | 73:1efda918f0ba | 306 | * @} |
| bogdanm | 73:1efda918f0ba | 307 | */ |
| bogdanm | 73:1efda918f0ba | 308 | |
| bogdanm | 73:1efda918f0ba | 309 | /** @defgroup ADC_interrupts_definition |
| bogdanm | 73:1efda918f0ba | 310 | * @{ |
| bogdanm | 73:1efda918f0ba | 311 | */ |
| bogdanm | 73:1efda918f0ba | 312 | |
| bogdanm | 73:1efda918f0ba | 313 | #define ADC_IT_EOC ((uint16_t)0x0220) |
| bogdanm | 73:1efda918f0ba | 314 | #define ADC_IT_AWD ((uint16_t)0x0140) |
| bogdanm | 73:1efda918f0ba | 315 | #define ADC_IT_JEOC ((uint16_t)0x0480) |
| bogdanm | 73:1efda918f0ba | 316 | |
| bogdanm | 73:1efda918f0ba | 317 | #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) |
| bogdanm | 73:1efda918f0ba | 318 | |
| bogdanm | 73:1efda918f0ba | 319 | #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ |
| bogdanm | 73:1efda918f0ba | 320 | ((IT) == ADC_IT_JEOC)) |
| bogdanm | 73:1efda918f0ba | 321 | /** |
| bogdanm | 73:1efda918f0ba | 322 | * @} |
| bogdanm | 73:1efda918f0ba | 323 | */ |
| bogdanm | 73:1efda918f0ba | 324 | |
| bogdanm | 73:1efda918f0ba | 325 | /** @defgroup ADC_flags_definition |
| bogdanm | 73:1efda918f0ba | 326 | * @{ |
| bogdanm | 73:1efda918f0ba | 327 | */ |
| bogdanm | 73:1efda918f0ba | 328 | |
| bogdanm | 73:1efda918f0ba | 329 | #define ADC_FLAG_AWD ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 330 | #define ADC_FLAG_EOC ((uint8_t)0x02) |
| bogdanm | 73:1efda918f0ba | 331 | #define ADC_FLAG_JEOC ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 332 | #define ADC_FLAG_JSTRT ((uint8_t)0x08) |
| bogdanm | 73:1efda918f0ba | 333 | #define ADC_FLAG_STRT ((uint8_t)0x10) |
| bogdanm | 73:1efda918f0ba | 334 | #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) |
| bogdanm | 73:1efda918f0ba | 335 | #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ |
| bogdanm | 73:1efda918f0ba | 336 | ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ |
| bogdanm | 73:1efda918f0ba | 337 | ((FLAG) == ADC_FLAG_STRT)) |
| bogdanm | 73:1efda918f0ba | 338 | /** |
| bogdanm | 73:1efda918f0ba | 339 | * @} |
| bogdanm | 73:1efda918f0ba | 340 | */ |
| bogdanm | 73:1efda918f0ba | 341 | |
| bogdanm | 73:1efda918f0ba | 342 | /** @defgroup ADC_thresholds |
| bogdanm | 73:1efda918f0ba | 343 | * @{ |
| bogdanm | 73:1efda918f0ba | 344 | */ |
| bogdanm | 73:1efda918f0ba | 345 | |
| bogdanm | 73:1efda918f0ba | 346 | #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) |
| bogdanm | 73:1efda918f0ba | 347 | |
| bogdanm | 73:1efda918f0ba | 348 | /** |
| bogdanm | 73:1efda918f0ba | 349 | * @} |
| bogdanm | 73:1efda918f0ba | 350 | */ |
| bogdanm | 73:1efda918f0ba | 351 | |
| bogdanm | 73:1efda918f0ba | 352 | /** @defgroup ADC_injected_offset |
| bogdanm | 73:1efda918f0ba | 353 | * @{ |
| bogdanm | 73:1efda918f0ba | 354 | */ |
| bogdanm | 73:1efda918f0ba | 355 | |
| bogdanm | 73:1efda918f0ba | 356 | #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) |
| bogdanm | 73:1efda918f0ba | 357 | |
| bogdanm | 73:1efda918f0ba | 358 | /** |
| bogdanm | 73:1efda918f0ba | 359 | * @} |
| bogdanm | 73:1efda918f0ba | 360 | */ |
| bogdanm | 73:1efda918f0ba | 361 | |
| bogdanm | 73:1efda918f0ba | 362 | /** @defgroup ADC_injected_length |
| bogdanm | 73:1efda918f0ba | 363 | * @{ |
| bogdanm | 73:1efda918f0ba | 364 | */ |
| bogdanm | 73:1efda918f0ba | 365 | |
| bogdanm | 73:1efda918f0ba | 366 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) |
| bogdanm | 73:1efda918f0ba | 367 | |
| bogdanm | 73:1efda918f0ba | 368 | /** |
| bogdanm | 73:1efda918f0ba | 369 | * @} |
| bogdanm | 73:1efda918f0ba | 370 | */ |
| bogdanm | 73:1efda918f0ba | 371 | |
| bogdanm | 73:1efda918f0ba | 372 | /** @defgroup ADC_injected_rank |
| bogdanm | 73:1efda918f0ba | 373 | * @{ |
| bogdanm | 73:1efda918f0ba | 374 | */ |
| bogdanm | 73:1efda918f0ba | 375 | |
| bogdanm | 73:1efda918f0ba | 376 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) |
| bogdanm | 73:1efda918f0ba | 377 | |
| bogdanm | 73:1efda918f0ba | 378 | /** |
| bogdanm | 73:1efda918f0ba | 379 | * @} |
| bogdanm | 73:1efda918f0ba | 380 | */ |
| bogdanm | 73:1efda918f0ba | 381 | |
| bogdanm | 73:1efda918f0ba | 382 | |
| bogdanm | 73:1efda918f0ba | 383 | /** @defgroup ADC_regular_length |
| bogdanm | 73:1efda918f0ba | 384 | * @{ |
| bogdanm | 73:1efda918f0ba | 385 | */ |
| bogdanm | 73:1efda918f0ba | 386 | |
| bogdanm | 73:1efda918f0ba | 387 | #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) |
| bogdanm | 73:1efda918f0ba | 388 | /** |
| bogdanm | 73:1efda918f0ba | 389 | * @} |
| bogdanm | 73:1efda918f0ba | 390 | */ |
| bogdanm | 73:1efda918f0ba | 391 | |
| bogdanm | 73:1efda918f0ba | 392 | /** @defgroup ADC_regular_rank |
| bogdanm | 73:1efda918f0ba | 393 | * @{ |
| bogdanm | 73:1efda918f0ba | 394 | */ |
| bogdanm | 73:1efda918f0ba | 395 | |
| bogdanm | 73:1efda918f0ba | 396 | #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) |
| bogdanm | 73:1efda918f0ba | 397 | |
| bogdanm | 73:1efda918f0ba | 398 | /** |
| bogdanm | 73:1efda918f0ba | 399 | * @} |
| bogdanm | 73:1efda918f0ba | 400 | */ |
| bogdanm | 73:1efda918f0ba | 401 | |
| bogdanm | 73:1efda918f0ba | 402 | /** @defgroup ADC_regular_discontinuous_mode_number |
| bogdanm | 73:1efda918f0ba | 403 | * @{ |
| bogdanm | 73:1efda918f0ba | 404 | */ |
| bogdanm | 73:1efda918f0ba | 405 | |
| bogdanm | 73:1efda918f0ba | 406 | #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) |
| bogdanm | 73:1efda918f0ba | 407 | |
| bogdanm | 73:1efda918f0ba | 408 | /** |
| bogdanm | 73:1efda918f0ba | 409 | * @} |
| bogdanm | 73:1efda918f0ba | 410 | */ |
| bogdanm | 73:1efda918f0ba | 411 | |
| bogdanm | 73:1efda918f0ba | 412 | /** |
| bogdanm | 73:1efda918f0ba | 413 | * @} |
| bogdanm | 73:1efda918f0ba | 414 | */ |
| bogdanm | 73:1efda918f0ba | 415 | |
| bogdanm | 73:1efda918f0ba | 416 | /** @defgroup ADC_Exported_Macros |
| bogdanm | 73:1efda918f0ba | 417 | * @{ |
| bogdanm | 73:1efda918f0ba | 418 | */ |
| bogdanm | 73:1efda918f0ba | 419 | |
| bogdanm | 73:1efda918f0ba | 420 | /** |
| bogdanm | 73:1efda918f0ba | 421 | * @} |
| bogdanm | 73:1efda918f0ba | 422 | */ |
| bogdanm | 73:1efda918f0ba | 423 | |
| bogdanm | 73:1efda918f0ba | 424 | /** @defgroup ADC_Exported_Functions |
| bogdanm | 73:1efda918f0ba | 425 | * @{ |
| bogdanm | 73:1efda918f0ba | 426 | */ |
| bogdanm | 73:1efda918f0ba | 427 | |
| bogdanm | 73:1efda918f0ba | 428 | void ADC_DeInit(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 429 | void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); |
| bogdanm | 73:1efda918f0ba | 430 | void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); |
| bogdanm | 73:1efda918f0ba | 431 | void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 432 | void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 433 | void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 434 | void ADC_ResetCalibration(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 435 | FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 436 | void ADC_StartCalibration(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 437 | FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 438 | void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 439 | FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 440 | void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); |
| bogdanm | 73:1efda918f0ba | 441 | void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 442 | void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); |
| bogdanm | 73:1efda918f0ba | 443 | void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 444 | uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 445 | uint32_t ADC_GetDualModeConversionValue(void); |
| bogdanm | 73:1efda918f0ba | 446 | void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 447 | void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 448 | void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); |
| bogdanm | 73:1efda918f0ba | 449 | void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 450 | void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 451 | FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 452 | void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); |
| bogdanm | 73:1efda918f0ba | 453 | void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); |
| bogdanm | 73:1efda918f0ba | 454 | void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); |
| bogdanm | 73:1efda918f0ba | 455 | uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); |
| bogdanm | 73:1efda918f0ba | 456 | void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); |
| bogdanm | 73:1efda918f0ba | 457 | void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); |
| bogdanm | 73:1efda918f0ba | 458 | void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); |
| bogdanm | 73:1efda918f0ba | 459 | void ADC_TempSensorVrefintCmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 460 | FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); |
| bogdanm | 73:1efda918f0ba | 461 | void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); |
| bogdanm | 73:1efda918f0ba | 462 | ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); |
| bogdanm | 73:1efda918f0ba | 463 | void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); |
| bogdanm | 73:1efda918f0ba | 464 | |
| bogdanm | 73:1efda918f0ba | 465 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 466 | } |
| bogdanm | 73:1efda918f0ba | 467 | #endif |
| bogdanm | 73:1efda918f0ba | 468 | |
| bogdanm | 73:1efda918f0ba | 469 | #endif /*__STM32F10x_ADC_H */ |
| bogdanm | 73:1efda918f0ba | 470 | |
| bogdanm | 73:1efda918f0ba | 471 | /** |
| bogdanm | 73:1efda918f0ba | 472 | * @} |
| bogdanm | 73:1efda918f0ba | 473 | */ |
| bogdanm | 73:1efda918f0ba | 474 | |
| bogdanm | 73:1efda918f0ba | 475 | /** |
| bogdanm | 73:1efda918f0ba | 476 | * @} |
| bogdanm | 73:1efda918f0ba | 477 | */ |
| bogdanm | 73:1efda918f0ba | 478 | |
| bogdanm | 73:1efda918f0ba | 479 | /** |
| bogdanm | 73:1efda918f0ba | 480 | * @} |
| bogdanm | 73:1efda918f0ba | 481 | */ |
| bogdanm | 73:1efda918f0ba | 482 | |
| bogdanm | 73:1efda918f0ba | 483 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |