mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "sleep_api.h"
elessair 0:f269e3021894 17 #include "cmsis.h"
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 //#define DEEPSLEEP
elessair 0:f269e3021894 21 #define POWERDOWN
elessair 0:f269e3021894 22
elessair 0:f269e3021894 23 void sleep(void)
elessair 0:f269e3021894 24 {
elessair 0:f269e3021894 25 //Normal sleep mode for PCON:
elessair 0:f269e3021894 26 LPC_PMU->PCON &= ~0x03;
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 //Normal sleep mode for ARM core:
elessair 0:f269e3021894 29 SCB->SCR = 0;
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 //And go to sleep
elessair 0:f269e3021894 32 __WFI();
elessair 0:f269e3021894 33 }
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 // Deepsleep/powerdown modes assume the device is configured to use its internal RC oscillator directly
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37 void deepsleep(void)
elessair 0:f269e3021894 38 {
elessair 0:f269e3021894 39 //Deep sleep in PCON
elessair 0:f269e3021894 40 LPC_PMU->PCON &= ~0x03;
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 #if defined(DEEPSLEEP)
elessair 0:f269e3021894 43 LPC_PMU->PCON |= 0x01;
elessair 0:f269e3021894 44 #elif defined(POWERDOWN)
elessair 0:f269e3021894 45 LPC_PMU->PCON |= 0x02;
elessair 0:f269e3021894 46 #endif
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 //If brownout detection and WDT are enabled, keep them enabled during sleep
elessair 0:f269e3021894 49 LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG;
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 //After wakeup same stuff as currently enabled:
elessair 0:f269e3021894 52 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
elessair 0:f269e3021894 53
elessair 0:f269e3021894 54 //All interrupts may wake up:
elessair 0:f269e3021894 55 LPC_SYSCON->STARTERP0 = 0xFF;
elessair 0:f269e3021894 56 LPC_SYSCON->STARTERP1 = 0xFFFF;
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 //Deep sleep for ARM core:
elessair 0:f269e3021894 59 SCB->SCR = 1<<2;
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 __WFI();
elessair 0:f269e3021894 62 }