erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #ifndef MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 17 #define MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20 #include "PinNames.h"
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 #ifdef __cplusplus
elessair 0:f269e3021894 23 extern "C" {
elessair 0:f269e3021894 24 #endif
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 typedef enum {
elessair 0:f269e3021894 27 UART_0 = (int)LPC_UART0_BASE,
elessair 0:f269e3021894 28 UART_1 = (int)LPC_UART1_BASE,
elessair 0:f269e3021894 29 UART_2 = (int)LPC_UART2_BASE,
elessair 0:f269e3021894 30 UART_3 = (int)LPC_UART3_BASE
elessair 0:f269e3021894 31 } UARTName;
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 typedef enum {
elessair 0:f269e3021894 34 ADC0_0 = 0,
elessair 0:f269e3021894 35 ADC0_1,
elessair 0:f269e3021894 36 ADC0_2,
elessair 0:f269e3021894 37 ADC0_3,
elessair 0:f269e3021894 38 ADC0_4,
elessair 0:f269e3021894 39 ADC0_5,
elessair 0:f269e3021894 40 ADC0_6,
elessair 0:f269e3021894 41 ADC0_7
elessair 0:f269e3021894 42 } ADCName;
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 typedef enum {
elessair 0:f269e3021894 45 DAC_0 = 0
elessair 0:f269e3021894 46 } DACName;
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 typedef enum {
elessair 0:f269e3021894 49 SPI_0 = (int)LPC_SSP0_BASE,
elessair 0:f269e3021894 50 SPI_1 = (int)LPC_SSP1_BASE
elessair 0:f269e3021894 51 } SPIName;
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 typedef enum {
elessair 0:f269e3021894 54 I2C_0 = (int)LPC_I2C0_BASE,
elessair 0:f269e3021894 55 I2C_1 = (int)LPC_I2C1_BASE,
elessair 0:f269e3021894 56 I2C_2 = (int)LPC_I2C2_BASE
elessair 0:f269e3021894 57 } I2CName;
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 typedef enum {
elessair 0:f269e3021894 60 PWM_1 = 1,
elessair 0:f269e3021894 61 PWM_2,
elessair 0:f269e3021894 62 PWM_3,
elessair 0:f269e3021894 63 PWM_4,
elessair 0:f269e3021894 64 PWM_5,
elessair 0:f269e3021894 65 PWM_6
elessair 0:f269e3021894 66 } PWMName;
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 typedef enum {
elessair 0:f269e3021894 69 CAN_1 = (int)LPC_CAN1_BASE,
elessair 0:f269e3021894 70 CAN_2 = (int)LPC_CAN2_BASE
elessair 0:f269e3021894 71 } CANName;
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 #define STDIO_UART_TX USBTX
elessair 0:f269e3021894 74 #define STDIO_UART_RX USBRX
elessair 0:f269e3021894 75 #define STDIO_UART UART_0
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 // Default peripherals
elessair 0:f269e3021894 78 #define MBED_SPI0 p5, p6, p7, p8
elessair 0:f269e3021894 79 #define MBED_SPI1 p11, p12, p13, p14
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 #define MBED_UART0 p9, p10
elessair 0:f269e3021894 82 #define MBED_UART1 p13, p14
elessair 0:f269e3021894 83 #define MBED_UART2 p28, p27
elessair 0:f269e3021894 84 #define MBED_UARTUSB USBTX, USBRX
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 #define MBED_I2C0 p28, p27
elessair 0:f269e3021894 87 #define MBED_I2C1 p9, p10
elessair 0:f269e3021894 88
elessair 0:f269e3021894 89 #define MBED_CAN0 p30, p29
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 #define MBED_ANALOGOUT0 p18
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 #define MBED_ANALOGIN0 p15
elessair 0:f269e3021894 94 #define MBED_ANALOGIN1 p16
elessair 0:f269e3021894 95 #define MBED_ANALOGIN2 p17
elessair 0:f269e3021894 96 #define MBED_ANALOGIN3 p18
elessair 0:f269e3021894 97 #define MBED_ANALOGIN4 p19
elessair 0:f269e3021894 98 #define MBED_ANALOGIN5 p20
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 #define MBED_PWMOUT0 p26
elessair 0:f269e3021894 101 #define MBED_PWMOUT1 p25
elessair 0:f269e3021894 102 #define MBED_PWMOUT2 p24
elessair 0:f269e3021894 103 #define MBED_PWMOUT3 p23
elessair 0:f269e3021894 104 #define MBED_PWMOUT4 p22
elessair 0:f269e3021894 105 #define MBED_PWMOUT5 p21
elessair 0:f269e3021894 106
elessair 0:f269e3021894 107 #ifdef __cplusplus
elessair 0:f269e3021894 108 }
elessair 0:f269e3021894 109 #endif
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 #endif