erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_Silicon_Labs/TARGET_EFM32/objects.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /***************************************************************************//**
elessair 0:f269e3021894 2 * @file objects.h
elessair 0:f269e3021894 3 *******************************************************************************
elessair 0:f269e3021894 4 * @section License
elessair 0:f269e3021894 5 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
elessair 0:f269e3021894 6 *******************************************************************************
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * SPDX-License-Identifier: Apache-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Licensed under the Apache License, Version 2.0 (the "License"); you may
elessair 0:f269e3021894 11 * not use this file except in compliance with the License.
elessair 0:f269e3021894 12 * You may obtain a copy of the License at
elessair 0:f269e3021894 13 *
elessair 0:f269e3021894 14 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 15 *
elessair 0:f269e3021894 16 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 17 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
elessair 0:f269e3021894 18 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 19 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 20 * limitations under the License.
elessair 0:f269e3021894 21 *
elessair 0:f269e3021894 22 ******************************************************************************/
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 #ifndef MBED_OBJECTS_H
elessair 0:f269e3021894 25 #define MBED_OBJECTS_H
elessair 0:f269e3021894 26
elessair 0:f269e3021894 27 #include "PinNames.h"
elessair 0:f269e3021894 28 #include "PeripheralNames.h"
elessair 0:f269e3021894 29 #include "PortNames.h"
elessair 0:f269e3021894 30 #include "em_i2c.h"
elessair 0:f269e3021894 31 #include "em_dma.h"
elessair 0:f269e3021894 32 #include "em_cmu.h"
elessair 0:f269e3021894 33 #include "dma_api_HAL.h"
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 #ifdef __cplusplus
elessair 0:f269e3021894 36 extern "C" {
elessair 0:f269e3021894 37 #endif
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 typedef struct {
elessair 0:f269e3021894 40 PinName pin:8;
elessair 0:f269e3021894 41 PinMode mode:6;
elessair 0:f269e3021894 42 PinDirection dir:2;
elessair 0:f269e3021894 43 } gpio_t;
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 #if DEVICE_ANALOGIN
elessair 0:f269e3021894 46 struct analogin_s {
elessair 0:f269e3021894 47 ADC_TypeDef *adc;
elessair 0:f269e3021894 48 uint32_t channel;
elessair 0:f269e3021894 49 };
elessair 0:f269e3021894 50 #endif
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 #if DEVICE_ANALOGOUT
elessair 0:f269e3021894 53 struct dac_s {
elessair 0:f269e3021894 54 DAC_TypeDef *dac;
elessair 0:f269e3021894 55 uint32_t channel;
elessair 0:f269e3021894 56 };
elessair 0:f269e3021894 57 #endif
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 #if DEVICE_I2C
elessair 0:f269e3021894 60 struct i2c_s {
elessair 0:f269e3021894 61 I2C_TypeDef *i2c;
elessair 0:f269e3021894 62 #if DEVICE_I2C_ASYNCH
elessair 0:f269e3021894 63 uint32_t events;
elessair 0:f269e3021894 64 I2C_TransferSeq_TypeDef xfer;
elessair 0:f269e3021894 65 #endif
elessair 0:f269e3021894 66 };
elessair 0:f269e3021894 67 #endif
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 #if DEVICE_PORTOUT
elessair 0:f269e3021894 70 struct port_s {
elessair 0:f269e3021894 71 PortName port;
elessair 0:f269e3021894 72 uint32_t mask;
elessair 0:f269e3021894 73 PinDirection dir;
elessair 0:f269e3021894 74 };
elessair 0:f269e3021894 75 #endif
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 #if DEVICE_PWMOUT
elessair 0:f269e3021894 78 struct pwmout_s {
elessair 0:f269e3021894 79 //Channel on TIMER
elessair 0:f269e3021894 80 uint32_t channel;
elessair 0:f269e3021894 81 PinName pin;
elessair 0:f269e3021894 82 };
elessair 0:f269e3021894 83 #endif
elessair 0:f269e3021894 84
elessair 0:f269e3021894 85 #if DEVICE_INTERRUPTIN
elessair 0:f269e3021894 86 struct gpio_irq_s {
elessair 0:f269e3021894 87 PinName pin:8; // Pin number 4 least significant bits, port number 4 most significant bits
elessair 0:f269e3021894 88 uint32_t risingEdge:1;
elessair 0:f269e3021894 89 uint32_t fallingEdge:1;
elessair 0:f269e3021894 90 };
elessair 0:f269e3021894 91 #endif
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 #if DEVICE_SERIAL
elessair 0:f269e3021894 94 struct serial_s {
elessair 0:f269e3021894 95 union {
elessair 0:f269e3021894 96 USART_TypeDef *uart;
elessair 0:f269e3021894 97 LEUART_TypeDef *leuart;
elessair 0:f269e3021894 98 } periph;
elessair 0:f269e3021894 99 #ifndef _SILICON_LABS_32B_PLATFORM_2
elessair 0:f269e3021894 100 uint32_t location;
elessair 0:f269e3021894 101 #else
elessair 0:f269e3021894 102 uint32_t location_tx;
elessair 0:f269e3021894 103 uint32_t location_rx;
elessair 0:f269e3021894 104 #endif
elessair 0:f269e3021894 105 PinName rx_pin;
elessair 0:f269e3021894 106 PinName tx_pin;
elessair 0:f269e3021894 107 #if DEVICE_SERIAL_ASYNCH
elessair 0:f269e3021894 108 uint32_t events;
elessair 0:f269e3021894 109 DMA_OPTIONS_t dmaOptionsTX;
elessair 0:f269e3021894 110 DMA_OPTIONS_t dmaOptionsRX;
elessair 0:f269e3021894 111 #endif
elessair 0:f269e3021894 112 uint32_t sleep_blocked;
elessair 0:f269e3021894 113 };
elessair 0:f269e3021894 114 #endif
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 #if DEVICE_SPI
elessair 0:f269e3021894 117 struct spi_s {
elessair 0:f269e3021894 118 USART_TypeDef *spi;
elessair 0:f269e3021894 119 int location;
elessair 0:f269e3021894 120 uint8_t bits;
elessair 0:f269e3021894 121 uint8_t master;
elessair 0:f269e3021894 122 #if DEVICE_SPI_ASYNCH
elessair 0:f269e3021894 123 uint32_t event;
elessair 0:f269e3021894 124 DMA_OPTIONS_t dmaOptionsTX;
elessair 0:f269e3021894 125 DMA_OPTIONS_t dmaOptionsRX;
elessair 0:f269e3021894 126 #endif
elessair 0:f269e3021894 127 };
elessair 0:f269e3021894 128 #endif
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 #if DEVICE_RTC
elessair 0:f269e3021894 131 struct lp_timer_s {
elessair 0:f269e3021894 132 uint32_t start;
elessair 0:f269e3021894 133 uint32_t stop;
elessair 0:f269e3021894 134 };
elessair 0:f269e3021894 135 #endif
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 #if DEVICE_SLEEP
elessair 0:f269e3021894 138 #define NUM_SLEEP_MODES 5
elessair 0:f269e3021894 139 typedef enum {
elessair 0:f269e3021894 140 EM0 = 0,
elessair 0:f269e3021894 141 EM1 = 1,
elessair 0:f269e3021894 142 EM2 = 2,
elessair 0:f269e3021894 143 EM3 = 3,
elessair 0:f269e3021894 144 EM4 = 4
elessair 0:f269e3021894 145 } sleepstate_enum;
elessair 0:f269e3021894 146 #endif
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148
elessair 0:f269e3021894 149 #ifdef __cplusplus
elessair 0:f269e3021894 150 }
elessair 0:f269e3021894 151 #endif
elessair 0:f269e3021894 152
elessair 0:f269e3021894 153 #endif