erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_STM/TARGET_STM32F4/spi_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 *******************************************************************************
elessair 0:f269e3021894 3 * Copyright (c) 2015, STMicroelectronics
elessair 0:f269e3021894 4 * All rights reserved.
elessair 0:f269e3021894 5 *
elessair 0:f269e3021894 6 * Redistribution and use in source and binary forms, with or without
elessair 0:f269e3021894 7 * modification, are permitted provided that the following conditions are met:
elessair 0:f269e3021894 8 *
elessair 0:f269e3021894 9 * 1. Redistributions of source code must retain the above copyright notice,
elessair 0:f269e3021894 10 * this list of conditions and the following disclaimer.
elessair 0:f269e3021894 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
elessair 0:f269e3021894 12 * this list of conditions and the following disclaimer in the documentation
elessair 0:f269e3021894 13 * and/or other materials provided with the distribution.
elessair 0:f269e3021894 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elessair 0:f269e3021894 15 * may be used to endorse or promote products derived from this software
elessair 0:f269e3021894 16 * without specific prior written permission.
elessair 0:f269e3021894 17 *
elessair 0:f269e3021894 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elessair 0:f269e3021894 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elessair 0:f269e3021894 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elessair 0:f269e3021894 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elessair 0:f269e3021894 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elessair 0:f269e3021894 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elessair 0:f269e3021894 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elessair 0:f269e3021894 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elessair 0:f269e3021894 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 28 *******************************************************************************
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30 #include "mbed_assert.h"
elessair 0:f269e3021894 31 #include "mbed_error.h"
elessair 0:f269e3021894 32 #include "spi_api.h"
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 #if DEVICE_SPI
elessair 0:f269e3021894 35 #include <stdbool.h>
elessair 0:f269e3021894 36 #include <math.h>
elessair 0:f269e3021894 37 #include <string.h>
elessair 0:f269e3021894 38 #include "cmsis.h"
elessair 0:f269e3021894 39 #include "pinmap.h"
elessair 0:f269e3021894 40 #include "PeripheralPins.h"
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 #if DEVICE_SPI_ASYNCH
elessair 0:f269e3021894 43 #define SPI_S(obj) (( struct spi_s *)(&(obj->spi)))
elessair 0:f269e3021894 44 #else
elessair 0:f269e3021894 45 #define SPI_S(obj) (( struct spi_s *)(obj))
elessair 0:f269e3021894 46 #endif
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 /*
elessair 0:f269e3021894 49 * Only the frequency is managed in the family specific part
elessair 0:f269e3021894 50 * the rest of SPI management is common to all STM32 families
elessair 0:f269e3021894 51 */
elessair 0:f269e3021894 52 int spi_get_clock_freq(spi_t *obj) {
elessair 0:f269e3021894 53 struct spi_s *spiobj = SPI_S(obj);
elessair 0:f269e3021894 54 int spi_hz = 0;
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 /* Get source clock depending on SPI instance */
elessair 0:f269e3021894 57 switch ((int)spiobj->spi) {
elessair 0:f269e3021894 58 case SPI_1:
elessair 0:f269e3021894 59 #if defined SPI4_BASE
elessair 0:f269e3021894 60 case SPI_4:
elessair 0:f269e3021894 61 #endif
elessair 0:f269e3021894 62 #if defined SPI5_BASE
elessair 0:f269e3021894 63 case SPI_5:
elessair 0:f269e3021894 64 #endif
elessair 0:f269e3021894 65 #if defined SPI6_BASE
elessair 0:f269e3021894 66 case SPI_6:
elessair 0:f269e3021894 67 #endif
elessair 0:f269e3021894 68 /* SPI_1, SPI_4, SPI_5 and SPI_6. Source CLK is PCKL2 */
elessair 0:f269e3021894 69 spi_hz = HAL_RCC_GetPCLK2Freq();
elessair 0:f269e3021894 70 break;
elessair 0:f269e3021894 71 case SPI_2:
elessair 0:f269e3021894 72 #if defined SPI3_BASE
elessair 0:f269e3021894 73 case SPI_3:
elessair 0:f269e3021894 74 #endif
elessair 0:f269e3021894 75 /* SPI_2 and SPI_3. Source CLK is PCKL1 */
elessair 0:f269e3021894 76 spi_hz = HAL_RCC_GetPCLK1Freq();
elessair 0:f269e3021894 77 break;
elessair 0:f269e3021894 78 default:
elessair 0:f269e3021894 79 error("CLK: SPI instance not set");
elessair 0:f269e3021894 80 break;
elessair 0:f269e3021894 81 }
elessair 0:f269e3021894 82 return spi_hz;
elessair 0:f269e3021894 83 }
elessair 0:f269e3021894 84
elessair 0:f269e3021894 85 #endif