erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_STM/TARGET_STM32F3/pinmap.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 *******************************************************************************
elessair 0:f269e3021894 3 * Copyright (c) 2014, STMicroelectronics
elessair 0:f269e3021894 4 * All rights reserved.
elessair 0:f269e3021894 5 *
elessair 0:f269e3021894 6 * Redistribution and use in source and binary forms, with or without
elessair 0:f269e3021894 7 * modification, are permitted provided that the following conditions are met:
elessair 0:f269e3021894 8 *
elessair 0:f269e3021894 9 * 1. Redistributions of source code must retain the above copyright notice,
elessair 0:f269e3021894 10 * this list of conditions and the following disclaimer.
elessair 0:f269e3021894 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
elessair 0:f269e3021894 12 * this list of conditions and the following disclaimer in the documentation
elessair 0:f269e3021894 13 * and/or other materials provided with the distribution.
elessair 0:f269e3021894 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elessair 0:f269e3021894 15 * may be used to endorse or promote products derived from this software
elessair 0:f269e3021894 16 * without specific prior written permission.
elessair 0:f269e3021894 17 *
elessair 0:f269e3021894 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elessair 0:f269e3021894 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elessair 0:f269e3021894 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elessair 0:f269e3021894 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elessair 0:f269e3021894 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elessair 0:f269e3021894 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elessair 0:f269e3021894 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elessair 0:f269e3021894 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elessair 0:f269e3021894 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 28 *******************************************************************************
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30 #include "mbed_assert.h"
elessair 0:f269e3021894 31 #include "pinmap.h"
elessair 0:f269e3021894 32 #include "PortNames.h"
elessair 0:f269e3021894 33 #include "mbed_error.h"
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 // GPIO mode look-up table
elessair 0:f269e3021894 36 // Warning: the elements order must be the same as the one defined in PinNames.h
elessair 0:f269e3021894 37 static const uint32_t gpio_mode[13] = {
elessair 0:f269e3021894 38 GPIO_MODE_INPUT, // 0 = STM_MODE_INPUT
elessair 0:f269e3021894 39 GPIO_MODE_OUTPUT_PP, // 1 = STM_MODE_OUTPUT_PP
elessair 0:f269e3021894 40 GPIO_MODE_OUTPUT_OD, // 2 = STM_MODE_OUTPUT_OD
elessair 0:f269e3021894 41 GPIO_MODE_AF_PP, // 3 = STM_MODE_AF_PP
elessair 0:f269e3021894 42 GPIO_MODE_AF_OD, // 4 = STM_MODE_AF_OD
elessair 0:f269e3021894 43 GPIO_MODE_ANALOG, // 5 = STM_MODE_ANALOG
elessair 0:f269e3021894 44 GPIO_MODE_IT_RISING, // 6 = STM_MODE_IT_RISING
elessair 0:f269e3021894 45 GPIO_MODE_IT_FALLING, // 7 = STM_MODE_IT_FALLING
elessair 0:f269e3021894 46 GPIO_MODE_IT_RISING_FALLING, // 8 = STM_MODE_IT_RISING_FALLING
elessair 0:f269e3021894 47 GPIO_MODE_EVT_RISING, // 9 = STM_MODE_EVT_RISING
elessair 0:f269e3021894 48 GPIO_MODE_EVT_FALLING, // 10 = STM_MODE_EVT_FALLING
elessair 0:f269e3021894 49 GPIO_MODE_EVT_RISING_FALLING, // 11 = STM_MODE_EVT_RISING_FALLING
elessair 0:f269e3021894 50 0x10000000 // 12 = STM_MODE_IT_EVT_RESET (not in STM32Cube HAL)
elessair 0:f269e3021894 51 };
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 // Enable GPIO clock and return GPIO base address
elessair 0:f269e3021894 54 uint32_t Set_GPIO_Clock(uint32_t port_idx)
elessair 0:f269e3021894 55 {
elessair 0:f269e3021894 56 uint32_t gpio_add = 0;
elessair 0:f269e3021894 57 switch (port_idx) {
elessair 0:f269e3021894 58 case PortA:
elessair 0:f269e3021894 59 gpio_add = GPIOA_BASE;
elessair 0:f269e3021894 60 __GPIOA_CLK_ENABLE();
elessair 0:f269e3021894 61 break;
elessair 0:f269e3021894 62 case PortB:
elessair 0:f269e3021894 63 gpio_add = GPIOB_BASE;
elessair 0:f269e3021894 64 __GPIOB_CLK_ENABLE();
elessair 0:f269e3021894 65 break;
elessair 0:f269e3021894 66 case PortC:
elessair 0:f269e3021894 67 gpio_add = GPIOC_BASE;
elessair 0:f269e3021894 68 __GPIOC_CLK_ENABLE();
elessair 0:f269e3021894 69 break;
elessair 0:f269e3021894 70 case PortD:
elessair 0:f269e3021894 71 gpio_add = GPIOD_BASE;
elessair 0:f269e3021894 72 __GPIOD_CLK_ENABLE();
elessair 0:f269e3021894 73 break;
elessair 0:f269e3021894 74 #if defined GPIOE_BASE
elessair 0:f269e3021894 75 case PortE:
elessair 0:f269e3021894 76 gpio_add = GPIOE_BASE;
elessair 0:f269e3021894 77 __GPIOE_CLK_ENABLE();
elessair 0:f269e3021894 78 break;
elessair 0:f269e3021894 79 #endif
elessair 0:f269e3021894 80 #if defined GPIOF_BASE
elessair 0:f269e3021894 81 case PortF:
elessair 0:f269e3021894 82 gpio_add = GPIOF_BASE;
elessair 0:f269e3021894 83 __GPIOF_CLK_ENABLE();
elessair 0:f269e3021894 84 break;
elessair 0:f269e3021894 85 #endif
elessair 0:f269e3021894 86 #if defined GPIOG_BASE
elessair 0:f269e3021894 87 case PortG:
elessair 0:f269e3021894 88 gpio_add = GPIOG_BASE;
elessair 0:f269e3021894 89 __GPIOG_CLK_ENABLE();
elessair 0:f269e3021894 90 break;
elessair 0:f269e3021894 91 #endif
elessair 0:f269e3021894 92 #if defined GPIOH_BASE
elessair 0:f269e3021894 93 case PortH:
elessair 0:f269e3021894 94 gpio_add = GPIOH_BASE;
elessair 0:f269e3021894 95 __GPIOH_CLK_ENABLE();
elessair 0:f269e3021894 96 break;
elessair 0:f269e3021894 97 #endif
elessair 0:f269e3021894 98 #if defined GPIOI_BASE
elessair 0:f269e3021894 99 case PortI:
elessair 0:f269e3021894 100 gpio_add = GPIOI_BASE;
elessair 0:f269e3021894 101 __GPIOI_CLK_ENABLE();
elessair 0:f269e3021894 102 break;
elessair 0:f269e3021894 103 #endif
elessair 0:f269e3021894 104 #if defined GPIOJ_BASE
elessair 0:f269e3021894 105 case PortJ:
elessair 0:f269e3021894 106 gpio_add = GPIOJ_BASE;
elessair 0:f269e3021894 107 __GPIOJ_CLK_ENABLE();
elessair 0:f269e3021894 108 break;
elessair 0:f269e3021894 109 #endif
elessair 0:f269e3021894 110 #if defined GPIOK_BASE
elessair 0:f269e3021894 111 case PortK:
elessair 0:f269e3021894 112 gpio_add = GPIOK_BASE;
elessair 0:f269e3021894 113 __GPIOK_CLK_ENABLE();
elessair 0:f269e3021894 114 break;
elessair 0:f269e3021894 115 #endif
elessair 0:f269e3021894 116
elessair 0:f269e3021894 117
elessair 0:f269e3021894 118 default:
elessair 0:f269e3021894 119 error("Pinmap error: wrong port number.");
elessair 0:f269e3021894 120 break;
elessair 0:f269e3021894 121 }
elessair 0:f269e3021894 122 return gpio_add;
elessair 0:f269e3021894 123 }
elessair 0:f269e3021894 124
elessair 0:f269e3021894 125 /**
elessair 0:f269e3021894 126 * Configure pin (mode, speed, output type and pull-up/pull-down)
elessair 0:f269e3021894 127 */
elessair 0:f269e3021894 128 void pin_function(PinName pin, int data)
elessair 0:f269e3021894 129 {
elessair 0:f269e3021894 130 MBED_ASSERT(pin != (PinName)NC);
elessair 0:f269e3021894 131 // Get the pin informations
elessair 0:f269e3021894 132 uint32_t mode = STM_PIN_MODE(data);
elessair 0:f269e3021894 133 uint32_t pupd = STM_PIN_PUPD(data);
elessair 0:f269e3021894 134 uint32_t afnum = STM_PIN_AFNUM(data);
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 uint32_t port_index = STM_PORT(pin);
elessair 0:f269e3021894 137 uint32_t pin_index = STM_PIN(pin);
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 // Enable GPIO clock
elessair 0:f269e3021894 140 uint32_t gpio_add = Set_GPIO_Clock(port_index);
elessair 0:f269e3021894 141 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
elessair 0:f269e3021894 142
elessair 0:f269e3021894 143 // Configure GPIO
elessair 0:f269e3021894 144 GPIO_InitTypeDef GPIO_InitStructure;
elessair 0:f269e3021894 145 GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
elessair 0:f269e3021894 146 GPIO_InitStructure.Mode = gpio_mode[mode];
elessair 0:f269e3021894 147 GPIO_InitStructure.Pull = pupd;
elessair 0:f269e3021894 148 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
elessair 0:f269e3021894 149 GPIO_InitStructure.Alternate = afnum;
elessair 0:f269e3021894 150 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 // [TODO] Disconnect JTAG-DP + SW-DP signals.
elessair 0:f269e3021894 153 // Warning: Need to reconnect under reset
elessair 0:f269e3021894 154 //if ((pin == PA_13) || (pin == PA_14)) {
elessair 0:f269e3021894 155 //
elessair 0:f269e3021894 156 //}
elessair 0:f269e3021894 157 }
elessair 0:f269e3021894 158
elessair 0:f269e3021894 159 /**
elessair 0:f269e3021894 160 * Configure pin pull-up/pull-down
elessair 0:f269e3021894 161 */
elessair 0:f269e3021894 162 void pin_mode(PinName pin, PinMode mode)
elessair 0:f269e3021894 163 {
elessair 0:f269e3021894 164 MBED_ASSERT(pin != (PinName)NC);
elessair 0:f269e3021894 165 uint32_t port_index = STM_PORT(pin);
elessair 0:f269e3021894 166 uint32_t pin_index = STM_PIN(pin);
elessair 0:f269e3021894 167
elessair 0:f269e3021894 168 // Enable GPIO clock
elessair 0:f269e3021894 169 uint32_t gpio_add = Set_GPIO_Clock(port_index);
elessair 0:f269e3021894 170 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
elessair 0:f269e3021894 171
elessair 0:f269e3021894 172 // Configure pull-up/pull-down resistors
elessair 0:f269e3021894 173 uint32_t pupd = (uint32_t)mode;
elessair 0:f269e3021894 174 if (pupd > 2) {
elessair 0:f269e3021894 175 pupd = 0; // Open-drain = No pull-up/No pull-down
elessair 0:f269e3021894 176 }
elessair 0:f269e3021894 177 gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
elessair 0:f269e3021894 178 gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180
elessair 0:f269e3021894 181 /* Internal function for setting the gpiomode/function
elessair 0:f269e3021894 182 * without changing Pull mode
elessair 0:f269e3021894 183 */
elessair 0:f269e3021894 184 void pin_function_gpiomode(PinName pin, uint32_t gpiomode) {
elessair 0:f269e3021894 185
elessair 0:f269e3021894 186 /* Read current pull state from HW to avoid over-write*/
elessair 0:f269e3021894 187 uint32_t port_index = STM_PORT(pin);
elessair 0:f269e3021894 188 uint32_t pin_index = STM_PIN(pin);
elessair 0:f269e3021894 189 GPIO_TypeDef *gpio = (GPIO_TypeDef *) Set_GPIO_Clock(port_index);
elessair 0:f269e3021894 190 uint32_t temp = gpio->PUPDR;
elessair 0:f269e3021894 191 uint32_t pull = (temp >> (pin_index * 2U)) & GPIO_PUPDR_PUPDR0;
elessair 0:f269e3021894 192
elessair 0:f269e3021894 193 /* Then re-use global function for updating the mode part*/
elessair 0:f269e3021894 194 pin_function(pin, STM_PIN_DATA(gpiomode, pull, 0));
elessair 0:f269e3021894 195 }