erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_STM/TARGET_STM32F1/pinmap.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 *******************************************************************************
elessair 0:f269e3021894 3 * Copyright (c) 2014, STMicroelectronics
elessair 0:f269e3021894 4 * All rights reserved.
elessair 0:f269e3021894 5 *
elessair 0:f269e3021894 6 * Redistribution and use in source and binary forms, with or without
elessair 0:f269e3021894 7 * modification, are permitted provided that the following conditions are met:
elessair 0:f269e3021894 8 *
elessair 0:f269e3021894 9 * 1. Redistributions of source code must retain the above copyright notice,
elessair 0:f269e3021894 10 * this list of conditions and the following disclaimer.
elessair 0:f269e3021894 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
elessair 0:f269e3021894 12 * this list of conditions and the following disclaimer in the documentation
elessair 0:f269e3021894 13 * and/or other materials provided with the distribution.
elessair 0:f269e3021894 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elessair 0:f269e3021894 15 * may be used to endorse or promote products derived from this software
elessair 0:f269e3021894 16 * without specific prior written permission.
elessair 0:f269e3021894 17 *
elessair 0:f269e3021894 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elessair 0:f269e3021894 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elessair 0:f269e3021894 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elessair 0:f269e3021894 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elessair 0:f269e3021894 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elessair 0:f269e3021894 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elessair 0:f269e3021894 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elessair 0:f269e3021894 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elessair 0:f269e3021894 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 28 *******************************************************************************
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30 #include "mbed_assert.h"
elessair 0:f269e3021894 31 #include "pinmap.h"
elessair 0:f269e3021894 32 #include "PortNames.h"
elessair 0:f269e3021894 33 #include "mbed_error.h"
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 // GPIO mode look-up table
elessair 0:f269e3021894 36 // Warning: the elements order must be the same as the one defined in PinNames.h
elessair 0:f269e3021894 37 static const uint32_t gpio_mode[13] = {
elessair 0:f269e3021894 38 GPIO_MODE_INPUT, // 0 = STM_MODE_INPUT
elessair 0:f269e3021894 39 GPIO_MODE_OUTPUT_PP, // 1 = STM_MODE_OUTPUT_PP
elessair 0:f269e3021894 40 GPIO_MODE_OUTPUT_OD, // 2 = STM_MODE_OUTPUT_OD
elessair 0:f269e3021894 41 GPIO_MODE_AF_PP, // 3 = STM_MODE_AF_PP
elessair 0:f269e3021894 42 GPIO_MODE_AF_OD, // 4 = STM_MODE_AF_OD
elessair 0:f269e3021894 43 GPIO_MODE_ANALOG, // 5 = STM_MODE_ANALOG
elessair 0:f269e3021894 44 GPIO_MODE_IT_RISING, // 6 = STM_MODE_IT_RISING
elessair 0:f269e3021894 45 GPIO_MODE_IT_FALLING, // 7 = STM_MODE_IT_FALLING
elessair 0:f269e3021894 46 GPIO_MODE_IT_RISING_FALLING, // 8 = STM_MODE_IT_RISING_FALLING
elessair 0:f269e3021894 47 GPIO_MODE_EVT_RISING, // 9 = STM_MODE_EVT_RISING
elessair 0:f269e3021894 48 GPIO_MODE_EVT_FALLING, // 10 = STM_MODE_EVT_FALLING
elessair 0:f269e3021894 49 GPIO_MODE_EVT_RISING_FALLING, // 11 = STM_MODE_EVT_RISING_FALLING
elessair 0:f269e3021894 50 0x10000000 // 12 = STM_MODE_IT_EVT_RESET (not in STM32Cube HAL)
elessair 0:f269e3021894 51 };
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 // Enable GPIO clock and return GPIO base address
elessair 0:f269e3021894 54 uint32_t Set_GPIO_Clock(uint32_t port_idx)
elessair 0:f269e3021894 55 {
elessair 0:f269e3021894 56 uint32_t gpio_add = 0;
elessair 0:f269e3021894 57 switch (port_idx) {
elessair 0:f269e3021894 58 case PortA:
elessair 0:f269e3021894 59 gpio_add = GPIOA_BASE;
elessair 0:f269e3021894 60 __GPIOA_CLK_ENABLE();
elessair 0:f269e3021894 61 break;
elessair 0:f269e3021894 62 case PortB:
elessair 0:f269e3021894 63 gpio_add = GPIOB_BASE;
elessair 0:f269e3021894 64 __GPIOB_CLK_ENABLE();
elessair 0:f269e3021894 65 break;
elessair 0:f269e3021894 66 case PortC:
elessair 0:f269e3021894 67 gpio_add = GPIOC_BASE;
elessair 0:f269e3021894 68 __GPIOC_CLK_ENABLE();
elessair 0:f269e3021894 69 break;
elessair 0:f269e3021894 70 case PortD:
elessair 0:f269e3021894 71 gpio_add = GPIOD_BASE;
elessair 0:f269e3021894 72 __GPIOD_CLK_ENABLE();
elessair 0:f269e3021894 73 break;
elessair 0:f269e3021894 74 default:
elessair 0:f269e3021894 75 error("Pinmap error: wrong port number.");
elessair 0:f269e3021894 76 break;
elessair 0:f269e3021894 77 }
elessair 0:f269e3021894 78 return gpio_add;
elessair 0:f269e3021894 79 }
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 /**
elessair 0:f269e3021894 82 * Configure pin (input, output, alternate function or analog) + output speed + AF
elessair 0:f269e3021894 83 */
elessair 0:f269e3021894 84 void pin_function(PinName pin, int data)
elessair 0:f269e3021894 85 {
elessair 0:f269e3021894 86 MBED_ASSERT(pin != (PinName)NC);
elessair 0:f269e3021894 87 // Get the pin informations
elessair 0:f269e3021894 88 uint32_t mode = STM_PIN_MODE(data);
elessair 0:f269e3021894 89 uint32_t pupd = STM_PIN_PUPD(data);
elessair 0:f269e3021894 90 uint32_t afnum = STM_PIN_AFNUM(data);
elessair 0:f269e3021894 91
elessair 0:f269e3021894 92 uint32_t port_index = STM_PORT(pin);
elessair 0:f269e3021894 93 uint32_t pin_index = STM_PIN(pin);
elessair 0:f269e3021894 94
elessair 0:f269e3021894 95 // Enable GPIO clock
elessair 0:f269e3021894 96 uint32_t gpio_add = Set_GPIO_Clock(port_index);
elessair 0:f269e3021894 97 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 // Enable AFIO clock
elessair 0:f269e3021894 100 __HAL_RCC_AFIO_CLK_ENABLE();
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 // Configure Alternate Function
elessair 0:f269e3021894 103 // Warning: Must be done before the GPIO is initialized
elessair 0:f269e3021894 104 if (afnum > 0) {
elessair 0:f269e3021894 105 switch (afnum) {
elessair 0:f269e3021894 106 case 1: // Remap SPI1
elessair 0:f269e3021894 107 __HAL_AFIO_REMAP_SPI1_ENABLE();
elessair 0:f269e3021894 108 break;
elessair 0:f269e3021894 109 case 2: // Remap I2C1
elessair 0:f269e3021894 110 __HAL_AFIO_REMAP_I2C1_ENABLE();
elessair 0:f269e3021894 111 break;
elessair 0:f269e3021894 112 case 3: // Remap USART1
elessair 0:f269e3021894 113 __HAL_AFIO_REMAP_USART1_ENABLE();
elessair 0:f269e3021894 114 break;
elessair 0:f269e3021894 115 case 4: // Remap USART2
elessair 0:f269e3021894 116 __HAL_AFIO_REMAP_USART2_ENABLE();
elessair 0:f269e3021894 117 break;
elessair 0:f269e3021894 118 case 5: // Partial Remap USART3
elessair 0:f269e3021894 119 __HAL_AFIO_REMAP_USART3_PARTIAL();
elessair 0:f269e3021894 120 break;
elessair 0:f269e3021894 121 case 6: // Partial Remap TIM1
elessair 0:f269e3021894 122 __HAL_AFIO_REMAP_TIM1_PARTIAL();
elessair 0:f269e3021894 123 break;
elessair 0:f269e3021894 124 case 7: // Partial Remap TIM3
elessair 0:f269e3021894 125 __HAL_AFIO_REMAP_TIM3_PARTIAL();
elessair 0:f269e3021894 126 break;
elessair 0:f269e3021894 127 case 8: // Full Remap TIM2
elessair 0:f269e3021894 128 __HAL_AFIO_REMAP_TIM2_ENABLE();
elessair 0:f269e3021894 129 break;
elessair 0:f269e3021894 130 case 9: // Full Remap TIM3
elessair 0:f269e3021894 131 __HAL_AFIO_REMAP_TIM3_ENABLE();
elessair 0:f269e3021894 132 break;
elessair 0:f269e3021894 133 default:
elessair 0:f269e3021894 134 break;
elessair 0:f269e3021894 135 }
elessair 0:f269e3021894 136 }
elessair 0:f269e3021894 137
elessair 0:f269e3021894 138 // Configure GPIO
elessair 0:f269e3021894 139 GPIO_InitTypeDef GPIO_InitStructure;
elessair 0:f269e3021894 140 GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
elessair 0:f269e3021894 141 GPIO_InitStructure.Mode = gpio_mode[mode];
elessair 0:f269e3021894 142 GPIO_InitStructure.Pull = pupd;
elessair 0:f269e3021894 143 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
elessair 0:f269e3021894 144 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
elessair 0:f269e3021894 145
elessair 0:f269e3021894 146 // Disconnect JTAG-DP + SW-DP signals.
elessair 0:f269e3021894 147 // Warning: Need to reconnect under reset
elessair 0:f269e3021894 148 if ((pin == PA_13) || (pin == PA_14)) {
elessair 0:f269e3021894 149 __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled
elessair 0:f269e3021894 150 }
elessair 0:f269e3021894 151 if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
elessair 0:f269e3021894 152 __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
elessair 0:f269e3021894 153 }
elessair 0:f269e3021894 154 }
elessair 0:f269e3021894 155
elessair 0:f269e3021894 156 /**
elessair 0:f269e3021894 157 * Configure pin pull-up/pull-down
elessair 0:f269e3021894 158 */
elessair 0:f269e3021894 159 void pin_mode(PinName pin, PinMode mode)
elessair 0:f269e3021894 160 {
elessair 0:f269e3021894 161 MBED_ASSERT(pin != (PinName)NC);
elessair 0:f269e3021894 162
elessair 0:f269e3021894 163 uint32_t port_index = STM_PORT(pin);
elessair 0:f269e3021894 164 uint32_t pin_index = STM_PIN(pin);
elessair 0:f269e3021894 165 // Enable GPIO clock
elessair 0:f269e3021894 166 uint32_t gpio_add = Set_GPIO_Clock(port_index);
elessair 0:f269e3021894 167 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
elessair 0:f269e3021894 168 __IO uint32_t* gpio_reg_hl;//gpio register depends on bit index (high or low)
elessair 0:f269e3021894 169 uint32_t shift;
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 if (pin_index < 8) {
elessair 0:f269e3021894 172 shift = (pin_index * 4);
elessair 0:f269e3021894 173 gpio_reg_hl = &(gpio->CRL);
elessair 0:f269e3021894 174 } else {
elessair 0:f269e3021894 175 shift = (pin_index % 8) * 4;
elessair 0:f269e3021894 176 gpio_reg_hl = &(gpio->CRH);
elessair 0:f269e3021894 177 }
elessair 0:f269e3021894 178
elessair 0:f269e3021894 179 // Configure open-drain and pull-up/down
elessair 0:f269e3021894 180 switch (mode) {
elessair 0:f269e3021894 181 case PullNone:
elessair 0:f269e3021894 182 break;
elessair 0:f269e3021894 183 case PullUp:
elessair 0:f269e3021894 184 case PullDown:
elessair 0:f269e3021894 185 // Set pull-up / pull-down for Input mode
elessair 0:f269e3021894 186 if ((*gpio_reg_hl & (0x03 << shift)) == 0) { // MODE bits = Input mode
elessair 0:f269e3021894 187 *gpio_reg_hl |= (0x08 << shift); // Set pull-up / pull-down
elessair 0:f269e3021894 188 *gpio_reg_hl &= ~(0x04 << shift); // ENSURES GPIOx_CRL.CNFx.bit0 = 0
elessair 0:f269e3021894 189 }
elessair 0:f269e3021894 190 // Now it's time to setup properly if pullup or pulldown. This is done in ODR register:
elessair 0:f269e3021894 191 // set pull-up => bit=1, set pull-down => bit = 0
elessair 0:f269e3021894 192 if (mode == PullUp) {
elessair 0:f269e3021894 193 gpio->ODR |= (0x01 << (pin_index)); // Set pull-up
elessair 0:f269e3021894 194 } else{
elessair 0:f269e3021894 195 gpio->ODR &= ~(0x01 << (pin_index)); // Set pull-down
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197 break;
elessair 0:f269e3021894 198 case OpenDrain:
elessair 0:f269e3021894 199 // Set open-drain for Output mode (General Purpose or Alternate Function)
elessair 0:f269e3021894 200 if ((*gpio_reg_hl & (0x03 << shift)) > 0) { // MODE bits = Output mode
elessair 0:f269e3021894 201 *gpio_reg_hl |= (0x04 << shift); // Set open-drain
elessair 0:f269e3021894 202 }
elessair 0:f269e3021894 203 break;
elessair 0:f269e3021894 204 default:
elessair 0:f269e3021894 205 break;
elessair 0:f269e3021894 206 }
elessair 0:f269e3021894 207 }
elessair 0:f269e3021894 208
elessair 0:f269e3021894 209 /* Internal function for setting the gpiomode/function
elessair 0:f269e3021894 210 * without changing Pull mode
elessair 0:f269e3021894 211 */
elessair 0:f269e3021894 212 void pin_function_gpiomode(PinName pin, uint32_t gpiomode) {
elessair 0:f269e3021894 213
elessair 0:f269e3021894 214 /* Read current pull state from HW to avoid over-write*/
elessair 0:f269e3021894 215 uint32_t port_index = STM_PORT(pin);
elessair 0:f269e3021894 216 uint32_t pin_index = STM_PIN(pin);
elessair 0:f269e3021894 217 GPIO_TypeDef *gpio = (GPIO_TypeDef *) Set_GPIO_Clock(port_index);
elessair 0:f269e3021894 218 uint32_t pull = PullNone;
elessair 0:f269e3021894 219 __IO uint32_t* gpio_reg_hl;//gpio register depends on bit index (high or low)
elessair 0:f269e3021894 220 uint32_t shift;
elessair 0:f269e3021894 221
elessair 0:f269e3021894 222 if (pin_index < 8) {
elessair 0:f269e3021894 223 shift = (pin_index * 4);
elessair 0:f269e3021894 224 gpio_reg_hl = &(gpio->CRL);
elessair 0:f269e3021894 225 } else {
elessair 0:f269e3021894 226 shift = (pin_index % 8) * 4;
elessair 0:f269e3021894 227 gpio_reg_hl = &(gpio->CRH);
elessair 0:f269e3021894 228 }
elessair 0:f269e3021894 229
elessair 0:f269e3021894 230 /* Check if pull/pull down is active */
elessair 0:f269e3021894 231 if ((!(*gpio_reg_hl & (0x03 << shift))) // input
elessair 0:f269e3021894 232 && (!!(*gpio_reg_hl & (0x08 << shift))) // pull-up / down
elessair 0:f269e3021894 233 && (!(*gpio_reg_hl & (0x04 << shift)))) { // GPIOx_CRL.CNFx.bit0 = 0
elessair 0:f269e3021894 234 if (!!(gpio->ODR & (0x01 << pin_index))) {
elessair 0:f269e3021894 235 pull = PullUp;
elessair 0:f269e3021894 236 } else {
elessair 0:f269e3021894 237 pull = PullDown;
elessair 0:f269e3021894 238 }
elessair 0:f269e3021894 239 } else { //output
elessair 0:f269e3021894 240 if (!!(*gpio_reg_hl & (0x04 << shift))) { //open drain
elessair 0:f269e3021894 241 pull = OpenDrain;
elessair 0:f269e3021894 242 }
elessair 0:f269e3021894 243 }
elessair 0:f269e3021894 244
elessair 0:f269e3021894 245 /* Then re-use global function for updating the mode part*/
elessair 0:f269e3021894 246 pin_function(pin, STM_PIN_DATA(gpiomode, pull, 0));
elessair 0:f269e3021894 247 }