erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC82X/gpio_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "gpio_api.h"
elessair 0:f269e3021894 18 #include "pinmap.h"
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 static int gpio_enabled = 0;
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 static void gpio_enable(void)
elessair 0:f269e3021894 23 {
elessair 0:f269e3021894 24 gpio_enabled = 1;
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 /* Enable AHB clock to the GPIO domain. */
elessair 0:f269e3021894 27 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 6);
elessair 0:f269e3021894 28
elessair 0:f269e3021894 29 /* Peripheral reset control to GPIO and GPIO INT, a "1" bring it out of reset. */
elessair 0:f269e3021894 30 LPC_SYSCON->PRESETCTRL &= ~(1 << 10);
elessair 0:f269e3021894 31 LPC_SYSCON->PRESETCTRL |= (1 << 10);
elessair 0:f269e3021894 32 }
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 uint32_t gpio_set(PinName pin)
elessair 0:f269e3021894 35 {
elessair 0:f269e3021894 36 if (!gpio_enabled)
elessair 0:f269e3021894 37 gpio_enable();
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 return (1 << ((int)pin >> PIN_SHIFT));
elessair 0:f269e3021894 40 }
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 void gpio_init(gpio_t *obj, PinName pin)
elessair 0:f269e3021894 43 {
elessair 0:f269e3021894 44 obj->pin = pin;
elessair 0:f269e3021894 45 if (pin == (PinName)NC)
elessair 0:f269e3021894 46 return;
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 obj->mask = gpio_set(pin);
elessair 0:f269e3021894 49
elessair 0:f269e3021894 50 obj->reg_set = &LPC_GPIO_PORT->SET0;
elessair 0:f269e3021894 51 obj->reg_clr = &LPC_GPIO_PORT->CLR0;
elessair 0:f269e3021894 52 obj->reg_in = &LPC_GPIO_PORT->PIN0;
elessair 0:f269e3021894 53 obj->reg_dir = &LPC_GPIO_PORT->DIR0;
elessair 0:f269e3021894 54 }
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 void gpio_mode(gpio_t *obj, PinMode mode)
elessair 0:f269e3021894 57 {
elessair 0:f269e3021894 58 pin_mode(obj->pin, mode);
elessair 0:f269e3021894 59 }
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 void gpio_dir(gpio_t *obj, PinDirection direction)
elessair 0:f269e3021894 62 {
elessair 0:f269e3021894 63 MBED_ASSERT(obj->pin != (PinName)NC);
elessair 0:f269e3021894 64 switch (direction) {
elessair 0:f269e3021894 65 case PIN_INPUT :
elessair 0:f269e3021894 66 *obj->reg_dir &= ~obj->mask;
elessair 0:f269e3021894 67 break;
elessair 0:f269e3021894 68 case PIN_OUTPUT:
elessair 0:f269e3021894 69 *obj->reg_dir |= obj->mask;
elessair 0:f269e3021894 70 break;
elessair 0:f269e3021894 71 }
elessair 0:f269e3021894 72 }