mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "rtc_api.h"
elessair 0:f269e3021894 17
elessair 0:f269e3021894 18 // ensure rtc is running (unchanged if already running)
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 /* Setup the RTC based on a time structure, ensuring RTC is enabled
elessair 0:f269e3021894 21 *
elessair 0:f269e3021894 22 * Can be clocked by a 32.768KHz oscillator or prescale divider based on the APB clock
elessair 0:f269e3021894 23 * - We want to use the 32khz clock, allowing for sleep mode
elessair 0:f269e3021894 24 *
elessair 0:f269e3021894 25 * Most registers are not changed by a Reset
elessair 0:f269e3021894 26 * - We must initialize these registers between power-on and setting the RTC into operation
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 * Clock Control Register
elessair 0:f269e3021894 29 * RTC_CCR[0] : Enable - 0 = Disabled, 1 = Enabled
elessair 0:f269e3021894 30 * RTC_CCR[1] : Reset - 0 = Normal, 1 = Reset
elessair 0:f269e3021894 31 * RTC_CCR[4] : Clock Source - 0 = Prescaler, 1 = 32k Xtal
elessair 0:f269e3021894 32 *
elessair 0:f269e3021894 33 * The RTC may already be running, so we should set it up
elessair 0:f269e3021894 34 * without impacting if it is the case
elessair 0:f269e3021894 35 */
elessair 0:f269e3021894 36 void rtc_init(void) {
elessair 0:f269e3021894 37 LPC_SC->PCONP |= 0x200; // Ensure power is on
elessair 0:f269e3021894 38 LPC_RTC->CCR = 0x00;
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40 LPC_RTC->CCR |= 1 << 0; // Ensure the RTC is enabled
elessair 0:f269e3021894 41 }
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 void rtc_free(void) {
elessair 0:f269e3021894 44 // [TODO]
elessair 0:f269e3021894 45 }
elessair 0:f269e3021894 46
elessair 0:f269e3021894 47 /*
elessair 0:f269e3021894 48 * Little check routine to see if the RTC has been enabled
elessair 0:f269e3021894 49 *
elessair 0:f269e3021894 50 * Clock Control Register
elessair 0:f269e3021894 51 * RTC_CCR[0] : 0 = Disabled, 1 = Enabled
elessair 0:f269e3021894 52 *
elessair 0:f269e3021894 53 */
elessair 0:f269e3021894 54 int rtc_isenabled(void) {
elessair 0:f269e3021894 55 return(((LPC_RTC->CCR) & 0x01) != 0);
elessair 0:f269e3021894 56 }
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 /*
elessair 0:f269e3021894 59 * RTC Registers
elessair 0:f269e3021894 60 * RTC_SEC Seconds 0-59
elessair 0:f269e3021894 61 * RTC_MIN Minutes 0-59
elessair 0:f269e3021894 62 * RTC_HOUR Hour 0-23
elessair 0:f269e3021894 63 * RTC_DOM Day of Month 1-28..31
elessair 0:f269e3021894 64 * RTC_DOW Day of Week 0-6
elessair 0:f269e3021894 65 * RTC_DOY Day of Year 1-365
elessair 0:f269e3021894 66 * RTC_MONTH Month 1-12
elessair 0:f269e3021894 67 * RTC_YEAR Year 0-4095
elessair 0:f269e3021894 68 *
elessair 0:f269e3021894 69 * struct tm
elessair 0:f269e3021894 70 * tm_sec seconds after the minute 0-61
elessair 0:f269e3021894 71 * tm_min minutes after the hour 0-59
elessair 0:f269e3021894 72 * tm_hour hours since midnight 0-23
elessair 0:f269e3021894 73 * tm_mday day of the month 1-31
elessair 0:f269e3021894 74 * tm_mon months since January 0-11
elessair 0:f269e3021894 75 * tm_year years since 1900
elessair 0:f269e3021894 76 * tm_wday days since Sunday 0-6
elessair 0:f269e3021894 77 * tm_yday days since January 1 0-365
elessair 0:f269e3021894 78 * tm_isdst Daylight Saving Time flag
elessair 0:f269e3021894 79 */
elessair 0:f269e3021894 80 time_t rtc_read(void) {
elessair 0:f269e3021894 81 // Setup a tm structure based on the RTC
elessair 0:f269e3021894 82 struct tm timeinfo;
elessair 0:f269e3021894 83 timeinfo.tm_sec = LPC_RTC->SEC;
elessair 0:f269e3021894 84 timeinfo.tm_min = LPC_RTC->MIN;
elessair 0:f269e3021894 85 timeinfo.tm_hour = LPC_RTC->HOUR;
elessair 0:f269e3021894 86 timeinfo.tm_mday = LPC_RTC->DOM;
elessair 0:f269e3021894 87 timeinfo.tm_mon = LPC_RTC->MONTH - 1;
elessair 0:f269e3021894 88 timeinfo.tm_year = LPC_RTC->YEAR - 1900;
elessair 0:f269e3021894 89
elessair 0:f269e3021894 90 // Convert to timestamp
elessair 0:f269e3021894 91 time_t t = mktime(&timeinfo);
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 return t;
elessair 0:f269e3021894 94 }
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 void rtc_write(time_t t) {
elessair 0:f269e3021894 97 // Convert the time in to a tm
elessair 0:f269e3021894 98 struct tm *timeinfo = localtime(&t);
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 // Pause clock, and clear counter register (clears us count)
elessair 0:f269e3021894 101 LPC_RTC->CCR |= 2;
elessair 0:f269e3021894 102
elessair 0:f269e3021894 103 // Set the RTC
elessair 0:f269e3021894 104 LPC_RTC->SEC = timeinfo->tm_sec;
elessair 0:f269e3021894 105 LPC_RTC->MIN = timeinfo->tm_min;
elessair 0:f269e3021894 106 LPC_RTC->HOUR = timeinfo->tm_hour;
elessair 0:f269e3021894 107 LPC_RTC->DOM = timeinfo->tm_mday;
elessair 0:f269e3021894 108 LPC_RTC->MONTH = timeinfo->tm_mon + 1;
elessair 0:f269e3021894 109 LPC_RTC->YEAR = timeinfo->tm_year + 1900;
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 // Restart clock
elessair 0:f269e3021894 112 LPC_RTC->CCR &= ~((uint32_t)2);
elessair 0:f269e3021894 113 }