erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC176X/can_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "can_api.h"
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20 #include "pinmap.h"
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 #include <math.h>
elessair 0:f269e3021894 23 #include <string.h>
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 #define CAN_NUM 2
elessair 0:f269e3021894 26
elessair 0:f269e3021894 27 /* Acceptance filter mode in AFMR register */
elessair 0:f269e3021894 28 #define ACCF_OFF 0x01
elessair 0:f269e3021894 29 #define ACCF_BYPASS 0x02
elessair 0:f269e3021894 30 #define ACCF_ON 0x00
elessair 0:f269e3021894 31 #define ACCF_FULLCAN 0x04
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 /* There are several bit timing calculators on the internet.
elessair 0:f269e3021894 34 http://www.port.de/engl/canprod/sv_req_form.html
elessair 0:f269e3021894 35 http://www.kvaser.com/can/index.htm
elessair 0:f269e3021894 36 */
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 static const PinMap PinMap_CAN_RD[] = {
elessair 0:f269e3021894 39 {P0_0 , CAN_1, 1},
elessair 0:f269e3021894 40 {P0_4 , CAN_2, 2},
elessair 0:f269e3021894 41 {P0_21, CAN_1, 3},
elessair 0:f269e3021894 42 {P2_7 , CAN_2, 1},
elessair 0:f269e3021894 43 {NC , NC , 0}
elessair 0:f269e3021894 44 };
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 static const PinMap PinMap_CAN_TD[] = {
elessair 0:f269e3021894 47 {P0_1 , CAN_1, 1},
elessair 0:f269e3021894 48 {P0_5 , CAN_2, 2},
elessair 0:f269e3021894 49 {P0_22, CAN_1, 3},
elessair 0:f269e3021894 50 {P2_8 , CAN_2, 1},
elessair 0:f269e3021894 51 {NC , NC , 0}
elessair 0:f269e3021894 52 };
elessair 0:f269e3021894 53
elessair 0:f269e3021894 54 // Type definition to hold a CAN message
elessair 0:f269e3021894 55 struct CANMsg {
elessair 0:f269e3021894 56 unsigned int reserved1 : 16;
elessair 0:f269e3021894 57 unsigned int dlc : 4; // Bits 16..19: DLC - Data Length Counter
elessair 0:f269e3021894 58 unsigned int reserved0 : 10;
elessair 0:f269e3021894 59 unsigned int rtr : 1; // Bit 30: Set if this is a RTR message
elessair 0:f269e3021894 60 unsigned int type : 1; // Bit 31: Set if this is a 29-bit ID message
elessair 0:f269e3021894 61 unsigned int id; // CAN Message ID (11-bit or 29-bit)
elessair 0:f269e3021894 62 unsigned char data[8]; // CAN Message Data Bytes 0-7
elessair 0:f269e3021894 63 };
elessair 0:f269e3021894 64 typedef struct CANMsg CANMsg;
elessair 0:f269e3021894 65
elessair 0:f269e3021894 66 static uint32_t can_irq_ids[CAN_NUM] = {0};
elessair 0:f269e3021894 67 static can_irq_handler irq_handler;
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 static uint32_t can_disable(can_t *obj) {
elessair 0:f269e3021894 70 uint32_t sm = obj->dev->MOD;
elessair 0:f269e3021894 71 obj->dev->MOD |= 1;
elessair 0:f269e3021894 72 return sm;
elessair 0:f269e3021894 73 }
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 static inline void can_enable(can_t *obj) {
elessair 0:f269e3021894 76 if (obj->dev->MOD & 1) {
elessair 0:f269e3021894 77 obj->dev->MOD &= ~(1);
elessair 0:f269e3021894 78 }
elessair 0:f269e3021894 79 }
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 int can_mode(can_t *obj, CanMode mode) {
elessair 0:f269e3021894 82 int success = 0;
elessair 0:f269e3021894 83 switch (mode) {
elessair 0:f269e3021894 84 case MODE_RESET:
elessair 0:f269e3021894 85 // Clear all special modes
elessair 0:f269e3021894 86 can_reset(obj);
elessair 0:f269e3021894 87 obj->dev->MOD &=~ 0x06;
elessair 0:f269e3021894 88 success = 1;
elessair 0:f269e3021894 89 break;
elessair 0:f269e3021894 90 case MODE_NORMAL:
elessair 0:f269e3021894 91 // Clear all special modes
elessair 0:f269e3021894 92 can_disable(obj);
elessair 0:f269e3021894 93 obj->dev->MOD &=~ 0x06;
elessair 0:f269e3021894 94 can_enable(obj);
elessair 0:f269e3021894 95 success = 1;
elessair 0:f269e3021894 96 break;
elessair 0:f269e3021894 97 case MODE_SILENT:
elessair 0:f269e3021894 98 // Set listen-only mode and clear self-test mode
elessair 0:f269e3021894 99 can_disable(obj);
elessair 0:f269e3021894 100 obj->dev->MOD |= 0x02;
elessair 0:f269e3021894 101 obj->dev->MOD &=~ 0x04;
elessair 0:f269e3021894 102 can_enable(obj);
elessair 0:f269e3021894 103 success = 1;
elessair 0:f269e3021894 104 break;
elessair 0:f269e3021894 105 case MODE_TEST_LOCAL:
elessair 0:f269e3021894 106 // Set self-test mode and clear listen-only mode
elessair 0:f269e3021894 107 can_disable(obj);
elessair 0:f269e3021894 108 obj->dev->MOD |= 0x04;
elessair 0:f269e3021894 109 obj->dev->MOD &=~ 0x02;
elessair 0:f269e3021894 110 can_enable(obj);
elessair 0:f269e3021894 111 success = 1;
elessair 0:f269e3021894 112 break;
elessair 0:f269e3021894 113 case MODE_TEST_SILENT:
elessair 0:f269e3021894 114 case MODE_TEST_GLOBAL:
elessair 0:f269e3021894 115 default:
elessair 0:f269e3021894 116 success = 0;
elessair 0:f269e3021894 117 break;
elessair 0:f269e3021894 118 }
elessair 0:f269e3021894 119
elessair 0:f269e3021894 120 return success;
elessair 0:f269e3021894 121 }
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) {
elessair 0:f269e3021894 124 return 0; // not implemented
elessair 0:f269e3021894 125 }
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 static inline void can_irq(uint32_t icr, uint32_t index) {
elessair 0:f269e3021894 128 uint32_t i;
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 for(i = 0; i < 8; i++)
elessair 0:f269e3021894 131 {
elessair 0:f269e3021894 132 if((can_irq_ids[index] != 0) && (icr & (1 << i)))
elessair 0:f269e3021894 133 {
elessair 0:f269e3021894 134 switch (i) {
elessair 0:f269e3021894 135 case 0: irq_handler(can_irq_ids[index], IRQ_RX); break;
elessair 0:f269e3021894 136 case 1: irq_handler(can_irq_ids[index], IRQ_TX); break;
elessair 0:f269e3021894 137 case 2: irq_handler(can_irq_ids[index], IRQ_ERROR); break;
elessair 0:f269e3021894 138 case 3: irq_handler(can_irq_ids[index], IRQ_OVERRUN); break;
elessair 0:f269e3021894 139 case 4: irq_handler(can_irq_ids[index], IRQ_WAKEUP); break;
elessair 0:f269e3021894 140 case 5: irq_handler(can_irq_ids[index], IRQ_PASSIVE); break;
elessair 0:f269e3021894 141 case 6: irq_handler(can_irq_ids[index], IRQ_ARB); break;
elessair 0:f269e3021894 142 case 7: irq_handler(can_irq_ids[index], IRQ_BUS); break;
elessair 0:f269e3021894 143 case 8: irq_handler(can_irq_ids[index], IRQ_READY); break;
elessair 0:f269e3021894 144 }
elessair 0:f269e3021894 145 }
elessair 0:f269e3021894 146 }
elessair 0:f269e3021894 147 }
elessair 0:f269e3021894 148
elessair 0:f269e3021894 149 // Have to check that the CAN block is active before reading the Interrupt
elessair 0:f269e3021894 150 // Control Register, or the mbed hangs
elessair 0:f269e3021894 151 void can_irq_n() {
elessair 0:f269e3021894 152 uint32_t icr;
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 if(LPC_SC->PCONP & (1 << 13)) {
elessair 0:f269e3021894 155 icr = LPC_CAN1->ICR & 0x1FF;
elessair 0:f269e3021894 156 can_irq(icr, 0);
elessair 0:f269e3021894 157 }
elessair 0:f269e3021894 158
elessair 0:f269e3021894 159 if(LPC_SC->PCONP & (1 << 14)) {
elessair 0:f269e3021894 160 icr = LPC_CAN2->ICR & 0x1FF;
elessair 0:f269e3021894 161 can_irq(icr, 1);
elessair 0:f269e3021894 162 }
elessair 0:f269e3021894 163 }
elessair 0:f269e3021894 164
elessair 0:f269e3021894 165 // Register CAN object's irq handler
elessair 0:f269e3021894 166 void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) {
elessair 0:f269e3021894 167 irq_handler = handler;
elessair 0:f269e3021894 168 can_irq_ids[obj->index] = id;
elessair 0:f269e3021894 169 }
elessair 0:f269e3021894 170
elessair 0:f269e3021894 171 // Unregister CAN object's irq handler
elessair 0:f269e3021894 172 void can_irq_free(can_t *obj) {
elessair 0:f269e3021894 173 obj->dev->IER &= ~(1);
elessair 0:f269e3021894 174 can_irq_ids[obj->index] = 0;
elessair 0:f269e3021894 175
elessair 0:f269e3021894 176 if ((can_irq_ids[0] == 0) && (can_irq_ids[1] == 0)) {
elessair 0:f269e3021894 177 NVIC_DisableIRQ(CAN_IRQn);
elessair 0:f269e3021894 178 }
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180
elessair 0:f269e3021894 181 // Clear or set a irq
elessair 0:f269e3021894 182 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) {
elessair 0:f269e3021894 183 uint32_t ier;
elessair 0:f269e3021894 184
elessair 0:f269e3021894 185 switch (type) {
elessair 0:f269e3021894 186 case IRQ_RX: ier = (1 << 0); break;
elessair 0:f269e3021894 187 case IRQ_TX: ier = (1 << 1); break;
elessair 0:f269e3021894 188 case IRQ_ERROR: ier = (1 << 2); break;
elessair 0:f269e3021894 189 case IRQ_OVERRUN: ier = (1 << 3); break;
elessair 0:f269e3021894 190 case IRQ_WAKEUP: ier = (1 << 4); break;
elessair 0:f269e3021894 191 case IRQ_PASSIVE: ier = (1 << 5); break;
elessair 0:f269e3021894 192 case IRQ_ARB: ier = (1 << 6); break;
elessair 0:f269e3021894 193 case IRQ_BUS: ier = (1 << 7); break;
elessair 0:f269e3021894 194 case IRQ_READY: ier = (1 << 8); break;
elessair 0:f269e3021894 195 default: return;
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 obj->dev->MOD |= 1;
elessair 0:f269e3021894 199 if(enable == 0) {
elessair 0:f269e3021894 200 obj->dev->IER &= ~ier;
elessair 0:f269e3021894 201 }
elessair 0:f269e3021894 202 else {
elessair 0:f269e3021894 203 obj->dev->IER |= ier;
elessair 0:f269e3021894 204 }
elessair 0:f269e3021894 205 obj->dev->MOD &= ~(1);
elessair 0:f269e3021894 206
elessair 0:f269e3021894 207 // Enable NVIC if at least 1 interrupt is active
elessair 0:f269e3021894 208 if(((LPC_SC->PCONP & (1 << 13)) && LPC_CAN1->IER) || ((LPC_SC->PCONP & (1 << 14)) && LPC_CAN2->IER)) {
elessair 0:f269e3021894 209 NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq_n);
elessair 0:f269e3021894 210 NVIC_EnableIRQ(CAN_IRQn);
elessair 0:f269e3021894 211 }
elessair 0:f269e3021894 212 else {
elessair 0:f269e3021894 213 NVIC_DisableIRQ(CAN_IRQn);
elessair 0:f269e3021894 214 }
elessair 0:f269e3021894 215 }
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 static int can_pclk(can_t *obj) {
elessair 0:f269e3021894 218 int value = 0;
elessair 0:f269e3021894 219 switch ((int)obj->dev) {
elessair 0:f269e3021894 220 case CAN_1: value = (LPC_SC->PCLKSEL0 & (0x3 << 26)) >> 26; break;
elessair 0:f269e3021894 221 case CAN_2: value = (LPC_SC->PCLKSEL0 & (0x3 << 28)) >> 28; break;
elessair 0:f269e3021894 222 }
elessair 0:f269e3021894 223
elessair 0:f269e3021894 224 switch (value) {
elessair 0:f269e3021894 225 case 1: return 1;
elessair 0:f269e3021894 226 case 2: return 2;
elessair 0:f269e3021894 227 case 3: return 6;
elessair 0:f269e3021894 228 default: return 4;
elessair 0:f269e3021894 229 }
elessair 0:f269e3021894 230 }
elessair 0:f269e3021894 231
elessair 0:f269e3021894 232 // This table has the sampling points as close to 75% as possible. The first
elessair 0:f269e3021894 233 // value is TSEG1, the second TSEG2.
elessair 0:f269e3021894 234 static const int timing_pts[23][2] = {
elessair 0:f269e3021894 235 {0x0, 0x0}, // 2, 50%
elessair 0:f269e3021894 236 {0x1, 0x0}, // 3, 67%
elessair 0:f269e3021894 237 {0x2, 0x0}, // 4, 75%
elessair 0:f269e3021894 238 {0x3, 0x0}, // 5, 80%
elessair 0:f269e3021894 239 {0x3, 0x1}, // 6, 67%
elessair 0:f269e3021894 240 {0x4, 0x1}, // 7, 71%
elessair 0:f269e3021894 241 {0x5, 0x1}, // 8, 75%
elessair 0:f269e3021894 242 {0x6, 0x1}, // 9, 78%
elessair 0:f269e3021894 243 {0x6, 0x2}, // 10, 70%
elessair 0:f269e3021894 244 {0x7, 0x2}, // 11, 73%
elessair 0:f269e3021894 245 {0x8, 0x2}, // 12, 75%
elessair 0:f269e3021894 246 {0x9, 0x2}, // 13, 77%
elessair 0:f269e3021894 247 {0x9, 0x3}, // 14, 71%
elessair 0:f269e3021894 248 {0xA, 0x3}, // 15, 73%
elessair 0:f269e3021894 249 {0xB, 0x3}, // 16, 75%
elessair 0:f269e3021894 250 {0xC, 0x3}, // 17, 76%
elessair 0:f269e3021894 251 {0xD, 0x3}, // 18, 78%
elessair 0:f269e3021894 252 {0xD, 0x4}, // 19, 74%
elessair 0:f269e3021894 253 {0xE, 0x4}, // 20, 75%
elessair 0:f269e3021894 254 {0xF, 0x4}, // 21, 76%
elessair 0:f269e3021894 255 {0xF, 0x5}, // 22, 73%
elessair 0:f269e3021894 256 {0xF, 0x6}, // 23, 70%
elessair 0:f269e3021894 257 {0xF, 0x7}, // 24, 67%
elessair 0:f269e3021894 258 };
elessair 0:f269e3021894 259
elessair 0:f269e3021894 260 static unsigned int can_speed(unsigned int sclk, unsigned int pclk, unsigned int cclk, unsigned char psjw) {
elessair 0:f269e3021894 261 uint32_t btr;
elessair 0:f269e3021894 262 uint16_t brp = 0;
elessair 0:f269e3021894 263 uint32_t calcbit;
elessair 0:f269e3021894 264 uint32_t bitwidth;
elessair 0:f269e3021894 265 int hit = 0;
elessair 0:f269e3021894 266 int bits;
elessair 0:f269e3021894 267
elessair 0:f269e3021894 268 bitwidth = sclk / (pclk * cclk);
elessair 0:f269e3021894 269
elessair 0:f269e3021894 270 brp = bitwidth / 0x18;
elessair 0:f269e3021894 271 while ((!hit) && (brp < bitwidth / 4)) {
elessair 0:f269e3021894 272 brp++;
elessair 0:f269e3021894 273 for (bits = 22; bits > 0; bits--) {
elessair 0:f269e3021894 274 calcbit = (bits + 3) * (brp + 1);
elessair 0:f269e3021894 275 if (calcbit == bitwidth) {
elessair 0:f269e3021894 276 hit = 1;
elessair 0:f269e3021894 277 break;
elessair 0:f269e3021894 278 }
elessair 0:f269e3021894 279 }
elessair 0:f269e3021894 280 }
elessair 0:f269e3021894 281
elessair 0:f269e3021894 282 if (hit) {
elessair 0:f269e3021894 283 btr = ((timing_pts[bits][1] << 20) & 0x00700000)
elessair 0:f269e3021894 284 | ((timing_pts[bits][0] << 16) & 0x000F0000)
elessair 0:f269e3021894 285 | ((psjw << 14) & 0x0000C000)
elessair 0:f269e3021894 286 | ((brp << 0) & 0x000003FF);
elessair 0:f269e3021894 287 } else {
elessair 0:f269e3021894 288 btr = 0xFFFFFFFF;
elessair 0:f269e3021894 289 }
elessair 0:f269e3021894 290
elessair 0:f269e3021894 291 return btr;
elessair 0:f269e3021894 292
elessair 0:f269e3021894 293 }
elessair 0:f269e3021894 294
elessair 0:f269e3021894 295 void can_init(can_t *obj, PinName rd, PinName td) {
elessair 0:f269e3021894 296 CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
elessair 0:f269e3021894 297 CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
elessair 0:f269e3021894 298 obj->dev = (LPC_CAN_TypeDef *)pinmap_merge(can_rd, can_td);
elessair 0:f269e3021894 299 MBED_ASSERT((int)obj->dev != NC);
elessair 0:f269e3021894 300
elessair 0:f269e3021894 301 switch ((int)obj->dev) {
elessair 0:f269e3021894 302 case CAN_1: LPC_SC->PCONP |= 1 << 13; break;
elessair 0:f269e3021894 303 case CAN_2: LPC_SC->PCONP |= 1 << 14; break;
elessair 0:f269e3021894 304 }
elessair 0:f269e3021894 305
elessair 0:f269e3021894 306 pinmap_pinout(rd, PinMap_CAN_RD);
elessair 0:f269e3021894 307 pinmap_pinout(td, PinMap_CAN_TD);
elessair 0:f269e3021894 308
elessair 0:f269e3021894 309 switch ((int)obj->dev) {
elessair 0:f269e3021894 310 case CAN_1: obj->index = 0; break;
elessair 0:f269e3021894 311 case CAN_2: obj->index = 1; break;
elessair 0:f269e3021894 312 }
elessair 0:f269e3021894 313
elessair 0:f269e3021894 314 can_reset(obj);
elessair 0:f269e3021894 315 obj->dev->IER = 0; // Disable Interrupts
elessair 0:f269e3021894 316 can_frequency(obj, 100000);
elessair 0:f269e3021894 317
elessair 0:f269e3021894 318 LPC_CANAF->AFMR = ACCF_BYPASS; // Bypass Filter
elessair 0:f269e3021894 319 }
elessair 0:f269e3021894 320
elessair 0:f269e3021894 321 void can_free(can_t *obj) {
elessair 0:f269e3021894 322 switch ((int)obj->dev) {
elessair 0:f269e3021894 323 case CAN_1: LPC_SC->PCONP &= ~(1 << 13); break;
elessair 0:f269e3021894 324 case CAN_2: LPC_SC->PCONP &= ~(1 << 14); break;
elessair 0:f269e3021894 325 }
elessair 0:f269e3021894 326 }
elessair 0:f269e3021894 327
elessair 0:f269e3021894 328 int can_frequency(can_t *obj, int f) {
elessair 0:f269e3021894 329 int pclk = can_pclk(obj);
elessair 0:f269e3021894 330
elessair 0:f269e3021894 331 int btr = can_speed(SystemCoreClock, pclk, (unsigned int)f, 1);
elessair 0:f269e3021894 332
elessair 0:f269e3021894 333 if (btr > 0) {
elessair 0:f269e3021894 334 uint32_t modmask = can_disable(obj);
elessair 0:f269e3021894 335 obj->dev->BTR = btr;
elessair 0:f269e3021894 336 obj->dev->MOD = modmask;
elessair 0:f269e3021894 337 return 1;
elessair 0:f269e3021894 338 } else {
elessair 0:f269e3021894 339 return 0;
elessair 0:f269e3021894 340 }
elessair 0:f269e3021894 341 }
elessair 0:f269e3021894 342
elessair 0:f269e3021894 343 int can_write(can_t *obj, CAN_Message msg, int cc) {
elessair 0:f269e3021894 344 unsigned int CANStatus;
elessair 0:f269e3021894 345 CANMsg m;
elessair 0:f269e3021894 346
elessair 0:f269e3021894 347 can_enable(obj);
elessair 0:f269e3021894 348
elessair 0:f269e3021894 349 m.id = msg.id ;
elessair 0:f269e3021894 350 m.dlc = msg.len & 0xF;
elessair 0:f269e3021894 351 m.rtr = msg.type;
elessair 0:f269e3021894 352 m.type = msg.format;
elessair 0:f269e3021894 353 memcpy(m.data, msg.data, msg.len);
elessair 0:f269e3021894 354 const unsigned int *buf = (const unsigned int *)&m;
elessair 0:f269e3021894 355
elessair 0:f269e3021894 356 CANStatus = obj->dev->SR;
elessair 0:f269e3021894 357
elessair 0:f269e3021894 358 // Send the message to ourself if in a test mode
elessair 0:f269e3021894 359 if (obj->dev->MOD & 0x04) {
elessair 0:f269e3021894 360 cc = 1;
elessair 0:f269e3021894 361 }
elessair 0:f269e3021894 362
elessair 0:f269e3021894 363 if (CANStatus & 0x00000004) {
elessair 0:f269e3021894 364 obj->dev->TFI1 = buf[0] & 0xC00F0000;
elessair 0:f269e3021894 365 obj->dev->TID1 = buf[1];
elessair 0:f269e3021894 366 obj->dev->TDA1 = buf[2];
elessair 0:f269e3021894 367 obj->dev->TDB1 = buf[3];
elessair 0:f269e3021894 368 if(cc) {
elessair 0:f269e3021894 369 obj->dev->CMR = 0x30;
elessair 0:f269e3021894 370 } else {
elessair 0:f269e3021894 371 obj->dev->CMR = 0x21;
elessair 0:f269e3021894 372 }
elessair 0:f269e3021894 373 return 1;
elessair 0:f269e3021894 374
elessair 0:f269e3021894 375 } else if (CANStatus & 0x00000400) {
elessair 0:f269e3021894 376 obj->dev->TFI2 = buf[0] & 0xC00F0000;
elessair 0:f269e3021894 377 obj->dev->TID2 = buf[1];
elessair 0:f269e3021894 378 obj->dev->TDA2 = buf[2];
elessair 0:f269e3021894 379 obj->dev->TDB2 = buf[3];
elessair 0:f269e3021894 380 if (cc) {
elessair 0:f269e3021894 381 obj->dev->CMR = 0x50;
elessair 0:f269e3021894 382 } else {
elessair 0:f269e3021894 383 obj->dev->CMR = 0x41;
elessair 0:f269e3021894 384 }
elessair 0:f269e3021894 385 return 1;
elessair 0:f269e3021894 386
elessair 0:f269e3021894 387 } else if (CANStatus & 0x00040000) {
elessair 0:f269e3021894 388 obj->dev->TFI3 = buf[0] & 0xC00F0000;
elessair 0:f269e3021894 389 obj->dev->TID3 = buf[1];
elessair 0:f269e3021894 390 obj->dev->TDA3 = buf[2];
elessair 0:f269e3021894 391 obj->dev->TDB3 = buf[3];
elessair 0:f269e3021894 392 if (cc) {
elessair 0:f269e3021894 393 obj->dev->CMR = 0x90;
elessair 0:f269e3021894 394 } else {
elessair 0:f269e3021894 395 obj->dev->CMR = 0x81;
elessair 0:f269e3021894 396 }
elessair 0:f269e3021894 397 return 1;
elessair 0:f269e3021894 398 }
elessair 0:f269e3021894 399
elessair 0:f269e3021894 400 return 0;
elessair 0:f269e3021894 401 }
elessair 0:f269e3021894 402
elessair 0:f269e3021894 403 int can_read(can_t *obj, CAN_Message *msg, int handle) {
elessair 0:f269e3021894 404 CANMsg x;
elessair 0:f269e3021894 405 unsigned int *i = (unsigned int *)&x;
elessair 0:f269e3021894 406
elessair 0:f269e3021894 407 can_enable(obj);
elessair 0:f269e3021894 408
elessair 0:f269e3021894 409 if (obj->dev->GSR & 0x1) {
elessair 0:f269e3021894 410 *i++ = obj->dev->RFS; // Frame
elessair 0:f269e3021894 411 *i++ = obj->dev->RID; // ID
elessair 0:f269e3021894 412 *i++ = obj->dev->RDA; // Data A
elessair 0:f269e3021894 413 *i++ = obj->dev->RDB; // Data B
elessair 0:f269e3021894 414 obj->dev->CMR = 0x04; // release receive buffer
elessair 0:f269e3021894 415
elessair 0:f269e3021894 416 msg->id = x.id;
elessair 0:f269e3021894 417 msg->len = x.dlc;
elessair 0:f269e3021894 418 msg->format = (x.type)? CANExtended : CANStandard;
elessair 0:f269e3021894 419 msg->type = (x.rtr)? CANRemote: CANData;
elessair 0:f269e3021894 420 memcpy(msg->data,x.data,x.dlc);
elessair 0:f269e3021894 421 return 1;
elessair 0:f269e3021894 422 }
elessair 0:f269e3021894 423
elessair 0:f269e3021894 424 return 0;
elessair 0:f269e3021894 425 }
elessair 0:f269e3021894 426
elessair 0:f269e3021894 427 void can_reset(can_t *obj) {
elessair 0:f269e3021894 428 can_disable(obj);
elessair 0:f269e3021894 429 obj->dev->GSR = 0; // Reset error counter when CAN1MOD is in reset
elessair 0:f269e3021894 430 }
elessair 0:f269e3021894 431
elessair 0:f269e3021894 432 unsigned char can_rderror(can_t *obj) {
elessair 0:f269e3021894 433 return (obj->dev->GSR >> 16) & 0xFF;
elessair 0:f269e3021894 434 }
elessair 0:f269e3021894 435
elessair 0:f269e3021894 436 unsigned char can_tderror(can_t *obj) {
elessair 0:f269e3021894 437 return (obj->dev->GSR >> 24) & 0xFF;
elessair 0:f269e3021894 438 }
elessair 0:f269e3021894 439
elessair 0:f269e3021894 440 void can_monitor(can_t *obj, int silent) {
elessair 0:f269e3021894 441 uint32_t mod_mask = can_disable(obj);
elessair 0:f269e3021894 442 if (silent) {
elessair 0:f269e3021894 443 obj->dev->MOD |= (1 << 1);
elessair 0:f269e3021894 444 } else {
elessair 0:f269e3021894 445 obj->dev->MOD &= ~(1 << 1);
elessair 0:f269e3021894 446 }
elessair 0:f269e3021894 447 if (!(mod_mask & 1)) {
elessair 0:f269e3021894 448 can_enable(obj);
elessair 0:f269e3021894 449 }
elessair 0:f269e3021894 450 }