erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC13XX/us_ticker.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include <stddef.h>
elessair 0:f269e3021894 17 #include "us_ticker_api.h"
elessair 0:f269e3021894 18 #include "PeripheralNames.h"
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 #define US_TICKER_TIMER ((LPC_CT32B1_Type *)LPC_CT32B1_BASE)
elessair 0:f269e3021894 21 #define US_TICKER_TIMER_IRQn CT32B1_IRQn
elessair 0:f269e3021894 22
elessair 0:f269e3021894 23 int us_ticker_inited = 0;
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 void us_ticker_init(void) {
elessair 0:f269e3021894 26 if (us_ticker_inited) return;
elessair 0:f269e3021894 27 us_ticker_inited = 1;
elessair 0:f269e3021894 28
elessair 0:f269e3021894 29 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10); // Clock TIMER_1
elessair 0:f269e3021894 30 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 US_TICKER_TIMER->TCR = 0x2; // reset
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 uint32_t prescale = PCLK / 1000000; // default to 1MHz (1 us ticks)
elessair 0:f269e3021894 35 US_TICKER_TIMER->PR = prescale - 1;
elessair 0:f269e3021894 36 US_TICKER_TIMER->TCR = 1; // enable = 1, reset = 0
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
elessair 0:f269e3021894 39 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
elessair 0:f269e3021894 40 }
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 uint32_t us_ticker_read() {
elessair 0:f269e3021894 43 if (!us_ticker_inited)
elessair 0:f269e3021894 44 us_ticker_init();
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 return US_TICKER_TIMER->TC;
elessair 0:f269e3021894 47 }
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 void us_ticker_set_interrupt(timestamp_t timestamp) {
elessair 0:f269e3021894 50 // set match value
elessair 0:f269e3021894 51 US_TICKER_TIMER->MR0 = (uint32_t)timestamp;
elessair 0:f269e3021894 52 // enable match interrupt
elessair 0:f269e3021894 53 US_TICKER_TIMER->MCR |= 1;
elessair 0:f269e3021894 54 }
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 void us_ticker_disable_interrupt(void) {
elessair 0:f269e3021894 57 US_TICKER_TIMER->MCR &= ~1;
elessair 0:f269e3021894 58 }
elessair 0:f269e3021894 59
elessair 0:f269e3021894 60 void us_ticker_clear_interrupt(void) {
elessair 0:f269e3021894 61 US_TICKER_TIMER->IR = 1;
elessair 0:f269e3021894 62 }