mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include <math.h>
elessair 0:f269e3021894 18 #include "spi_api.h"
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20 #include "pinmap.h"
elessair 0:f269e3021894 21 #include "mbed_error.h"
elessair 0:f269e3021894 22
elessair 0:f269e3021894 23 static const PinMap PinMap_SPI_SCLK[] = {
elessair 0:f269e3021894 24 {P0_6 , SPI_0, 0x02},
elessair 0:f269e3021894 25 {P0_10, SPI_0, 0x02},
elessair 0:f269e3021894 26 {P1_29, SPI_0, 0x01},
elessair 0:f269e3021894 27 {P1_15, SPI_1, 0x03},
elessair 0:f269e3021894 28 {P1_20, SPI_1, 0x02},
elessair 0:f269e3021894 29 {NC , NC , 0}
elessair 0:f269e3021894 30 };
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 static const PinMap PinMap_SPI_MOSI[] = {
elessair 0:f269e3021894 33 {P0_9 , SPI_0, 0x01},
elessair 0:f269e3021894 34 {P0_21, SPI_1, 0x02},
elessair 0:f269e3021894 35 {P1_22, SPI_1, 0x02},
elessair 0:f269e3021894 36 {NC , NC , 0}
elessair 0:f269e3021894 37 };
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 static const PinMap PinMap_SPI_MISO[] = {
elessair 0:f269e3021894 40 {P0_8 , SPI_0, 0x01},
elessair 0:f269e3021894 41 {P0_22, SPI_1, 0x03},
elessair 0:f269e3021894 42 {P1_21, SPI_1, 0x02},
elessair 0:f269e3021894 43 {NC , NC , 0}
elessair 0:f269e3021894 44 };
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 static const PinMap PinMap_SPI_SSEL[] = {
elessair 0:f269e3021894 47 {P0_2 , SPI_0, 0x01},
elessair 0:f269e3021894 48 {P1_19, SPI_1, 0x02},
elessair 0:f269e3021894 49 {P1_23, SPI_1, 0x02},
elessair 0:f269e3021894 50 {NC , NC , 0}
elessair 0:f269e3021894 51 };
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 static inline int ssp_disable(spi_t *obj);
elessair 0:f269e3021894 54 static inline int ssp_enable(spi_t *obj);
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
elessair 0:f269e3021894 57 // determine the SPI to use
elessair 0:f269e3021894 58 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
elessair 0:f269e3021894 59 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
elessair 0:f269e3021894 60 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
elessair 0:f269e3021894 61 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
elessair 0:f269e3021894 62 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
elessair 0:f269e3021894 63 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
elessair 0:f269e3021894 64
elessair 0:f269e3021894 65 obj->spi = (LPC_SSPx_Type*)pinmap_merge(spi_data, spi_cntl);
elessair 0:f269e3021894 66 MBED_ASSERT((int)obj->spi != NC);
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 // enable power and clocking
elessair 0:f269e3021894 69 switch ((int)obj->spi) {
elessair 0:f269e3021894 70 case SPI_0:
elessair 0:f269e3021894 71 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
elessair 0:f269e3021894 72 LPC_SYSCON->SSP0CLKDIV = 0x01;
elessair 0:f269e3021894 73 LPC_SYSCON->PRESETCTRL |= 1 << 0;
elessair 0:f269e3021894 74 break;
elessair 0:f269e3021894 75 case SPI_1:
elessair 0:f269e3021894 76 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
elessair 0:f269e3021894 77 LPC_SYSCON->SSP1CLKDIV = 0x01;
elessair 0:f269e3021894 78 LPC_SYSCON->PRESETCTRL |= 1 << 2;
elessair 0:f269e3021894 79 break;
elessair 0:f269e3021894 80 }
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 // pin out the spi pins
elessair 0:f269e3021894 83 pinmap_pinout(mosi, PinMap_SPI_MOSI);
elessair 0:f269e3021894 84 pinmap_pinout(miso, PinMap_SPI_MISO);
elessair 0:f269e3021894 85 pinmap_pinout(sclk, PinMap_SPI_SCLK);
elessair 0:f269e3021894 86 if (ssel != NC) {
elessair 0:f269e3021894 87 pinmap_pinout(ssel, PinMap_SPI_SSEL);
elessair 0:f269e3021894 88 }
elessair 0:f269e3021894 89 }
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 void spi_free(spi_t *obj) {}
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 void spi_format(spi_t *obj, int bits, int mode, int slave) {
elessair 0:f269e3021894 94 ssp_disable(obj);
elessair 0:f269e3021894 95 MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3));
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 int polarity = (mode & 0x2) ? 1 : 0;
elessair 0:f269e3021894 98 int phase = (mode & 0x1) ? 1 : 0;
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 // set it up
elessair 0:f269e3021894 101 int DSS = bits - 1; // DSS (data select size)
elessair 0:f269e3021894 102 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
elessair 0:f269e3021894 103 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
elessair 0:f269e3021894 104
elessair 0:f269e3021894 105 int FRF = 0; // FRF (frame format) = SPI
elessair 0:f269e3021894 106 uint32_t tmp = obj->spi->CR0;
elessair 0:f269e3021894 107 tmp &= ~(0xFFFF);
elessair 0:f269e3021894 108 tmp |= DSS << 0
elessair 0:f269e3021894 109 | FRF << 4
elessair 0:f269e3021894 110 | SPO << 6
elessair 0:f269e3021894 111 | SPH << 7;
elessair 0:f269e3021894 112 obj->spi->CR0 = tmp;
elessair 0:f269e3021894 113
elessair 0:f269e3021894 114 tmp = obj->spi->CR1;
elessair 0:f269e3021894 115 tmp &= ~(0xD);
elessair 0:f269e3021894 116 tmp |= 0 << 0 // LBM - loop back mode - off
elessair 0:f269e3021894 117 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
elessair 0:f269e3021894 118 | 0 << 3; // SOD - slave output disable - na
elessair 0:f269e3021894 119 obj->spi->CR1 = tmp;
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 ssp_enable(obj);
elessair 0:f269e3021894 122 }
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 void spi_frequency(spi_t *obj, int hz) {
elessair 0:f269e3021894 125 ssp_disable(obj);
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 128
elessair 0:f269e3021894 129 int prescaler;
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
elessair 0:f269e3021894 132 int prescale_hz = PCLK / prescaler;
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 // calculate the divider
elessair 0:f269e3021894 135 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 // check we can support the divider
elessair 0:f269e3021894 138 if (divider < 256) {
elessair 0:f269e3021894 139 // prescaler
elessair 0:f269e3021894 140 obj->spi->CPSR = prescaler;
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 // divider
elessair 0:f269e3021894 143 obj->spi->CR0 &= ~(0xFFFF << 8);
elessair 0:f269e3021894 144 obj->spi->CR0 |= (divider - 1) << 8;
elessair 0:f269e3021894 145 ssp_enable(obj);
elessair 0:f269e3021894 146 return;
elessair 0:f269e3021894 147 }
elessair 0:f269e3021894 148 }
elessair 0:f269e3021894 149 error("Couldn't setup requested SPI frequency");
elessair 0:f269e3021894 150 }
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 static inline int ssp_disable(spi_t *obj) {
elessair 0:f269e3021894 153 return obj->spi->CR1 &= ~(1 << 1);
elessair 0:f269e3021894 154 }
elessair 0:f269e3021894 155
elessair 0:f269e3021894 156 static inline int ssp_enable(spi_t *obj) {
elessair 0:f269e3021894 157 return obj->spi->CR1 |= (1 << 1);
elessair 0:f269e3021894 158 }
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 static inline int ssp_readable(spi_t *obj) {
elessair 0:f269e3021894 161 return obj->spi->SR & (1 << 2);
elessair 0:f269e3021894 162 }
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 static inline int ssp_writeable(spi_t *obj) {
elessair 0:f269e3021894 165 return obj->spi->SR & (1 << 1);
elessair 0:f269e3021894 166 }
elessair 0:f269e3021894 167
elessair 0:f269e3021894 168 static inline void ssp_write(spi_t *obj, int value) {
elessair 0:f269e3021894 169 while (!ssp_writeable(obj));
elessair 0:f269e3021894 170 obj->spi->DR = value;
elessair 0:f269e3021894 171 }
elessair 0:f269e3021894 172
elessair 0:f269e3021894 173 static inline int ssp_read(spi_t *obj) {
elessair 0:f269e3021894 174 while (!ssp_readable(obj));
elessair 0:f269e3021894 175 return obj->spi->DR;
elessair 0:f269e3021894 176 }
elessair 0:f269e3021894 177
elessair 0:f269e3021894 178 static inline int ssp_busy(spi_t *obj) {
elessair 0:f269e3021894 179 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
elessair 0:f269e3021894 180 }
elessair 0:f269e3021894 181
elessair 0:f269e3021894 182 int spi_master_write(spi_t *obj, int value) {
elessair 0:f269e3021894 183 ssp_write(obj, value);
elessair 0:f269e3021894 184 return ssp_read(obj);
elessair 0:f269e3021894 185 }
elessair 0:f269e3021894 186
elessair 0:f269e3021894 187 int spi_slave_receive(spi_t *obj) {
elessair 0:f269e3021894 188 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
elessair 0:f269e3021894 189 }
elessair 0:f269e3021894 190
elessair 0:f269e3021894 191 int spi_slave_read(spi_t *obj) {
elessair 0:f269e3021894 192 return obj->spi->DR;
elessair 0:f269e3021894 193 }
elessair 0:f269e3021894 194
elessair 0:f269e3021894 195 void spi_slave_write(spi_t *obj, int value) {
elessair 0:f269e3021894 196 while (ssp_writeable(obj) == 0) ;
elessair 0:f269e3021894 197 obj->spi->DR = value;
elessair 0:f269e3021894 198 }
elessair 0:f269e3021894 199
elessair 0:f269e3021894 200 int spi_busy(spi_t *obj) {
elessair 0:f269e3021894 201 return ssp_busy(obj);
elessair 0:f269e3021894 202 }