erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "analogin_api.h"
elessair 0:f269e3021894 18 #include "cmsis.h"
elessair 0:f269e3021894 19 #include "pinmap.h"
elessair 0:f269e3021894 20 #include "mbed_error.h"
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 #if DEVICE_ANALOGIN
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 #define ANALOGIN_MEDIAN_FILTER 1
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 #define ADC_10BIT_RANGE 0x3FF
elessair 0:f269e3021894 27 #define ADC_12BIT_RANGE 0xFFF
elessair 0:f269e3021894 28 #define PDRUN_VALID_BITS 0x000025FFL
elessair 0:f269e3021894 29 #define PDRUN_RESERVED_ONE 0x0000C800L
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 #define ADC_RANGE ADC_12BIT_RANGE
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 static const PinMap PinMap_ADC[] = {
elessair 0:f269e3021894 34 {P1_9 , ADC_0, 3},
elessair 0:f269e3021894 35 {P0_23, ADC_1, 1},
elessair 0:f269e3021894 36 {P0_16, ADC_2, 1},
elessair 0:f269e3021894 37 {P0_15, ADC_3, 3},
elessair 0:f269e3021894 38 {P1_22, ADC_4, 3},
elessair 0:f269e3021894 39 {P1_3 , ADC_5, 4},
elessair 0:f269e3021894 40 {P0_14, ADC_6, 2},
elessair 0:f269e3021894 41 {P0_13, ADC_7, 2},
elessair 0:f269e3021894 42 {P0_12, ADC_8, 2},
elessair 0:f269e3021894 43 {P0_11, ADC_9, 2},
elessair 0:f269e3021894 44 {P1_29, ADC_10,4},
elessair 0:f269e3021894 45 {P0_22, ADC_11,1},
elessair 0:f269e3021894 46 {NC , NC ,0}
elessair 0:f269e3021894 47 };
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49
elessair 0:f269e3021894 50 void analogin_init(analogin_t *obj, PinName pin) {
elessair 0:f269e3021894 51 volatile uint32_t tmp;
elessair 0:f269e3021894 52 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
elessair 0:f269e3021894 53 MBED_ASSERT(obj->adc != (ADCName)NC);
elessair 0:f269e3021894 54
elessair 0:f269e3021894 55 pinmap_pinout(pin, PinMap_ADC);
elessair 0:f269e3021894 56
elessair 0:f269e3021894 57 __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + (pin & 0x1FF));
elessair 0:f269e3021894 58 // set pin to ADC mode
elessair 0:f269e3021894 59 *reg &= ~(1 << 7); // set ADMODE = 0 (analog mode)
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 // ADC Powered
elessair 0:f269e3021894 62 tmp = (LPC_SYSCON->PDRUNCFG & PDRUN_VALID_BITS);
elessair 0:f269e3021894 63 tmp &= ~((1 << 4) & PDRUN_VALID_BITS);
elessair 0:f269e3021894 64 LPC_SYSCON->PDRUNCFG = (tmp | PDRUN_RESERVED_ONE);
elessair 0:f269e3021894 65
elessair 0:f269e3021894 66 // Enable clock for ADC
elessair 0:f269e3021894 67 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 13);
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 // Determine the clock divider for a 500kHz ADC clock during calibration
elessair 0:f269e3021894 70 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 // Perform a self-calibration
elessair 0:f269e3021894 73 LPC_ADC->CTRL = (1UL << 30) | (clkdiv & 0xFF);
elessair 0:f269e3021894 74 while ((LPC_ADC->CTRL & (1UL << 30)) != 0);
elessair 0:f269e3021894 75
elessair 0:f269e3021894 76 // Sampling clock: SystemClock divided by 1
elessair 0:f269e3021894 77 LPC_ADC->CTRL = 0;
elessair 0:f269e3021894 78 }
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 static inline uint32_t adc_read(analogin_t *obj) {
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 // select channel
elessair 0:f269e3021894 83 LPC_ADC->SEQA_CTRL &= ~(0xFFF);
elessair 0:f269e3021894 84 LPC_ADC->SEQA_CTRL |= (1UL << obj->adc);
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 // start conversion, sequence enable with async mode
elessair 0:f269e3021894 87 LPC_ADC->SEQA_CTRL |= ((1UL << 26) | (1UL << 31) | (1UL << 19));
elessair 0:f269e3021894 88
elessair 0:f269e3021894 89 // Repeatedly get the sample data until DONE bit
elessair 0:f269e3021894 90 volatile uint32_t data;
elessair 0:f269e3021894 91 do {
elessair 0:f269e3021894 92 data = LPC_ADC->SEQA_GDAT;
elessair 0:f269e3021894 93 } while ((data & (1UL << 31)) == 0);
elessair 0:f269e3021894 94 data = LPC_ADC->DAT[obj->adc];
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 // Stop conversion
elessair 0:f269e3021894 97 LPC_ADC->SEQA_CTRL &= ~(1UL << 31);
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 return ((data >> 4) & ADC_RANGE);
elessair 0:f269e3021894 100 }
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 static inline void order(uint32_t *a, uint32_t *b) {
elessair 0:f269e3021894 103 if (*a > *b) {
elessair 0:f269e3021894 104 uint32_t t = *a;
elessair 0:f269e3021894 105 *a = *b;
elessair 0:f269e3021894 106 *b = t;
elessair 0:f269e3021894 107 }
elessair 0:f269e3021894 108 }
elessair 0:f269e3021894 109
elessair 0:f269e3021894 110 static inline uint32_t adc_read_u32(analogin_t *obj) {
elessair 0:f269e3021894 111 uint32_t value;
elessair 0:f269e3021894 112 #if ANALOGIN_MEDIAN_FILTER
elessair 0:f269e3021894 113 uint32_t v1 = adc_read(obj);
elessair 0:f269e3021894 114 uint32_t v2 = adc_read(obj);
elessair 0:f269e3021894 115 uint32_t v3 = adc_read(obj);
elessair 0:f269e3021894 116 order(&v1, &v2);
elessair 0:f269e3021894 117 order(&v2, &v3);
elessair 0:f269e3021894 118 order(&v1, &v2);
elessair 0:f269e3021894 119 value = v2;
elessair 0:f269e3021894 120 #else
elessair 0:f269e3021894 121 value = adc_read(obj);
elessair 0:f269e3021894 122 #endif
elessair 0:f269e3021894 123 return value;
elessair 0:f269e3021894 124 }
elessair 0:f269e3021894 125
elessair 0:f269e3021894 126 uint16_t analogin_read_u16(analogin_t *obj) {
elessair 0:f269e3021894 127 uint32_t value = adc_read_u32(obj);
elessair 0:f269e3021894 128 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
elessair 0:f269e3021894 129 }
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 float analogin_read(analogin_t *obj) {
elessair 0:f269e3021894 132 uint32_t value = adc_read_u32(obj);
elessair 0:f269e3021894 133 return (float)value * (1.0f / (float)ADC_RANGE);
elessair 0:f269e3021894 134 }
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 #endif