erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_Freescale/TARGET_KLXX/i2c_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "i2c_api.h"
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20 #include "pinmap.h"
elessair 0:f269e3021894 21 #include "clk_freqs.h"
elessair 0:f269e3021894 22 #include "PeripheralPins.h"
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 static const uint16_t ICR[0x40] = {
elessair 0:f269e3021894 25 20, 22, 24, 26, 28,
elessair 0:f269e3021894 26 30, 34, 40, 28, 32,
elessair 0:f269e3021894 27 36, 40, 44, 48, 56,
elessair 0:f269e3021894 28 68, 48, 56, 64, 72,
elessair 0:f269e3021894 29 80, 88, 104, 128, 80,
elessair 0:f269e3021894 30 96, 112, 128, 144, 160,
elessair 0:f269e3021894 31 192, 240, 160, 192, 224,
elessair 0:f269e3021894 32 256, 288, 320, 384, 480,
elessair 0:f269e3021894 33 320, 384, 448, 512, 576,
elessair 0:f269e3021894 34 640, 768, 960, 640, 768,
elessair 0:f269e3021894 35 896, 1024, 1152, 1280, 1536,
elessair 0:f269e3021894 36 1920, 1280, 1536, 1792, 2048,
elessair 0:f269e3021894 37 2304, 2560, 3072, 3840
elessair 0:f269e3021894 38 };
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
elessair 0:f269e3021894 42 // determine the I2C to use
elessair 0:f269e3021894 43 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
elessair 0:f269e3021894 44 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
elessair 0:f269e3021894 45 obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
elessair 0:f269e3021894 46 MBED_ASSERT((int)obj->i2c != NC);
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 // enable power
elessair 0:f269e3021894 49 switch ((int)obj->i2c) {
elessair 0:f269e3021894 50 case I2C_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 6; break;
elessair 0:f269e3021894 51 case I2C_1: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 7; break;
elessair 0:f269e3021894 52 }
elessair 0:f269e3021894 53
elessair 0:f269e3021894 54 // set default frequency at 100k
elessair 0:f269e3021894 55 i2c_frequency(obj, 100000);
elessair 0:f269e3021894 56
elessair 0:f269e3021894 57 // enable I2C interface
elessair 0:f269e3021894 58 obj->i2c->C1 |= 0x80;
elessair 0:f269e3021894 59
elessair 0:f269e3021894 60 pinmap_pinout(sda, PinMap_I2C_SDA);
elessair 0:f269e3021894 61 pinmap_pinout(scl, PinMap_I2C_SCL);
elessair 0:f269e3021894 62 }
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 int i2c_start(i2c_t *obj) {
elessair 0:f269e3021894 65 uint8_t temp;
elessair 0:f269e3021894 66 volatile int i;
elessair 0:f269e3021894 67 // if we are in the middle of a transaction
elessair 0:f269e3021894 68 // activate the repeat_start flag
elessair 0:f269e3021894 69 if (obj->i2c->S & I2C_S_BUSY_MASK) {
elessair 0:f269e3021894 70 // KL25Z errata sheet: repeat start cannot be generated if the
elessair 0:f269e3021894 71 // I2Cx_F[MULT] field is set to a non-zero value
elessair 0:f269e3021894 72 temp = obj->i2c->F >> 6;
elessair 0:f269e3021894 73 obj->i2c->F &= 0x3F;
elessair 0:f269e3021894 74 obj->i2c->C1 |= 0x04;
elessair 0:f269e3021894 75 for (i = 0; i < 100; i ++) __NOP();
elessair 0:f269e3021894 76 obj->i2c->F |= temp << 6;
elessair 0:f269e3021894 77 } else {
elessair 0:f269e3021894 78 obj->i2c->C1 |= I2C_C1_MST_MASK;
elessair 0:f269e3021894 79 obj->i2c->C1 |= I2C_C1_TX_MASK;
elessair 0:f269e3021894 80 }
elessair 0:f269e3021894 81 return 0;
elessair 0:f269e3021894 82 }
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 int i2c_stop(i2c_t *obj) {
elessair 0:f269e3021894 85 volatile uint32_t n = 0;
elessair 0:f269e3021894 86 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
elessair 0:f269e3021894 87 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
elessair 0:f269e3021894 88
elessair 0:f269e3021894 89 // It seems that there are timing problems
elessair 0:f269e3021894 90 // when there is no waiting time after a STOP.
elessair 0:f269e3021894 91 // This wait is also included on the samples
elessair 0:f269e3021894 92 // code provided with the freedom board
elessair 0:f269e3021894 93 for (n = 0; n < 100; n++) __NOP();
elessair 0:f269e3021894 94 return 0;
elessair 0:f269e3021894 95 }
elessair 0:f269e3021894 96
elessair 0:f269e3021894 97 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
elessair 0:f269e3021894 98 uint32_t i, timeout = 100000;
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 for (i = 0; i < timeout; i++) {
elessair 0:f269e3021894 101 if (obj->i2c->S & mask)
elessair 0:f269e3021894 102 return 0;
elessair 0:f269e3021894 103 }
elessair 0:f269e3021894 104
elessair 0:f269e3021894 105 return 1;
elessair 0:f269e3021894 106 }
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 // this function waits the end of a tx transfer and return the status of the transaction:
elessair 0:f269e3021894 109 // 0: OK ack received
elessair 0:f269e3021894 110 // 1: OK ack not received
elessair 0:f269e3021894 111 // 2: failure
elessair 0:f269e3021894 112 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
elessair 0:f269e3021894 113
elessair 0:f269e3021894 114 // wait for the interrupt flag
elessair 0:f269e3021894 115 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
elessair 0:f269e3021894 116 return 2;
elessair 0:f269e3021894 117 }
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 obj->i2c->S |= I2C_S_IICIF_MASK;
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 // wait transfer complete
elessair 0:f269e3021894 122 if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
elessair 0:f269e3021894 123 return 2;
elessair 0:f269e3021894 124 }
elessair 0:f269e3021894 125
elessair 0:f269e3021894 126 // check if we received the ACK or not
elessair 0:f269e3021894 127 return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
elessair 0:f269e3021894 128 }
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 // this function waits the end of a rx transfer and return the status of the transaction:
elessair 0:f269e3021894 131 // 0: OK
elessair 0:f269e3021894 132 // 1: failure
elessair 0:f269e3021894 133 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
elessair 0:f269e3021894 134 // wait for the end of the rx transfer
elessair 0:f269e3021894 135 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
elessair 0:f269e3021894 136 return 1;
elessair 0:f269e3021894 137 }
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 obj->i2c->S |= I2C_S_IICIF_MASK;
elessair 0:f269e3021894 140
elessair 0:f269e3021894 141 return 0;
elessair 0:f269e3021894 142 }
elessair 0:f269e3021894 143
elessair 0:f269e3021894 144 static void i2c_send_nack(i2c_t *obj) {
elessair 0:f269e3021894 145 obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
elessair 0:f269e3021894 146 }
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 static void i2c_send_ack(i2c_t *obj) {
elessair 0:f269e3021894 149 obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
elessair 0:f269e3021894 150 }
elessair 0:f269e3021894 151
elessair 0:f269e3021894 152 static int i2c_do_write(i2c_t *obj, int value) {
elessair 0:f269e3021894 153 // write the data
elessair 0:f269e3021894 154 obj->i2c->D = value;
elessair 0:f269e3021894 155
elessair 0:f269e3021894 156 // init and wait the end of the transfer
elessair 0:f269e3021894 157 return i2c_wait_end_tx_transfer(obj);
elessair 0:f269e3021894 158 }
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 static int i2c_do_read(i2c_t *obj, char * data, int last) {
elessair 0:f269e3021894 161 if (last)
elessair 0:f269e3021894 162 i2c_send_nack(obj);
elessair 0:f269e3021894 163 else
elessair 0:f269e3021894 164 i2c_send_ack(obj);
elessair 0:f269e3021894 165
elessair 0:f269e3021894 166 *data = (obj->i2c->D & 0xFF);
elessair 0:f269e3021894 167
elessair 0:f269e3021894 168 // start rx transfer and wait the end of the transfer
elessair 0:f269e3021894 169 return i2c_wait_end_rx_transfer(obj);
elessair 0:f269e3021894 170 }
elessair 0:f269e3021894 171
elessair 0:f269e3021894 172 void i2c_frequency(i2c_t *obj, int hz) {
elessair 0:f269e3021894 173 uint8_t icr = 0;
elessair 0:f269e3021894 174 uint8_t mult = 0;
elessair 0:f269e3021894 175 uint32_t error = 0;
elessair 0:f269e3021894 176 uint32_t p_error = 0xffffffff;
elessair 0:f269e3021894 177 uint32_t ref = 0;
elessair 0:f269e3021894 178 uint8_t i, j;
elessair 0:f269e3021894 179 // bus clk
elessair 0:f269e3021894 180 uint32_t PCLK = bus_frequency();
elessair 0:f269e3021894 181 uint32_t pulse = PCLK / (hz * 2);
elessair 0:f269e3021894 182
elessair 0:f269e3021894 183 // we look for the values that minimize the error
elessair 0:f269e3021894 184
elessair 0:f269e3021894 185 // test all the MULT values
elessair 0:f269e3021894 186 for (i = 1; i < 5; i*=2) {
elessair 0:f269e3021894 187 for (j = 0; j < 0x40; j++) {
elessair 0:f269e3021894 188 ref = PCLK / (i*ICR[j]);
elessair 0:f269e3021894 189 if (ref > (uint32_t)hz)
elessair 0:f269e3021894 190 continue;
elessair 0:f269e3021894 191 error = hz - ref;
elessair 0:f269e3021894 192 if (error < p_error) {
elessair 0:f269e3021894 193 icr = j;
elessair 0:f269e3021894 194 mult = i/2;
elessair 0:f269e3021894 195 p_error = error;
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197 }
elessair 0:f269e3021894 198 }
elessair 0:f269e3021894 199 pulse = icr | (mult << 6);
elessair 0:f269e3021894 200
elessair 0:f269e3021894 201 // I2C Rate
elessair 0:f269e3021894 202 obj->i2c->F = pulse;
elessair 0:f269e3021894 203 }
elessair 0:f269e3021894 204
elessair 0:f269e3021894 205 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
elessair 0:f269e3021894 206 int count;
elessair 0:f269e3021894 207 char dummy_read, *ptr;
elessair 0:f269e3021894 208
elessair 0:f269e3021894 209 if (i2c_start(obj)) {
elessair 0:f269e3021894 210 i2c_stop(obj);
elessair 0:f269e3021894 211 return I2C_ERROR_BUS_BUSY;
elessair 0:f269e3021894 212 }
elessair 0:f269e3021894 213
elessair 0:f269e3021894 214 if (i2c_do_write(obj, (address | 0x01))) {
elessair 0:f269e3021894 215 i2c_stop(obj);
elessair 0:f269e3021894 216 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 217 }
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 // set rx mode
elessair 0:f269e3021894 220 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
elessair 0:f269e3021894 221
elessair 0:f269e3021894 222 // Read in bytes
elessair 0:f269e3021894 223 for (count = 0; count < (length); count++) {
elessair 0:f269e3021894 224 ptr = (count == 0) ? &dummy_read : &data[count - 1];
elessair 0:f269e3021894 225 uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
elessair 0:f269e3021894 226 if (i2c_do_read(obj, ptr, stop_)) {
elessair 0:f269e3021894 227 i2c_stop(obj);
elessair 0:f269e3021894 228 return count;
elessair 0:f269e3021894 229 }
elessair 0:f269e3021894 230 }
elessair 0:f269e3021894 231
elessair 0:f269e3021894 232 // If not repeated start, send stop.
elessair 0:f269e3021894 233 if (stop) {
elessair 0:f269e3021894 234 i2c_stop(obj);
elessair 0:f269e3021894 235 }
elessair 0:f269e3021894 236
elessair 0:f269e3021894 237 // last read
elessair 0:f269e3021894 238 data[count-1] = obj->i2c->D;
elessair 0:f269e3021894 239
elessair 0:f269e3021894 240 return length;
elessair 0:f269e3021894 241 }
elessair 0:f269e3021894 242 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
elessair 0:f269e3021894 243 int i;
elessair 0:f269e3021894 244
elessair 0:f269e3021894 245 if (i2c_start(obj)) {
elessair 0:f269e3021894 246 i2c_stop(obj);
elessair 0:f269e3021894 247 return I2C_ERROR_BUS_BUSY;
elessair 0:f269e3021894 248 }
elessair 0:f269e3021894 249
elessair 0:f269e3021894 250 if (i2c_do_write(obj, (address & 0xFE))) {
elessair 0:f269e3021894 251 i2c_stop(obj);
elessair 0:f269e3021894 252 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 253 }
elessair 0:f269e3021894 254
elessair 0:f269e3021894 255 for (i = 0; i < length; i++) {
elessair 0:f269e3021894 256 if(i2c_do_write(obj, data[i])) {
elessair 0:f269e3021894 257 i2c_stop(obj);
elessair 0:f269e3021894 258 return i;
elessair 0:f269e3021894 259 }
elessair 0:f269e3021894 260 }
elessair 0:f269e3021894 261
elessair 0:f269e3021894 262 if (stop) {
elessair 0:f269e3021894 263 i2c_stop(obj);
elessair 0:f269e3021894 264 }
elessair 0:f269e3021894 265
elessair 0:f269e3021894 266 return length;
elessair 0:f269e3021894 267 }
elessair 0:f269e3021894 268
elessair 0:f269e3021894 269 void i2c_reset(i2c_t *obj) {
elessair 0:f269e3021894 270 i2c_stop(obj);
elessair 0:f269e3021894 271 }
elessair 0:f269e3021894 272
elessair 0:f269e3021894 273 int i2c_byte_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 274 char data;
elessair 0:f269e3021894 275
elessair 0:f269e3021894 276 // set rx mode
elessair 0:f269e3021894 277 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
elessair 0:f269e3021894 278
elessair 0:f269e3021894 279 // Setup read
elessair 0:f269e3021894 280 i2c_do_read(obj, &data, last);
elessair 0:f269e3021894 281
elessair 0:f269e3021894 282 // set tx mode
elessair 0:f269e3021894 283 obj->i2c->C1 |= I2C_C1_TX_MASK;
elessair 0:f269e3021894 284 return obj->i2c->D;
elessair 0:f269e3021894 285 }
elessair 0:f269e3021894 286
elessair 0:f269e3021894 287 int i2c_byte_write(i2c_t *obj, int data) {
elessair 0:f269e3021894 288 // set tx mode
elessair 0:f269e3021894 289 obj->i2c->C1 |= I2C_C1_TX_MASK;
elessair 0:f269e3021894 290
elessair 0:f269e3021894 291 return !i2c_do_write(obj, (data & 0xFF));
elessair 0:f269e3021894 292 }
elessair 0:f269e3021894 293
elessair 0:f269e3021894 294
elessair 0:f269e3021894 295 #if DEVICE_I2CSLAVE
elessair 0:f269e3021894 296 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
elessair 0:f269e3021894 297 if (enable_slave) {
elessair 0:f269e3021894 298 // set slave mode
elessair 0:f269e3021894 299 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
elessair 0:f269e3021894 300 obj->i2c->C1 |= I2C_C1_IICIE_MASK;
elessair 0:f269e3021894 301 } else {
elessair 0:f269e3021894 302 // set master mode
elessair 0:f269e3021894 303 obj->i2c->C1 |= I2C_C1_MST_MASK;
elessair 0:f269e3021894 304 }
elessair 0:f269e3021894 305 }
elessair 0:f269e3021894 306
elessair 0:f269e3021894 307 int i2c_slave_receive(i2c_t *obj) {
elessair 0:f269e3021894 308 switch(obj->i2c->S) {
elessair 0:f269e3021894 309 // read addressed
elessair 0:f269e3021894 310 case 0xE6: return 1;
elessair 0:f269e3021894 311
elessair 0:f269e3021894 312 // write addressed
elessair 0:f269e3021894 313 case 0xE2: return 3;
elessair 0:f269e3021894 314
elessair 0:f269e3021894 315 default: return 0;
elessair 0:f269e3021894 316 }
elessair 0:f269e3021894 317 }
elessair 0:f269e3021894 318
elessair 0:f269e3021894 319 int i2c_slave_read(i2c_t *obj, char *data, int length) {
elessair 0:f269e3021894 320 uint8_t dummy_read;
elessair 0:f269e3021894 321 uint8_t * ptr;
elessair 0:f269e3021894 322 int count;
elessair 0:f269e3021894 323
elessair 0:f269e3021894 324 // set rx mode
elessair 0:f269e3021894 325 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
elessair 0:f269e3021894 326
elessair 0:f269e3021894 327 // first dummy read
elessair 0:f269e3021894 328 dummy_read = obj->i2c->D;
elessair 0:f269e3021894 329 if(i2c_wait_end_rx_transfer(obj)) {
elessair 0:f269e3021894 330 return 0;
elessair 0:f269e3021894 331 }
elessair 0:f269e3021894 332
elessair 0:f269e3021894 333 // read address
elessair 0:f269e3021894 334 dummy_read = obj->i2c->D;
elessair 0:f269e3021894 335 if(i2c_wait_end_rx_transfer(obj)) {
elessair 0:f269e3021894 336 return 0;
elessair 0:f269e3021894 337 }
elessair 0:f269e3021894 338
elessair 0:f269e3021894 339 // read (length - 1) bytes
elessair 0:f269e3021894 340 for (count = 0; count < (length - 1); count++) {
elessair 0:f269e3021894 341 data[count] = obj->i2c->D;
elessair 0:f269e3021894 342 if(i2c_wait_end_rx_transfer(obj)) {
elessair 0:f269e3021894 343 return count;
elessair 0:f269e3021894 344 }
elessair 0:f269e3021894 345 }
elessair 0:f269e3021894 346
elessair 0:f269e3021894 347 // read last byte
elessair 0:f269e3021894 348 ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
elessair 0:f269e3021894 349 *ptr = obj->i2c->D;
elessair 0:f269e3021894 350
elessair 0:f269e3021894 351 return (length) ? (count + 1) : 0;
elessair 0:f269e3021894 352 }
elessair 0:f269e3021894 353
elessair 0:f269e3021894 354 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
elessair 0:f269e3021894 355 int i, count = 0;
elessair 0:f269e3021894 356
elessair 0:f269e3021894 357 // set tx mode
elessair 0:f269e3021894 358 obj->i2c->C1 |= I2C_C1_TX_MASK;
elessair 0:f269e3021894 359
elessair 0:f269e3021894 360 for (i = 0; i < length; i++) {
elessair 0:f269e3021894 361 if(i2c_do_write(obj, data[count++]) == 2) {
elessair 0:f269e3021894 362 return i;
elessair 0:f269e3021894 363 }
elessair 0:f269e3021894 364 }
elessair 0:f269e3021894 365
elessair 0:f269e3021894 366 // set rx mode
elessair 0:f269e3021894 367 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
elessair 0:f269e3021894 368
elessair 0:f269e3021894 369 // dummy rx transfer needed
elessair 0:f269e3021894 370 // otherwise the master cannot generate a stop bit
elessair 0:f269e3021894 371 obj->i2c->D;
elessair 0:f269e3021894 372 if(i2c_wait_end_rx_transfer(obj) == 2) {
elessair 0:f269e3021894 373 return count;
elessair 0:f269e3021894 374 }
elessair 0:f269e3021894 375
elessair 0:f269e3021894 376 return count;
elessair 0:f269e3021894 377 }
elessair 0:f269e3021894 378
elessair 0:f269e3021894 379 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
elessair 0:f269e3021894 380 obj->i2c->A1 = address & 0xfe;
elessair 0:f269e3021894 381 }
elessair 0:f269e3021894 382 #endif
elessair 0:f269e3021894 383