erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

targets/TARGET_ARM_SSG/TARGET_IOTSS/PeripheralNames.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2015 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #ifndef MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 17 #define MBED_PERIPHERALNAMES_H
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "cmsis.h"
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #ifdef __cplusplus
elessair 0:f269e3021894 22 extern "C" {
elessair 0:f269e3021894 23 #endif
elessair 0:f269e3021894 24
elessair 0:f269e3021894 25 typedef enum {
elessair 0:f269e3021894 26 UART_0 = (int)CMSDK_UART1_BASE,
elessair 0:f269e3021894 27 UART_1 = (int)CMSDK_UART3_BASE,
elessair 0:f269e3021894 28 UART_2 = (int)CMSDK_UART0_BASE,
elessair 0:f269e3021894 29 UART_3 = (int)CMSDK_UART2_BASE
elessair 0:f269e3021894 30 } UARTName;
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 typedef enum {
elessair 0:f269e3021894 33 I2C_0 = (int)MPS2_TSC_I2C_BASE,
elessair 0:f269e3021894 34 I2C_1 = (int)MPS2_AAIC_I2C_BASE,
elessair 0:f269e3021894 35 I2C_2 = (int)MPS2_SHIELD0_I2C_BASE,
elessair 0:f269e3021894 36 I2C_3 = (int)MPS2_SHIELD1_I2C_BASE
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 } I2CName;
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40 typedef enum {
elessair 0:f269e3021894 41 ADC0_0 = 0,
elessair 0:f269e3021894 42 ADC0_1,
elessair 0:f269e3021894 43 ADC0_2,
elessair 0:f269e3021894 44 ADC0_3,
elessair 0:f269e3021894 45 ADC0_4,
elessair 0:f269e3021894 46 ADC0_5,
elessair 0:f269e3021894 47 ADC0_6,
elessair 0:f269e3021894 48 ADC0_7,
elessair 0:f269e3021894 49 ADC0_8,
elessair 0:f269e3021894 50 ADC0_9,
elessair 0:f269e3021894 51 ADC0_10,
elessair 0:f269e3021894 52 ADC0_11
elessair 0:f269e3021894 53 } ADCName;
elessair 0:f269e3021894 54
elessair 0:f269e3021894 55 typedef enum {
elessair 0:f269e3021894 56 SPI_0 = (int)MPS2_SSP0_BASE,
elessair 0:f269e3021894 57 SPI_1 = (int)MPS2_SSP1_BASE,
elessair 0:f269e3021894 58 SPI_2 = (int)MPS2_SSP2_BASE,
elessair 0:f269e3021894 59 SPI_3 = (int)MPS2_SSP3_BASE,
elessair 0:f269e3021894 60 SPI_4 = (int)MPS2_SSP4_BASE
elessair 0:f269e3021894 61 } SPIName;
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 typedef enum {
elessair 0:f269e3021894 64 PWM_1 = 0,
elessair 0:f269e3021894 65 PWM_2,
elessair 0:f269e3021894 66 PWM_3,
elessair 0:f269e3021894 67 PWM_4,
elessair 0:f269e3021894 68 PWM_5,
elessair 0:f269e3021894 69 PWM_6,
elessair 0:f269e3021894 70 PWM_7,
elessair 0:f269e3021894 71 PWM_8,
elessair 0:f269e3021894 72 PWM_9,
elessair 0:f269e3021894 73 PWM_10,
elessair 0:f269e3021894 74 PWM_11
elessair 0:f269e3021894 75 } PWMName;
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 #define STDIO_UART_TX USBTX
elessair 0:f269e3021894 78 #define STDIO_UART_RX USBRX
elessair 0:f269e3021894 79 #define STDIO_UART UART_0
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 #define MBED_UART0 USBTX, USBRX
elessair 0:f269e3021894 82 #define MBED_UART1 XB_TX, XB_RX
elessair 0:f269e3021894 83 #define MBED_UART2 SH0_TX, SH0_RX
elessair 0:f269e3021894 84 #define MBED_UART3 SH1_TX, SH1_RX
elessair 0:f269e3021894 85 #define MBED_UARTUSB USBTX, USBRX
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 #ifdef __cplusplus
elessair 0:f269e3021894 88 }
elessair 0:f269e3021894 89 #endif
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 #endif