erkin yucel / mbed-os

mbed os with nrf51 internal bandgap enabled to read battery level

Dependents:   BLE_file_test BLE_Blink ExternalEncoder

features/mbedtls/src/aesni.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /*
elessair 0:f269e3021894 2 * AES-NI support functions
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
elessair 0:f269e3021894 5 * SPDX-License-Identifier: Apache-2.0
elessair 0:f269e3021894 6 *
elessair 0:f269e3021894 7 * Licensed under the Apache License, Version 2.0 (the "License"); you may
elessair 0:f269e3021894 8 * not use this file except in compliance with the License.
elessair 0:f269e3021894 9 * You may obtain a copy of the License at
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 12 *
elessair 0:f269e3021894 13 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
elessair 0:f269e3021894 15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 16 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 17 * limitations under the License.
elessair 0:f269e3021894 18 *
elessair 0:f269e3021894 19 * This file is part of mbed TLS (https://tls.mbed.org)
elessair 0:f269e3021894 20 */
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 /*
elessair 0:f269e3021894 23 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
elessair 0:f269e3021894 24 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
elessair 0:f269e3021894 25 */
elessair 0:f269e3021894 26
elessair 0:f269e3021894 27 #if !defined(MBEDTLS_CONFIG_FILE)
elessair 0:f269e3021894 28 #include "mbedtls/config.h"
elessair 0:f269e3021894 29 #else
elessair 0:f269e3021894 30 #include MBEDTLS_CONFIG_FILE
elessair 0:f269e3021894 31 #endif
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 #if defined(MBEDTLS_AESNI_C)
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 #include "mbedtls/aesni.h"
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37 #include <string.h>
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 #ifndef asm
elessair 0:f269e3021894 40 #define asm __asm
elessair 0:f269e3021894 41 #endif
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 #if defined(MBEDTLS_HAVE_X86_64)
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 /*
elessair 0:f269e3021894 46 * AES-NI support detection routine
elessair 0:f269e3021894 47 */
elessair 0:f269e3021894 48 int mbedtls_aesni_has_support( unsigned int what )
elessair 0:f269e3021894 49 {
elessair 0:f269e3021894 50 static int done = 0;
elessair 0:f269e3021894 51 static unsigned int c = 0;
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 if( ! done )
elessair 0:f269e3021894 54 {
elessair 0:f269e3021894 55 asm( "movl $1, %%eax \n\t"
elessair 0:f269e3021894 56 "cpuid \n\t"
elessair 0:f269e3021894 57 : "=c" (c)
elessair 0:f269e3021894 58 :
elessair 0:f269e3021894 59 : "eax", "ebx", "edx" );
elessair 0:f269e3021894 60 done = 1;
elessair 0:f269e3021894 61 }
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 return( ( c & what ) != 0 );
elessair 0:f269e3021894 64 }
elessair 0:f269e3021894 65
elessair 0:f269e3021894 66 /*
elessair 0:f269e3021894 67 * Binutils needs to be at least 2.19 to support AES-NI instructions.
elessair 0:f269e3021894 68 * Unfortunately, a lot of users have a lower version now (2014-04).
elessair 0:f269e3021894 69 * Emit bytecode directly in order to support "old" version of gas.
elessair 0:f269e3021894 70 *
elessair 0:f269e3021894 71 * Opcodes from the Intel architecture reference manual, vol. 3.
elessair 0:f269e3021894 72 * We always use registers, so we don't need prefixes for memory operands.
elessair 0:f269e3021894 73 * Operand macros are in gas order (src, dst) as opposed to Intel order
elessair 0:f269e3021894 74 * (dst, src) in order to blend better into the surrounding assembly code.
elessair 0:f269e3021894 75 */
elessair 0:f269e3021894 76 #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
elessair 0:f269e3021894 77 #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
elessair 0:f269e3021894 78 #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
elessair 0:f269e3021894 79 #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
elessair 0:f269e3021894 80 #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
elessair 0:f269e3021894 81 #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
elessair 0:f269e3021894 82 #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 #define xmm0_xmm0 "0xC0"
elessair 0:f269e3021894 85 #define xmm0_xmm1 "0xC8"
elessair 0:f269e3021894 86 #define xmm0_xmm2 "0xD0"
elessair 0:f269e3021894 87 #define xmm0_xmm3 "0xD8"
elessair 0:f269e3021894 88 #define xmm0_xmm4 "0xE0"
elessair 0:f269e3021894 89 #define xmm1_xmm0 "0xC1"
elessair 0:f269e3021894 90 #define xmm1_xmm2 "0xD1"
elessair 0:f269e3021894 91
elessair 0:f269e3021894 92 /*
elessair 0:f269e3021894 93 * AES-NI AES-ECB block en(de)cryption
elessair 0:f269e3021894 94 */
elessair 0:f269e3021894 95 int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
elessair 0:f269e3021894 96 int mode,
elessair 0:f269e3021894 97 const unsigned char input[16],
elessair 0:f269e3021894 98 unsigned char output[16] )
elessair 0:f269e3021894 99 {
elessair 0:f269e3021894 100 asm( "movdqu (%3), %%xmm0 \n\t" // load input
elessair 0:f269e3021894 101 "movdqu (%1), %%xmm1 \n\t" // load round key 0
elessair 0:f269e3021894 102 "pxor %%xmm1, %%xmm0 \n\t" // round 0
elessair 0:f269e3021894 103 "add $16, %1 \n\t" // point to next round key
elessair 0:f269e3021894 104 "subl $1, %0 \n\t" // normal rounds = nr - 1
elessair 0:f269e3021894 105 "test %2, %2 \n\t" // mode?
elessair 0:f269e3021894 106 "jz 2f \n\t" // 0 = decrypt
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 "1: \n\t" // encryption loop
elessair 0:f269e3021894 109 "movdqu (%1), %%xmm1 \n\t" // load round key
elessair 0:f269e3021894 110 AESENC xmm1_xmm0 "\n\t" // do round
elessair 0:f269e3021894 111 "add $16, %1 \n\t" // point to next round key
elessair 0:f269e3021894 112 "subl $1, %0 \n\t" // loop
elessair 0:f269e3021894 113 "jnz 1b \n\t"
elessair 0:f269e3021894 114 "movdqu (%1), %%xmm1 \n\t" // load round key
elessair 0:f269e3021894 115 AESENCLAST xmm1_xmm0 "\n\t" // last round
elessair 0:f269e3021894 116 "jmp 3f \n\t"
elessair 0:f269e3021894 117
elessair 0:f269e3021894 118 "2: \n\t" // decryption loop
elessair 0:f269e3021894 119 "movdqu (%1), %%xmm1 \n\t"
elessair 0:f269e3021894 120 AESDEC xmm1_xmm0 "\n\t" // do round
elessair 0:f269e3021894 121 "add $16, %1 \n\t"
elessair 0:f269e3021894 122 "subl $1, %0 \n\t"
elessair 0:f269e3021894 123 "jnz 2b \n\t"
elessair 0:f269e3021894 124 "movdqu (%1), %%xmm1 \n\t" // load round key
elessair 0:f269e3021894 125 AESDECLAST xmm1_xmm0 "\n\t" // last round
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 "3: \n\t"
elessair 0:f269e3021894 128 "movdqu %%xmm0, (%4) \n\t" // export output
elessair 0:f269e3021894 129 :
elessair 0:f269e3021894 130 : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
elessair 0:f269e3021894 131 : "memory", "cc", "xmm0", "xmm1" );
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 return( 0 );
elessair 0:f269e3021894 135 }
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 /*
elessair 0:f269e3021894 138 * GCM multiplication: c = a times b in GF(2^128)
elessair 0:f269e3021894 139 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
elessair 0:f269e3021894 140 */
elessair 0:f269e3021894 141 void mbedtls_aesni_gcm_mult( unsigned char c[16],
elessair 0:f269e3021894 142 const unsigned char a[16],
elessair 0:f269e3021894 143 const unsigned char b[16] )
elessair 0:f269e3021894 144 {
elessair 0:f269e3021894 145 unsigned char aa[16], bb[16], cc[16];
elessair 0:f269e3021894 146 size_t i;
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 /* The inputs are in big-endian order, so byte-reverse them */
elessair 0:f269e3021894 149 for( i = 0; i < 16; i++ )
elessair 0:f269e3021894 150 {
elessair 0:f269e3021894 151 aa[i] = a[15 - i];
elessair 0:f269e3021894 152 bb[i] = b[15 - i];
elessair 0:f269e3021894 153 }
elessair 0:f269e3021894 154
elessair 0:f269e3021894 155 asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
elessair 0:f269e3021894 156 "movdqu (%1), %%xmm1 \n\t" // b1:b0
elessair 0:f269e3021894 157
elessair 0:f269e3021894 158 /*
elessair 0:f269e3021894 159 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
elessair 0:f269e3021894 160 * using [CLMUL-WP] algorithm 1 (p. 13).
elessair 0:f269e3021894 161 */
elessair 0:f269e3021894 162 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
elessair 0:f269e3021894 163 "movdqa %%xmm1, %%xmm3 \n\t" // same
elessair 0:f269e3021894 164 "movdqa %%xmm1, %%xmm4 \n\t" // same
elessair 0:f269e3021894 165 PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
elessair 0:f269e3021894 166 PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
elessair 0:f269e3021894 167 PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
elessair 0:f269e3021894 168 PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
elessair 0:f269e3021894 169 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
elessair 0:f269e3021894 170 "movdqa %%xmm4, %%xmm3 \n\t" // same
elessair 0:f269e3021894 171 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
elessair 0:f269e3021894 172 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
elessair 0:f269e3021894 173 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
elessair 0:f269e3021894 174 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
elessair 0:f269e3021894 175
elessair 0:f269e3021894 176 /*
elessair 0:f269e3021894 177 * Now shift the result one bit to the left,
elessair 0:f269e3021894 178 * taking advantage of [CLMUL-WP] eq 27 (p. 20)
elessair 0:f269e3021894 179 */
elessair 0:f269e3021894 180 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
elessair 0:f269e3021894 181 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
elessair 0:f269e3021894 182 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
elessair 0:f269e3021894 183 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
elessair 0:f269e3021894 184 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
elessair 0:f269e3021894 185 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
elessair 0:f269e3021894 186 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
elessair 0:f269e3021894 187 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
elessair 0:f269e3021894 188 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
elessair 0:f269e3021894 189 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
elessair 0:f269e3021894 190 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
elessair 0:f269e3021894 191 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
elessair 0:f269e3021894 192 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
elessair 0:f269e3021894 193
elessair 0:f269e3021894 194 /*
elessair 0:f269e3021894 195 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
elessair 0:f269e3021894 196 * using [CLMUL-WP] algorithm 5 (p. 20).
elessair 0:f269e3021894 197 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
elessair 0:f269e3021894 198 */
elessair 0:f269e3021894 199 /* Step 2 (1) */
elessair 0:f269e3021894 200 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
elessair 0:f269e3021894 201 "movdqa %%xmm1, %%xmm4 \n\t" // same
elessair 0:f269e3021894 202 "movdqa %%xmm1, %%xmm5 \n\t" // same
elessair 0:f269e3021894 203 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
elessair 0:f269e3021894 204 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
elessair 0:f269e3021894 205 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
elessair 0:f269e3021894 206
elessair 0:f269e3021894 207 /* Step 2 (2) */
elessair 0:f269e3021894 208 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
elessair 0:f269e3021894 209 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
elessair 0:f269e3021894 210 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
elessair 0:f269e3021894 211 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
elessair 0:f269e3021894 212
elessair 0:f269e3021894 213 /* Steps 3 and 4 */
elessair 0:f269e3021894 214 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
elessair 0:f269e3021894 215 "movdqa %%xmm1,%%xmm4 \n\t" // same
elessair 0:f269e3021894 216 "movdqa %%xmm1,%%xmm5 \n\t" // same
elessair 0:f269e3021894 217 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
elessair 0:f269e3021894 218 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
elessair 0:f269e3021894 219 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
elessair 0:f269e3021894 220 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
elessair 0:f269e3021894 221 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
elessair 0:f269e3021894 222 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
elessair 0:f269e3021894 223 // bits carried from d. Now get those\t bits back in.
elessair 0:f269e3021894 224 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
elessair 0:f269e3021894 225 "movdqa %%xmm1,%%xmm4 \n\t" // same
elessair 0:f269e3021894 226 "movdqa %%xmm1,%%xmm5 \n\t" // same
elessair 0:f269e3021894 227 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
elessair 0:f269e3021894 228 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
elessair 0:f269e3021894 229 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
elessair 0:f269e3021894 230 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
elessair 0:f269e3021894 231 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
elessair 0:f269e3021894 232 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
elessair 0:f269e3021894 233 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
elessair 0:f269e3021894 234 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
elessair 0:f269e3021894 235 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
elessair 0:f269e3021894 236
elessair 0:f269e3021894 237 "movdqu %%xmm0, (%2) \n\t" // done
elessair 0:f269e3021894 238 :
elessair 0:f269e3021894 239 : "r" (aa), "r" (bb), "r" (cc)
elessair 0:f269e3021894 240 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
elessair 0:f269e3021894 241
elessair 0:f269e3021894 242 /* Now byte-reverse the outputs */
elessair 0:f269e3021894 243 for( i = 0; i < 16; i++ )
elessair 0:f269e3021894 244 c[i] = cc[15 - i];
elessair 0:f269e3021894 245
elessair 0:f269e3021894 246 return;
elessair 0:f269e3021894 247 }
elessair 0:f269e3021894 248
elessair 0:f269e3021894 249 /*
elessair 0:f269e3021894 250 * Compute decryption round keys from encryption round keys
elessair 0:f269e3021894 251 */
elessair 0:f269e3021894 252 void mbedtls_aesni_inverse_key( unsigned char *invkey,
elessair 0:f269e3021894 253 const unsigned char *fwdkey, int nr )
elessair 0:f269e3021894 254 {
elessair 0:f269e3021894 255 unsigned char *ik = invkey;
elessair 0:f269e3021894 256 const unsigned char *fk = fwdkey + 16 * nr;
elessair 0:f269e3021894 257
elessair 0:f269e3021894 258 memcpy( ik, fk, 16 );
elessair 0:f269e3021894 259
elessair 0:f269e3021894 260 for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
elessair 0:f269e3021894 261 asm( "movdqu (%0), %%xmm0 \n\t"
elessair 0:f269e3021894 262 AESIMC xmm0_xmm0 "\n\t"
elessair 0:f269e3021894 263 "movdqu %%xmm0, (%1) \n\t"
elessair 0:f269e3021894 264 :
elessair 0:f269e3021894 265 : "r" (fk), "r" (ik)
elessair 0:f269e3021894 266 : "memory", "xmm0" );
elessair 0:f269e3021894 267
elessair 0:f269e3021894 268 memcpy( ik, fk, 16 );
elessair 0:f269e3021894 269 }
elessair 0:f269e3021894 270
elessair 0:f269e3021894 271 /*
elessair 0:f269e3021894 272 * Key expansion, 128-bit case
elessair 0:f269e3021894 273 */
elessair 0:f269e3021894 274 static void aesni_setkey_enc_128( unsigned char *rk,
elessair 0:f269e3021894 275 const unsigned char *key )
elessair 0:f269e3021894 276 {
elessair 0:f269e3021894 277 asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
elessair 0:f269e3021894 278 "movdqu %%xmm0, (%0) \n\t" // as round key 0
elessair 0:f269e3021894 279 "jmp 2f \n\t" // skip auxiliary routine
elessair 0:f269e3021894 280
elessair 0:f269e3021894 281 /*
elessair 0:f269e3021894 282 * Finish generating the next round key.
elessair 0:f269e3021894 283 *
elessair 0:f269e3021894 284 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
elessair 0:f269e3021894 285 * with X = rot( sub( r3 ) ) ^ RCON.
elessair 0:f269e3021894 286 *
elessair 0:f269e3021894 287 * On exit, xmm0 is r7:r6:r5:r4
elessair 0:f269e3021894 288 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
elessair 0:f269e3021894 289 * and those are written to the round key buffer.
elessair 0:f269e3021894 290 */
elessair 0:f269e3021894 291 "1: \n\t"
elessair 0:f269e3021894 292 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
elessair 0:f269e3021894 293 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
elessair 0:f269e3021894 294 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
elessair 0:f269e3021894 295 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
elessair 0:f269e3021894 296 "pslldq $4, %%xmm0 \n\t" // etc
elessair 0:f269e3021894 297 "pxor %%xmm0, %%xmm1 \n\t"
elessair 0:f269e3021894 298 "pslldq $4, %%xmm0 \n\t"
elessair 0:f269e3021894 299 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
elessair 0:f269e3021894 300 "add $16, %0 \n\t" // point to next round key
elessair 0:f269e3021894 301 "movdqu %%xmm0, (%0) \n\t" // write it
elessair 0:f269e3021894 302 "ret \n\t"
elessair 0:f269e3021894 303
elessair 0:f269e3021894 304 /* Main "loop" */
elessair 0:f269e3021894 305 "2: \n\t"
elessair 0:f269e3021894 306 AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
elessair 0:f269e3021894 307 AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
elessair 0:f269e3021894 308 AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
elessair 0:f269e3021894 309 AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
elessair 0:f269e3021894 310 AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
elessair 0:f269e3021894 311 AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
elessair 0:f269e3021894 312 AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
elessair 0:f269e3021894 313 AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
elessair 0:f269e3021894 314 AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
elessair 0:f269e3021894 315 AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
elessair 0:f269e3021894 316 :
elessair 0:f269e3021894 317 : "r" (rk), "r" (key)
elessair 0:f269e3021894 318 : "memory", "cc", "0" );
elessair 0:f269e3021894 319 }
elessair 0:f269e3021894 320
elessair 0:f269e3021894 321 /*
elessair 0:f269e3021894 322 * Key expansion, 192-bit case
elessair 0:f269e3021894 323 */
elessair 0:f269e3021894 324 static void aesni_setkey_enc_192( unsigned char *rk,
elessair 0:f269e3021894 325 const unsigned char *key )
elessair 0:f269e3021894 326 {
elessair 0:f269e3021894 327 asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
elessair 0:f269e3021894 328 "movdqu %%xmm0, (%0) \n\t"
elessair 0:f269e3021894 329 "add $16, %0 \n\t"
elessair 0:f269e3021894 330 "movq 16(%1), %%xmm1 \n\t"
elessair 0:f269e3021894 331 "movq %%xmm1, (%0) \n\t"
elessair 0:f269e3021894 332 "add $8, %0 \n\t"
elessair 0:f269e3021894 333 "jmp 2f \n\t" // skip auxiliary routine
elessair 0:f269e3021894 334
elessair 0:f269e3021894 335 /*
elessair 0:f269e3021894 336 * Finish generating the next 6 quarter-keys.
elessair 0:f269e3021894 337 *
elessair 0:f269e3021894 338 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
elessair 0:f269e3021894 339 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
elessair 0:f269e3021894 340 *
elessair 0:f269e3021894 341 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
elessair 0:f269e3021894 342 * and those are written to the round key buffer.
elessair 0:f269e3021894 343 */
elessair 0:f269e3021894 344 "1: \n\t"
elessair 0:f269e3021894 345 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
elessair 0:f269e3021894 346 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
elessair 0:f269e3021894 347 "pslldq $4, %%xmm0 \n\t" // etc
elessair 0:f269e3021894 348 "pxor %%xmm0, %%xmm2 \n\t"
elessair 0:f269e3021894 349 "pslldq $4, %%xmm0 \n\t"
elessair 0:f269e3021894 350 "pxor %%xmm0, %%xmm2 \n\t"
elessair 0:f269e3021894 351 "pslldq $4, %%xmm0 \n\t"
elessair 0:f269e3021894 352 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
elessair 0:f269e3021894 353 "movdqu %%xmm0, (%0) \n\t"
elessair 0:f269e3021894 354 "add $16, %0 \n\t"
elessair 0:f269e3021894 355 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
elessair 0:f269e3021894 356 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
elessair 0:f269e3021894 357 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
elessair 0:f269e3021894 358 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
elessair 0:f269e3021894 359 "movq %%xmm1, (%0) \n\t"
elessair 0:f269e3021894 360 "add $8, %0 \n\t"
elessair 0:f269e3021894 361 "ret \n\t"
elessair 0:f269e3021894 362
elessair 0:f269e3021894 363 "2: \n\t"
elessair 0:f269e3021894 364 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
elessair 0:f269e3021894 365 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
elessair 0:f269e3021894 366 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
elessair 0:f269e3021894 367 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
elessair 0:f269e3021894 368 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
elessair 0:f269e3021894 369 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
elessair 0:f269e3021894 370 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
elessair 0:f269e3021894 371 AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
elessair 0:f269e3021894 372
elessair 0:f269e3021894 373 :
elessair 0:f269e3021894 374 : "r" (rk), "r" (key)
elessair 0:f269e3021894 375 : "memory", "cc", "0" );
elessair 0:f269e3021894 376 }
elessair 0:f269e3021894 377
elessair 0:f269e3021894 378 /*
elessair 0:f269e3021894 379 * Key expansion, 256-bit case
elessair 0:f269e3021894 380 */
elessair 0:f269e3021894 381 static void aesni_setkey_enc_256( unsigned char *rk,
elessair 0:f269e3021894 382 const unsigned char *key )
elessair 0:f269e3021894 383 {
elessair 0:f269e3021894 384 asm( "movdqu (%1), %%xmm0 \n\t"
elessair 0:f269e3021894 385 "movdqu %%xmm0, (%0) \n\t"
elessair 0:f269e3021894 386 "add $16, %0 \n\t"
elessair 0:f269e3021894 387 "movdqu 16(%1), %%xmm1 \n\t"
elessair 0:f269e3021894 388 "movdqu %%xmm1, (%0) \n\t"
elessair 0:f269e3021894 389 "jmp 2f \n\t" // skip auxiliary routine
elessair 0:f269e3021894 390
elessair 0:f269e3021894 391 /*
elessair 0:f269e3021894 392 * Finish generating the next two round keys.
elessair 0:f269e3021894 393 *
elessair 0:f269e3021894 394 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
elessair 0:f269e3021894 395 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
elessair 0:f269e3021894 396 *
elessair 0:f269e3021894 397 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
elessair 0:f269e3021894 398 * and those have been written to the output buffer.
elessair 0:f269e3021894 399 */
elessair 0:f269e3021894 400 "1: \n\t"
elessair 0:f269e3021894 401 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
elessair 0:f269e3021894 402 "pxor %%xmm0, %%xmm2 \n\t"
elessair 0:f269e3021894 403 "pslldq $4, %%xmm0 \n\t"
elessair 0:f269e3021894 404 "pxor %%xmm0, %%xmm2 \n\t"
elessair 0:f269e3021894 405 "pslldq $4, %%xmm0 \n\t"
elessair 0:f269e3021894 406 "pxor %%xmm0, %%xmm2 \n\t"
elessair 0:f269e3021894 407 "pslldq $4, %%xmm0 \n\t"
elessair 0:f269e3021894 408 "pxor %%xmm2, %%xmm0 \n\t"
elessair 0:f269e3021894 409 "add $16, %0 \n\t"
elessair 0:f269e3021894 410 "movdqu %%xmm0, (%0) \n\t"
elessair 0:f269e3021894 411
elessair 0:f269e3021894 412 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
elessair 0:f269e3021894 413 * and proceed to generate next round key from there */
elessair 0:f269e3021894 414 AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
elessair 0:f269e3021894 415 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
elessair 0:f269e3021894 416 "pxor %%xmm1, %%xmm2 \n\t"
elessair 0:f269e3021894 417 "pslldq $4, %%xmm1 \n\t"
elessair 0:f269e3021894 418 "pxor %%xmm1, %%xmm2 \n\t"
elessair 0:f269e3021894 419 "pslldq $4, %%xmm1 \n\t"
elessair 0:f269e3021894 420 "pxor %%xmm1, %%xmm2 \n\t"
elessair 0:f269e3021894 421 "pslldq $4, %%xmm1 \n\t"
elessair 0:f269e3021894 422 "pxor %%xmm2, %%xmm1 \n\t"
elessair 0:f269e3021894 423 "add $16, %0 \n\t"
elessair 0:f269e3021894 424 "movdqu %%xmm1, (%0) \n\t"
elessair 0:f269e3021894 425 "ret \n\t"
elessair 0:f269e3021894 426
elessair 0:f269e3021894 427 /*
elessair 0:f269e3021894 428 * Main "loop" - Generating one more key than necessary,
elessair 0:f269e3021894 429 * see definition of mbedtls_aes_context.buf
elessair 0:f269e3021894 430 */
elessair 0:f269e3021894 431 "2: \n\t"
elessair 0:f269e3021894 432 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
elessair 0:f269e3021894 433 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
elessair 0:f269e3021894 434 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
elessair 0:f269e3021894 435 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
elessair 0:f269e3021894 436 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
elessair 0:f269e3021894 437 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
elessair 0:f269e3021894 438 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
elessair 0:f269e3021894 439 :
elessair 0:f269e3021894 440 : "r" (rk), "r" (key)
elessair 0:f269e3021894 441 : "memory", "cc", "0" );
elessair 0:f269e3021894 442 }
elessair 0:f269e3021894 443
elessair 0:f269e3021894 444 /*
elessair 0:f269e3021894 445 * Key expansion, wrapper
elessair 0:f269e3021894 446 */
elessair 0:f269e3021894 447 int mbedtls_aesni_setkey_enc( unsigned char *rk,
elessair 0:f269e3021894 448 const unsigned char *key,
elessair 0:f269e3021894 449 size_t bits )
elessair 0:f269e3021894 450 {
elessair 0:f269e3021894 451 switch( bits )
elessair 0:f269e3021894 452 {
elessair 0:f269e3021894 453 case 128: aesni_setkey_enc_128( rk, key ); break;
elessair 0:f269e3021894 454 case 192: aesni_setkey_enc_192( rk, key ); break;
elessair 0:f269e3021894 455 case 256: aesni_setkey_enc_256( rk, key ); break;
elessair 0:f269e3021894 456 default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
elessair 0:f269e3021894 457 }
elessair 0:f269e3021894 458
elessair 0:f269e3021894 459 return( 0 );
elessair 0:f269e3021894 460 }
elessair 0:f269e3021894 461
elessair 0:f269e3021894 462 #endif /* MBEDTLS_HAVE_X86_64 */
elessair 0:f269e3021894 463
elessair 0:f269e3021894 464 #endif /* MBEDTLS_AESNI_C */