Mangue Baja Box

Dependencies:   mbed

Committer:
einsteingustavo
Date:
Mon Jul 29 20:38:00 2019 +0000
Revision:
0:0dee8840a1c0
Mangue Baja Box

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einsteingustavo 0:0dee8840a1c0 1 /**
einsteingustavo 0:0dee8840a1c0 2 ******************************************************************************
einsteingustavo 0:0dee8840a1c0 3 * @file stm32f10x_spi.h
einsteingustavo 0:0dee8840a1c0 4 * @author MCD Application Team
einsteingustavo 0:0dee8840a1c0 5 * @version V3.6.1
einsteingustavo 0:0dee8840a1c0 6 * @date 05-March-2012
einsteingustavo 0:0dee8840a1c0 7 * @brief This file contains all the functions prototypes for the SPI firmware
einsteingustavo 0:0dee8840a1c0 8 * library.
einsteingustavo 0:0dee8840a1c0 9 *******************************************************************************
einsteingustavo 0:0dee8840a1c0 10 * Copyright (c) 2014, STMicroelectronics
einsteingustavo 0:0dee8840a1c0 11 * All rights reserved.
einsteingustavo 0:0dee8840a1c0 12 *
einsteingustavo 0:0dee8840a1c0 13 * Redistribution and use in source and binary forms, with or without
einsteingustavo 0:0dee8840a1c0 14 * modification, are permitted provided that the following conditions are met:
einsteingustavo 0:0dee8840a1c0 15 *
einsteingustavo 0:0dee8840a1c0 16 * 1. Redistributions of source code must retain the above copyright notice,
einsteingustavo 0:0dee8840a1c0 17 * this list of conditions and the following disclaimer.
einsteingustavo 0:0dee8840a1c0 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
einsteingustavo 0:0dee8840a1c0 19 * this list of conditions and the following disclaimer in the documentation
einsteingustavo 0:0dee8840a1c0 20 * and/or other materials provided with the distribution.
einsteingustavo 0:0dee8840a1c0 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
einsteingustavo 0:0dee8840a1c0 22 * may be used to endorse or promote products derived from this software
einsteingustavo 0:0dee8840a1c0 23 * without specific prior written permission.
einsteingustavo 0:0dee8840a1c0 24 *
einsteingustavo 0:0dee8840a1c0 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
einsteingustavo 0:0dee8840a1c0 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
einsteingustavo 0:0dee8840a1c0 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
einsteingustavo 0:0dee8840a1c0 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
einsteingustavo 0:0dee8840a1c0 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
einsteingustavo 0:0dee8840a1c0 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
einsteingustavo 0:0dee8840a1c0 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
einsteingustavo 0:0dee8840a1c0 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
einsteingustavo 0:0dee8840a1c0 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
einsteingustavo 0:0dee8840a1c0 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
einsteingustavo 0:0dee8840a1c0 35 *******************************************************************************
einsteingustavo 0:0dee8840a1c0 36 */
einsteingustavo 0:0dee8840a1c0 37
einsteingustavo 0:0dee8840a1c0 38 /* Define to prevent recursive inclusion -------------------------------------*/
einsteingustavo 0:0dee8840a1c0 39 #ifndef __STM32F10x_SPI_H
einsteingustavo 0:0dee8840a1c0 40 #define __STM32F10x_SPI_H
einsteingustavo 0:0dee8840a1c0 41
einsteingustavo 0:0dee8840a1c0 42 #ifdef __cplusplus
einsteingustavo 0:0dee8840a1c0 43 extern "C" {
einsteingustavo 0:0dee8840a1c0 44 #endif
einsteingustavo 0:0dee8840a1c0 45
einsteingustavo 0:0dee8840a1c0 46 /* Includes ------------------------------------------------------------------*/
einsteingustavo 0:0dee8840a1c0 47 #include "stm32f10x.h"
einsteingustavo 0:0dee8840a1c0 48
einsteingustavo 0:0dee8840a1c0 49 /** @addtogroup STM32F10x_StdPeriph_Driver
einsteingustavo 0:0dee8840a1c0 50 * @{
einsteingustavo 0:0dee8840a1c0 51 */
einsteingustavo 0:0dee8840a1c0 52
einsteingustavo 0:0dee8840a1c0 53 /** @addtogroup SPI
einsteingustavo 0:0dee8840a1c0 54 * @{
einsteingustavo 0:0dee8840a1c0 55 */
einsteingustavo 0:0dee8840a1c0 56
einsteingustavo 0:0dee8840a1c0 57 /** @defgroup SPI_Exported_Types
einsteingustavo 0:0dee8840a1c0 58 * @{
einsteingustavo 0:0dee8840a1c0 59 */
einsteingustavo 0:0dee8840a1c0 60
einsteingustavo 0:0dee8840a1c0 61 /**
einsteingustavo 0:0dee8840a1c0 62 * @brief SPI Init structure definition
einsteingustavo 0:0dee8840a1c0 63 */
einsteingustavo 0:0dee8840a1c0 64
einsteingustavo 0:0dee8840a1c0 65 typedef struct
einsteingustavo 0:0dee8840a1c0 66 {
einsteingustavo 0:0dee8840a1c0 67 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
einsteingustavo 0:0dee8840a1c0 68 This parameter can be a value of @ref SPI_data_direction */
einsteingustavo 0:0dee8840a1c0 69
einsteingustavo 0:0dee8840a1c0 70 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
einsteingustavo 0:0dee8840a1c0 71 This parameter can be a value of @ref SPI_mode */
einsteingustavo 0:0dee8840a1c0 72
einsteingustavo 0:0dee8840a1c0 73 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
einsteingustavo 0:0dee8840a1c0 74 This parameter can be a value of @ref SPI_data_size */
einsteingustavo 0:0dee8840a1c0 75
einsteingustavo 0:0dee8840a1c0 76 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
einsteingustavo 0:0dee8840a1c0 77 This parameter can be a value of @ref SPI_Clock_Polarity */
einsteingustavo 0:0dee8840a1c0 78
einsteingustavo 0:0dee8840a1c0 79 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
einsteingustavo 0:0dee8840a1c0 80 This parameter can be a value of @ref SPI_Clock_Phase */
einsteingustavo 0:0dee8840a1c0 81
einsteingustavo 0:0dee8840a1c0 82 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
einsteingustavo 0:0dee8840a1c0 83 hardware (NSS pin) or by software using the SSI bit.
einsteingustavo 0:0dee8840a1c0 84 This parameter can be a value of @ref SPI_Slave_Select_management */
einsteingustavo 0:0dee8840a1c0 85
einsteingustavo 0:0dee8840a1c0 86 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
einsteingustavo 0:0dee8840a1c0 87 used to configure the transmit and receive SCK clock.
einsteingustavo 0:0dee8840a1c0 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler.
einsteingustavo 0:0dee8840a1c0 89 @note The communication clock is derived from the master
einsteingustavo 0:0dee8840a1c0 90 clock. The slave clock does not need to be set. */
einsteingustavo 0:0dee8840a1c0 91
einsteingustavo 0:0dee8840a1c0 92 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
einsteingustavo 0:0dee8840a1c0 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
einsteingustavo 0:0dee8840a1c0 94
einsteingustavo 0:0dee8840a1c0 95 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
einsteingustavo 0:0dee8840a1c0 96 }SPI_InitTypeDef;
einsteingustavo 0:0dee8840a1c0 97
einsteingustavo 0:0dee8840a1c0 98 /**
einsteingustavo 0:0dee8840a1c0 99 * @brief I2S Init structure definition
einsteingustavo 0:0dee8840a1c0 100 */
einsteingustavo 0:0dee8840a1c0 101
einsteingustavo 0:0dee8840a1c0 102 typedef struct
einsteingustavo 0:0dee8840a1c0 103 {
einsteingustavo 0:0dee8840a1c0 104
einsteingustavo 0:0dee8840a1c0 105 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
einsteingustavo 0:0dee8840a1c0 106 This parameter can be a value of @ref I2S_Mode */
einsteingustavo 0:0dee8840a1c0 107
einsteingustavo 0:0dee8840a1c0 108 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
einsteingustavo 0:0dee8840a1c0 109 This parameter can be a value of @ref I2S_Standard */
einsteingustavo 0:0dee8840a1c0 110
einsteingustavo 0:0dee8840a1c0 111 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
einsteingustavo 0:0dee8840a1c0 112 This parameter can be a value of @ref I2S_Data_Format */
einsteingustavo 0:0dee8840a1c0 113
einsteingustavo 0:0dee8840a1c0 114 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
einsteingustavo 0:0dee8840a1c0 115 This parameter can be a value of @ref I2S_MCLK_Output */
einsteingustavo 0:0dee8840a1c0 116
einsteingustavo 0:0dee8840a1c0 117 uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
einsteingustavo 0:0dee8840a1c0 118 This parameter can be a value of @ref I2S_Audio_Frequency */
einsteingustavo 0:0dee8840a1c0 119
einsteingustavo 0:0dee8840a1c0 120 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
einsteingustavo 0:0dee8840a1c0 121 This parameter can be a value of @ref I2S_Clock_Polarity */
einsteingustavo 0:0dee8840a1c0 122 }I2S_InitTypeDef;
einsteingustavo 0:0dee8840a1c0 123
einsteingustavo 0:0dee8840a1c0 124 /**
einsteingustavo 0:0dee8840a1c0 125 * @}
einsteingustavo 0:0dee8840a1c0 126 */
einsteingustavo 0:0dee8840a1c0 127
einsteingustavo 0:0dee8840a1c0 128 /** @defgroup SPI_Exported_Constants
einsteingustavo 0:0dee8840a1c0 129 * @{
einsteingustavo 0:0dee8840a1c0 130 */
einsteingustavo 0:0dee8840a1c0 131
einsteingustavo 0:0dee8840a1c0 132 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
einsteingustavo 0:0dee8840a1c0 133 ((PERIPH) == SPI2) || \
einsteingustavo 0:0dee8840a1c0 134 ((PERIPH) == SPI3))
einsteingustavo 0:0dee8840a1c0 135
einsteingustavo 0:0dee8840a1c0 136 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
einsteingustavo 0:0dee8840a1c0 137 ((PERIPH) == SPI3))
einsteingustavo 0:0dee8840a1c0 138
einsteingustavo 0:0dee8840a1c0 139 /** @defgroup SPI_data_direction
einsteingustavo 0:0dee8840a1c0 140 * @{
einsteingustavo 0:0dee8840a1c0 141 */
einsteingustavo 0:0dee8840a1c0 142
einsteingustavo 0:0dee8840a1c0 143 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 144 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
einsteingustavo 0:0dee8840a1c0 145 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
einsteingustavo 0:0dee8840a1c0 146 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
einsteingustavo 0:0dee8840a1c0 147 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
einsteingustavo 0:0dee8840a1c0 148 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
einsteingustavo 0:0dee8840a1c0 149 ((MODE) == SPI_Direction_1Line_Rx) || \
einsteingustavo 0:0dee8840a1c0 150 ((MODE) == SPI_Direction_1Line_Tx))
einsteingustavo 0:0dee8840a1c0 151 /**
einsteingustavo 0:0dee8840a1c0 152 * @}
einsteingustavo 0:0dee8840a1c0 153 */
einsteingustavo 0:0dee8840a1c0 154
einsteingustavo 0:0dee8840a1c0 155 /** @defgroup SPI_mode
einsteingustavo 0:0dee8840a1c0 156 * @{
einsteingustavo 0:0dee8840a1c0 157 */
einsteingustavo 0:0dee8840a1c0 158
einsteingustavo 0:0dee8840a1c0 159 #define SPI_Mode_Master ((uint16_t)0x0104)
einsteingustavo 0:0dee8840a1c0 160 #define SPI_Mode_Slave ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 161 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
einsteingustavo 0:0dee8840a1c0 162 ((MODE) == SPI_Mode_Slave))
einsteingustavo 0:0dee8840a1c0 163 /**
einsteingustavo 0:0dee8840a1c0 164 * @}
einsteingustavo 0:0dee8840a1c0 165 */
einsteingustavo 0:0dee8840a1c0 166
einsteingustavo 0:0dee8840a1c0 167 /** @defgroup SPI_data_size
einsteingustavo 0:0dee8840a1c0 168 * @{
einsteingustavo 0:0dee8840a1c0 169 */
einsteingustavo 0:0dee8840a1c0 170
einsteingustavo 0:0dee8840a1c0 171 #define SPI_DataSize_16b ((uint16_t)0x0800)
einsteingustavo 0:0dee8840a1c0 172 #define SPI_DataSize_8b ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 173 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
einsteingustavo 0:0dee8840a1c0 174 ((DATASIZE) == SPI_DataSize_8b))
einsteingustavo 0:0dee8840a1c0 175 /**
einsteingustavo 0:0dee8840a1c0 176 * @}
einsteingustavo 0:0dee8840a1c0 177 */
einsteingustavo 0:0dee8840a1c0 178
einsteingustavo 0:0dee8840a1c0 179 /** @defgroup SPI_Clock_Polarity
einsteingustavo 0:0dee8840a1c0 180 * @{
einsteingustavo 0:0dee8840a1c0 181 */
einsteingustavo 0:0dee8840a1c0 182
einsteingustavo 0:0dee8840a1c0 183 #define SPI_CPOL_Low ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 184 #define SPI_CPOL_High ((uint16_t)0x0002)
einsteingustavo 0:0dee8840a1c0 185 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
einsteingustavo 0:0dee8840a1c0 186 ((CPOL) == SPI_CPOL_High))
einsteingustavo 0:0dee8840a1c0 187 /**
einsteingustavo 0:0dee8840a1c0 188 * @}
einsteingustavo 0:0dee8840a1c0 189 */
einsteingustavo 0:0dee8840a1c0 190
einsteingustavo 0:0dee8840a1c0 191 /** @defgroup SPI_Clock_Phase
einsteingustavo 0:0dee8840a1c0 192 * @{
einsteingustavo 0:0dee8840a1c0 193 */
einsteingustavo 0:0dee8840a1c0 194
einsteingustavo 0:0dee8840a1c0 195 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 196 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
einsteingustavo 0:0dee8840a1c0 197 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
einsteingustavo 0:0dee8840a1c0 198 ((CPHA) == SPI_CPHA_2Edge))
einsteingustavo 0:0dee8840a1c0 199 /**
einsteingustavo 0:0dee8840a1c0 200 * @}
einsteingustavo 0:0dee8840a1c0 201 */
einsteingustavo 0:0dee8840a1c0 202
einsteingustavo 0:0dee8840a1c0 203 /** @defgroup SPI_Slave_Select_management
einsteingustavo 0:0dee8840a1c0 204 * @{
einsteingustavo 0:0dee8840a1c0 205 */
einsteingustavo 0:0dee8840a1c0 206
einsteingustavo 0:0dee8840a1c0 207 #define SPI_NSS_Soft ((uint16_t)0x0200)
einsteingustavo 0:0dee8840a1c0 208 #define SPI_NSS_Hard ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 209 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
einsteingustavo 0:0dee8840a1c0 210 ((NSS) == SPI_NSS_Hard))
einsteingustavo 0:0dee8840a1c0 211 /**
einsteingustavo 0:0dee8840a1c0 212 * @}
einsteingustavo 0:0dee8840a1c0 213 */
einsteingustavo 0:0dee8840a1c0 214
einsteingustavo 0:0dee8840a1c0 215 /** @defgroup SPI_BaudRate_Prescaler
einsteingustavo 0:0dee8840a1c0 216 * @{
einsteingustavo 0:0dee8840a1c0 217 */
einsteingustavo 0:0dee8840a1c0 218
einsteingustavo 0:0dee8840a1c0 219 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 220 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
einsteingustavo 0:0dee8840a1c0 221 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
einsteingustavo 0:0dee8840a1c0 222 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
einsteingustavo 0:0dee8840a1c0 223 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
einsteingustavo 0:0dee8840a1c0 224 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
einsteingustavo 0:0dee8840a1c0 225 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
einsteingustavo 0:0dee8840a1c0 226 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
einsteingustavo 0:0dee8840a1c0 227 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
einsteingustavo 0:0dee8840a1c0 228 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
einsteingustavo 0:0dee8840a1c0 229 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
einsteingustavo 0:0dee8840a1c0 230 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
einsteingustavo 0:0dee8840a1c0 231 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
einsteingustavo 0:0dee8840a1c0 232 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
einsteingustavo 0:0dee8840a1c0 233 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
einsteingustavo 0:0dee8840a1c0 234 ((PRESCALER) == SPI_BaudRatePrescaler_256))
einsteingustavo 0:0dee8840a1c0 235 /**
einsteingustavo 0:0dee8840a1c0 236 * @}
einsteingustavo 0:0dee8840a1c0 237 */
einsteingustavo 0:0dee8840a1c0 238
einsteingustavo 0:0dee8840a1c0 239 /** @defgroup SPI_MSB_LSB_transmission
einsteingustavo 0:0dee8840a1c0 240 * @{
einsteingustavo 0:0dee8840a1c0 241 */
einsteingustavo 0:0dee8840a1c0 242
einsteingustavo 0:0dee8840a1c0 243 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 244 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
einsteingustavo 0:0dee8840a1c0 245 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
einsteingustavo 0:0dee8840a1c0 246 ((BIT) == SPI_FirstBit_LSB))
einsteingustavo 0:0dee8840a1c0 247 /**
einsteingustavo 0:0dee8840a1c0 248 * @}
einsteingustavo 0:0dee8840a1c0 249 */
einsteingustavo 0:0dee8840a1c0 250
einsteingustavo 0:0dee8840a1c0 251 /** @defgroup I2S_Mode
einsteingustavo 0:0dee8840a1c0 252 * @{
einsteingustavo 0:0dee8840a1c0 253 */
einsteingustavo 0:0dee8840a1c0 254
einsteingustavo 0:0dee8840a1c0 255 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 256 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
einsteingustavo 0:0dee8840a1c0 257 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
einsteingustavo 0:0dee8840a1c0 258 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
einsteingustavo 0:0dee8840a1c0 259 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
einsteingustavo 0:0dee8840a1c0 260 ((MODE) == I2S_Mode_SlaveRx) || \
einsteingustavo 0:0dee8840a1c0 261 ((MODE) == I2S_Mode_MasterTx) || \
einsteingustavo 0:0dee8840a1c0 262 ((MODE) == I2S_Mode_MasterRx) )
einsteingustavo 0:0dee8840a1c0 263 /**
einsteingustavo 0:0dee8840a1c0 264 * @}
einsteingustavo 0:0dee8840a1c0 265 */
einsteingustavo 0:0dee8840a1c0 266
einsteingustavo 0:0dee8840a1c0 267 /** @defgroup I2S_Standard
einsteingustavo 0:0dee8840a1c0 268 * @{
einsteingustavo 0:0dee8840a1c0 269 */
einsteingustavo 0:0dee8840a1c0 270
einsteingustavo 0:0dee8840a1c0 271 #define I2S_Standard_Phillips ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 272 #define I2S_Standard_MSB ((uint16_t)0x0010)
einsteingustavo 0:0dee8840a1c0 273 #define I2S_Standard_LSB ((uint16_t)0x0020)
einsteingustavo 0:0dee8840a1c0 274 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
einsteingustavo 0:0dee8840a1c0 275 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
einsteingustavo 0:0dee8840a1c0 276 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
einsteingustavo 0:0dee8840a1c0 277 ((STANDARD) == I2S_Standard_MSB) || \
einsteingustavo 0:0dee8840a1c0 278 ((STANDARD) == I2S_Standard_LSB) || \
einsteingustavo 0:0dee8840a1c0 279 ((STANDARD) == I2S_Standard_PCMShort) || \
einsteingustavo 0:0dee8840a1c0 280 ((STANDARD) == I2S_Standard_PCMLong))
einsteingustavo 0:0dee8840a1c0 281 /**
einsteingustavo 0:0dee8840a1c0 282 * @}
einsteingustavo 0:0dee8840a1c0 283 */
einsteingustavo 0:0dee8840a1c0 284
einsteingustavo 0:0dee8840a1c0 285 /** @defgroup I2S_Data_Format
einsteingustavo 0:0dee8840a1c0 286 * @{
einsteingustavo 0:0dee8840a1c0 287 */
einsteingustavo 0:0dee8840a1c0 288
einsteingustavo 0:0dee8840a1c0 289 #define I2S_DataFormat_16b ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 290 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
einsteingustavo 0:0dee8840a1c0 291 #define I2S_DataFormat_24b ((uint16_t)0x0003)
einsteingustavo 0:0dee8840a1c0 292 #define I2S_DataFormat_32b ((uint16_t)0x0005)
einsteingustavo 0:0dee8840a1c0 293 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
einsteingustavo 0:0dee8840a1c0 294 ((FORMAT) == I2S_DataFormat_16bextended) || \
einsteingustavo 0:0dee8840a1c0 295 ((FORMAT) == I2S_DataFormat_24b) || \
einsteingustavo 0:0dee8840a1c0 296 ((FORMAT) == I2S_DataFormat_32b))
einsteingustavo 0:0dee8840a1c0 297 /**
einsteingustavo 0:0dee8840a1c0 298 * @}
einsteingustavo 0:0dee8840a1c0 299 */
einsteingustavo 0:0dee8840a1c0 300
einsteingustavo 0:0dee8840a1c0 301 /** @defgroup I2S_MCLK_Output
einsteingustavo 0:0dee8840a1c0 302 * @{
einsteingustavo 0:0dee8840a1c0 303 */
einsteingustavo 0:0dee8840a1c0 304
einsteingustavo 0:0dee8840a1c0 305 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
einsteingustavo 0:0dee8840a1c0 306 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 307 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
einsteingustavo 0:0dee8840a1c0 308 ((OUTPUT) == I2S_MCLKOutput_Disable))
einsteingustavo 0:0dee8840a1c0 309 /**
einsteingustavo 0:0dee8840a1c0 310 * @}
einsteingustavo 0:0dee8840a1c0 311 */
einsteingustavo 0:0dee8840a1c0 312
einsteingustavo 0:0dee8840a1c0 313 /** @defgroup I2S_Audio_Frequency
einsteingustavo 0:0dee8840a1c0 314 * @{
einsteingustavo 0:0dee8840a1c0 315 */
einsteingustavo 0:0dee8840a1c0 316
einsteingustavo 0:0dee8840a1c0 317 #define I2S_AudioFreq_192k ((uint32_t)192000)
einsteingustavo 0:0dee8840a1c0 318 #define I2S_AudioFreq_96k ((uint32_t)96000)
einsteingustavo 0:0dee8840a1c0 319 #define I2S_AudioFreq_48k ((uint32_t)48000)
einsteingustavo 0:0dee8840a1c0 320 #define I2S_AudioFreq_44k ((uint32_t)44100)
einsteingustavo 0:0dee8840a1c0 321 #define I2S_AudioFreq_32k ((uint32_t)32000)
einsteingustavo 0:0dee8840a1c0 322 #define I2S_AudioFreq_22k ((uint32_t)22050)
einsteingustavo 0:0dee8840a1c0 323 #define I2S_AudioFreq_16k ((uint32_t)16000)
einsteingustavo 0:0dee8840a1c0 324 #define I2S_AudioFreq_11k ((uint32_t)11025)
einsteingustavo 0:0dee8840a1c0 325 #define I2S_AudioFreq_8k ((uint32_t)8000)
einsteingustavo 0:0dee8840a1c0 326 #define I2S_AudioFreq_Default ((uint32_t)2)
einsteingustavo 0:0dee8840a1c0 327
einsteingustavo 0:0dee8840a1c0 328 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
einsteingustavo 0:0dee8840a1c0 329 ((FREQ) <= I2S_AudioFreq_192k)) || \
einsteingustavo 0:0dee8840a1c0 330 ((FREQ) == I2S_AudioFreq_Default))
einsteingustavo 0:0dee8840a1c0 331 /**
einsteingustavo 0:0dee8840a1c0 332 * @}
einsteingustavo 0:0dee8840a1c0 333 */
einsteingustavo 0:0dee8840a1c0 334
einsteingustavo 0:0dee8840a1c0 335 /** @defgroup I2S_Clock_Polarity
einsteingustavo 0:0dee8840a1c0 336 * @{
einsteingustavo 0:0dee8840a1c0 337 */
einsteingustavo 0:0dee8840a1c0 338
einsteingustavo 0:0dee8840a1c0 339 #define I2S_CPOL_Low ((uint16_t)0x0000)
einsteingustavo 0:0dee8840a1c0 340 #define I2S_CPOL_High ((uint16_t)0x0008)
einsteingustavo 0:0dee8840a1c0 341 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
einsteingustavo 0:0dee8840a1c0 342 ((CPOL) == I2S_CPOL_High))
einsteingustavo 0:0dee8840a1c0 343 /**
einsteingustavo 0:0dee8840a1c0 344 * @}
einsteingustavo 0:0dee8840a1c0 345 */
einsteingustavo 0:0dee8840a1c0 346
einsteingustavo 0:0dee8840a1c0 347 /** @defgroup SPI_I2S_DMA_transfer_requests
einsteingustavo 0:0dee8840a1c0 348 * @{
einsteingustavo 0:0dee8840a1c0 349 */
einsteingustavo 0:0dee8840a1c0 350
einsteingustavo 0:0dee8840a1c0 351 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
einsteingustavo 0:0dee8840a1c0 352 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
einsteingustavo 0:0dee8840a1c0 353 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
einsteingustavo 0:0dee8840a1c0 354 /**
einsteingustavo 0:0dee8840a1c0 355 * @}
einsteingustavo 0:0dee8840a1c0 356 */
einsteingustavo 0:0dee8840a1c0 357
einsteingustavo 0:0dee8840a1c0 358 /** @defgroup SPI_NSS_internal_software_management
einsteingustavo 0:0dee8840a1c0 359 * @{
einsteingustavo 0:0dee8840a1c0 360 */
einsteingustavo 0:0dee8840a1c0 361
einsteingustavo 0:0dee8840a1c0 362 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
einsteingustavo 0:0dee8840a1c0 363 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
einsteingustavo 0:0dee8840a1c0 364 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
einsteingustavo 0:0dee8840a1c0 365 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
einsteingustavo 0:0dee8840a1c0 366 /**
einsteingustavo 0:0dee8840a1c0 367 * @}
einsteingustavo 0:0dee8840a1c0 368 */
einsteingustavo 0:0dee8840a1c0 369
einsteingustavo 0:0dee8840a1c0 370 /** @defgroup SPI_CRC_Transmit_Receive
einsteingustavo 0:0dee8840a1c0 371 * @{
einsteingustavo 0:0dee8840a1c0 372 */
einsteingustavo 0:0dee8840a1c0 373
einsteingustavo 0:0dee8840a1c0 374 #define SPI_CRC_Tx ((uint8_t)0x00)
einsteingustavo 0:0dee8840a1c0 375 #define SPI_CRC_Rx ((uint8_t)0x01)
einsteingustavo 0:0dee8840a1c0 376 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
einsteingustavo 0:0dee8840a1c0 377 /**
einsteingustavo 0:0dee8840a1c0 378 * @}
einsteingustavo 0:0dee8840a1c0 379 */
einsteingustavo 0:0dee8840a1c0 380
einsteingustavo 0:0dee8840a1c0 381 /** @defgroup SPI_direction_transmit_receive
einsteingustavo 0:0dee8840a1c0 382 * @{
einsteingustavo 0:0dee8840a1c0 383 */
einsteingustavo 0:0dee8840a1c0 384
einsteingustavo 0:0dee8840a1c0 385 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
einsteingustavo 0:0dee8840a1c0 386 #define SPI_Direction_Tx ((uint16_t)0x4000)
einsteingustavo 0:0dee8840a1c0 387 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
einsteingustavo 0:0dee8840a1c0 388 ((DIRECTION) == SPI_Direction_Tx))
einsteingustavo 0:0dee8840a1c0 389 /**
einsteingustavo 0:0dee8840a1c0 390 * @}
einsteingustavo 0:0dee8840a1c0 391 */
einsteingustavo 0:0dee8840a1c0 392
einsteingustavo 0:0dee8840a1c0 393 /** @defgroup SPI_I2S_interrupts_definition
einsteingustavo 0:0dee8840a1c0 394 * @{
einsteingustavo 0:0dee8840a1c0 395 */
einsteingustavo 0:0dee8840a1c0 396
einsteingustavo 0:0dee8840a1c0 397 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
einsteingustavo 0:0dee8840a1c0 398 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
einsteingustavo 0:0dee8840a1c0 399 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
einsteingustavo 0:0dee8840a1c0 400 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
einsteingustavo 0:0dee8840a1c0 401 ((IT) == SPI_I2S_IT_RXNE) || \
einsteingustavo 0:0dee8840a1c0 402 ((IT) == SPI_I2S_IT_ERR))
einsteingustavo 0:0dee8840a1c0 403 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
einsteingustavo 0:0dee8840a1c0 404 #define SPI_IT_MODF ((uint8_t)0x55)
einsteingustavo 0:0dee8840a1c0 405 #define SPI_IT_CRCERR ((uint8_t)0x54)
einsteingustavo 0:0dee8840a1c0 406 #define I2S_IT_UDR ((uint8_t)0x53)
einsteingustavo 0:0dee8840a1c0 407 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
einsteingustavo 0:0dee8840a1c0 408 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
einsteingustavo 0:0dee8840a1c0 409 ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
einsteingustavo 0:0dee8840a1c0 410 ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
einsteingustavo 0:0dee8840a1c0 411 /**
einsteingustavo 0:0dee8840a1c0 412 * @}
einsteingustavo 0:0dee8840a1c0 413 */
einsteingustavo 0:0dee8840a1c0 414
einsteingustavo 0:0dee8840a1c0 415 /** @defgroup SPI_I2S_flags_definition
einsteingustavo 0:0dee8840a1c0 416 * @{
einsteingustavo 0:0dee8840a1c0 417 */
einsteingustavo 0:0dee8840a1c0 418
einsteingustavo 0:0dee8840a1c0 419 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
einsteingustavo 0:0dee8840a1c0 420 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
einsteingustavo 0:0dee8840a1c0 421 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
einsteingustavo 0:0dee8840a1c0 422 #define I2S_FLAG_UDR ((uint16_t)0x0008)
einsteingustavo 0:0dee8840a1c0 423 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
einsteingustavo 0:0dee8840a1c0 424 #define SPI_FLAG_MODF ((uint16_t)0x0020)
einsteingustavo 0:0dee8840a1c0 425 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
einsteingustavo 0:0dee8840a1c0 426 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
einsteingustavo 0:0dee8840a1c0 427 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
einsteingustavo 0:0dee8840a1c0 428 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
einsteingustavo 0:0dee8840a1c0 429 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
einsteingustavo 0:0dee8840a1c0 430 ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
einsteingustavo 0:0dee8840a1c0 431 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
einsteingustavo 0:0dee8840a1c0 432 /**
einsteingustavo 0:0dee8840a1c0 433 * @}
einsteingustavo 0:0dee8840a1c0 434 */
einsteingustavo 0:0dee8840a1c0 435
einsteingustavo 0:0dee8840a1c0 436 /** @defgroup SPI_CRC_polynomial
einsteingustavo 0:0dee8840a1c0 437 * @{
einsteingustavo 0:0dee8840a1c0 438 */
einsteingustavo 0:0dee8840a1c0 439
einsteingustavo 0:0dee8840a1c0 440 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
einsteingustavo 0:0dee8840a1c0 441 /**
einsteingustavo 0:0dee8840a1c0 442 * @}
einsteingustavo 0:0dee8840a1c0 443 */
einsteingustavo 0:0dee8840a1c0 444
einsteingustavo 0:0dee8840a1c0 445 /**
einsteingustavo 0:0dee8840a1c0 446 * @}
einsteingustavo 0:0dee8840a1c0 447 */
einsteingustavo 0:0dee8840a1c0 448
einsteingustavo 0:0dee8840a1c0 449 /** @defgroup SPI_Exported_Macros
einsteingustavo 0:0dee8840a1c0 450 * @{
einsteingustavo 0:0dee8840a1c0 451 */
einsteingustavo 0:0dee8840a1c0 452
einsteingustavo 0:0dee8840a1c0 453 /**
einsteingustavo 0:0dee8840a1c0 454 * @}
einsteingustavo 0:0dee8840a1c0 455 */
einsteingustavo 0:0dee8840a1c0 456
einsteingustavo 0:0dee8840a1c0 457 /** @defgroup SPI_Exported_Functions
einsteingustavo 0:0dee8840a1c0 458 * @{
einsteingustavo 0:0dee8840a1c0 459 */
einsteingustavo 0:0dee8840a1c0 460
einsteingustavo 0:0dee8840a1c0 461 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
einsteingustavo 0:0dee8840a1c0 462 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
einsteingustavo 0:0dee8840a1c0 463 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
einsteingustavo 0:0dee8840a1c0 464 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
einsteingustavo 0:0dee8840a1c0 465 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
einsteingustavo 0:0dee8840a1c0 466 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 467 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 468 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 469 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 470 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
einsteingustavo 0:0dee8840a1c0 471 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
einsteingustavo 0:0dee8840a1c0 472 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
einsteingustavo 0:0dee8840a1c0 473 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 474 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
einsteingustavo 0:0dee8840a1c0 475 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
einsteingustavo 0:0dee8840a1c0 476 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 477 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
einsteingustavo 0:0dee8840a1c0 478 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
einsteingustavo 0:0dee8840a1c0 479 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
einsteingustavo 0:0dee8840a1c0 480 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
einsteingustavo 0:0dee8840a1c0 481 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
einsteingustavo 0:0dee8840a1c0 482 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
einsteingustavo 0:0dee8840a1c0 483 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
einsteingustavo 0:0dee8840a1c0 484
einsteingustavo 0:0dee8840a1c0 485 #ifdef __cplusplus
einsteingustavo 0:0dee8840a1c0 486 }
einsteingustavo 0:0dee8840a1c0 487 #endif
einsteingustavo 0:0dee8840a1c0 488
einsteingustavo 0:0dee8840a1c0 489 #endif /*__STM32F10x_SPI_H */
einsteingustavo 0:0dee8840a1c0 490 /**
einsteingustavo 0:0dee8840a1c0 491 * @}
einsteingustavo 0:0dee8840a1c0 492 */
einsteingustavo 0:0dee8840a1c0 493
einsteingustavo 0:0dee8840a1c0 494 /**
einsteingustavo 0:0dee8840a1c0 495 * @}
einsteingustavo 0:0dee8840a1c0 496 */
einsteingustavo 0:0dee8840a1c0 497
einsteingustavo 0:0dee8840a1c0 498 /**
einsteingustavo 0:0dee8840a1c0 499 * @}
einsteingustavo 0:0dee8840a1c0 500 */
einsteingustavo 0:0dee8840a1c0 501
einsteingustavo 0:0dee8840a1c0 502 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
einsteingustavo 0:0dee8840a1c0 503