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Mangue Baja Box

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mbed/TARGET_NUCLEO_F103RB/stm32f10x_dma.h@0:0dee8840a1c0, 2019-07-29 (annotated)

Committer:
einsteingustavo
Date:
Mon Jul 29 20:38:00 2019 +0000
Revision:
0:0dee8840a1c0
Mangue Baja Box

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einsteingustavo 0:0dee8840a1c0 1 /**
einsteingustavo 0:0dee8840a1c0 2 ******************************************************************************
einsteingustavo 0:0dee8840a1c0 3 * @file stm32f10x_dma.h
einsteingustavo 0:0dee8840a1c0 4 * @author MCD Application Team
einsteingustavo 0:0dee8840a1c0 5 * @version V3.6.1
einsteingustavo 0:0dee8840a1c0 6 * @date 05-March-2012
einsteingustavo 0:0dee8840a1c0 7 * @brief This file contains all the functions prototypes for the DMA firmware
einsteingustavo 0:0dee8840a1c0 8 * library.
einsteingustavo 0:0dee8840a1c0 9 *******************************************************************************
einsteingustavo 0:0dee8840a1c0 10 * Copyright (c) 2014, STMicroelectronics
einsteingustavo 0:0dee8840a1c0 11 * All rights reserved.
einsteingustavo 0:0dee8840a1c0 12 *
einsteingustavo 0:0dee8840a1c0 13 * Redistribution and use in source and binary forms, with or without
einsteingustavo 0:0dee8840a1c0 14 * modification, are permitted provided that the following conditions are met:
einsteingustavo 0:0dee8840a1c0 15 *
einsteingustavo 0:0dee8840a1c0 16 * 1. Redistributions of source code must retain the above copyright notice,
einsteingustavo 0:0dee8840a1c0 17 * this list of conditions and the following disclaimer.
einsteingustavo 0:0dee8840a1c0 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
einsteingustavo 0:0dee8840a1c0 19 * this list of conditions and the following disclaimer in the documentation
einsteingustavo 0:0dee8840a1c0 20 * and/or other materials provided with the distribution.
einsteingustavo 0:0dee8840a1c0 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
einsteingustavo 0:0dee8840a1c0 22 * may be used to endorse or promote products derived from this software
einsteingustavo 0:0dee8840a1c0 23 * without specific prior written permission.
einsteingustavo 0:0dee8840a1c0 24 *
einsteingustavo 0:0dee8840a1c0 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
einsteingustavo 0:0dee8840a1c0 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
einsteingustavo 0:0dee8840a1c0 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
einsteingustavo 0:0dee8840a1c0 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
einsteingustavo 0:0dee8840a1c0 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
einsteingustavo 0:0dee8840a1c0 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
einsteingustavo 0:0dee8840a1c0 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
einsteingustavo 0:0dee8840a1c0 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
einsteingustavo 0:0dee8840a1c0 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
einsteingustavo 0:0dee8840a1c0 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
einsteingustavo 0:0dee8840a1c0 35 *******************************************************************************
einsteingustavo 0:0dee8840a1c0 36 */
einsteingustavo 0:0dee8840a1c0 37
einsteingustavo 0:0dee8840a1c0 38 /* Define to prevent recursive inclusion -------------------------------------*/
einsteingustavo 0:0dee8840a1c0 39 #ifndef __STM32F10x_DMA_H
einsteingustavo 0:0dee8840a1c0 40 #define __STM32F10x_DMA_H
einsteingustavo 0:0dee8840a1c0 41
einsteingustavo 0:0dee8840a1c0 42 #ifdef __cplusplus
einsteingustavo 0:0dee8840a1c0 43 extern "C" {
einsteingustavo 0:0dee8840a1c0 44 #endif
einsteingustavo 0:0dee8840a1c0 45
einsteingustavo 0:0dee8840a1c0 46 /* Includes ------------------------------------------------------------------*/
einsteingustavo 0:0dee8840a1c0 47 #include "stm32f10x.h"
einsteingustavo 0:0dee8840a1c0 48
einsteingustavo 0:0dee8840a1c0 49 /** @addtogroup STM32F10x_StdPeriph_Driver
einsteingustavo 0:0dee8840a1c0 50 * @{
einsteingustavo 0:0dee8840a1c0 51 */
einsteingustavo 0:0dee8840a1c0 52
einsteingustavo 0:0dee8840a1c0 53 /** @addtogroup DMA
einsteingustavo 0:0dee8840a1c0 54 * @{
einsteingustavo 0:0dee8840a1c0 55 */
einsteingustavo 0:0dee8840a1c0 56
einsteingustavo 0:0dee8840a1c0 57 /** @defgroup DMA_Exported_Types
einsteingustavo 0:0dee8840a1c0 58 * @{
einsteingustavo 0:0dee8840a1c0 59 */
einsteingustavo 0:0dee8840a1c0 60
einsteingustavo 0:0dee8840a1c0 61 /**
einsteingustavo 0:0dee8840a1c0 62 * @brief DMA Init structure definition
einsteingustavo 0:0dee8840a1c0 63 */
einsteingustavo 0:0dee8840a1c0 64
einsteingustavo 0:0dee8840a1c0 65 typedef struct
einsteingustavo 0:0dee8840a1c0 66 {
einsteingustavo 0:0dee8840a1c0 67 uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */
einsteingustavo 0:0dee8840a1c0 68
einsteingustavo 0:0dee8840a1c0 69 uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */
einsteingustavo 0:0dee8840a1c0 70
einsteingustavo 0:0dee8840a1c0 71 uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.
einsteingustavo 0:0dee8840a1c0 72 This parameter can be a value of @ref DMA_data_transfer_direction */
einsteingustavo 0:0dee8840a1c0 73
einsteingustavo 0:0dee8840a1c0 74 uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel.
einsteingustavo 0:0dee8840a1c0 75 The data unit is equal to the configuration set in DMA_PeripheralDataSize
einsteingustavo 0:0dee8840a1c0 76 or DMA_MemoryDataSize members depending in the transfer direction. */
einsteingustavo 0:0dee8840a1c0 77
einsteingustavo 0:0dee8840a1c0 78 uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.
einsteingustavo 0:0dee8840a1c0 79 This parameter can be a value of @ref DMA_peripheral_incremented_mode */
einsteingustavo 0:0dee8840a1c0 80
einsteingustavo 0:0dee8840a1c0 81 uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.
einsteingustavo 0:0dee8840a1c0 82 This parameter can be a value of @ref DMA_memory_incremented_mode */
einsteingustavo 0:0dee8840a1c0 83
einsteingustavo 0:0dee8840a1c0 84 uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width.
einsteingustavo 0:0dee8840a1c0 85 This parameter can be a value of @ref DMA_peripheral_data_size */
einsteingustavo 0:0dee8840a1c0 86
einsteingustavo 0:0dee8840a1c0 87 uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width.
einsteingustavo 0:0dee8840a1c0 88 This parameter can be a value of @ref DMA_memory_data_size */
einsteingustavo 0:0dee8840a1c0 89
einsteingustavo 0:0dee8840a1c0 90 uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx.
einsteingustavo 0:0dee8840a1c0 91 This parameter can be a value of @ref DMA_circular_normal_mode.
einsteingustavo 0:0dee8840a1c0 92 @note: The circular buffer mode cannot be used if the memory-to-memory
einsteingustavo 0:0dee8840a1c0 93 data transfer is configured on the selected Channel */
einsteingustavo 0:0dee8840a1c0 94
einsteingustavo 0:0dee8840a1c0 95 uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.
einsteingustavo 0:0dee8840a1c0 96 This parameter can be a value of @ref DMA_priority_level */
einsteingustavo 0:0dee8840a1c0 97
einsteingustavo 0:0dee8840a1c0 98 uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer.
einsteingustavo 0:0dee8840a1c0 99 This parameter can be a value of @ref DMA_memory_to_memory */
einsteingustavo 0:0dee8840a1c0 100 }DMA_InitTypeDef;
einsteingustavo 0:0dee8840a1c0 101
einsteingustavo 0:0dee8840a1c0 102 /**
einsteingustavo 0:0dee8840a1c0 103 * @}
einsteingustavo 0:0dee8840a1c0 104 */
einsteingustavo 0:0dee8840a1c0 105
einsteingustavo 0:0dee8840a1c0 106 /** @defgroup DMA_Exported_Constants
einsteingustavo 0:0dee8840a1c0 107 * @{
einsteingustavo 0:0dee8840a1c0 108 */
einsteingustavo 0:0dee8840a1c0 109
einsteingustavo 0:0dee8840a1c0 110 #define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \
einsteingustavo 0:0dee8840a1c0 111 ((PERIPH) == DMA1_Channel2) || \
einsteingustavo 0:0dee8840a1c0 112 ((PERIPH) == DMA1_Channel3) || \
einsteingustavo 0:0dee8840a1c0 113 ((PERIPH) == DMA1_Channel4) || \
einsteingustavo 0:0dee8840a1c0 114 ((PERIPH) == DMA1_Channel5) || \
einsteingustavo 0:0dee8840a1c0 115 ((PERIPH) == DMA1_Channel6) || \
einsteingustavo 0:0dee8840a1c0 116 ((PERIPH) == DMA1_Channel7) || \
einsteingustavo 0:0dee8840a1c0 117 ((PERIPH) == DMA2_Channel1) || \
einsteingustavo 0:0dee8840a1c0 118 ((PERIPH) == DMA2_Channel2) || \
einsteingustavo 0:0dee8840a1c0 119 ((PERIPH) == DMA2_Channel3) || \
einsteingustavo 0:0dee8840a1c0 120 ((PERIPH) == DMA2_Channel4) || \
einsteingustavo 0:0dee8840a1c0 121 ((PERIPH) == DMA2_Channel5))
einsteingustavo 0:0dee8840a1c0 122
einsteingustavo 0:0dee8840a1c0 123 /** @defgroup DMA_data_transfer_direction
einsteingustavo 0:0dee8840a1c0 124 * @{
einsteingustavo 0:0dee8840a1c0 125 */
einsteingustavo 0:0dee8840a1c0 126
einsteingustavo 0:0dee8840a1c0 127 #define DMA_DIR_PeripheralDST ((uint32_t)0x00000010)
einsteingustavo 0:0dee8840a1c0 128 #define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 129 #define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \
einsteingustavo 0:0dee8840a1c0 130 ((DIR) == DMA_DIR_PeripheralSRC))
einsteingustavo 0:0dee8840a1c0 131 /**
einsteingustavo 0:0dee8840a1c0 132 * @}
einsteingustavo 0:0dee8840a1c0 133 */
einsteingustavo 0:0dee8840a1c0 134
einsteingustavo 0:0dee8840a1c0 135 /** @defgroup DMA_peripheral_incremented_mode
einsteingustavo 0:0dee8840a1c0 136 * @{
einsteingustavo 0:0dee8840a1c0 137 */
einsteingustavo 0:0dee8840a1c0 138
einsteingustavo 0:0dee8840a1c0 139 #define DMA_PeripheralInc_Enable ((uint32_t)0x00000040)
einsteingustavo 0:0dee8840a1c0 140 #define DMA_PeripheralInc_Disable ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 141 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \
einsteingustavo 0:0dee8840a1c0 142 ((STATE) == DMA_PeripheralInc_Disable))
einsteingustavo 0:0dee8840a1c0 143 /**
einsteingustavo 0:0dee8840a1c0 144 * @}
einsteingustavo 0:0dee8840a1c0 145 */
einsteingustavo 0:0dee8840a1c0 146
einsteingustavo 0:0dee8840a1c0 147 /** @defgroup DMA_memory_incremented_mode
einsteingustavo 0:0dee8840a1c0 148 * @{
einsteingustavo 0:0dee8840a1c0 149 */
einsteingustavo 0:0dee8840a1c0 150
einsteingustavo 0:0dee8840a1c0 151 #define DMA_MemoryInc_Enable ((uint32_t)0x00000080)
einsteingustavo 0:0dee8840a1c0 152 #define DMA_MemoryInc_Disable ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 153 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \
einsteingustavo 0:0dee8840a1c0 154 ((STATE) == DMA_MemoryInc_Disable))
einsteingustavo 0:0dee8840a1c0 155 /**
einsteingustavo 0:0dee8840a1c0 156 * @}
einsteingustavo 0:0dee8840a1c0 157 */
einsteingustavo 0:0dee8840a1c0 158
einsteingustavo 0:0dee8840a1c0 159 /** @defgroup DMA_peripheral_data_size
einsteingustavo 0:0dee8840a1c0 160 * @{
einsteingustavo 0:0dee8840a1c0 161 */
einsteingustavo 0:0dee8840a1c0 162
einsteingustavo 0:0dee8840a1c0 163 #define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 164 #define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)
einsteingustavo 0:0dee8840a1c0 165 #define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)
einsteingustavo 0:0dee8840a1c0 166 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \
einsteingustavo 0:0dee8840a1c0 167 ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \
einsteingustavo 0:0dee8840a1c0 168 ((SIZE) == DMA_PeripheralDataSize_Word))
einsteingustavo 0:0dee8840a1c0 169 /**
einsteingustavo 0:0dee8840a1c0 170 * @}
einsteingustavo 0:0dee8840a1c0 171 */
einsteingustavo 0:0dee8840a1c0 172
einsteingustavo 0:0dee8840a1c0 173 /** @defgroup DMA_memory_data_size
einsteingustavo 0:0dee8840a1c0 174 * @{
einsteingustavo 0:0dee8840a1c0 175 */
einsteingustavo 0:0dee8840a1c0 176
einsteingustavo 0:0dee8840a1c0 177 #define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 178 #define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)
einsteingustavo 0:0dee8840a1c0 179 #define DMA_MemoryDataSize_Word ((uint32_t)0x00000800)
einsteingustavo 0:0dee8840a1c0 180 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \
einsteingustavo 0:0dee8840a1c0 181 ((SIZE) == DMA_MemoryDataSize_HalfWord) || \
einsteingustavo 0:0dee8840a1c0 182 ((SIZE) == DMA_MemoryDataSize_Word))
einsteingustavo 0:0dee8840a1c0 183 /**
einsteingustavo 0:0dee8840a1c0 184 * @}
einsteingustavo 0:0dee8840a1c0 185 */
einsteingustavo 0:0dee8840a1c0 186
einsteingustavo 0:0dee8840a1c0 187 /** @defgroup DMA_circular_normal_mode
einsteingustavo 0:0dee8840a1c0 188 * @{
einsteingustavo 0:0dee8840a1c0 189 */
einsteingustavo 0:0dee8840a1c0 190
einsteingustavo 0:0dee8840a1c0 191 #define DMA_Mode_Circular ((uint32_t)0x00000020)
einsteingustavo 0:0dee8840a1c0 192 #define DMA_Mode_Normal ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 193 #define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))
einsteingustavo 0:0dee8840a1c0 194 /**
einsteingustavo 0:0dee8840a1c0 195 * @}
einsteingustavo 0:0dee8840a1c0 196 */
einsteingustavo 0:0dee8840a1c0 197
einsteingustavo 0:0dee8840a1c0 198 /** @defgroup DMA_priority_level
einsteingustavo 0:0dee8840a1c0 199 * @{
einsteingustavo 0:0dee8840a1c0 200 */
einsteingustavo 0:0dee8840a1c0 201
einsteingustavo 0:0dee8840a1c0 202 #define DMA_Priority_VeryHigh ((uint32_t)0x00003000)
einsteingustavo 0:0dee8840a1c0 203 #define DMA_Priority_High ((uint32_t)0x00002000)
einsteingustavo 0:0dee8840a1c0 204 #define DMA_Priority_Medium ((uint32_t)0x00001000)
einsteingustavo 0:0dee8840a1c0 205 #define DMA_Priority_Low ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 206 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \
einsteingustavo 0:0dee8840a1c0 207 ((PRIORITY) == DMA_Priority_High) || \
einsteingustavo 0:0dee8840a1c0 208 ((PRIORITY) == DMA_Priority_Medium) || \
einsteingustavo 0:0dee8840a1c0 209 ((PRIORITY) == DMA_Priority_Low))
einsteingustavo 0:0dee8840a1c0 210 /**
einsteingustavo 0:0dee8840a1c0 211 * @}
einsteingustavo 0:0dee8840a1c0 212 */
einsteingustavo 0:0dee8840a1c0 213
einsteingustavo 0:0dee8840a1c0 214 /** @defgroup DMA_memory_to_memory
einsteingustavo 0:0dee8840a1c0 215 * @{
einsteingustavo 0:0dee8840a1c0 216 */
einsteingustavo 0:0dee8840a1c0 217
einsteingustavo 0:0dee8840a1c0 218 #define DMA_M2M_Enable ((uint32_t)0x00004000)
einsteingustavo 0:0dee8840a1c0 219 #define DMA_M2M_Disable ((uint32_t)0x00000000)
einsteingustavo 0:0dee8840a1c0 220 #define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))
einsteingustavo 0:0dee8840a1c0 221
einsteingustavo 0:0dee8840a1c0 222 /**
einsteingustavo 0:0dee8840a1c0 223 * @}
einsteingustavo 0:0dee8840a1c0 224 */
einsteingustavo 0:0dee8840a1c0 225
einsteingustavo 0:0dee8840a1c0 226 /** @defgroup DMA_interrupts_definition
einsteingustavo 0:0dee8840a1c0 227 * @{
einsteingustavo 0:0dee8840a1c0 228 */
einsteingustavo 0:0dee8840a1c0 229
einsteingustavo 0:0dee8840a1c0 230 #define DMA_IT_TC ((uint32_t)0x00000002)
einsteingustavo 0:0dee8840a1c0 231 #define DMA_IT_HT ((uint32_t)0x00000004)
einsteingustavo 0:0dee8840a1c0 232 #define DMA_IT_TE ((uint32_t)0x00000008)
einsteingustavo 0:0dee8840a1c0 233 #define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))
einsteingustavo 0:0dee8840a1c0 234
einsteingustavo 0:0dee8840a1c0 235 #define DMA1_IT_GL1 ((uint32_t)0x00000001)
einsteingustavo 0:0dee8840a1c0 236 #define DMA1_IT_TC1 ((uint32_t)0x00000002)
einsteingustavo 0:0dee8840a1c0 237 #define DMA1_IT_HT1 ((uint32_t)0x00000004)
einsteingustavo 0:0dee8840a1c0 238 #define DMA1_IT_TE1 ((uint32_t)0x00000008)
einsteingustavo 0:0dee8840a1c0 239 #define DMA1_IT_GL2 ((uint32_t)0x00000010)
einsteingustavo 0:0dee8840a1c0 240 #define DMA1_IT_TC2 ((uint32_t)0x00000020)
einsteingustavo 0:0dee8840a1c0 241 #define DMA1_IT_HT2 ((uint32_t)0x00000040)
einsteingustavo 0:0dee8840a1c0 242 #define DMA1_IT_TE2 ((uint32_t)0x00000080)
einsteingustavo 0:0dee8840a1c0 243 #define DMA1_IT_GL3 ((uint32_t)0x00000100)
einsteingustavo 0:0dee8840a1c0 244 #define DMA1_IT_TC3 ((uint32_t)0x00000200)
einsteingustavo 0:0dee8840a1c0 245 #define DMA1_IT_HT3 ((uint32_t)0x00000400)
einsteingustavo 0:0dee8840a1c0 246 #define DMA1_IT_TE3 ((uint32_t)0x00000800)
einsteingustavo 0:0dee8840a1c0 247 #define DMA1_IT_GL4 ((uint32_t)0x00001000)
einsteingustavo 0:0dee8840a1c0 248 #define DMA1_IT_TC4 ((uint32_t)0x00002000)
einsteingustavo 0:0dee8840a1c0 249 #define DMA1_IT_HT4 ((uint32_t)0x00004000)
einsteingustavo 0:0dee8840a1c0 250 #define DMA1_IT_TE4 ((uint32_t)0x00008000)
einsteingustavo 0:0dee8840a1c0 251 #define DMA1_IT_GL5 ((uint32_t)0x00010000)
einsteingustavo 0:0dee8840a1c0 252 #define DMA1_IT_TC5 ((uint32_t)0x00020000)
einsteingustavo 0:0dee8840a1c0 253 #define DMA1_IT_HT5 ((uint32_t)0x00040000)
einsteingustavo 0:0dee8840a1c0 254 #define DMA1_IT_TE5 ((uint32_t)0x00080000)
einsteingustavo 0:0dee8840a1c0 255 #define DMA1_IT_GL6 ((uint32_t)0x00100000)
einsteingustavo 0:0dee8840a1c0 256 #define DMA1_IT_TC6 ((uint32_t)0x00200000)
einsteingustavo 0:0dee8840a1c0 257 #define DMA1_IT_HT6 ((uint32_t)0x00400000)
einsteingustavo 0:0dee8840a1c0 258 #define DMA1_IT_TE6 ((uint32_t)0x00800000)
einsteingustavo 0:0dee8840a1c0 259 #define DMA1_IT_GL7 ((uint32_t)0x01000000)
einsteingustavo 0:0dee8840a1c0 260 #define DMA1_IT_TC7 ((uint32_t)0x02000000)
einsteingustavo 0:0dee8840a1c0 261 #define DMA1_IT_HT7 ((uint32_t)0x04000000)
einsteingustavo 0:0dee8840a1c0 262 #define DMA1_IT_TE7 ((uint32_t)0x08000000)
einsteingustavo 0:0dee8840a1c0 263
einsteingustavo 0:0dee8840a1c0 264 #define DMA2_IT_GL1 ((uint32_t)0x10000001)
einsteingustavo 0:0dee8840a1c0 265 #define DMA2_IT_TC1 ((uint32_t)0x10000002)
einsteingustavo 0:0dee8840a1c0 266 #define DMA2_IT_HT1 ((uint32_t)0x10000004)
einsteingustavo 0:0dee8840a1c0 267 #define DMA2_IT_TE1 ((uint32_t)0x10000008)
einsteingustavo 0:0dee8840a1c0 268 #define DMA2_IT_GL2 ((uint32_t)0x10000010)
einsteingustavo 0:0dee8840a1c0 269 #define DMA2_IT_TC2 ((uint32_t)0x10000020)
einsteingustavo 0:0dee8840a1c0 270 #define DMA2_IT_HT2 ((uint32_t)0x10000040)
einsteingustavo 0:0dee8840a1c0 271 #define DMA2_IT_TE2 ((uint32_t)0x10000080)
einsteingustavo 0:0dee8840a1c0 272 #define DMA2_IT_GL3 ((uint32_t)0x10000100)
einsteingustavo 0:0dee8840a1c0 273 #define DMA2_IT_TC3 ((uint32_t)0x10000200)
einsteingustavo 0:0dee8840a1c0 274 #define DMA2_IT_HT3 ((uint32_t)0x10000400)
einsteingustavo 0:0dee8840a1c0 275 #define DMA2_IT_TE3 ((uint32_t)0x10000800)
einsteingustavo 0:0dee8840a1c0 276 #define DMA2_IT_GL4 ((uint32_t)0x10001000)
einsteingustavo 0:0dee8840a1c0 277 #define DMA2_IT_TC4 ((uint32_t)0x10002000)
einsteingustavo 0:0dee8840a1c0 278 #define DMA2_IT_HT4 ((uint32_t)0x10004000)
einsteingustavo 0:0dee8840a1c0 279 #define DMA2_IT_TE4 ((uint32_t)0x10008000)
einsteingustavo 0:0dee8840a1c0 280 #define DMA2_IT_GL5 ((uint32_t)0x10010000)
einsteingustavo 0:0dee8840a1c0 281 #define DMA2_IT_TC5 ((uint32_t)0x10020000)
einsteingustavo 0:0dee8840a1c0 282 #define DMA2_IT_HT5 ((uint32_t)0x10040000)
einsteingustavo 0:0dee8840a1c0 283 #define DMA2_IT_TE5 ((uint32_t)0x10080000)
einsteingustavo 0:0dee8840a1c0 284
einsteingustavo 0:0dee8840a1c0 285 #define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))
einsteingustavo 0:0dee8840a1c0 286
einsteingustavo 0:0dee8840a1c0 287 #define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \
einsteingustavo 0:0dee8840a1c0 288 ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \
einsteingustavo 0:0dee8840a1c0 289 ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \
einsteingustavo 0:0dee8840a1c0 290 ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \
einsteingustavo 0:0dee8840a1c0 291 ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \
einsteingustavo 0:0dee8840a1c0 292 ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \
einsteingustavo 0:0dee8840a1c0 293 ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \
einsteingustavo 0:0dee8840a1c0 294 ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \
einsteingustavo 0:0dee8840a1c0 295 ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \
einsteingustavo 0:0dee8840a1c0 296 ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \
einsteingustavo 0:0dee8840a1c0 297 ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \
einsteingustavo 0:0dee8840a1c0 298 ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \
einsteingustavo 0:0dee8840a1c0 299 ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \
einsteingustavo 0:0dee8840a1c0 300 ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \
einsteingustavo 0:0dee8840a1c0 301 ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \
einsteingustavo 0:0dee8840a1c0 302 ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \
einsteingustavo 0:0dee8840a1c0 303 ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \
einsteingustavo 0:0dee8840a1c0 304 ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \
einsteingustavo 0:0dee8840a1c0 305 ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \
einsteingustavo 0:0dee8840a1c0 306 ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \
einsteingustavo 0:0dee8840a1c0 307 ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \
einsteingustavo 0:0dee8840a1c0 308 ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \
einsteingustavo 0:0dee8840a1c0 309 ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \
einsteingustavo 0:0dee8840a1c0 310 ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5))
einsteingustavo 0:0dee8840a1c0 311
einsteingustavo 0:0dee8840a1c0 312 /**
einsteingustavo 0:0dee8840a1c0 313 * @}
einsteingustavo 0:0dee8840a1c0 314 */
einsteingustavo 0:0dee8840a1c0 315
einsteingustavo 0:0dee8840a1c0 316 /** @defgroup DMA_flags_definition
einsteingustavo 0:0dee8840a1c0 317 * @{
einsteingustavo 0:0dee8840a1c0 318 */
einsteingustavo 0:0dee8840a1c0 319 #define DMA1_FLAG_GL1 ((uint32_t)0x00000001)
einsteingustavo 0:0dee8840a1c0 320 #define DMA1_FLAG_TC1 ((uint32_t)0x00000002)
einsteingustavo 0:0dee8840a1c0 321 #define DMA1_FLAG_HT1 ((uint32_t)0x00000004)
einsteingustavo 0:0dee8840a1c0 322 #define DMA1_FLAG_TE1 ((uint32_t)0x00000008)
einsteingustavo 0:0dee8840a1c0 323 #define DMA1_FLAG_GL2 ((uint32_t)0x00000010)
einsteingustavo 0:0dee8840a1c0 324 #define DMA1_FLAG_TC2 ((uint32_t)0x00000020)
einsteingustavo 0:0dee8840a1c0 325 #define DMA1_FLAG_HT2 ((uint32_t)0x00000040)
einsteingustavo 0:0dee8840a1c0 326 #define DMA1_FLAG_TE2 ((uint32_t)0x00000080)
einsteingustavo 0:0dee8840a1c0 327 #define DMA1_FLAG_GL3 ((uint32_t)0x00000100)
einsteingustavo 0:0dee8840a1c0 328 #define DMA1_FLAG_TC3 ((uint32_t)0x00000200)
einsteingustavo 0:0dee8840a1c0 329 #define DMA1_FLAG_HT3 ((uint32_t)0x00000400)
einsteingustavo 0:0dee8840a1c0 330 #define DMA1_FLAG_TE3 ((uint32_t)0x00000800)
einsteingustavo 0:0dee8840a1c0 331 #define DMA1_FLAG_GL4 ((uint32_t)0x00001000)
einsteingustavo 0:0dee8840a1c0 332 #define DMA1_FLAG_TC4 ((uint32_t)0x00002000)
einsteingustavo 0:0dee8840a1c0 333 #define DMA1_FLAG_HT4 ((uint32_t)0x00004000)
einsteingustavo 0:0dee8840a1c0 334 #define DMA1_FLAG_TE4 ((uint32_t)0x00008000)
einsteingustavo 0:0dee8840a1c0 335 #define DMA1_FLAG_GL5 ((uint32_t)0x00010000)
einsteingustavo 0:0dee8840a1c0 336 #define DMA1_FLAG_TC5 ((uint32_t)0x00020000)
einsteingustavo 0:0dee8840a1c0 337 #define DMA1_FLAG_HT5 ((uint32_t)0x00040000)
einsteingustavo 0:0dee8840a1c0 338 #define DMA1_FLAG_TE5 ((uint32_t)0x00080000)
einsteingustavo 0:0dee8840a1c0 339 #define DMA1_FLAG_GL6 ((uint32_t)0x00100000)
einsteingustavo 0:0dee8840a1c0 340 #define DMA1_FLAG_TC6 ((uint32_t)0x00200000)
einsteingustavo 0:0dee8840a1c0 341 #define DMA1_FLAG_HT6 ((uint32_t)0x00400000)
einsteingustavo 0:0dee8840a1c0 342 #define DMA1_FLAG_TE6 ((uint32_t)0x00800000)
einsteingustavo 0:0dee8840a1c0 343 #define DMA1_FLAG_GL7 ((uint32_t)0x01000000)
einsteingustavo 0:0dee8840a1c0 344 #define DMA1_FLAG_TC7 ((uint32_t)0x02000000)
einsteingustavo 0:0dee8840a1c0 345 #define DMA1_FLAG_HT7 ((uint32_t)0x04000000)
einsteingustavo 0:0dee8840a1c0 346 #define DMA1_FLAG_TE7 ((uint32_t)0x08000000)
einsteingustavo 0:0dee8840a1c0 347
einsteingustavo 0:0dee8840a1c0 348 #define DMA2_FLAG_GL1 ((uint32_t)0x10000001)
einsteingustavo 0:0dee8840a1c0 349 #define DMA2_FLAG_TC1 ((uint32_t)0x10000002)
einsteingustavo 0:0dee8840a1c0 350 #define DMA2_FLAG_HT1 ((uint32_t)0x10000004)
einsteingustavo 0:0dee8840a1c0 351 #define DMA2_FLAG_TE1 ((uint32_t)0x10000008)
einsteingustavo 0:0dee8840a1c0 352 #define DMA2_FLAG_GL2 ((uint32_t)0x10000010)
einsteingustavo 0:0dee8840a1c0 353 #define DMA2_FLAG_TC2 ((uint32_t)0x10000020)
einsteingustavo 0:0dee8840a1c0 354 #define DMA2_FLAG_HT2 ((uint32_t)0x10000040)
einsteingustavo 0:0dee8840a1c0 355 #define DMA2_FLAG_TE2 ((uint32_t)0x10000080)
einsteingustavo 0:0dee8840a1c0 356 #define DMA2_FLAG_GL3 ((uint32_t)0x10000100)
einsteingustavo 0:0dee8840a1c0 357 #define DMA2_FLAG_TC3 ((uint32_t)0x10000200)
einsteingustavo 0:0dee8840a1c0 358 #define DMA2_FLAG_HT3 ((uint32_t)0x10000400)
einsteingustavo 0:0dee8840a1c0 359 #define DMA2_FLAG_TE3 ((uint32_t)0x10000800)
einsteingustavo 0:0dee8840a1c0 360 #define DMA2_FLAG_GL4 ((uint32_t)0x10001000)
einsteingustavo 0:0dee8840a1c0 361 #define DMA2_FLAG_TC4 ((uint32_t)0x10002000)
einsteingustavo 0:0dee8840a1c0 362 #define DMA2_FLAG_HT4 ((uint32_t)0x10004000)
einsteingustavo 0:0dee8840a1c0 363 #define DMA2_FLAG_TE4 ((uint32_t)0x10008000)
einsteingustavo 0:0dee8840a1c0 364 #define DMA2_FLAG_GL5 ((uint32_t)0x10010000)
einsteingustavo 0:0dee8840a1c0 365 #define DMA2_FLAG_TC5 ((uint32_t)0x10020000)
einsteingustavo 0:0dee8840a1c0 366 #define DMA2_FLAG_HT5 ((uint32_t)0x10040000)
einsteingustavo 0:0dee8840a1c0 367 #define DMA2_FLAG_TE5 ((uint32_t)0x10080000)
einsteingustavo 0:0dee8840a1c0 368
einsteingustavo 0:0dee8840a1c0 369 #define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))
einsteingustavo 0:0dee8840a1c0 370
einsteingustavo 0:0dee8840a1c0 371 #define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \
einsteingustavo 0:0dee8840a1c0 372 ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \
einsteingustavo 0:0dee8840a1c0 373 ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \
einsteingustavo 0:0dee8840a1c0 374 ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \
einsteingustavo 0:0dee8840a1c0 375 ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \
einsteingustavo 0:0dee8840a1c0 376 ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \
einsteingustavo 0:0dee8840a1c0 377 ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \
einsteingustavo 0:0dee8840a1c0 378 ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \
einsteingustavo 0:0dee8840a1c0 379 ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \
einsteingustavo 0:0dee8840a1c0 380 ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \
einsteingustavo 0:0dee8840a1c0 381 ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \
einsteingustavo 0:0dee8840a1c0 382 ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \
einsteingustavo 0:0dee8840a1c0 383 ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \
einsteingustavo 0:0dee8840a1c0 384 ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \
einsteingustavo 0:0dee8840a1c0 385 ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \
einsteingustavo 0:0dee8840a1c0 386 ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \
einsteingustavo 0:0dee8840a1c0 387 ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \
einsteingustavo 0:0dee8840a1c0 388 ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \
einsteingustavo 0:0dee8840a1c0 389 ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \
einsteingustavo 0:0dee8840a1c0 390 ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \
einsteingustavo 0:0dee8840a1c0 391 ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \
einsteingustavo 0:0dee8840a1c0 392 ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \
einsteingustavo 0:0dee8840a1c0 393 ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \
einsteingustavo 0:0dee8840a1c0 394 ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5))
einsteingustavo 0:0dee8840a1c0 395 /**
einsteingustavo 0:0dee8840a1c0 396 * @}
einsteingustavo 0:0dee8840a1c0 397 */
einsteingustavo 0:0dee8840a1c0 398
einsteingustavo 0:0dee8840a1c0 399 /** @defgroup DMA_Buffer_Size
einsteingustavo 0:0dee8840a1c0 400 * @{
einsteingustavo 0:0dee8840a1c0 401 */
einsteingustavo 0:0dee8840a1c0 402
einsteingustavo 0:0dee8840a1c0 403 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
einsteingustavo 0:0dee8840a1c0 404
einsteingustavo 0:0dee8840a1c0 405 /**
einsteingustavo 0:0dee8840a1c0 406 * @}
einsteingustavo 0:0dee8840a1c0 407 */
einsteingustavo 0:0dee8840a1c0 408
einsteingustavo 0:0dee8840a1c0 409 /**
einsteingustavo 0:0dee8840a1c0 410 * @}
einsteingustavo 0:0dee8840a1c0 411 */
einsteingustavo 0:0dee8840a1c0 412
einsteingustavo 0:0dee8840a1c0 413 /** @defgroup DMA_Exported_Macros
einsteingustavo 0:0dee8840a1c0 414 * @{
einsteingustavo 0:0dee8840a1c0 415 */
einsteingustavo 0:0dee8840a1c0 416
einsteingustavo 0:0dee8840a1c0 417 /**
einsteingustavo 0:0dee8840a1c0 418 * @}
einsteingustavo 0:0dee8840a1c0 419 */
einsteingustavo 0:0dee8840a1c0 420
einsteingustavo 0:0dee8840a1c0 421 /** @defgroup DMA_Exported_Functions
einsteingustavo 0:0dee8840a1c0 422 * @{
einsteingustavo 0:0dee8840a1c0 423 */
einsteingustavo 0:0dee8840a1c0 424
einsteingustavo 0:0dee8840a1c0 425 void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);
einsteingustavo 0:0dee8840a1c0 426 void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);
einsteingustavo 0:0dee8840a1c0 427 void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
einsteingustavo 0:0dee8840a1c0 428 void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 429 void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
einsteingustavo 0:0dee8840a1c0 430 void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);
einsteingustavo 0:0dee8840a1c0 431 uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);
einsteingustavo 0:0dee8840a1c0 432 FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG);
einsteingustavo 0:0dee8840a1c0 433 void DMA_ClearFlag(uint32_t DMAy_FLAG);
einsteingustavo 0:0dee8840a1c0 434 ITStatus DMA_GetITStatus(uint32_t DMAy_IT);
einsteingustavo 0:0dee8840a1c0 435 void DMA_ClearITPendingBit(uint32_t DMAy_IT);
einsteingustavo 0:0dee8840a1c0 436
einsteingustavo 0:0dee8840a1c0 437 #ifdef __cplusplus
einsteingustavo 0:0dee8840a1c0 438 }
einsteingustavo 0:0dee8840a1c0 439 #endif
einsteingustavo 0:0dee8840a1c0 440
einsteingustavo 0:0dee8840a1c0 441 #endif /*__STM32F10x_DMA_H */
einsteingustavo 0:0dee8840a1c0 442 /**
einsteingustavo 0:0dee8840a1c0 443 * @}
einsteingustavo 0:0dee8840a1c0 444 */
einsteingustavo 0:0dee8840a1c0 445
einsteingustavo 0:0dee8840a1c0 446 /**
einsteingustavo 0:0dee8840a1c0 447 * @}
einsteingustavo 0:0dee8840a1c0 448 */
einsteingustavo 0:0dee8840a1c0 449
einsteingustavo 0:0dee8840a1c0 450 /**
einsteingustavo 0:0dee8840a1c0 451 * @}
einsteingustavo 0:0dee8840a1c0 452 */
einsteingustavo 0:0dee8840a1c0 453
einsteingustavo 0:0dee8840a1c0 454 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
einsteingustavo 0:0dee8840a1c0 455