Fabian Hiernaux
/
iap_C_library
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iap.c@0:ccbc7d2943fc, 2011-11-28 (annotated)
- Committer:
- efhache
- Date:
- Mon Nov 28 11:40:30 2011 +0000
- Revision:
- 0:ccbc7d2943fc
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| efhache | 0:ccbc7d2943fc | 1 | /****************************************************/ |
| efhache | 0:ccbc7d2943fc | 2 | /* IAP Library for LPC1768 */ |
| efhache | 0:ccbc7d2943fc | 3 | /* Target MCU : NXP LPC1768 (ARM Cortex M3) */ |
| efhache | 0:ccbc7d2943fc | 4 | /* : OSC : 12 MHz */ |
| efhache | 0:ccbc7d2943fc | 5 | /* Create By : fhn */ |
| efhache | 0:ccbc7d2943fc | 6 | /* created : 28 november 2011 */ |
| efhache | 0:ccbc7d2943fc | 7 | /* Function : code for using IAP / read SN */ |
| efhache | 0:ccbc7d2943fc | 8 | /* and write data into flash */ |
| efhache | 0:ccbc7d2943fc | 9 | /****************************************************/ |
| efhache | 0:ccbc7d2943fc | 10 | #include <stdio.h> |
| efhache | 0:ccbc7d2943fc | 11 | #include "iap.h" |
| efhache | 0:ccbc7d2943fc | 12 | |
| efhache | 0:ccbc7d2943fc | 13 | |
| efhache | 0:ccbc7d2943fc | 14 | void iap_entry(unsigned param_tab[],unsigned result_tab[]) |
| efhache | 0:ccbc7d2943fc | 15 | { |
| efhache | 0:ccbc7d2943fc | 16 | void (*iap)(unsigned [],unsigned []); |
| efhache | 0:ccbc7d2943fc | 17 | iap = (void (*)(unsigned [],unsigned []))IAP_ADDRESS; |
| efhache | 0:ccbc7d2943fc | 18 | iap(param_tab,result_tab); |
| efhache | 0:ccbc7d2943fc | 19 | } |
| efhache | 0:ccbc7d2943fc | 20 | |
| efhache | 0:ccbc7d2943fc | 21 | void read_serial_number(void) //read serial via IAP |
| efhache | 0:ccbc7d2943fc | 22 | { |
| efhache | 0:ccbc7d2943fc | 23 | char tmpbuf[256]; |
| efhache | 0:ccbc7d2943fc | 24 | |
| efhache | 0:ccbc7d2943fc | 25 | param_table[0] = 54; //IAP command |
| efhache | 0:ccbc7d2943fc | 26 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 27 | if(iap_return.ReturnCode ==0) //return: CODE SUCCESS |
| efhache | 0:ccbc7d2943fc | 28 | { |
| efhache | 0:ccbc7d2943fc | 29 | printf("Part ID Number:"); |
| efhache | 0:ccbc7d2943fc | 30 | sprintf(tmpbuf, "%08X",iap_return.Result[0]); |
| efhache | 0:ccbc7d2943fc | 31 | printf(tmpbuf); |
| efhache | 0:ccbc7d2943fc | 32 | } |
| efhache | 0:ccbc7d2943fc | 33 | else |
| efhache | 0:ccbc7d2943fc | 34 | { |
| efhache | 0:ccbc7d2943fc | 35 | //printf("Sorry, CPU Part Identification Number Read Error\n"); |
| efhache | 0:ccbc7d2943fc | 36 | printf("Sorry, Read Error"); |
| efhache | 0:ccbc7d2943fc | 37 | } |
| efhache | 0:ccbc7d2943fc | 38 | param_table[0] = 58; //IAP command |
| efhache | 0:ccbc7d2943fc | 39 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 40 | if(iap_return.ReturnCode ==0) //return: CODE SUCCESS |
| efhache | 0:ccbc7d2943fc | 41 | { |
| efhache | 0:ccbc7d2943fc | 42 | printf("Serial Number:"); |
| efhache | 0:ccbc7d2943fc | 43 | sprintf(tmpbuf,"%08X %08X",iap_return.Result[0],iap_return.Result[1]); |
| efhache | 0:ccbc7d2943fc | 44 | printf(tmpbu); |
| efhache | 0:ccbc7d2943fc | 45 | sprintf(tmpbuf,"%08X %08X",iap_return.Result[2],iap_return.Result[3]); |
| efhache | 0:ccbc7d2943fc | 46 | printf(tmpbuf); |
| efhache | 0:ccbc7d2943fc | 47 | } |
| efhache | 0:ccbc7d2943fc | 48 | else |
| efhache | 0:ccbc7d2943fc | 49 | { |
| efhache | 0:ccbc7d2943fc | 50 | printf("Sorry, CPU Serial Number Read Error\n"); |
| efhache | 0:ccbc7d2943fc | 51 | } |
| efhache | 0:ccbc7d2943fc | 52 | } |
| efhache | 0:ccbc7d2943fc | 53 | |
| efhache | 0:ccbc7d2943fc | 54 | |
| efhache | 0:ccbc7d2943fc | 55 | void blank_check_sector(int start, int end) |
| efhache | 0:ccbc7d2943fc | 56 | { |
| efhache | 0:ccbc7d2943fc | 57 | param_table[0] = 53; //5310 command code |
| efhache | 0:ccbc7d2943fc | 58 | param_table[1] = (unsigned int) start; // start Sector Number |
| efhache | 0:ccbc7d2943fc | 59 | param_table[2] = (unsigned int) end; // end sector number - should be equal or greater than start |
| efhache | 0:ccbc7d2943fc | 60 | |
| efhache | 0:ccbc7d2943fc | 61 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 62 | } |
| efhache | 0:ccbc7d2943fc | 63 | |
| efhache | 0:ccbc7d2943fc | 64 | void erase_block_sector(int start, int end) |
| efhache | 0:ccbc7d2943fc | 65 | { |
| efhache | 0:ccbc7d2943fc | 66 | param_table[0] = 52; //5210 command code |
| efhache | 0:ccbc7d2943fc | 67 | param_table[1] = (unsigned int) start; // start Sector Number |
| efhache | 0:ccbc7d2943fc | 68 | param_table[2] = (unsigned int) end; // end sector number - should be equal or greater than start |
| efhache | 0:ccbc7d2943fc | 69 | param_table[3] = 72000; // cclk 72 MHz |
| efhache | 0:ccbc7d2943fc | 70 | |
| efhache | 0:ccbc7d2943fc | 71 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 72 | } |
| efhache | 0:ccbc7d2943fc | 73 | |
| efhache | 0:ccbc7d2943fc | 74 | void prepare_write_block_sector(int start, int end) |
| efhache | 0:ccbc7d2943fc | 75 | { |
| efhache | 0:ccbc7d2943fc | 76 | param_table[0] = 50; //5210 command code |
| efhache | 0:ccbc7d2943fc | 77 | param_table[1] = (unsigned int) start; // start Sector Number |
| efhache | 0:ccbc7d2943fc | 78 | param_table[2] = (unsigned int) end; // end sector number - should be equal or greater than start |
| efhache | 0:ccbc7d2943fc | 79 | |
| efhache | 0:ccbc7d2943fc | 80 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 81 | } |
| efhache | 0:ccbc7d2943fc | 82 | |
| efhache | 0:ccbc7d2943fc | 83 | void copy_ram_flash(char *src_addr, char *dest_addr, int size) |
| efhache | 0:ccbc7d2943fc | 84 | { |
| efhache | 0:ccbc7d2943fc | 85 | param_table[0] = 51; //5210 command code |
| efhache | 0:ccbc7d2943fc | 86 | param_table[1] = (unsigned int) dest_addr; // Destination flash address where data bytes are to be written. This address should be a 256 byte boundary. |
| efhache | 0:ccbc7d2943fc | 87 | param_table[2] = (unsigned int) src_addr; // Source RAM address from which data bytes are to be read. This address should be a word boundary. |
| efhache | 0:ccbc7d2943fc | 88 | param_table[3] = (unsigned int) size; // Number of bytes to be written. Should be 256 | 512 | 1024 | 4096. |
| efhache | 0:ccbc7d2943fc | 89 | param_table[4] = (unsigned int) 72000; // cclk 72 MHz |
| efhache | 0:ccbc7d2943fc | 90 | |
| efhache | 0:ccbc7d2943fc | 91 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 92 | } |
| efhache | 0:ccbc7d2943fc | 93 | |
| efhache | 0:ccbc7d2943fc | 94 | void compare_flash_ram(char *src_addr, char *dest_addr, int size) |
| efhache | 0:ccbc7d2943fc | 95 | { |
| efhache | 0:ccbc7d2943fc | 96 | param_table[0] = 56; //5610 command code |
| efhache | 0:ccbc7d2943fc | 97 | param_table[1] = (unsigned int) dest_addr; // Starting flash or RAM address of data bytes to be compared. This address should be a word boundary. |
| efhache | 0:ccbc7d2943fc | 98 | param_table[2] = (unsigned int) src_addr; // Starting flash or RAM address of data bytes to be compared. This address should be a word boundary. |
| efhache | 0:ccbc7d2943fc | 99 | param_table[3] = (unsigned int) size; // Number of bytes to be compared; should be a multiple of 4. |
| efhache | 0:ccbc7d2943fc | 100 | |
| efhache | 0:ccbc7d2943fc | 101 | iap_entry(param_table,(unsigned int*)(&iap_return)); |
| efhache | 0:ccbc7d2943fc | 102 | } |
| efhache | 0:ccbc7d2943fc | 103 | |
| efhache | 0:ccbc7d2943fc | 104 | void savedata_into_flash(char *mem,int mem_size) |
| efhache | 0:ccbc7d2943fc | 105 | { |
| efhache | 0:ccbc7d2943fc | 106 | blank_check_sector(TARGET_SECTOR,TARGET_SECTOR); |
| efhache | 0:ccbc7d2943fc | 107 | |
| efhache | 0:ccbc7d2943fc | 108 | // erase if needed |
| efhache | 0:ccbc7d2943fc | 109 | if(iap_return.ReturnCode ==8) //return: SECTOR_NOT_BLANK |
| efhache | 0:ccbc7d2943fc | 110 | { |
| efhache | 0:ccbc7d2943fc | 111 | prepare_write_block_sector(TARGET_SECTOR,TARGET_SECTOR); |
| efhache | 0:ccbc7d2943fc | 112 | if (iap_return.ReturnCode !=0) |
| efhache | 0:ccbc7d2943fc | 113 | { |
| efhache | 0:ccbc7d2943fc | 114 | error_buzer(iap_return.ReturnCode); //will beep to indicate error |
| efhache | 0:ccbc7d2943fc | 115 | return ; //can't prepare memory for write... aborted |
| efhache | 0:ccbc7d2943fc | 116 | } |
| efhache | 0:ccbc7d2943fc | 117 | |
| efhache | 0:ccbc7d2943fc | 118 | erase_block_sector(TARGET_SECTOR,TARGET_SECTOR); |
| efhache | 0:ccbc7d2943fc | 119 | if (iap_return.ReturnCode !=0) |
| efhache | 0:ccbc7d2943fc | 120 | { |
| efhache | 0:ccbc7d2943fc | 121 | error_buzer(iap_return.ReturnCode); //will beep to indicate error |
| efhache | 0:ccbc7d2943fc | 122 | return ; //can't erase... aborted |
| efhache | 0:ccbc7d2943fc | 123 | } |
| efhache | 0:ccbc7d2943fc | 124 | } |
| efhache | 0:ccbc7d2943fc | 125 | |
| efhache | 0:ccbc7d2943fc | 126 | // copy RAM to FLASH |
| efhache | 0:ccbc7d2943fc | 127 | prepare_write_block_sector(TARGET_SECTOR,TARGET_SECTOR); |
| efhache | 0:ccbc7d2943fc | 128 | if (iap_return.ReturnCode !=0) |
| efhache | 0:ccbc7d2943fc | 129 | { |
| efhache | 0:ccbc7d2943fc | 130 | error_buzer(iap_return.ReturnCode); //will beep to indicate error |
| efhache | 0:ccbc7d2943fc | 131 | return ; //can't prepare memory for write... aborted |
| efhache | 0:ccbc7d2943fc | 132 | } |
| efhache | 0:ccbc7d2943fc | 133 | |
| efhache | 0:ccbc7d2943fc | 134 | copy_ram_flash(mem,(char *)START_TARGET_SECTOR,mem_size); |
| efhache | 0:ccbc7d2943fc | 135 | if (iap_return.ReturnCode !=0) |
| efhache | 0:ccbc7d2943fc | 136 | { |
| efhache | 0:ccbc7d2943fc | 137 | error_buzer(iap_return.ReturnCode); //will beep to indicate error |
| efhache | 0:ccbc7d2943fc | 138 | return ; //can't prepare memory for write... aborted |
| efhache | 0:ccbc7d2943fc | 139 | } |
| efhache | 0:ccbc7d2943fc | 140 | |
| efhache | 0:ccbc7d2943fc | 141 | compare_flash_ram(mem,(char *)START_TARGET_SECTOR,mem_size); |
| efhache | 0:ccbc7d2943fc | 142 | if (iap_return.ReturnCode !=0) |
| efhache | 0:ccbc7d2943fc | 143 | { |
| efhache | 0:ccbc7d2943fc | 144 | error_buzer(iap_return.ReturnCode); //will beep to indicate error |
| efhache | 0:ccbc7d2943fc | 145 | return ; //can't prepare memory for write... aborted |
| efhache | 0:ccbc7d2943fc | 146 | } |
| efhache | 0:ccbc7d2943fc | 147 | |
| efhache | 0:ccbc7d2943fc | 148 | } |
| efhache | 0:ccbc7d2943fc | 149 | |
| efhache | 0:ccbc7d2943fc | 150 | void error_buzer(unsigned int beepnmb) |
| efhache | 0:ccbc7d2943fc | 151 | { |
| efhache | 0:ccbc7d2943fc | 152 | |
| efhache | 0:ccbc7d2943fc | 153 | unsigned int i=0; |
| efhache | 0:ccbc7d2943fc | 154 | |
| efhache | 0:ccbc7d2943fc | 155 | |
| efhache | 0:ccbc7d2943fc | 156 | /* Start of Initial Buzzer Interface */ |
| efhache | 0:ccbc7d2943fc | 157 | LPC_PINCON->PINSEL7 &= ~(3UL<<20); // Reset P3.26 = GPIO |
| efhache | 0:ccbc7d2943fc | 158 | LPC_GPIO3->FIOSET |= (1UL<<26); // P3.26 = 1 (OFF Buzzer) |
| efhache | 0:ccbc7d2943fc | 159 | LPC_GPIO3->FIODIR |= (1UL<<26); // P3.26 = Output (Buzzer) |
| efhache | 0:ccbc7d2943fc | 160 | /* End of Initial Buzzer Interface */ |
| efhache | 0:ccbc7d2943fc | 161 | |
| efhache | 0:ccbc7d2943fc | 162 | for (i=0;i<beepnmb;i++) |
| efhache | 0:ccbc7d2943fc | 163 | { |
| efhache | 0:ccbc7d2943fc | 164 | LPC_GPIO3->FIOCLR = (1UL<<26); //P3.26=0(ON-BUZZER) |
| efhache | 0:ccbc7d2943fc | 165 | delay_ms(500); |
| efhache | 0:ccbc7d2943fc | 166 | LPC_GPIO3->FIOSET = (1UL<<26); //P3.26=1(OFF-BUZZER) |
| efhache | 0:ccbc7d2943fc | 167 | } |
| efhache | 0:ccbc7d2943fc | 168 | } |