shubham c / Mbed 2 deprecated Short_beacon_v1

beacon program for testing

Dependencies:   mbed

main.cpp@0:ee517f090192, 2014-07-14 (annotated)

Committer:
ee12b079
Date:
Mon Jul 14 11:24:54 2014 +0000
Revision:
0:ee517f090192
Child:
1:d708bb0cdffc
RFM69HCW program for beacon (just for testing)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ee12b079 0:ee517f090192 1 //switch off the sync!!!!!!!
ee12b079 0:ee517f090192 2 //switch off the preamble!!!!!!!
ee12b079 0:ee517f090192 3 /*for crc in tx:
ee12b079 0:ee517f090192 4 regIrq2(0x28) :
ee12b079 0:ee517f090192 5
ee12b079 0:ee517f090192 6 regpacketconfig 1(0x37) :
ee12b079 0:ee517f090192 7 set crc detection/calc. on : | 0x10
ee12b079 0:ee517f090192 8 crcautoclearoff : | 0x08
ee12b079 0:ee517f090192 9
ee12b079 0:ee517f090192 10 for data whitening : regpacketconfig 1(0x37) :| 0x40
ee12b079 0:ee517f090192 11 for
ee12b079 0:ee517f090192 12
ee12b079 0:ee517f090192 13
ee12b079 0:ee517f090192 14
ee12b079 0:ee517f090192 15 */
ee12b079 0:ee517f090192 16 // 6CC000 for 435 MHz
ee12b079 0:ee517f090192 17 //set all values as FF for checking on spectrum analyzer
ee12b079 0:ee517f090192 18 #include "beacon.h"
ee12b079 0:ee517f090192 19 Serial pc(USBTX, USBRX); // tx, rx
ee12b079 0:ee517f090192 20 SPI spi(p5, p6, p7); // mosi, miso, sclk
ee12b079 0:ee517f090192 21 DigitalOut cs_bar(p8); //slave select or chip select
ee12b079 0:ee517f090192 22 //InterruptIn button(p9);
ee12b079 0:ee517f090192 23 //#define TIMES 16
ee12b079 0:ee517f090192 24 //Timer t;
ee12b079 0:ee517f090192 25
ee12b079 0:ee517f090192 26 /*void interrupt_func()
ee12b079 0:ee517f090192 27 {
ee12b079 0:ee517f090192 28 pc.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n");
ee12b079 0:ee517f090192 29 wait(3);
ee12b079 0:ee517f090192 30
ee12b079 0:ee517f090192 31 }*/
ee12b079 0:ee517f090192 32 void writereg(uint8_t reg,uint8_t val)
ee12b079 0:ee517f090192 33 {
ee12b079 0:ee517f090192 34 cs_bar = 0;
ee12b079 0:ee517f090192 35 spi.write(reg | 0x80);
ee12b079 0:ee517f090192 36 spi.write(val);
ee12b079 0:ee517f090192 37 cs_bar = 1;
ee12b079 0:ee517f090192 38 }
ee12b079 0:ee517f090192 39 uint8_t readreg(uint8_t reg)
ee12b079 0:ee517f090192 40 {
ee12b079 0:ee517f090192 41 uint8_t val;
ee12b079 0:ee517f090192 42 cs_bar = 0;
ee12b079 0:ee517f090192 43 spi.write(reg & ~0x80);
ee12b079 0:ee517f090192 44 val = spi.write(0);
ee12b079 0:ee517f090192 45 cs_bar = 1;
ee12b079 0:ee517f090192 46 return val;
ee12b079 0:ee517f090192 47 }
ee12b079 0:ee517f090192 48
ee12b079 0:ee517f090192 49 void beacon_func() {
ee12b079 0:ee517f090192 50
ee12b079 0:ee517f090192 51 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
ee12b079 0:ee517f090192 52 wait(0.02); //takes 10 ms for POR event + 10ms for safety
ee12b079 0:ee517f090192 53
ee12b079 0:ee517f090192 54 uint8_t byte_counter = 0;
ee12b079 0:ee517f090192 55
ee12b079 0:ee517f090192 56 /*struct Short_beacon{
ee12b079 0:ee517f090192 57 uint8_t Voltage[1];
ee12b079 0:ee517f090192 58 uint8_t AngularSpeed[2];
ee12b079 0:ee517f090192 59 uint8_t SubsystemStatus[1];
ee12b079 0:ee517f090192 60 uint8_t Temp[3];
ee12b079 0:ee517f090192 61 uint8_t ErrorFlag[1];
ee12b079 0:ee517f090192 62 }Shortbeacon = { {0x22}, {0x22, 0x33} , {0x00},{0x00,0x00,0x00}, {0xFE} };
ee12b079 0:ee517f090192 63 */
ee12b079 0:ee517f090192 64 //filling hk data
ee12b079 0:ee517f090192 65 //ShortBeacon Shortbeacon;
ee12b079 0:ee517f090192 66 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
ee12b079 0:ee517f090192 67
ee12b079 0:ee517f090192 68 //mask
ee12b079 0:ee517f090192 69 //uint8_t mask[] = {0x80, 0x40, 0x20,0x10,0x8,0x4,0x2,0x1};
ee12b079 0:ee517f090192 70
ee12b079 0:ee517f090192 71 for(int i = 0; i < 15 ; i++)
ee12b079 0:ee517f090192 72 {
ee12b079 0:ee517f090192 73 pc.printf("0x%X\n",(short_beacon[i]));
ee12b079 0:ee517f090192 74 }
ee12b079 0:ee517f090192 75
ee12b079 0:ee517f090192 76 spi.format(8,0);
ee12b079 0:ee517f090192 77 spi.frequency(10000000); //10MHz SCLK frequency(its max for rfm69hcw)
ee12b079 0:ee517f090192 78 cs_bar = 1; // Chip must be deselected
ee12b079 0:ee517f090192 79
ee12b079 0:ee517f090192 80 //initialization
ee12b079 0:ee517f090192 81 //Common configuration registers
ee12b079 0:ee517f090192 82 writereg(0x01,0x04); //sequencer on,standby mode
ee12b079 0:ee517f090192 83 writereg(0x02,0x08); //packet-mode used , ook modultion , no dc-shaping
ee12b079 0:ee517f090192 84 writereg(0x03,0x68); //1200bps datarate
ee12b079 0:ee517f090192 85 writereg(0x04,0x2B); //1200bps datarate
ee12b079 0:ee517f090192 86 writereg(0x07,0x6C); //Frequency MSB
ee12b079 0:ee517f090192 87 writereg(0x08,0xC0); //Frequency MID
ee12b079 0:ee517f090192 88 writereg(0x09,0x00); //Frequency LSB ....6C C0 00 for 435 MHZ
ee12b079 0:ee517f090192 89
ee12b079 0:ee517f090192 90 //Transmitter registers
ee12b079 0:ee517f090192 91 // RegPaLevel(default +13 dBm)
ee12b079 0:ee517f090192 92
ee12b079 0:ee517f090192 93 //IRQ and Pin Mapping Registers
ee12b079 0:ee517f090192 94 //no DIO mapped yet
ee12b079 0:ee517f090192 95 //regirq1(0x27): modeready (8th bit) will be checked for interrupts
ee12b079 0:ee517f090192 96 //regIrq2(0x28): fifothresh (5th bit) ,packetsent(3rd bit) will be checked for interrupts
ee12b079 0:ee517f090192 97
ee12b079 0:ee517f090192 98 //Packet Engine Registers
ee12b079 0:ee517f090192 99 writereg(0x2C,0x00); //set preamble
ee12b079 0:ee517f090192 100 writereg(0x2D,0x0A); //set preamble
ee12b079 0:ee517f090192 101 writereg(0x2E,0x80); //sync off
ee12b079 0:ee517f090192 102 writereg(0x2F,0x5E); //sync word 1
ee12b079 0:ee517f090192 103 writereg(0x37,0x08 | 0x40);// | 0x10); //packetconfig1, 0x40 for data whitening (only for testing)
ee12b079 0:ee517f090192 104 writereg(0x38,0x00); //payload length = 0 ... unlimited payload mode
ee12b079 0:ee517f090192 105 writereg(0x3C,0xB0); //fifothresh = 48 because we want it cleared once its 40!!!!
ee12b079 0:ee517f090192 106 //Initialization complete
ee12b079 0:ee517f090192 107
ee12b079 0:ee517f090192 108 //while(pc.getc() == 't'){
ee12b079 0:ee517f090192 109 //t.start();
ee12b079 0:ee517f090192 110 //Filling Data into FIFO 64 BYTES : eff.32 bits = 4bytes //fread
ee12b079 0:ee517f090192 111 cs_bar = 0;
ee12b079 0:ee517f090192 112 spi.write(0x80);//fifo write access
ee12b079 0:ee517f090192 113 for(byte_counter=0 ; byte_counter<4; byte_counter++)
ee12b079 0:ee517f090192 114 {
ee12b079 0:ee517f090192 115 for(int i=7; i>=0 ; i--)
ee12b079 0:ee517f090192 116 {
ee12b079 0:ee517f090192 117 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
ee12b079 0:ee517f090192 118 //if((short_beacon[byte_counter] & mask[i]) != 0)
ee12b079 0:ee517f090192 119 {
ee12b079 0:ee517f090192 120 spi.write(0xFF);
ee12b079 0:ee517f090192 121 spi.write(0xFF);
ee12b079 0:ee517f090192 122 }
ee12b079 0:ee517f090192 123 else
ee12b079 0:ee517f090192 124 {
ee12b079 0:ee517f090192 125 spi.write(0x00);
ee12b079 0:ee517f090192 126 spi.write(0x00);
ee12b079 0:ee517f090192 127 }
ee12b079 0:ee517f090192 128 }
ee12b079 0:ee517f090192 129 }
ee12b079 0:ee517f090192 130 cs_bar = 1; //cs_bar
ee12b079 0:ee517f090192 131
ee12b079 0:ee517f090192 132 //Check for fifoThresh
ee12b079 0:ee517f090192 133 while((readreg(0x28) & 0x20) != 0x20);
ee12b079 0:ee517f090192 134
ee12b079 0:ee517f090192 135 //Highpower settings
ee12b079 0:ee517f090192 136 writereg(0x11,0x7F); //RegPalevel (20db) //~
ee12b079 0:ee517f090192 137 writereg(0x13,0x0F); //RegOCP
ee12b079 0:ee517f090192 138 writereg(0x5A,0x5D); //RegTestPa1
ee12b079 0:ee517f090192 139 writereg(0x5C,0x7C); //RegTestPa2
ee12b079 0:ee517f090192 140
ee12b079 0:ee517f090192 141 //Set to Tx mode
ee12b079 0:ee517f090192 142 writereg(0x01,0x0C);
ee12b079 0:ee517f090192 143
ee12b079 0:ee517f090192 144
ee12b079 0:ee517f090192 145 //Check for fifoThresh
ee12b079 0:ee517f090192 146 while((readreg(0x28) & 0x20) != 0x00);
ee12b079 0:ee517f090192 147
ee12b079 0:ee517f090192 148 while(byte_counter!=15){
ee12b079 0:ee517f090192 149
ee12b079 0:ee517f090192 150 //writing again
ee12b079 0:ee517f090192 151 cs_bar = 0;
ee12b079 0:ee517f090192 152 spi.write(0x80);
ee12b079 0:ee517f090192 153 for(int i=7; i>=0 ;i--)
ee12b079 0:ee517f090192 154 {
ee12b079 0:ee517f090192 155 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
ee12b079 0:ee517f090192 156 //if((short_beacon[byte_counter] & mask[i]) != 0)
ee12b079 0:ee517f090192 157 {
ee12b079 0:ee517f090192 158 spi.write(0xFF);
ee12b079 0:ee517f090192 159 spi.write(0xFF);
ee12b079 0:ee517f090192 160 }
ee12b079 0:ee517f090192 161 else
ee12b079 0:ee517f090192 162 {
ee12b079 0:ee517f090192 163 spi.write(0x00);
ee12b079 0:ee517f090192 164 spi.write(0x00);
ee12b079 0:ee517f090192 165 }
ee12b079 0:ee517f090192 166 }
ee12b079 0:ee517f090192 167 cs_bar = 1;
ee12b079 0:ee517f090192 168 byte_counter++;
ee12b079 0:ee517f090192 169
ee12b079 0:ee517f090192 170 //Check for fifoThresh
ee12b079 0:ee517f090192 171 while((readreg(0x28) & 0x20) != 0x00);
ee12b079 0:ee517f090192 172 }
ee12b079 0:ee517f090192 173 //wait for packet sent bit to fire
ee12b079 0:ee517f090192 174 while((readreg(0x28) & 0x08) != 0x08);
ee12b079 0:ee517f090192 175 //pc.printf("packet sent!!! \n");
ee12b079 0:ee517f090192 176
ee12b079 0:ee517f090192 177 //Switch back to Standby Mode
ee12b079 0:ee517f090192 178 writereg(0x01,0x04);
ee12b079 0:ee517f090192 179
ee12b079 0:ee517f090192 180 //Lowpowermode
ee12b079 0:ee517f090192 181 writereg(0x11,0x9F); //RegPalevel (13db)
ee12b079 0:ee517f090192 182 writereg(0x13,0x1A); //RegOCP
ee12b079 0:ee517f090192 183 writereg(0x5A,0x55); //RegTestPa1(setting PA_BOOST on RFIO)
ee12b079 0:ee517f090192 184 writereg(0x5C,0x70); //RegTestPa2(setting PA_BOOST on RFIO)
ee12b079 0:ee517f090192 185
ee12b079 0:ee517f090192 186 //wait for modeready
ee12b079 0:ee517f090192 187 while((readreg(0x27)&0x80)!=0x80);
ee12b079 0:ee517f090192 188 //t.stop();
ee12b079 0:ee517f090192 189 //pc.printf(" time taken to init + transmit = %f \n", t.read()) ;
ee12b079 0:ee517f090192 190 //}
ee12b079 0:ee517f090192 191 }