Diff: arch/lpc_phy_dp83848.c

Revision:

1:0c9d93e2f51c

Parent:

0:f4db29eb9e47

Child:

3:dd8b8f5b449a

diff -r f4db29eb9e47 -r 0c9d93e2f51c arch/lpc_phy_dp83848.c
--- a/arch/lpc_phy_dp83848.c	Fri Jun 22 09:32:29 2012 +0000
+++ b/arch/lpc_phy_dp83848.c	Fri Jun 22 11:17:21 2012 +0000
@@ -90,8 +90,8 @@
 #define DP8_PHYID1_OUI     0x2000     /**< Expected PHY ID1 */
 #define DP8_PHYID2_OUI     0x5c90     /**< Expected PHY ID2 */
 
-/** \brief PHY status structure used to indicate current status of PHY.
- */
+/** \brief PHY status structure used to indicate current status of PHY.
+ */
 typedef struct {
     u32_t     phy_speed_100mbs:1; /**< 10/100 MBS connection speed flag. */
     u32_t     phy_full_duplex:1;  /**< Half/full duplex connection speed flag. */
@@ -129,28 +129,28 @@
 
     /* Full or half duplex */
     if (linksts & DP8_FULLDUPLEX)
-        physts.phy_full_duplex = 1;
+        physts.phy_full_duplex = 1;
     else
         physts.phy_full_duplex = 0;
-
-    /* Configure 100MBit/10MBit mode. */
+
+    /* Configure 100MBit/10MBit mode. */
     if (linksts & DP8_SPEED10MBPS)
         physts.phy_speed_100mbs = 0;
-    else
+    else
         physts.phy_speed_100mbs = 1;
 
     if (physts.phy_speed_100mbs != olddphysts.phy_speed_100mbs) {
         changed = 1;
         if (physts.phy_speed_100mbs) {
-            /* 100MBit mode. */
+            /* 100MBit mode. */
             lpc_emac_set_speed(1);
 
             NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, 100000000);
         }
         else {
-            /* 10MBit mode. */
+            /* 10MBit mode. */
             lpc_emac_set_speed(0);
-
+
             NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, 10000000);
         }
 
@@ -197,7 +197,7 @@
  *  controlled by setting up configuration defines in lpc_phy.h.
  *
  *  \param[in]     netif   NETIF structure
- *  \param[in]     rmii    If set, configures the PHY for RMII mode
+ *  \param[in]     rmii    If set, configures the PHY for RMII mode
  *  \return        ERR_OK if the setup was successful, otherwise ERR_TIMEOUT
  */
 err_t lpc_phy_init(struct netif *netif, int rmii)
@@ -211,19 +211,19 @@
     phyustate = 0;
 
     /* Only first read and write are checked for failure */
-    /* Put the DP83848C in reset mode and wait for completion */
+    /* Put the DP83848C in reset mode and wait for completion */
     if (lpc_mii_write(DP8_BMCR_REG, DP8_RESET) != 0)
-        return ERR_TIMEOUT;
+        return ERR_TIMEOUT;
     i = 400;
     while (i > 0) {
-        msDelay(1);   /* 1 ms */
+        osDelay(1);   /* 1 ms */
         if (lpc_mii_read(DP8_BMCR_REG, &tmp) != 0)
             return ERR_TIMEOUT;
-
-        if (!(tmp & (DP8_RESET | DP8_POWER_DOWN)))
+
+        if (!(tmp & (DP8_RESET | DP8_POWER_DOWN)))
             i = -1;
         else
-            i--;
+            i--;
     }
     /* Timeout? */
     if (i == 0)
@@ -280,8 +280,8 @@
     return changed;
 }
 
-/**
- * @}
+/**
+ * @}
  */
 
 /* --------------------------------- End Of File ------------------------------ */