mbed library sources
Dependents: FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more
targets/hal/TARGET_STM/TARGET_STM32F4XX/gpio_api.c@0:6bc4ac881c8e, 2016-07-28 (annotated)
- Committer:
- ebrus
- Date:
- Thu Jul 28 15:56:34 2016 +0000
- Revision:
- 0:6bc4ac881c8e
1;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
ebrus | 0:6bc4ac881c8e | 1 | /* mbed Microcontroller Library |
ebrus | 0:6bc4ac881c8e | 2 | * Copyright (c) 2006-2013 ARM Limited |
ebrus | 0:6bc4ac881c8e | 3 | * |
ebrus | 0:6bc4ac881c8e | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
ebrus | 0:6bc4ac881c8e | 5 | * you may not use this file except in compliance with the License. |
ebrus | 0:6bc4ac881c8e | 6 | * You may obtain a copy of the License at |
ebrus | 0:6bc4ac881c8e | 7 | * |
ebrus | 0:6bc4ac881c8e | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
ebrus | 0:6bc4ac881c8e | 9 | * |
ebrus | 0:6bc4ac881c8e | 10 | * Unless required by applicable law or agreed to in writing, software |
ebrus | 0:6bc4ac881c8e | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
ebrus | 0:6bc4ac881c8e | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
ebrus | 0:6bc4ac881c8e | 13 | * See the License for the specific language governing permissions and |
ebrus | 0:6bc4ac881c8e | 14 | * limitations under the License. |
ebrus | 0:6bc4ac881c8e | 15 | */ |
ebrus | 0:6bc4ac881c8e | 16 | #include "mbed_assert.h" |
ebrus | 0:6bc4ac881c8e | 17 | #include "gpio_api.h" |
ebrus | 0:6bc4ac881c8e | 18 | #include "pinmap.h" |
ebrus | 0:6bc4ac881c8e | 19 | |
ebrus | 0:6bc4ac881c8e | 20 | uint32_t gpio_set(PinName pin) { |
ebrus | 0:6bc4ac881c8e | 21 | MBED_ASSERT(pin != (PinName)NC); |
ebrus | 0:6bc4ac881c8e | 22 | uint32_t port_index = (uint32_t) pin >> 4; |
ebrus | 0:6bc4ac881c8e | 23 | |
ebrus | 0:6bc4ac881c8e | 24 | // Enable GPIO peripheral clock |
ebrus | 0:6bc4ac881c8e | 25 | RCC->AHB1ENR |= 1 << port_index; |
ebrus | 0:6bc4ac881c8e | 26 | |
ebrus | 0:6bc4ac881c8e | 27 | pin_function(pin, STM_PIN_DATA(0, 0)); |
ebrus | 0:6bc4ac881c8e | 28 | return 1 << ((uint32_t) pin & 0xF); |
ebrus | 0:6bc4ac881c8e | 29 | } |
ebrus | 0:6bc4ac881c8e | 30 | |
ebrus | 0:6bc4ac881c8e | 31 | void gpio_init(gpio_t *obj, PinName pin) { |
ebrus | 0:6bc4ac881c8e | 32 | obj->pin = pin; |
ebrus | 0:6bc4ac881c8e | 33 | if (pin == (PinName)NC) |
ebrus | 0:6bc4ac881c8e | 34 | return; |
ebrus | 0:6bc4ac881c8e | 35 | |
ebrus | 0:6bc4ac881c8e | 36 | obj->mask = gpio_set(pin); |
ebrus | 0:6bc4ac881c8e | 37 | |
ebrus | 0:6bc4ac881c8e | 38 | uint32_t port_index = (uint32_t) pin >> 4; |
ebrus | 0:6bc4ac881c8e | 39 | |
ebrus | 0:6bc4ac881c8e | 40 | GPIO_TypeDef *port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (port_index << 10)); |
ebrus | 0:6bc4ac881c8e | 41 | obj->reg_mode = &port_reg->MODER; |
ebrus | 0:6bc4ac881c8e | 42 | obj->reg_set = &port_reg->BSRRL; |
ebrus | 0:6bc4ac881c8e | 43 | obj->reg_clr = &port_reg->BSRRH; |
ebrus | 0:6bc4ac881c8e | 44 | obj->reg_in = &port_reg->IDR; |
ebrus | 0:6bc4ac881c8e | 45 | } |
ebrus | 0:6bc4ac881c8e | 46 | |
ebrus | 0:6bc4ac881c8e | 47 | void gpio_mode(gpio_t *obj, PinMode mode) { |
ebrus | 0:6bc4ac881c8e | 48 | pin_mode(obj->pin, mode); |
ebrus | 0:6bc4ac881c8e | 49 | } |
ebrus | 0:6bc4ac881c8e | 50 | |
ebrus | 0:6bc4ac881c8e | 51 | void gpio_dir(gpio_t *obj, PinDirection direction) { |
ebrus | 0:6bc4ac881c8e | 52 | MBED_ASSERT(obj->pin != (PinName)NC); |
ebrus | 0:6bc4ac881c8e | 53 | switch (direction) { |
ebrus | 0:6bc4ac881c8e | 54 | case PIN_INPUT : |
ebrus | 0:6bc4ac881c8e | 55 | pin_function(obj->pin, STM_PIN_DATA(0, 0)); |
ebrus | 0:6bc4ac881c8e | 56 | break; |
ebrus | 0:6bc4ac881c8e | 57 | case PIN_OUTPUT: |
ebrus | 0:6bc4ac881c8e | 58 | pin_function(obj->pin, STM_PIN_DATA(1, 0)); |
ebrus | 0:6bc4ac881c8e | 59 | break; |
ebrus | 0:6bc4ac881c8e | 60 | } |
ebrus | 0:6bc4ac881c8e | 61 | } |