Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_STM32F3XX/i2c_api.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 *******************************************************************************
ebrus 0:6bc4ac881c8e 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 4 * All rights reserved.
ebrus 0:6bc4ac881c8e 5 *
ebrus 0:6bc4ac881c8e 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 8 *
ebrus 0:6bc4ac881c8e 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 10 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 13 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 15 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 16 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 17 *
ebrus 0:6bc4ac881c8e 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 28 *******************************************************************************
ebrus 0:6bc4ac881c8e 29 */
ebrus 0:6bc4ac881c8e 30 #include "mbed_assert.h"
ebrus 0:6bc4ac881c8e 31 #include "i2c_api.h"
ebrus 0:6bc4ac881c8e 32
ebrus 0:6bc4ac881c8e 33 #if DEVICE_I2C
ebrus 0:6bc4ac881c8e 34
ebrus 0:6bc4ac881c8e 35 #include "cmsis.h"
ebrus 0:6bc4ac881c8e 36 #include "pinmap.h"
ebrus 0:6bc4ac881c8e 37
ebrus 0:6bc4ac881c8e 38 /* Timeout values for flags and events waiting loops. These timeouts are
ebrus 0:6bc4ac881c8e 39 not based on accurate values, they just guarantee that the application will
ebrus 0:6bc4ac881c8e 40 not remain stuck if the I2C communication is corrupted. */
ebrus 0:6bc4ac881c8e 41 #define FLAG_TIMEOUT ((int)0x1000)
ebrus 0:6bc4ac881c8e 42 #define LONG_TIMEOUT ((int)0x8000)
ebrus 0:6bc4ac881c8e 43
ebrus 0:6bc4ac881c8e 44 static const PinMap PinMap_I2C_SDA[] = {
ebrus 0:6bc4ac881c8e 45 {PA_10, I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 46 {PA_14, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 47 {PB_5, I2C_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_8)},
ebrus 0:6bc4ac881c8e 48 {PB_7, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 49 {PB_9, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 50 {PC_9, I2C_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_3)},
ebrus 0:6bc4ac881c8e 51 {PF_0, I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 52 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 53 };
ebrus 0:6bc4ac881c8e 54
ebrus 0:6bc4ac881c8e 55 static const PinMap PinMap_I2C_SCL[] = {
ebrus 0:6bc4ac881c8e 56 {PA_8, I2C_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_3)},
ebrus 0:6bc4ac881c8e 57 {PA_9, I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 58 {PA_15, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 59 {PB_6, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 60 {PB_8, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 61 {PF_1, I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
ebrus 0:6bc4ac881c8e 62 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 63 };
ebrus 0:6bc4ac881c8e 64
ebrus 0:6bc4ac881c8e 65 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
ebrus 0:6bc4ac881c8e 66 // Determine the I2C to use
ebrus 0:6bc4ac881c8e 67 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
ebrus 0:6bc4ac881c8e 68 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
ebrus 0:6bc4ac881c8e 69
ebrus 0:6bc4ac881c8e 70 obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
ebrus 0:6bc4ac881c8e 71 MBED_ASSERT(obj->i2c != (I2CName)NC);
ebrus 0:6bc4ac881c8e 72
ebrus 0:6bc4ac881c8e 73 // Enable I2C clock
ebrus 0:6bc4ac881c8e 74 if (obj->i2c == I2C_1) {
ebrus 0:6bc4ac881c8e 75 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
ebrus 0:6bc4ac881c8e 76 }
ebrus 0:6bc4ac881c8e 77 if (obj->i2c == I2C_2) {
ebrus 0:6bc4ac881c8e 78 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
ebrus 0:6bc4ac881c8e 79 }
ebrus 0:6bc4ac881c8e 80 if (obj->i2c == I2C_3) {
ebrus 0:6bc4ac881c8e 81 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C3, ENABLE);
ebrus 0:6bc4ac881c8e 82 }
ebrus 0:6bc4ac881c8e 83
ebrus 0:6bc4ac881c8e 84 // Configure I2C pins
ebrus 0:6bc4ac881c8e 85 pinmap_pinout(scl, PinMap_I2C_SCL);
ebrus 0:6bc4ac881c8e 86 pin_mode(scl, OpenDrain);
ebrus 0:6bc4ac881c8e 87 pinmap_pinout(sda, PinMap_I2C_SDA);
ebrus 0:6bc4ac881c8e 88 pin_mode(sda, OpenDrain);
ebrus 0:6bc4ac881c8e 89
ebrus 0:6bc4ac881c8e 90 // Reset to clear pending flags if any
ebrus 0:6bc4ac881c8e 91 i2c_reset(obj);
ebrus 0:6bc4ac881c8e 92
ebrus 0:6bc4ac881c8e 93 // I2C configuration
ebrus 0:6bc4ac881c8e 94 i2c_frequency(obj, 100000); // 100 kHz per default
ebrus 0:6bc4ac881c8e 95 }
ebrus 0:6bc4ac881c8e 96
ebrus 0:6bc4ac881c8e 97 void i2c_frequency(i2c_t *obj, int hz) {
ebrus 0:6bc4ac881c8e 98 MBED_ASSERT((hz == 100000) || (hz == 200000) || (hz == 400000) || (hz == 1000000));
ebrus 0:6bc4ac881c8e 99 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 100 I2C_InitTypeDef I2C_InitStructure;
ebrus 0:6bc4ac881c8e 101 uint32_t tim;
ebrus 0:6bc4ac881c8e 102
ebrus 0:6bc4ac881c8e 103 // Disable the Fast Mode Plus capability
ebrus 0:6bc4ac881c8e 104 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); // Enable SYSCFG clock
ebrus 0:6bc4ac881c8e 105 SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, DISABLE);
ebrus 0:6bc4ac881c8e 106 SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, DISABLE);
ebrus 0:6bc4ac881c8e 107
ebrus 0:6bc4ac881c8e 108 /*
ebrus 0:6bc4ac881c8e 109 Values calculated with I2C_Timing_Configuration_V1.0.1.xls file (see AN4235)
ebrus 0:6bc4ac881c8e 110 * Standard mode (up to 100 kHz)
ebrus 0:6bc4ac881c8e 111 * Fast Mode (up to 400 kHz)
ebrus 0:6bc4ac881c8e 112 * Fast Mode Plus (up to 1 MHz)
ebrus 0:6bc4ac881c8e 113 Below values obtained with:
ebrus 0:6bc4ac881c8e 114 - I2C clock source = 8 MHz (HSI clock per default)
ebrus 0:6bc4ac881c8e 115 - Analog filter delay = ON
ebrus 0:6bc4ac881c8e 116 - Digital filter coefficient = 0
ebrus 0:6bc4ac881c8e 117 - Rise time = 100 ns
ebrus 0:6bc4ac881c8e 118 - Fall time = 10ns
ebrus 0:6bc4ac881c8e 119 */
ebrus 0:6bc4ac881c8e 120 switch (hz) {
ebrus 0:6bc4ac881c8e 121 case 100000:
ebrus 0:6bc4ac881c8e 122 tim = 0x00201D2B; // Standard mode
ebrus 0:6bc4ac881c8e 123 break;
ebrus 0:6bc4ac881c8e 124 case 200000:
ebrus 0:6bc4ac881c8e 125 tim = 0x0010021E; // Fast Mode
ebrus 0:6bc4ac881c8e 126 break;
ebrus 0:6bc4ac881c8e 127 case 400000:
ebrus 0:6bc4ac881c8e 128 tim = 0x0010020A; // Fast Mode
ebrus 0:6bc4ac881c8e 129 break;
ebrus 0:6bc4ac881c8e 130 case 1000000:
ebrus 0:6bc4ac881c8e 131 tim = 0x00100001; // Fast Mode Plus
ebrus 0:6bc4ac881c8e 132 // Enable the Fast Mode Plus capability
ebrus 0:6bc4ac881c8e 133 if (obj->i2c == I2C_1) {
ebrus 0:6bc4ac881c8e 134 SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE);
ebrus 0:6bc4ac881c8e 135 }
ebrus 0:6bc4ac881c8e 136 if (obj->i2c == I2C_2) {
ebrus 0:6bc4ac881c8e 137 SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE);
ebrus 0:6bc4ac881c8e 138 }
ebrus 0:6bc4ac881c8e 139 break;
ebrus 0:6bc4ac881c8e 140 default:
ebrus 0:6bc4ac881c8e 141 break;
ebrus 0:6bc4ac881c8e 142 }
ebrus 0:6bc4ac881c8e 143
ebrus 0:6bc4ac881c8e 144 // I2C configuration
ebrus 0:6bc4ac881c8e 145 I2C_DeInit(i2c);
ebrus 0:6bc4ac881c8e 146 I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
ebrus 0:6bc4ac881c8e 147 I2C_InitStructure.I2C_AnalogFilter = I2C_AnalogFilter_Enable;
ebrus 0:6bc4ac881c8e 148 I2C_InitStructure.I2C_DigitalFilter = 0x00;
ebrus 0:6bc4ac881c8e 149 I2C_InitStructure.I2C_OwnAddress1 = 0x00;
ebrus 0:6bc4ac881c8e 150 I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
ebrus 0:6bc4ac881c8e 151 I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
ebrus 0:6bc4ac881c8e 152 I2C_InitStructure.I2C_Timing = tim;
ebrus 0:6bc4ac881c8e 153 I2C_Init(i2c, &I2C_InitStructure);
ebrus 0:6bc4ac881c8e 154
ebrus 0:6bc4ac881c8e 155 I2C_Cmd(i2c, ENABLE);
ebrus 0:6bc4ac881c8e 156 }
ebrus 0:6bc4ac881c8e 157
ebrus 0:6bc4ac881c8e 158 inline int i2c_start(i2c_t *obj) {
ebrus 0:6bc4ac881c8e 159 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 160 int timeout;
ebrus 0:6bc4ac881c8e 161
ebrus 0:6bc4ac881c8e 162 // Test BUSY Flag
ebrus 0:6bc4ac881c8e 163 timeout = LONG_TIMEOUT;
ebrus 0:6bc4ac881c8e 164 while (I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) != RESET) {
ebrus 0:6bc4ac881c8e 165 timeout--;
ebrus 0:6bc4ac881c8e 166 if (timeout == 0) {
ebrus 0:6bc4ac881c8e 167 return 0;
ebrus 0:6bc4ac881c8e 168 }
ebrus 0:6bc4ac881c8e 169 }
ebrus 0:6bc4ac881c8e 170
ebrus 0:6bc4ac881c8e 171 I2C_GenerateSTART(i2c, ENABLE);
ebrus 0:6bc4ac881c8e 172
ebrus 0:6bc4ac881c8e 173 return 0;
ebrus 0:6bc4ac881c8e 174 }
ebrus 0:6bc4ac881c8e 175
ebrus 0:6bc4ac881c8e 176 inline int i2c_stop(i2c_t *obj) {
ebrus 0:6bc4ac881c8e 177 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 178
ebrus 0:6bc4ac881c8e 179 I2C_GenerateSTOP(i2c, ENABLE);
ebrus 0:6bc4ac881c8e 180
ebrus 0:6bc4ac881c8e 181 return 0;
ebrus 0:6bc4ac881c8e 182 }
ebrus 0:6bc4ac881c8e 183
ebrus 0:6bc4ac881c8e 184 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
ebrus 0:6bc4ac881c8e 185 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 186 int count;
ebrus 0:6bc4ac881c8e 187 int value;
ebrus 0:6bc4ac881c8e 188
ebrus 0:6bc4ac881c8e 189 if (length == 0) return 0;
ebrus 0:6bc4ac881c8e 190
ebrus 0:6bc4ac881c8e 191 // Configure slave address, nbytes, reload, end mode and start or stop generation
ebrus 0:6bc4ac881c8e 192 I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Read);
ebrus 0:6bc4ac881c8e 193
ebrus 0:6bc4ac881c8e 194 // Read all bytes
ebrus 0:6bc4ac881c8e 195 for (count = 0; count < length; count++) {
ebrus 0:6bc4ac881c8e 196 value = i2c_byte_read(obj, 0);
ebrus 0:6bc4ac881c8e 197 data[count] = (char)value;
ebrus 0:6bc4ac881c8e 198 }
ebrus 0:6bc4ac881c8e 199
ebrus 0:6bc4ac881c8e 200 return length;
ebrus 0:6bc4ac881c8e 201 }
ebrus 0:6bc4ac881c8e 202
ebrus 0:6bc4ac881c8e 203 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
ebrus 0:6bc4ac881c8e 204 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 205 //int timeout;
ebrus 0:6bc4ac881c8e 206 int count;
ebrus 0:6bc4ac881c8e 207
ebrus 0:6bc4ac881c8e 208 if (length == 0) return 0;
ebrus 0:6bc4ac881c8e 209
ebrus 0:6bc4ac881c8e 210 // [TODO] The stop is always sent even with I2C_SoftEnd_Mode. To be corrected.
ebrus 0:6bc4ac881c8e 211
ebrus 0:6bc4ac881c8e 212 // Configure slave address, nbytes, reload, end mode and start or stop generation
ebrus 0:6bc4ac881c8e 213 //if (stop) {
ebrus 0:6bc4ac881c8e 214 I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write);
ebrus 0:6bc4ac881c8e 215 //}
ebrus 0:6bc4ac881c8e 216 //else {
ebrus 0:6bc4ac881c8e 217 // I2C_TransferHandling(i2c, address, length, I2C_SoftEnd_Mode, I2C_Generate_Start_Write);
ebrus 0:6bc4ac881c8e 218 //}
ebrus 0:6bc4ac881c8e 219
ebrus 0:6bc4ac881c8e 220 // Write all bytes
ebrus 0:6bc4ac881c8e 221 for (count = 0; count < length; count++) {
ebrus 0:6bc4ac881c8e 222 if (i2c_byte_write(obj, data[count]) != 1) {
ebrus 0:6bc4ac881c8e 223 i2c_stop(obj);
ebrus 0:6bc4ac881c8e 224 return 0;
ebrus 0:6bc4ac881c8e 225 }
ebrus 0:6bc4ac881c8e 226 }
ebrus 0:6bc4ac881c8e 227
ebrus 0:6bc4ac881c8e 228 /*
ebrus 0:6bc4ac881c8e 229 if (stop) {
ebrus 0:6bc4ac881c8e 230 // Wait until STOPF flag is set
ebrus 0:6bc4ac881c8e 231 timeout = LONG_TIMEOUT;
ebrus 0:6bc4ac881c8e 232 while (I2C_GetFlagStatus(i2c, I2C_ISR_STOPF) == RESET) {
ebrus 0:6bc4ac881c8e 233 timeout--;
ebrus 0:6bc4ac881c8e 234 if (timeout == 0) {
ebrus 0:6bc4ac881c8e 235 return 0;
ebrus 0:6bc4ac881c8e 236 }
ebrus 0:6bc4ac881c8e 237 }
ebrus 0:6bc4ac881c8e 238 // Clear STOPF flag
ebrus 0:6bc4ac881c8e 239 I2C_ClearFlag(i2c, I2C_ICR_STOPCF);
ebrus 0:6bc4ac881c8e 240 }
ebrus 0:6bc4ac881c8e 241 */
ebrus 0:6bc4ac881c8e 242
ebrus 0:6bc4ac881c8e 243 return count;
ebrus 0:6bc4ac881c8e 244 }
ebrus 0:6bc4ac881c8e 245
ebrus 0:6bc4ac881c8e 246 int i2c_byte_read(i2c_t *obj, int last) {
ebrus 0:6bc4ac881c8e 247 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 248 uint8_t data;
ebrus 0:6bc4ac881c8e 249 int timeout;
ebrus 0:6bc4ac881c8e 250
ebrus 0:6bc4ac881c8e 251 // Wait until the byte is received
ebrus 0:6bc4ac881c8e 252 timeout = FLAG_TIMEOUT;
ebrus 0:6bc4ac881c8e 253 while (I2C_GetFlagStatus(i2c, I2C_ISR_RXNE) == RESET) {
ebrus 0:6bc4ac881c8e 254 timeout--;
ebrus 0:6bc4ac881c8e 255 if (timeout == 0) {
ebrus 0:6bc4ac881c8e 256 return 0;
ebrus 0:6bc4ac881c8e 257 }
ebrus 0:6bc4ac881c8e 258 }
ebrus 0:6bc4ac881c8e 259
ebrus 0:6bc4ac881c8e 260 data = I2C_ReceiveData(i2c);
ebrus 0:6bc4ac881c8e 261
ebrus 0:6bc4ac881c8e 262 return (int)data;
ebrus 0:6bc4ac881c8e 263 }
ebrus 0:6bc4ac881c8e 264
ebrus 0:6bc4ac881c8e 265 int i2c_byte_write(i2c_t *obj, int data) {
ebrus 0:6bc4ac881c8e 266 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 267 int timeout;
ebrus 0:6bc4ac881c8e 268
ebrus 0:6bc4ac881c8e 269 // Wait until the previous byte is transmitted
ebrus 0:6bc4ac881c8e 270 timeout = FLAG_TIMEOUT;
ebrus 0:6bc4ac881c8e 271 while (I2C_GetFlagStatus(i2c, I2C_ISR_TXIS) == RESET) {
ebrus 0:6bc4ac881c8e 272 timeout--;
ebrus 0:6bc4ac881c8e 273 if (timeout == 0) {
ebrus 0:6bc4ac881c8e 274 return 0;
ebrus 0:6bc4ac881c8e 275 }
ebrus 0:6bc4ac881c8e 276 }
ebrus 0:6bc4ac881c8e 277
ebrus 0:6bc4ac881c8e 278 I2C_SendData(i2c, (uint8_t)data);
ebrus 0:6bc4ac881c8e 279
ebrus 0:6bc4ac881c8e 280 return 1;
ebrus 0:6bc4ac881c8e 281 }
ebrus 0:6bc4ac881c8e 282
ebrus 0:6bc4ac881c8e 283 void i2c_reset(i2c_t *obj) {
ebrus 0:6bc4ac881c8e 284 if (obj->i2c == I2C_1) {
ebrus 0:6bc4ac881c8e 285 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
ebrus 0:6bc4ac881c8e 286 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
ebrus 0:6bc4ac881c8e 287 }
ebrus 0:6bc4ac881c8e 288 if (obj->i2c == I2C_2) {
ebrus 0:6bc4ac881c8e 289 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
ebrus 0:6bc4ac881c8e 290 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
ebrus 0:6bc4ac881c8e 291 }
ebrus 0:6bc4ac881c8e 292 if (obj->i2c == I2C_3) {
ebrus 0:6bc4ac881c8e 293 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE);
ebrus 0:6bc4ac881c8e 294 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE);
ebrus 0:6bc4ac881c8e 295 }
ebrus 0:6bc4ac881c8e 296 }
ebrus 0:6bc4ac881c8e 297
ebrus 0:6bc4ac881c8e 298 #if DEVICE_I2CSLAVE
ebrus 0:6bc4ac881c8e 299
ebrus 0:6bc4ac881c8e 300 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
ebrus 0:6bc4ac881c8e 301 I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
ebrus 0:6bc4ac881c8e 302 uint16_t tmpreg;
ebrus 0:6bc4ac881c8e 303
ebrus 0:6bc4ac881c8e 304 // Get the old register value
ebrus 0:6bc4ac881c8e 305 tmpreg = i2c->OAR1;
ebrus 0:6bc4ac881c8e 306 // Reset address bits
ebrus 0:6bc4ac881c8e 307 tmpreg &= 0xFC00;
ebrus 0:6bc4ac881c8e 308 // Set new address
ebrus 0:6bc4ac881c8e 309 tmpreg |= (uint16_t)((uint16_t)address & (uint16_t)0x00FE); // 7-bits
ebrus 0:6bc4ac881c8e 310 // Store the new register value
ebrus 0:6bc4ac881c8e 311 i2c->OAR1 = tmpreg;
ebrus 0:6bc4ac881c8e 312 }
ebrus 0:6bc4ac881c8e 313
ebrus 0:6bc4ac881c8e 314 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
ebrus 0:6bc4ac881c8e 315 // Nothing to do
ebrus 0:6bc4ac881c8e 316 }
ebrus 0:6bc4ac881c8e 317
ebrus 0:6bc4ac881c8e 318 // See I2CSlave.h
ebrus 0:6bc4ac881c8e 319 #define NoData 0 // the slave has not been addressed
ebrus 0:6bc4ac881c8e 320 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
ebrus 0:6bc4ac881c8e 321 #define WriteGeneral 2 // the master is writing to all slave
ebrus 0:6bc4ac881c8e 322 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
ebrus 0:6bc4ac881c8e 323
ebrus 0:6bc4ac881c8e 324 int i2c_slave_receive(i2c_t *obj) {
ebrus 0:6bc4ac881c8e 325 // TO BE DONE
ebrus 0:6bc4ac881c8e 326 return (0);
ebrus 0:6bc4ac881c8e 327 }
ebrus 0:6bc4ac881c8e 328
ebrus 0:6bc4ac881c8e 329 int i2c_slave_read(i2c_t *obj, char *data, int length) {
ebrus 0:6bc4ac881c8e 330 int count = 0;
ebrus 0:6bc4ac881c8e 331
ebrus 0:6bc4ac881c8e 332 // Read all bytes
ebrus 0:6bc4ac881c8e 333 for (count = 0; count < length; count++) {
ebrus 0:6bc4ac881c8e 334 data[count] = i2c_byte_read(obj, 0);
ebrus 0:6bc4ac881c8e 335 }
ebrus 0:6bc4ac881c8e 336
ebrus 0:6bc4ac881c8e 337 return count;
ebrus 0:6bc4ac881c8e 338 }
ebrus 0:6bc4ac881c8e 339
ebrus 0:6bc4ac881c8e 340 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
ebrus 0:6bc4ac881c8e 341 int count = 0;
ebrus 0:6bc4ac881c8e 342
ebrus 0:6bc4ac881c8e 343 // Write all bytes
ebrus 0:6bc4ac881c8e 344 for (count = 0; count < length; count++) {
ebrus 0:6bc4ac881c8e 345 i2c_byte_write(obj, data[count]);
ebrus 0:6bc4ac881c8e 346 }
ebrus 0:6bc4ac881c8e 347
ebrus 0:6bc4ac881c8e 348 return count;
ebrus 0:6bc4ac881c8e 349 }
ebrus 0:6bc4ac881c8e 350
ebrus 0:6bc4ac881c8e 351
ebrus 0:6bc4ac881c8e 352 #endif // DEVICE_I2CSLAVE
ebrus 0:6bc4ac881c8e 353
ebrus 0:6bc4ac881c8e 354 #endif // DEVICE_I2C