mbed library sources
Dependents: FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more
targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/sleep.c@0:6bc4ac881c8e, 2016-07-28 (annotated)
- Committer:
- ebrus
- Date:
- Thu Jul 28 15:56:34 2016 +0000
- Revision:
- 0:6bc4ac881c8e
1;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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ebrus | 0:6bc4ac881c8e | 1 | /* mbed Microcontroller Library |
ebrus | 0:6bc4ac881c8e | 2 | * Copyright (c) 2006-2013 ARM Limited |
ebrus | 0:6bc4ac881c8e | 3 | * |
ebrus | 0:6bc4ac881c8e | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
ebrus | 0:6bc4ac881c8e | 5 | * you may not use this file except in compliance with the License. |
ebrus | 0:6bc4ac881c8e | 6 | * You may obtain a copy of the License at |
ebrus | 0:6bc4ac881c8e | 7 | * |
ebrus | 0:6bc4ac881c8e | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
ebrus | 0:6bc4ac881c8e | 9 | * |
ebrus | 0:6bc4ac881c8e | 10 | * Unless required by applicable law or agreed to in writing, software |
ebrus | 0:6bc4ac881c8e | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
ebrus | 0:6bc4ac881c8e | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
ebrus | 0:6bc4ac881c8e | 13 | * See the License for the specific language governing permissions and |
ebrus | 0:6bc4ac881c8e | 14 | * limitations under the License. |
ebrus | 0:6bc4ac881c8e | 15 | */ |
ebrus | 0:6bc4ac881c8e | 16 | #include "sleep_api.h" |
ebrus | 0:6bc4ac881c8e | 17 | #include "cmsis.h" |
ebrus | 0:6bc4ac881c8e | 18 | #include "fsl_mcg_hal.h" |
ebrus | 0:6bc4ac881c8e | 19 | #include "fsl_smc_hal.h" |
ebrus | 0:6bc4ac881c8e | 20 | |
ebrus | 0:6bc4ac881c8e | 21 | void sleep(void) { |
ebrus | 0:6bc4ac881c8e | 22 | smc_power_mode_protection_config_t sleep_config = {true}; |
ebrus | 0:6bc4ac881c8e | 23 | SMC_HAL_SetProtection(SMC_BASE, &sleep_config); |
ebrus | 0:6bc4ac881c8e | 24 | |
ebrus | 0:6bc4ac881c8e | 25 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; |
ebrus | 0:6bc4ac881c8e | 26 | __WFI(); |
ebrus | 0:6bc4ac881c8e | 27 | } |
ebrus | 0:6bc4ac881c8e | 28 | |
ebrus | 0:6bc4ac881c8e | 29 | void deepsleep(void) { |
ebrus | 0:6bc4ac881c8e | 30 | mcg_clock_select_t mcg_clock = CLOCK_HAL_GetClkSrcMode(MCG_BASE); |
ebrus | 0:6bc4ac881c8e | 31 | |
ebrus | 0:6bc4ac881c8e | 32 | smc_power_mode_protection_config_t sleep_config = {true}; |
ebrus | 0:6bc4ac881c8e | 33 | SMC_HAL_SetProtection(SMC_BASE, &sleep_config); |
ebrus | 0:6bc4ac881c8e | 34 | SMC->PMCTRL = SMC_PMCTRL_STOPM(2); |
ebrus | 0:6bc4ac881c8e | 35 | |
ebrus | 0:6bc4ac881c8e | 36 | //Deep sleep for ARM core: |
ebrus | 0:6bc4ac881c8e | 37 | SCB->SCR = 1 << SCB_SCR_SLEEPDEEP_Pos; |
ebrus | 0:6bc4ac881c8e | 38 | |
ebrus | 0:6bc4ac881c8e | 39 | __WFI(); |
ebrus | 0:6bc4ac881c8e | 40 | |
ebrus | 0:6bc4ac881c8e | 41 | //Switch back to PLL as clock source if needed |
ebrus | 0:6bc4ac881c8e | 42 | //The interrupt that woke up the device will run at reduced speed |
ebrus | 0:6bc4ac881c8e | 43 | if (mcg_clock == kMcgClkSelOut) { |
ebrus | 0:6bc4ac881c8e | 44 | if (CLOCK_HAL_GetPllStatMode(MCG_BASE) == kMcgPllStatPllClkSel) { |
ebrus | 0:6bc4ac881c8e | 45 | while (CLOCK_HAL_GetLock0Mode(MCG_BASE) == kMcgLockUnlocked); |
ebrus | 0:6bc4ac881c8e | 46 | } |
ebrus | 0:6bc4ac881c8e | 47 | CLOCK_HAL_SetClkSrcMode(MCG_BASE, kMcgClkSelOut); |
ebrus | 0:6bc4ac881c8e | 48 | } |
ebrus | 0:6bc4ac881c8e | 49 | } |